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[209.132.180.67]) by mx.google.com with ESMTP id h14si48016447pgl.426.2019.04.16.07.28.55; Tue, 16 Apr 2019 07:28:55 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=TOzKoZbB; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726576AbfDPO2y (ORCPT + 7 others); Tue, 16 Apr 2019 10:28:54 -0400 Received: from mail-lj1-f196.google.com ([209.85.208.196]:45869 "EHLO mail-lj1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726986AbfDPO2y (ORCPT ); Tue, 16 Apr 2019 10:28:54 -0400 Received: by mail-lj1-f196.google.com with SMTP id y6so19266015ljd.12 for ; Tue, 16 Apr 2019 07:28:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=v8PQx9vdgeVLhqbijrJGIIWCf9IZInAVRMTzTR4fvFg=; b=TOzKoZbBk7lThaXbAANV6Tmx1dRn5KQtVXDawqiAFNPG30+eyAISVtHPs9Vn5FovUB /jKuTWkWURySl+YOzMjvLe65ieLp5Wvs9GmvVwYXL6S5svv+7LJ5Cdxtic00QulL7kDl y7R3f5lOXwMgvw/6bwZWt80WqTni+VayyYIJVhnmaXYNJvhy/tTqvLx9HXifeZO7nL+0 3BTzeIo5CuetCmziWZ/OBHdACYO+L1rpdCHniEzAJ0ys5xjq0qZFhDZKGbhS5RAUHgEN vAchR/VCE/Wl9VXo4JM/ilZYlYdaP9WH/nj4FcJpMSTnXDyQkWiHez7xPpOiPjNCjFhY cENg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=v8PQx9vdgeVLhqbijrJGIIWCf9IZInAVRMTzTR4fvFg=; b=Fpfu76wPbIkuw5P0Z6dnHQJjSyBrU78NurueumPrVwy1+D7uINJbe6hksZvq7h7ma3 Q45e4Q2qjSg+pxY77OoTm3/0IAIDauJEHTZNxws6J3n4JK1Y/hV98pO75ARQ/BSYXdLi dZ98hqiffarVB2YXOHzkTwB8uxRsO35a6T/ly0Q1ZA7mj/5Wy07YrHyCrfpUw722op7y Kq8LtJOd9v/xiLIttY0HxO2vtjQqpxfmo7V/7GqdJJZ7EDIuaMXrG+91C5WASWWDGYKm zP6tugQ3xeYlbVvqx895iruZcLOAurvpiSW6EVPDK4wfqfBm9SvQtqSfnQWgqn50gcuO /x6A== X-Gm-Message-State: APjAAAUUZh/eCEVDSe75ls3ua5cMDKqDI+8TxiKPDlK3WUnJkLtafB5f MhRNG/EyhtbF0+XB9le4UnhEOkLbtjU= X-Received: by 2002:a2e:9c0a:: with SMTP id s10mr24708080lji.162.1555424931870; Tue, 16 Apr 2019 07:28:51 -0700 (PDT) Received: from genomnajs.ideon.se ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id l5sm6687373lfh.70.2019.04.16.07.28.50 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 16 Apr 2019 07:28:50 -0700 (PDT) From: Linus Walleij To: dri-devel@lists.freedesktop.org, Maarten Lankhorst , Maxime Ripard , Sean Paul , Rob Herring Cc: linux-arm-kernel@lists.infradead.org, Linus Walleij , devicetree@vger.kernel.org Subject: [PATCH 2/4 v2] drm/mcde: Add device tree bindings Date: Tue, 16 Apr 2019 16:28:44 +0200 Message-Id: <20190416142844.12038-1-linus.walleij@linaro.org> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This adds the device tree bindings for the ST-Ericsson Multi Channel Display Engine MCDE as found in the U8500 SoCs. Cc: devicetree@vger.kernel.org Signed-off-by: Linus Walleij --- ChangeLog v1->v2: - Drop the graph representation of a port from DSI host to panel child. Just have panels or bridges be children of the DSI host. - Just name the panel node "panel". - Move the HS and LP/ES clocks to be properties on their respective DSI host device nodes. - Clarify that the third DSI block (DSI2) does not have any high speed clock. --- .../devicetree/bindings/display/ste,mcde.txt | 104 ++++++++++++++++++ 1 file changed, 104 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/ste,mcde.txt -- 2.20.1 Reviewed-by: Rob Herring diff --git a/Documentation/devicetree/bindings/display/ste,mcde.txt b/Documentation/devicetree/bindings/display/ste,mcde.txt new file mode 100644 index 000000000000..4c33c692bd5f --- /dev/null +++ b/Documentation/devicetree/bindings/display/ste,mcde.txt @@ -0,0 +1,104 @@ +ST-Ericsson Multi Channel Display Engine MCDE + +The ST-Ericsson MCDE is a display controller with support for compositing +and displaying several channels memory resident graphics data on DSI or +LCD displays or bridges. It is used in the ST-Ericsson U8500 platform. + +Required properties: + +- compatible: must be: + "ste,mcde" +- reg: register base for the main MCDE control registers, should be + 0x1000 in size +- interrupts: the interrupt line for the MCDE +- epod-supply: a phandle to the EPOD regulator +- vana-supply: a phandle to the analog voltage regulator +- clocks: an array of the MCDE clocks in this strict order: + MCDECLK (main MCDE clock), LCDCLK (LCD clock), PLLDSI + (HDMI clock), DSI0ESCLK (DSI0 energy save clock), + DSI1ESCLK (DSI1 energy save clock), DSI2ESCLK (DSI2 energy + save clock) +- clock-names: must be the following array: + "mcde", "lcd", "hdmi" + to match the required clock inputs above. +- #address-cells: should be <1> (for the DSI hosts that will be children) +- #size-cells: should be <1> (for the DSI hosts that will be children) +- ranges: this should always be stated + +Required subnodes: + +The devicetree must specify subnodes for the DSI host adapters. +These must have the following characteristics: + +- compatible: must be: + "ste,mcde-dsi" +- reg: must specify the register range for the DSI host +- vana-supply: phandle to the VANA voltage regulator +- clocks: phandles to the high speed and low power (energy save) clocks + the high speed clock is not present on the third (dsi2) block, so it + should only have the "lp" clock +- clock-names: "hs" for the high speed clock and "lp" for the low power + (energy save) clock +- #address-cells: should be <1> +- #size-cells: should be <0> + +Display panels and bridges will appear as children on the DSI hosts, and +the displays are connected to the DSI hosts using the common binding +for video transmitter interfaces; see +Documentation/devicetree/bindings/media/video-interfaces.txt + +If a DSI host is unused (not connected) it will have no children defined. + +Example: + +mcde@a0350000 { + compatible = "ste,mcde"; + reg = <0xa0350000 0x1000>; + interrupts = ; + epod-supply = <&db8500_b2r2_mcde_reg>; + vana-supply = <&ab8500_ldo_ana_reg>; + clocks = <&prcmu_clk PRCMU_MCDECLK>, /* Main MCDE clock */ + <&prcmu_clk PRCMU_LCDCLK>, /* LCD clock */ + <&prcmu_clk PRCMU_PLLDSI>; /* HDMI clock */ + clock-names = "mcde", "lcd", "hdmi"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + dsi0: dsi@a0351000 { + compatible = "ste,mcde-dsi"; + reg = <0xa0351000 0x1000>; + vana-supply = <&ab8500_ldo_ana_reg>; + clocks = <&prcmu_clk PRCMU_DSI0CLK>, <&prcmu_clk PRCMU_DSI0ESCCLK>; + clock-names = "hs", "lp"; + #address-cells = <1>; + #size-cells = <0>; + + panel { + compatible = "samsung,s6d16d0"; + reg = <0>; + vdd1-supply = <&ab8500_ldo_aux1_reg>; + reset-gpios = <&gpio2 1 GPIO_ACTIVE_LOW>; + }; + + }; + dsi1: dsi@a0352000 { + compatible = "ste,mcde-dsi"; + reg = <0xa0352000 0x1000>; + vana-supply = <&ab8500_ldo_ana_reg>; + clocks = <&prcmu_clk PRCMU_DSI1CLK>, <&prcmu_clk PRCMU_DSI1ESCCLK>; + clock-names = "hs", "lp"; + #address-cells = <1>; + #size-cells = <0>; + }; + dsi2: dsi@a0353000 { + compatible = "ste,mcde-dsi"; + reg = <0xa0353000 0x1000>; + vana-supply = <&ab8500_ldo_ana_reg>; + /* This DSI port only has the Low Power / Energy Save clock */ + clocks = <&prcmu_clk PRCMU_DSI2ESCCLK>; + clock-names = "lp"; + #address-cells = <1>; + #size-cells = <0>; + }; +};