From patchwork Mon Jan 23 15:33:19 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Chris Morgan X-Patchwork-Id: 646259 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C846BC05027 for ; Mon, 23 Jan 2023 15:33:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232149AbjAWPd3 (ORCPT ); Mon, 23 Jan 2023 10:33:29 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39858 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231569AbjAWPd2 (ORCPT ); Mon, 23 Jan 2023 10:33:28 -0500 Received: from mail-oa1-x2f.google.com (mail-oa1-x2f.google.com [IPv6:2001:4860:4864:20::2f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A13391A976 for ; Mon, 23 Jan 2023 07:33:27 -0800 (PST) Received: by mail-oa1-x2f.google.com with SMTP id 586e51a60fabf-15f83e0fc63so14285288fac.11 for ; Mon, 23 Jan 2023 07:33:27 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=vauVSP++ugyn5fGJJedmL7nUBg3JKQVZaXGEjtQiFYU=; b=WF0XUue2aFDq25zhodlWd3r35wvnnQdajKGzc6spVzuY9LWsMKEJsCjOmXRI7QzFHZ vN7SjNDhGTbzjGecGlyixnbrWwpB8XD+284WiSr3e6wBZZl3TrCLpRBwN9Mv/G/Bo0vH 0HfaujGnt4hLG7mnpA9W+MN6FrLhfophwK8vGw3xwqVBeusoqeDff8Pg5SHNTZDyLOD8 yxWgD6vyBYrO/nFtDd0KemDVptxZ/U2KHfoGiNxKPiDAE2DBvB20CFsgh3ycsiYYETPD xA591q9ZIEiYYUUnxjYU5UOEql5xTe4DbAW0i0UehUXI4kDQDD29+ZfxsV4XhQqF0LVp D7wQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=vauVSP++ugyn5fGJJedmL7nUBg3JKQVZaXGEjtQiFYU=; b=UbBdM04dqmLtlvT5dhS8AhUqNgKTFs2dYRPXz5YrzrkEAWjfNMYUN471ov2F1dgK6o Yb9zWVLibioc2HaJVFHi+CcKLRl3Cpizf7BM824Ws0YkiWJ5qCaS5IzC9On+cp753lCU jc+tctELHCf38iPia72snWdIowcOo8x1MfggOjizPI6NdmQXubH/GNPeGKRIBQYJDubs pfF+v0cySLU0FjBVsgX+vKBM0yEiJJK3EB/DGILvrTVwy7PXTIGphLhUcAf6IufaJl9h Gwizo7o/LPDA7lDwo7cOhexflOop0OGswpuQiOyXhA6xbyIbzj/R5PntxDrTWNKExmob nIPw== X-Gm-Message-State: AFqh2kozpqugRwu5MyhAJsyoFxYNWqe5BRhcxZ9rXbtTI5BD5NcEpTFP EMlFJHwW+28zbh/vPRLSh4U= X-Google-Smtp-Source: AMrXdXs8D04h1EPugqFnagYbyJEvqRLkvRoE56HdrUF2u6xKzjAObVATNLkGhzDtz8MYHtXhxolU3w== X-Received: by 2002:a05:6870:4c14:b0:14b:bdda:7754 with SMTP id pk20-20020a0568704c1400b0014bbdda7754mr13651635oab.37.1674488006960; Mon, 23 Jan 2023 07:33:26 -0800 (PST) Received: from localhost.localdomain (76-244-6-13.lightspeed.rcsntx.sbcglobal.net. [76.244.6.13]) by smtp.gmail.com with ESMTPSA id v1-20020a056870708100b0013b9ee734dcsm25459182oae.35.2023.01.23.07.33.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Jan 2023 07:33:26 -0800 (PST) From: Chris Morgan To: dri-devel@lists.freedesktop.org Cc: devicetree@vger.kernel.org, krzysztof.kozlowski+dt@linaro.org, robh+dt@kernel.org, daniel@ffwll.ch, airlied@gmail.com, sam@ravnborg.org, thierry.reding@gmail.com, megous@megous.com, kernel@puri.sm, agx@sigxcpu.org, Chris Morgan , Krzysztof Kozlowski Subject: [PATCH V2 1/3] dt-bindings: panel: Add compatible for Anbernic RG353V-V2 panel Date: Mon, 23 Jan 2023 09:33:19 -0600 Message-Id: <20230123153321.1314350-2-macroalpha82@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230123153321.1314350-1-macroalpha82@gmail.com> References: <20230123153321.1314350-1-macroalpha82@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Chris Morgan The Anbernic RG353V-V2 panel is a 5 inch 640x480 MIPI-DSI LCD panel. It's based on the ST7703 LCD controller just like rocktech,jh057n00900. It's used in a 2nd revision of the Anbernic RG353V handheld gaming device. Like the first revision of the RG353V the control chip is known but the panel itself is unknown, so name it for the device. Signed-off-by: Chris Morgan Acked-by: Krzysztof Kozlowski Acked-by: Guido Günther --- .../devicetree/bindings/display/panel/rocktech,jh057n00900.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/display/panel/rocktech,jh057n00900.yaml b/Documentation/devicetree/bindings/display/panel/rocktech,jh057n00900.yaml index 09b5eb7542f8..150e81090af2 100644 --- a/Documentation/devicetree/bindings/display/panel/rocktech,jh057n00900.yaml +++ b/Documentation/devicetree/bindings/display/panel/rocktech,jh057n00900.yaml @@ -20,6 +20,8 @@ allOf: properties: compatible: enum: + # Anberic RG353V-V2 5.0" 640x480 TFT LCD panel + - anbernic,rg353v-panel-v2 # Rocktech JH057N00900 5.5" 720x1440 TFT LCD panel - rocktech,jh057n00900 # Xingbangda XBD599 5.99" 720x1440 TFT LCD panel From patchwork Mon Jan 23 15:33:20 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Chris Morgan X-Patchwork-Id: 645738 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8BC67C54E94 for ; Mon, 23 Jan 2023 15:33:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231569AbjAWPd3 (ORCPT ); Mon, 23 Jan 2023 10:33:29 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39866 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231724AbjAWPd3 (ORCPT ); Mon, 23 Jan 2023 10:33:29 -0500 Received: from mail-oa1-x2b.google.com (mail-oa1-x2b.google.com [IPv6:2001:4860:4864:20::2b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 52AA223C4D for ; Mon, 23 Jan 2023 07:33:28 -0800 (PST) Received: by mail-oa1-x2b.google.com with SMTP id 586e51a60fabf-15ff0a1f735so6094164fac.5 for ; Mon, 23 Jan 2023 07:33:28 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=RASwLuUQeThiSsPWu6gVcHRtrdGgei4NA5W2fbAqfS4=; b=MpkGkvAK8zg7raBn7JnAO94GpkuLzSuzhgW8dPuf69D5CpUqGcUJpiEqJiazUHuhvE VkLyEM3aaH1upUjucee7d8iGuquOshZPSukqf0jv0i1hHRaKks4gOkXL/mL32XTlXzdg txpl3ElPVgfRxJTdivlpyIDrQDnHlG1M65k/Ynie21K43or8wxhNArs8tQDLtbmebCWY DleOxoGE+1eEoGcLA/oOIeAOKZMONnGaRzn36JeTFIY1XeECgd6dDr+/ghbMmXOD1qp9 togOKcMGg0BmXw3YP+3nOeBFOWmaVAgILiTg1OOsgVJIQ5VDlcXDct+aRcG7cSgiu3fh cAWA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=RASwLuUQeThiSsPWu6gVcHRtrdGgei4NA5W2fbAqfS4=; b=n/wmSQ6sY5WJtQo/qXUlsiPWbe4KuRr+baoJRnx0dEy2a4RBgLJ1DSnH5nSADyaZaP 7AhTs+lU/CawGIbZROMwZOG0CWkGWw7M8VkXcm8XSNl9fAAJEJ3wxI9AbyX4eSmkA7iQ w+u/TXB3jOwGF6rhfFIDepD7ZKColAti6qFoJEgLSEbpe5hdCRGSkkh5izVAfW5oj/Jm RoDrpjzgGdTlc7e9xyILhv69AQoogDw0f3ny1rxRbIBGDd8zu0XOyVuMHNczlcyIQ+BA pzofN1b+pntlle9mvAZ0vS0wDD5BQaoZQAIHzNCryd6Uj/oj+4bI2ogFw7B7DAia1wjE WO4Q== X-Gm-Message-State: AFqh2kpxwExQPs2Rhkm5MJAVLEicJvibfmyF5orPcb1rAXDCBy6QQPjE aiYwFjBOjYnUhcImOgGDMl8= X-Google-Smtp-Source: AMrXdXsbM9F4wGlpe4aZwpMgO9ORzaHzEvZ9t+bcMptOS1cBAnRUwkKGfsjwVBC3v3rt9PszGonIwA== X-Received: by 2002:a05:6870:6a8b:b0:150:21db:43ea with SMTP id mv11-20020a0568706a8b00b0015021db43eamr12483416oab.36.1674488007673; Mon, 23 Jan 2023 07:33:27 -0800 (PST) Received: from localhost.localdomain (76-244-6-13.lightspeed.rcsntx.sbcglobal.net. [76.244.6.13]) by smtp.gmail.com with ESMTPSA id v1-20020a056870708100b0013b9ee734dcsm25459182oae.35.2023.01.23.07.33.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Jan 2023 07:33:27 -0800 (PST) From: Chris Morgan To: dri-devel@lists.freedesktop.org Cc: devicetree@vger.kernel.org, krzysztof.kozlowski+dt@linaro.org, robh+dt@kernel.org, daniel@ffwll.ch, airlied@gmail.com, sam@ravnborg.org, thierry.reding@gmail.com, megous@megous.com, kernel@puri.sm, agx@sigxcpu.org, Chris Morgan Subject: [PATCH V2 2/3] drm/panel: st7703: Rename CMD_UNKNOWN_C6 to CMD_SETECO Date: Mon, 23 Jan 2023 09:33:20 -0600 Message-Id: <20230123153321.1314350-3-macroalpha82@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230123153321.1314350-1-macroalpha82@gmail.com> References: <20230123153321.1314350-1-macroalpha82@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Chris Morgan A later revision of the datasheet for the ST7703 refers to this command as "SETECO". Signed-off-by: Chris Morgan Reviewed-by: Guido Günther --- drivers/gpu/drm/panel/panel-sitronix-st7703.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7703.c b/drivers/gpu/drm/panel/panel-sitronix-st7703.c index 86a472b01360..27049a1d9b3e 100644 --- a/drivers/gpu/drm/panel/panel-sitronix-st7703.c +++ b/drivers/gpu/drm/panel/panel-sitronix-st7703.c @@ -41,8 +41,8 @@ #define ST7703_CMD_UNKNOWN_BF 0xBF #define ST7703_CMD_SETSCR 0xC0 #define ST7703_CMD_SETPOWER 0xC1 +#define ST7703_CMD_SETECO 0xC6 #define ST7703_CMD_SETPANEL 0xCC -#define ST7703_CMD_UNKNOWN_C6 0xC6 #define ST7703_CMD_SETGAMMA 0xE0 #define ST7703_CMD_SETEQ 0xE3 #define ST7703_CMD_SETGIP1 0xE9 @@ -266,8 +266,7 @@ static int xbd599_init_sequence(struct st7703 *ctx) * ESD_DET_TIME_SEL = 0 frames */); - /* Undocumented command. */ - dsi_dcs_write_seq(dsi, ST7703_CMD_UNKNOWN_C6, 0x01, 0x00, 0xFF, 0xFF, 0x00); + dsi_dcs_write_seq(dsi, ST7703_CMD_SETECO, 0x01, 0x00, 0xFF, 0xFF, 0x00); dsi_dcs_write_seq(dsi, ST7703_CMD_SETPOWER, 0x74, /* VBTHS, VBTLS: VGH = 17V, VBL = -11V */ From patchwork Mon Jan 23 15:33:21 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Chris Morgan X-Patchwork-Id: 646258 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5C258C54EED for ; Mon, 23 Jan 2023 15:33:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229777AbjAWPda (ORCPT ); Mon, 23 Jan 2023 10:33:30 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39886 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232200AbjAWPd3 (ORCPT ); Mon, 23 Jan 2023 10:33:29 -0500 Received: from mail-oa1-x2d.google.com (mail-oa1-x2d.google.com [IPv6:2001:4860:4864:20::2d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F07DE113D8 for ; Mon, 23 Jan 2023 07:33:28 -0800 (PST) Received: by mail-oa1-x2d.google.com with SMTP id 586e51a60fabf-15ff0a1f735so6094202fac.5 for ; Mon, 23 Jan 2023 07:33:28 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=+DzIJ2COjn9xeN8vwa0ACSTSH6QDSiAWGau2ozq2GaM=; b=NgbeG8TUmXz8RvyUngsOFscix+DorHwUdaSw/phJRxB1hBe0sU4Poe0DMFfTeTcvER neF8O/FwuSTkAAF5A+6tBGSKCnHJ+mRaqOLuXN0N9M6JvyPAO4PstqEfH9Y4IEw770Z4 oP+1WNc6eX5xNoRrP58UBJWLTnPEO6iAnx4m6gfy12s9wM1/fNfAwBNyfa4lF5qJWC4q cfO8RmXmUiTuGL7/Q9KntSqX4wCfoCmg24SVomLDcwRLEog97fS6lz8OR+DW27iHl1LR V2/z+jflRCJ/26cqnpx1njkMrJGki9WsEbY1gerfXaFhQ9w3UOEALKnd+PHAmbPmKWSa 2HBw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=+DzIJ2COjn9xeN8vwa0ACSTSH6QDSiAWGau2ozq2GaM=; b=f+w8ZJPWAAicxocazE7zfY+RPPoEXJIE/bMF8VgN6RroOJDKUnBQxVWlqB8KPTDjNh jV4vDudB7jVvtvVCBWkaK4gNjDqt86FwvAeLT0ks5EPpPfqN4MdTQ8XYucKVPTyA6mXe mQCr3hvVZpeQi+1N8CxHtRwjDdH7FYhVbJprgSMHmyITffzIh6XgQ2lROiJgQKO8MjSb LoKkQSg3RCIjeO77mz7XunYzTIVZld2I8IhMtZX8PyUfcEyWBogX6iMRgPuruy/MNlcj WAqwVk2Cl1s9gGdxAhe5nfbkXVXUuFxtUa6lUuaxe7iw5P7DwLThbhbWmxd+0yHQmHyf rwlw== X-Gm-Message-State: AO0yUKVpDaQ7/ihMAXvCn7KFhFfJSLkSbi+p9w6dy+U/rtQRPA3iCJjG Hd0qVcUvd2gvTtGmVqQ3gDo= X-Google-Smtp-Source: AK7set8llyrhL2If2wcqK4eDliLed6LskNjDm1QyZvXR80fRmLg8+zSFjRwW1wuS+F2Hgkmqb9vYAg== X-Received: by 2002:a05:6870:c110:b0:160:32e8:89e with SMTP id f16-20020a056870c11000b0016032e8089emr327598oad.42.1674488008281; Mon, 23 Jan 2023 07:33:28 -0800 (PST) Received: from localhost.localdomain (76-244-6-13.lightspeed.rcsntx.sbcglobal.net. [76.244.6.13]) by smtp.gmail.com with ESMTPSA id v1-20020a056870708100b0013b9ee734dcsm25459182oae.35.2023.01.23.07.33.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Jan 2023 07:33:28 -0800 (PST) From: Chris Morgan To: dri-devel@lists.freedesktop.org Cc: devicetree@vger.kernel.org, krzysztof.kozlowski+dt@linaro.org, robh+dt@kernel.org, daniel@ffwll.ch, airlied@gmail.com, sam@ravnborg.org, thierry.reding@gmail.com, megous@megous.com, kernel@puri.sm, agx@sigxcpu.org, Chris Morgan Subject: [PATCH V3 3/3] drm/panel: st7703: Add support for Anbernic RG353V-V2 panel Date: Mon, 23 Jan 2023 09:33:21 -0600 Message-Id: <20230123153321.1314350-4-macroalpha82@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230123153321.1314350-1-macroalpha82@gmail.com> References: <20230123153321.1314350-1-macroalpha82@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Chris Morgan The Anbernic RG353V-V2 is a 5 inch panel used in a new revision of the Anbernic RG353V handheld gaming device. Add support for it. Unfortunately it appears this controller is not able to support 120hz or 100hz mode like the first revision panel. Signed-off-by: Chris Morgan Reviewed-by: Guido Günther --- drivers/gpu/drm/panel/panel-sitronix-st7703.c | 97 +++++++++++++++++++ 1 file changed, 97 insertions(+) diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7703.c b/drivers/gpu/drm/panel/panel-sitronix-st7703.c index 27049a1d9b3e..2ed0cdfa86de 100644 --- a/drivers/gpu/drm/panel/panel-sitronix-st7703.c +++ b/drivers/gpu/drm/panel/panel-sitronix-st7703.c @@ -28,6 +28,7 @@ /* Manufacturer specific Commands send via DSI */ #define ST7703_CMD_ALL_PIXEL_OFF 0x22 #define ST7703_CMD_ALL_PIXEL_ON 0x23 +#define ST7703_CMD_SETAPID 0xB1 #define ST7703_CMD_SETDISP 0xB2 #define ST7703_CMD_SETRGBIF 0xB3 #define ST7703_CMD_SETCYC 0xB4 @@ -42,11 +43,14 @@ #define ST7703_CMD_SETSCR 0xC0 #define ST7703_CMD_SETPOWER 0xC1 #define ST7703_CMD_SETECO 0xC6 +#define ST7703_CMD_SETIO 0xC7 +#define ST7703_CMD_SETCABC 0xC8 #define ST7703_CMD_SETPANEL 0xCC #define ST7703_CMD_SETGAMMA 0xE0 #define ST7703_CMD_SETEQ 0xE3 #define ST7703_CMD_SETGIP1 0xE9 #define ST7703_CMD_SETGIP2 0xEA +#define ST7703_CMD_UNKNOWN_EF 0xEF struct st7703 { struct device *dev; @@ -354,6 +358,98 @@ static const struct st7703_panel_desc xbd599_desc = { .init_sequence = xbd599_init_sequence, }; +static int rg353v2_init_sequence(struct st7703 *ctx) +{ + struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev); + + /* + * Init sequence was supplied by the panel vendor. + */ + + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETEXTC, 0xf1, 0x12, 0x83); + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETAPID, 0x00, 0x00, 0x00, + 0xda, 0x80); + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETDISP, 0x00, 0x13, 0x70); + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETRGBIF, 0x10, 0x10, 0x28, + 0x28, 0x03, 0xff, 0x00, 0x00, 0x00, 0x00); + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETCYC, 0x80); + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETBGP, 0x0a, 0x0a); + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETVCOM, 0x92, 0x92); + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETPOWER_EXT, 0x25, 0x22, + 0xf0, 0x63); + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETMIPI, 0x33, 0x81, 0x05, + 0xf9, 0x0e, 0x0e, 0x20, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x44, 0x25, 0x00, 0x90, 0x0a, + 0x00, 0x00, 0x01, 0x4f, 0x01, 0x00, 0x00, 0x37); + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETVDC, 0x47); + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_UNKNOWN_BF, 0x02, 0x11, 0x00); + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETSCR, 0x73, 0x73, 0x50, 0x50, + 0x00, 0x00, 0x12, 0x50, 0x00); + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETPOWER, 0x53, 0xc0, 0x32, + 0x32, 0x77, 0xe1, 0xdd, 0xdd, 0x77, 0x77, 0x33, + 0x33); + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETECO, 0x82, 0x00, 0xbf, 0xff, + 0x00, 0xff); + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETIO, 0xb8, 0x00, 0x0a, 0x00, + 0x00, 0x00); + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETCABC, 0x10, 0x40, 0x1e, + 0x02); + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETPANEL, 0x0b); + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETGAMMA, 0x00, 0x07, 0x0d, + 0x37, 0x35, 0x3f, 0x41, 0x44, 0x06, 0x0c, 0x0d, + 0x0f, 0x11, 0x10, 0x12, 0x14, 0x1a, 0x00, 0x07, + 0x0d, 0x37, 0x35, 0x3f, 0x41, 0x44, 0x06, 0x0c, + 0x0d, 0x0f, 0x11, 0x10, 0x12, 0x14, 0x1a); + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETEQ, 0x07, 0x07, 0x0b, 0x0b, + 0x0b, 0x0b, 0x00, 0x00, 0x00, 0x00, 0xff, 0x00, + 0xc0, 0x10); + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETGIP1, 0xc8, 0x10, 0x02, 0x00, + 0x00, 0xb0, 0xb1, 0x11, 0x31, 0x23, 0x28, 0x80, + 0xb0, 0xb1, 0x27, 0x08, 0x00, 0x04, 0x02, 0x00, + 0x00, 0x00, 0x00, 0x04, 0x02, 0x00, 0x00, 0x00, + 0x88, 0x88, 0xba, 0x60, 0x24, 0x08, 0x88, 0x88, + 0x88, 0x88, 0x88, 0x88, 0x88, 0xba, 0x71, 0x35, + 0x18, 0x88, 0x88, 0x88, 0x88, 0x88, 0x00, 0x00, + 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00); + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETGIP2, 0x97, 0x0a, 0x82, 0x02, + 0x03, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x81, 0x88, 0xba, 0x17, 0x53, 0x88, 0x88, 0x88, + 0x88, 0x88, 0x88, 0x80, 0x88, 0xba, 0x06, 0x42, + 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x23, 0x00, + 0x00, 0x02, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00); + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_UNKNOWN_EF, 0xff, 0xff, 0x01); + + return 0; +} + +static const struct drm_display_mode rg353v2_mode = { + .hdisplay = 640, + .hsync_start = 640 + 40, + .hsync_end = 640 + 40 + 2, + .htotal = 640 + 40 + 2 + 80, + .vdisplay = 480, + .vsync_start = 480 + 18, + .vsync_end = 480 + 18 + 2, + .vtotal = 480 + 18 + 2 + 28, + .clock = 24150, + .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, + .width_mm = 70, + .height_mm = 57, +}; + +static const struct st7703_panel_desc rg353v2_desc = { + .mode = &rg353v2_mode, + .lanes = 4, + .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | + MIPI_DSI_MODE_NO_EOT_PACKET | MIPI_DSI_MODE_LPM, + .format = MIPI_DSI_FMT_RGB888, + .init_sequence = rg353v2_init_sequence, +}; + static int st7703_enable(struct drm_panel *panel) { struct st7703 *ctx = panel_to_st7703(panel); @@ -614,6 +710,7 @@ static void st7703_remove(struct mipi_dsi_device *dsi) } static const struct of_device_id st7703_of_match[] = { + { .compatible = "anbernic,rg353v-panel-v2", .data = &rg353v2_desc }, { .compatible = "rocktech,jh057n00900", .data = &jh057n00900_panel_desc }, { .compatible = "xingbangda,xbd599", .data = &xbd599_desc }, { /* sentinel */ }