From patchwork Mon Jan 30 18:22:02 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 651059 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D78EEC61D97 for ; Mon, 30 Jan 2023 18:23:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237642AbjA3SXT (ORCPT ); Mon, 30 Jan 2023 13:23:19 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56556 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237514AbjA3SXS (ORCPT ); Mon, 30 Jan 2023 13:23:18 -0500 Received: from mail-pj1-x1029.google.com (mail-pj1-x1029.google.com [IPv6:2607:f8b0:4864:20::1029]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5B4DC4522A for ; Mon, 30 Jan 2023 10:22:49 -0800 (PST) Received: by mail-pj1-x1029.google.com with SMTP id e8-20020a17090a9a8800b0022c387f0f93so11345970pjp.3 for ; Mon, 30 Jan 2023 10:22:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=H7KlC1E/qchNA2FeI/jtSOoGuHWoLpY70PQmwt3/hBY=; b=UAEtEYB4sxc8KHHENJmXhvAQAx2IpZSpMetPcln5se48nk/nwrzG6OCr8vrvlOUK4R Q+wYu1Ei9STWCCcjnVi0yf8DJySBsWU4urpY0FXpxBrXWGscireaG+r2UxmjnzPvg2IL LxJ0jAlYtFZ2uAx70DH9AUiRgf4N/2VZIKisxxdLNHogJxvEDSHwnESsH5fIRX9kLuQH BSxZoAcbStJwMc5BV5sYkpWhZJcbX2j9cI28SyWWheLy+onRcrtMd6fX6MzSNd7mf+3V X4QmOiVfdgskQjJPOvOk4K9vQRx+ifGBs1R8C9y9NTsQKp25glwE7MQEAxzFO3dGX8kC Qw0A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=H7KlC1E/qchNA2FeI/jtSOoGuHWoLpY70PQmwt3/hBY=; b=NU66qU9kZE42qjIGZYYmAtevWZi58nWAApODm7Vsiun1N18dMlAfUZyI2ljr+PjVwv yX3rl2dts9CyeBawmJ/p/JNuJDkbWMAchKV/x8FDsDOHoefd1GB7gZopRRlgh67HNvnZ caqqDlVrNZvJaomVYjpoitKuYoFP1QRY8ucdeI7oYM6Y7WwzOAZ9IlVD54FBeAt7OS9V xWeC4UXoKqymE/pT3LRt5MaM6L0V7v4e5qg1IR8gJ1FTb9VeVPskittQRCowHcpLIRwT KziIQUBmnxHhQHSs29G/oAHfBNkPL0BGDGgQhpCa+sxgd27wAmlmC336eGQ56FRFZxNu K2Eg== X-Gm-Message-State: AO0yUKWfrc//0hvK/pTRZMmDnjaG6OY5Z6m2N7JYs4Pb90DHcThCvaFI CB+3VAUx4IPzbIiXhws8hMvCNQ== X-Google-Smtp-Source: AK7set9BFSU/mcgDE8X3OMCmuvOsHIDDbHvxpRXfPUvGLXJNQQEIIvYdvRJRPOqM+/blvkVNGf+CvA== X-Received: by 2002:a05:6a20:441f:b0:ae:47a6:e6d9 with SMTP id ce31-20020a056a20441f00b000ae47a6e6d9mr13097359pzb.6.1675102958616; Mon, 30 Jan 2023 10:22:38 -0800 (PST) Received: from kerodipc.Dlink ([49.206.9.96]) by smtp.gmail.com with ESMTPSA id j193-20020a638bca000000b00478162d9923sm7000291pge.13.2023.01.30.10.22.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 30 Jan 2023 10:22:38 -0800 (PST) From: Sunil V L To: Palmer Dabbelt , Albert Ou , "Rafael J . Wysocki" , Len Brown , Thomas Gleixner , Marc Zyngier , Daniel Lezcano , Jonathan Corbet Cc: linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Anup Patel , Andrew Jones , Atish Patra , Jisheng Zhang Subject: [PATCH 01/24] riscv: move sbi_init() earlier before jump_label_init() Date: Mon, 30 Jan 2023 23:52:02 +0530 Message-Id: <20230130182225.2471414-2-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.38.0 In-Reply-To: <20230130182225.2471414-1-sunilvl@ventanamicro.com> References: <20230130182225.2471414-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org From: Jisheng Zhang We call jump_label_init() in setup_arch() is to use static key mechanism earlier, but riscv jump label relies on the sbi functions, If we enable static key before sbi_init(), the code path looks like: static_branch_enable() .. arch_jump_label_transform() patch_text_nosync() flush_icache_range() flush_icache_all() sbi_remote_fence_i() for CONFIG_RISCV_SBI case __sbi_rfence() Since sbi isn't initialized, so NULL deference! Here is a typical panic log: [ 0.000000] Unable to handle kernel NULL pointer dereference at virtual address 0000000000000000 [ 0.000000] Oops [#1] [ 0.000000] Modules linked in: [ 0.000000] CPU: 0 PID: 0 Comm: swapper Not tainted 5.18.0-rc7+ #79 [ 0.000000] Hardware name: riscv-virtio,qemu (DT) [ 0.000000] epc : 0x0 [ 0.000000] ra : sbi_remote_fence_i+0x1e/0x26 [ 0.000000] epc : 0000000000000000 ra : ffffffff80005826 sp : ffffffff80c03d50 [ 0.000000] gp : ffffffff80ca6178 tp : ffffffff80c0ad80 t0 : 6200000000000000 [ 0.000000] t1 : 0000000000000000 t2 : 62203a6b746e6972 s0 : ffffffff80c03d60 [ 0.000000] s1 : ffffffff80001af6 a0 : 0000000000000000 a1 : 0000000000000000 [ 0.000000] a2 : 0000000000000000 a3 : 0000000000000000 a4 : 0000000000000000 [ 0.000000] a5 : 0000000000000000 a6 : 0000000000000000 a7 : 0000000000080200 [ 0.000000] s2 : ffffffff808b3e48 s3 : ffffffff808bf698 s4 : ffffffff80cb2818 [ 0.000000] s5 : 0000000000000001 s6 : ffffffff80c9c345 s7 : ffffffff80895aa0 [ 0.000000] s8 : 0000000000000001 s9 : 000000000000007f s10: 0000000000000000 [ 0.000000] s11: 0000000000000000 t3 : ffffffff80824d08 t4 : 0000000000000022 [ 0.000000] t5 : 000000000000003d t6 : 0000000000000000 [ 0.000000] status: 0000000000000100 badaddr: 0000000000000000 cause: 000000000000000c [ 0.000000] ---[ end trace 0000000000000000 ]--- [ 0.000000] Kernel panic - not syncing: Attempted to kill the idle task! [ 0.000000] ---[ end Kernel panic - not syncing: Attempted to kill the idle task! ]--- Fix this issue by moving sbi_init() earlier before jump_label_init() Signed-off-by: Jisheng Zhang --- arch/riscv/kernel/setup.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/riscv/kernel/setup.c b/arch/riscv/kernel/setup.c index 86acd690d529..4335f08ffaf2 100644 --- a/arch/riscv/kernel/setup.c +++ b/arch/riscv/kernel/setup.c @@ -270,6 +270,7 @@ void __init setup_arch(char **cmdline_p) *cmdline_p = boot_command_line; early_ioremap_setup(); + sbi_init(); jump_label_init(); parse_early_param(); @@ -287,7 +288,6 @@ void __init setup_arch(char **cmdline_p) misc_mem_init(); init_resources(); - sbi_init(); #ifdef CONFIG_KASAN kasan_init(); From patchwork Mon Jan 30 18:22:03 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 648683 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0B453C636CB for ; Mon, 30 Jan 2023 18:23:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235869AbjA3SXV (ORCPT ); Mon, 30 Jan 2023 13:23:21 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56552 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237713AbjA3SXT (ORCPT ); Mon, 30 Jan 2023 13:23:19 -0500 Received: from mail-pj1-x102d.google.com (mail-pj1-x102d.google.com [IPv6:2607:f8b0:4864:20::102d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 22FE3457E4 for ; Mon, 30 Jan 2023 10:22:50 -0800 (PST) Received: by mail-pj1-x102d.google.com with SMTP id rm7-20020a17090b3ec700b0022c05558d22so11926966pjb.5 for ; Mon, 30 Jan 2023 10:22:50 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=uV9EY4GcIdMg2ei4Z2c7LvEp7Me6Q3TdFGwPQrDSIKc=; b=HnFGgGXu5x/MzSPNUPo2v/pKakFqmqRWg6BQwRTPrZG4sJqOl/VUF4GTP9i9fJrngn LxjYkozJRcGqTFtpW1ZJenp6ieACXPwwdG8MofsYgdXKJo5bGJiU0jbTysRY6DO9X+JD d9Zk77XxcXjHiM85uUyrqJTmc7fAHFRL1A4fD+B7GRTbo7uY2M8vLRiPTp5ZYb/dLo9T /SYJqVtO/2F4YdkMHCFjfdUDBtdyKQHJsdI5DwhbrCwQaIjM5lYyqZYggOVeBPbj4vo2 dDyQwLdHBvmIGLO/TMUSRZtfcaEzTpFPU9j3uW5NE2cW9jpp5hZ1pilvVSBNhPXLL49z JgYQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=uV9EY4GcIdMg2ei4Z2c7LvEp7Me6Q3TdFGwPQrDSIKc=; b=vm81qyccdgn7xxtlhdcdSDN1iusd8othUSUv1DO1h5FkwjofrrPAhf9BJCQMdfVhy5 02mAckP+lCtMDflg8tYSyplj4sJ8yQurtlRz+pAt6P36z7quU+Tlx7nXeDzf/6Avptb/ GbWM6x+x3bVA/0boZ8zI4mWytqhnIGqlyQvRWKHYoIVEVHlrfXclvzbbhYtJFt6n3I4n 8uFTsuia5/hcGp1JpTWlgzAHE6nZzUA0iuao6lFUGZKw7196VMbxP7+7BSgyZ7dOaYZU v3jnZwFAW6X43gGRA86FFynrv6HQ95O9M+Hc7ADaTYM7eGV5OAMgrXBQMlRs+vYoF+r0 h3wQ== X-Gm-Message-State: AO0yUKWXKbWimio56fttr/ufSgW8fAE4pvtJPEuXvKvFjDgKaht9eGet c0crkVpp8OxsSZFF50ocPaisvw== X-Google-Smtp-Source: AK7set81m2sVmD0y/bGOO8qzoxXZgLQgJIi7xrMyNGd5m9OOckwQkYd5K05oM4haw3dx8ZgNydqYQw== X-Received: by 2002:a17:90b:3805:b0:22c:4e1:93e with SMTP id mq5-20020a17090b380500b0022c04e1093emr23296691pjb.15.1675102963434; Mon, 30 Jan 2023 10:22:43 -0800 (PST) Received: from kerodipc.Dlink ([49.206.9.96]) by smtp.gmail.com with ESMTPSA id j193-20020a638bca000000b00478162d9923sm7000291pge.13.2023.01.30.10.22.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 30 Jan 2023 10:22:43 -0800 (PST) From: Sunil V L To: Palmer Dabbelt , Albert Ou , "Rafael J . Wysocki" , Len Brown , Thomas Gleixner , Marc Zyngier , Daniel Lezcano , Jonathan Corbet Cc: linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Anup Patel , Andrew Jones , Atish Patra , Sunil V L , Robert Moore , acpica-devel@lists.linuxfoundation.org Subject: [PATCH 02/24] ACPICA: MADT: Add RISC-V INTC interrupt controller Date: Mon, 30 Jan 2023 23:52:03 +0530 Message-Id: <20230130182225.2471414-3-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.38.0 In-Reply-To: <20230130182225.2471414-1-sunilvl@ventanamicro.com> References: <20230130182225.2471414-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org The ECR to add RISC-V INTC interrupt controller is approved by the UEFI forum and will be availabl in the next revision of the ACPI specification. This patch is not yet merged in ACPICA but a PR is raised. ACPICA PR: https://github.com/acpica/acpica/pull/804 Reference: Mantis ID: 2348 Cc: Robert Moore Cc: acpica-devel@lists.linuxfoundation.org Signed-off-by: Sunil V L --- include/acpi/actbl2.h | 21 ++++++++++++++++++++- 1 file changed, 20 insertions(+), 1 deletion(-) diff --git a/include/acpi/actbl2.h b/include/acpi/actbl2.h index b2973dbe37ee..c432fd15db65 100644 --- a/include/acpi/actbl2.h +++ b/include/acpi/actbl2.h @@ -891,7 +891,8 @@ enum acpi_madt_type { ACPI_MADT_TYPE_MSI_PIC = 21, ACPI_MADT_TYPE_BIO_PIC = 22, ACPI_MADT_TYPE_LPC_PIC = 23, - ACPI_MADT_TYPE_RESERVED = 24, /* 24 to 0x7F are reserved */ + ACPI_MADT_TYPE_RINTC = 24, + ACPI_MADT_TYPE_RESERVED = 25, /* 25 to 0x7F are reserved */ ACPI_MADT_TYPE_OEM_RESERVED = 0x80 /* 0x80 to 0xFF are reserved for OEM use */ }; @@ -1250,6 +1251,24 @@ enum acpi_madt_lpc_pic_version { ACPI_MADT_LPC_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ }; +/* 24: RISC-V INTC */ +struct acpi_madt_rintc { + struct acpi_subtable_header header; + u8 version; + u8 reserved; + u32 flags; + u64 hart_id; + u32 uid; /* ACPI processor UID */ +}; + +/* Values for RISC-V INTC Version field above */ + +enum acpi_madt_rintc_version { + ACPI_MADT_RINTC_VERSION_NONE = 0, + ACPI_MADT_RINTC_VERSION_V1 = 1, + ACPI_MADT_RINTC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ +}; + /* 80: OEM data */ struct acpi_madt_oem_data { From patchwork Mon Jan 30 18:22:04 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 648682 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1CBF7C636CB for ; Mon, 30 Jan 2023 18:23:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237961AbjA3SXi (ORCPT ); Mon, 30 Jan 2023 13:23:38 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56816 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237660AbjA3SX0 (ORCPT ); Mon, 30 Jan 2023 13:23:26 -0500 Received: from mail-pl1-x62d.google.com (mail-pl1-x62d.google.com [IPv6:2607:f8b0:4864:20::62d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 73CE65590 for ; Mon, 30 Jan 2023 10:22:54 -0800 (PST) Received: by mail-pl1-x62d.google.com with SMTP id 5so12554546plo.3 for ; Mon, 30 Jan 2023 10:22:54 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=PQmlSJt1mKnn8ZkMRDOuhHD/tvDeAwvwL75cA/i0XSQ=; b=QbvfBF3x8sRkM0Mnn/7yhdTo3EWPdiIllJBGkCmj/QGpf48KiP8LeNvULdX9sxCZOk xiFP+O2wlVL4Gq4cbuWRkJSt535XiYpwSdTb8m4eas8zTtvyr1acHedmKNvCJLRynZMv WOwZeKIHlMjKS3CS5V1Lq5PLZ+AdjrFEoGcYU05bT9wYYfYrk/Nv5Q1PxKPqveXNaiqY etq/G5VtbzZ69YGHfX2qubxDR8qDQNQqcv5bRx4sFIwJTdaXGYWkyz9C8Vu1WbgZ52L7 KEoUJrdXZq8DH0h8L9/OLNamDd2vJtvBnCGv4io/LoAh46QsdpppGSyMk3smSCnDOFo6 66Bw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=PQmlSJt1mKnn8ZkMRDOuhHD/tvDeAwvwL75cA/i0XSQ=; b=y7ABz6f3h4zIoAr3kzVyQMk5aHU1yO8hpPfAqOC4TJC1EdkQESVrY6SHrSLBhdmhVn S+pih5x5ZQ2eMvetJ3ZZTFcs+Pc2QKXHdquEsFWr0B124c0wplkidhKUPbjTejk1tl25 vJcfVShd+u234g0tnbXzbSfIIY8CscVRAVBy3627ZO7OyETJveswPnGslyavzkJH6J8L oJ8x8tK6NnV0/Ewlm9lCJkupW82XJxeMYwpdditBsm4qhyPO1+SNU7ryMyxVHPikoRrL oPSZFeTNNIOLCWaBVL/CRfuAkm20Gh04BOQPMTRZf8Wq6y0LDFRzC29PXKzhV13Rd67t VSwg== X-Gm-Message-State: AO0yUKXxpx2ODeUEF/k0qbvIPaoa1jfP9imAbfbVNY2xfPbjgvF5+LUK nKvPWyiUYEZdOcZvAtZFMUHVxA== X-Google-Smtp-Source: AK7set/VYyvu92zZ3Xjk7mGEuU3c3+cw5HP/k76M0jAq7oPCWLADq7XR3KkvpFIG2EbGQYv5z3LwlQ== X-Received: by 2002:a05:6a21:7885:b0:bc:f189:505d with SMTP id bf5-20020a056a21788500b000bcf189505dmr6444557pzc.48.1675102968293; Mon, 30 Jan 2023 10:22:48 -0800 (PST) Received: from kerodipc.Dlink ([49.206.9.96]) by smtp.gmail.com with ESMTPSA id j193-20020a638bca000000b00478162d9923sm7000291pge.13.2023.01.30.10.22.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 30 Jan 2023 10:22:47 -0800 (PST) From: Sunil V L To: Palmer Dabbelt , Albert Ou , "Rafael J . Wysocki" , Len Brown , Thomas Gleixner , Marc Zyngier , Daniel Lezcano , Jonathan Corbet Cc: linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Anup Patel , Andrew Jones , Atish Patra , Sunil V L , Robert Moore , acpica-devel@lists.linuxfoundation.org Subject: [PATCH 03/24] ACPICA: Add structure definitions for RISC-V RHCT Date: Mon, 30 Jan 2023 23:52:04 +0530 Message-Id: <20230130182225.2471414-4-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.38.0 In-Reply-To: <20230130182225.2471414-1-sunilvl@ventanamicro.com> References: <20230130182225.2471414-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org RISC-V Hart Capabilities Table (RHCT) is a new static table. The ECR to add RHCT is approved by the UEFI forum and will be available in the next version of the ACPI spec. This patch is not yet merged in ACPICA but a PR is raised. ACPICA PR: https://github.com/acpica/acpica/pull/804 Reference: Mantis: 2349 Cc: Robert Moore Cc: acpica-devel@lists.linuxfoundation.org Signed-off-by: Sunil V L --- include/acpi/actbl2.h | 48 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 48 insertions(+) diff --git a/include/acpi/actbl2.h b/include/acpi/actbl2.h index c432fd15db65..86bb79fdfa62 100644 --- a/include/acpi/actbl2.h +++ b/include/acpi/actbl2.h @@ -47,6 +47,7 @@ #define ACPI_SIG_PRMT "PRMT" /* Platform Runtime Mechanism Table */ #define ACPI_SIG_RASF "RASF" /* RAS Feature table */ #define ACPI_SIG_RGRT "RGRT" /* Regulatory Graphics Resource Table */ +#define ACPI_SIG_RHCT "RHCT" /* RISC-V Hart Capabilities Table */ #define ACPI_SIG_SBST "SBST" /* Smart Battery Specification Table */ #define ACPI_SIG_SDEI "SDEI" /* Software Delegated Exception Interface Table */ #define ACPI_SIG_SDEV "SDEV" /* Secure Devices table */ @@ -2604,6 +2605,53 @@ enum acpi_rgrt_image_type { ACPI_RGRT_TYPE_RESERVED = 2 /* 2 and greater are reserved */ }; +/******************************************************************************* + * + * RHCT - RISC-V Hart Capabilities Table + * Version 1 + * + ******************************************************************************/ + +struct acpi_table_rhct { + struct acpi_table_header header; /* Common ACPI table header */ + u32 reserved; + u64 time_base_freq; + u32 node_count; + u32 node_offset; +}; + +/* + * RHCT subtables + */ +struct acpi_rhct_node_header { + u16 type; + u16 length; + u16 revision; +}; + +/* Values for RHCT subtable Type above */ + +enum acpi_rhct_node_type { + ACPI_RHCT_NODE_TYPE_ISA_STRING = 0x0000, + ACPI_RHCT_NODE_TYPE_HART_INFO = 0xFFFF, +}; + +/* + * RHCT node specific subtables + */ + +/* ISA string node structure */ +struct acpi_rhct_isa_string { + u16 isa_length; + char isa[]; +}; + +/* Hart Info node structure */ +struct acpi_rhct_hart_info { + u16 num_offsets; + u32 uid; /* ACPI processor UID */ +}; + /******************************************************************************* * * SBST - Smart Battery Specification Table From patchwork Mon Jan 30 18:22:05 2023 Content-Type: text/plain; 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Mon, 30 Jan 2023 10:22:52 -0800 (PST) Received: from kerodipc.Dlink ([49.206.9.96]) by smtp.gmail.com with ESMTPSA id j193-20020a638bca000000b00478162d9923sm7000291pge.13.2023.01.30.10.22.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 30 Jan 2023 10:22:52 -0800 (PST) From: Sunil V L To: Palmer Dabbelt , Albert Ou , "Rafael J . Wysocki" , Len Brown , Thomas Gleixner , Marc Zyngier , Daniel Lezcano , Jonathan Corbet Cc: linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Anup Patel , Andrew Jones , Atish Patra , Sunil V L Subject: [PATCH 04/24] RISC-V: ACPI: Add empty headers to enable ACPI core Date: Mon, 30 Jan 2023 23:52:05 +0530 Message-Id: <20230130182225.2471414-5-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.38.0 In-Reply-To: <20230130182225.2471414-1-sunilvl@ventanamicro.com> References: <20230130182225.2471414-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org Few header files are required unconditionally by ACPI core. So add empty header files for now and update it when needed. Signed-off-by: Sunil V L --- arch/riscv/include/asm/acenv.h | 17 +++++++++++++++++ arch/riscv/include/asm/cpu.h | 9 +++++++++ 2 files changed, 26 insertions(+) create mode 100644 arch/riscv/include/asm/acenv.h create mode 100644 arch/riscv/include/asm/cpu.h diff --git a/arch/riscv/include/asm/acenv.h b/arch/riscv/include/asm/acenv.h new file mode 100644 index 000000000000..bbc38ecdf753 --- /dev/null +++ b/arch/riscv/include/asm/acenv.h @@ -0,0 +1,17 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * RISC-V specific ACPICA environments and implementation + * + * Copyright (C) 2014, Linaro Ltd. + * Author: Hanjun Guo + * Author: Graeme Gregory + * Copyright (C) 2023, Ventana Micro Systems Inc. + * Author: Sunil V L + */ + +#ifndef _ASM_ACENV_H +#define _ASM_ACENV_H + +/* It is required unconditionally by ACPI core, update it when needed. */ + +#endif /* _ASM_ACENV_H */ diff --git a/arch/riscv/include/asm/cpu.h b/arch/riscv/include/asm/cpu.h new file mode 100644 index 000000000000..51ec1a89a7a9 --- /dev/null +++ b/arch/riscv/include/asm/cpu.h @@ -0,0 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (C) 2014 ARM Ltd. + * Copyright (C) 2023 Ventana Micro Systems Inc. + */ +#ifndef __ASM_CPU_H +#define __ASM_CPU_H + +#endif /* __ASM_CPU_H */ From patchwork Mon Jan 30 18:22:06 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 648681 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 12A14C54EED for ; Mon, 30 Jan 2023 18:23:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238027AbjA3SXm (ORCPT ); Mon, 30 Jan 2023 13:23:42 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57114 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237919AbjA3SXh (ORCPT ); Mon, 30 Jan 2023 13:23:37 -0500 Received: from mail-pj1-x1029.google.com (mail-pj1-x1029.google.com [IPv6:2607:f8b0:4864:20::1029]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 01446E3AF for ; Mon, 30 Jan 2023 10:23:01 -0800 (PST) Received: by mail-pj1-x1029.google.com with SMTP id e10-20020a17090a630a00b0022bedd66e6dso16394302pjj.1 for ; Mon, 30 Jan 2023 10:23:01 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=pahRB1MQHdCryYbha4Boa/nOVNVdk2R7FujvNvjh3AA=; b=MhntFhnnMEzAvogxVHxPm1ax6jj4kTjw7Mv8WB8wpdq0EadJKSqRi+JWbLAiaBWgHE nmaNa5u6uSit/eEY4w0SO2GUfD++fOi8VH0Oc2EDk7WJc6Nv3YvcqtRgWVKM9VLpB9Nj mSus2Rkr0kylLFTxhIksaWe7VgnvSSJv88L1F4hGUKgoXdWYzedJcox0eXrjSFQuC578 q+NqUdyarrhti8297ImRLl8MTLG2XUgqGw1CZzRhwV+/TYsemNH1KO6mXMqSDmcPQLhS imY6dqAFs3Qwc6osGZ3o9vmVG6PFdVLuow4jDWQBu9Ww6spn8DK4hw+KoSK6FAVU944N dSVQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=pahRB1MQHdCryYbha4Boa/nOVNVdk2R7FujvNvjh3AA=; b=lIEVu8W7XVXY/df+58qekvD/TeHuWUpnSDgRq3VCo8tP/RR4bwaXMFczn50P5eXXF0 layPmcwO3uPC7boD1O0FDKX15Zsd8BVvt+saCKBbmWy+Y0AMnSDi3nv+QnoxxIL4A1Ke LUFDYnkqp0PjNiDtB0v9k5GpWpznEkzdIlJ8G5saRvNaNJqrWTkaGuQmoe9c08sfHMjd bIWRDAchRud7W0d1sR7NJUQgDmUr+oc6YJqfVLFOrjKUU0lJeojc/UrPt5qyH6R3cCHf qtdukM9Kg9kXKvOFypS+tWONV50XqDFyo7SMFS/lMyF7FBwlTI7wg1jgIFAKF7rw6AvN 2TMg== X-Gm-Message-State: AFqh2kqqeyv457I9jZKYFvGyk+iqq70Qn8HsmlKCtWXLyWod3pB4Dc1k 09b3hZobQ1Ws4MWnIrRa0nHSDA== X-Google-Smtp-Source: AMrXdXtWe6SJ3kB3Dyaj6wRK9SbGThF/dnr0Ny0A90SETwEQypf8SaWiy1gHIn9GRTTcFlgmkbamBA== X-Received: by 2002:a05:6a21:3987:b0:af:be2a:208f with SMTP id ad7-20020a056a21398700b000afbe2a208fmr53223873pzc.33.1675102977093; Mon, 30 Jan 2023 10:22:57 -0800 (PST) Received: from kerodipc.Dlink ([49.206.9.96]) by smtp.gmail.com with ESMTPSA id j193-20020a638bca000000b00478162d9923sm7000291pge.13.2023.01.30.10.22.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 30 Jan 2023 10:22:56 -0800 (PST) From: Sunil V L To: Palmer Dabbelt , Albert Ou , "Rafael J . Wysocki" , Len Brown , Thomas Gleixner , Marc Zyngier , Daniel Lezcano , Jonathan Corbet Cc: linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Anup Patel , Andrew Jones , Atish Patra , Sunil V L Subject: [PATCH 05/24] RISC-V: ACPI: Add basic functions to build ACPI core Date: Mon, 30 Jan 2023 23:52:06 +0530 Message-Id: <20230130182225.2471414-6-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.38.0 In-Reply-To: <20230130182225.2471414-1-sunilvl@ventanamicro.com> References: <20230130182225.2471414-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org Introduce acpi.c and its related header files to provide fundamental needs of extern variables and functions for ACPI core. - asm/acpi.h for arch specific variables and functions needed by ACPI driver core; - acpi.c - Add function to initialize ACPI tables. - acpi.c for RISC-V related ACPI implementation for ACPI driver core; Code is mostly leveraged from ARM64. Signed-off-by: Sunil V L --- arch/riscv/include/asm/acpi.h | 60 ++++++++++++ arch/riscv/kernel/Makefile | 2 + arch/riscv/kernel/acpi.c | 178 ++++++++++++++++++++++++++++++++++ 3 files changed, 240 insertions(+) create mode 100644 arch/riscv/include/asm/acpi.h create mode 100644 arch/riscv/kernel/acpi.c diff --git a/arch/riscv/include/asm/acpi.h b/arch/riscv/include/asm/acpi.h new file mode 100644 index 000000000000..8b9babaf3f25 --- /dev/null +++ b/arch/riscv/include/asm/acpi.h @@ -0,0 +1,60 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (C) 2013-2014, Linaro Ltd. + * Author: Al Stone + * Author: Graeme Gregory + * Author: Hanjun Guo + * + * Copyright (C) 2021-2023, Ventana Micro Systems Inc. + * Author: Sunil V L + */ + +#ifndef _ASM_ACPI_H +#define _ASM_ACPI_H + +/* Basic configuration for ACPI */ +#ifdef CONFIG_ACPI + +/* ACPI table mapping after acpi_permanent_mmap is set */ +void *acpi_os_ioremap(acpi_physical_address phys, acpi_size size); +#define acpi_os_ioremap acpi_os_ioremap + +#define acpi_strict 1 /* No out-of-spec workarounds on RISC-V */ +extern int acpi_disabled; +extern int acpi_noirq; +extern int acpi_pci_disabled; +static inline void disable_acpi(void) +{ + acpi_disabled = 1; + acpi_pci_disabled = 1; + acpi_noirq = 1; +} + +static inline void enable_acpi(void) +{ + acpi_disabled = 0; + acpi_pci_disabled = 0; + acpi_noirq = 0; +} + +/* + * The ACPI processor driver for ACPI core code needs this macro + * to find out this cpu was already mapped (mapping from CPU hardware + * ID to CPU logical ID) or not. + */ +#define cpu_physical_id(cpu) cpuid_to_hartid_map(cpu) + +/* + * It's used from ACPI core in kdump to boot UP system with SMP kernel. + * Since MADT must provide at least one IMSIC structure for AIA + * initialization, CPU will be always available in MADT on RISC-V. + */ +static inline bool acpi_has_cpu_in_madt(void) +{ + return true; +} + +static inline void arch_fix_phys_package_id(int num, u32 slot) { } +#endif + +#endif /*_ASM_ACPI_H*/ diff --git a/arch/riscv/kernel/Makefile b/arch/riscv/kernel/Makefile index 67f542be1bea..f979dc8cf47d 100644 --- a/arch/riscv/kernel/Makefile +++ b/arch/riscv/kernel/Makefile @@ -90,3 +90,5 @@ obj-$(CONFIG_EFI) += efi.o obj-$(CONFIG_COMPAT) += compat_syscall_table.o obj-$(CONFIG_COMPAT) += compat_signal.o obj-$(CONFIG_COMPAT) += compat_vdso/ + +obj-$(CONFIG_ACPI) += acpi.o diff --git a/arch/riscv/kernel/acpi.c b/arch/riscv/kernel/acpi.c new file mode 100644 index 000000000000..9c1aa57bf4f7 --- /dev/null +++ b/arch/riscv/kernel/acpi.c @@ -0,0 +1,178 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * RISC-V Specific Low-Level ACPI Boot Support + * + * Copyright (C) 2013-2014, Linaro Ltd. + * Author: Al Stone + * Author: Graeme Gregory + * Author: Hanjun Guo + * Author: Tomasz Nowicki + * Author: Naresh Bhat + * + * Copyright (C) 2021-2023, Ventana Micro Systems Inc. + * Author: Sunil V L + */ + +#include +#include +#include +#include +#include +#include + +int acpi_noirq = 1; /* skip ACPI IRQ initialization */ +int acpi_disabled = 1; +EXPORT_SYMBOL(acpi_disabled); + +int acpi_pci_disabled = 1; /* skip ACPI PCI scan and IRQ initialization */ +EXPORT_SYMBOL(acpi_pci_disabled); + +static bool param_acpi_off __initdata; +static bool param_acpi_on __initdata; +static bool param_acpi_force __initdata; + +static int __init parse_acpi(char *arg) +{ + if (!arg) + return -EINVAL; + + /* "acpi=off" disables both ACPI table parsing and interpreter */ + if (strcmp(arg, "off") == 0) + param_acpi_off = true; + else if (strcmp(arg, "on") == 0) /* prefer ACPI over DT */ + param_acpi_on = true; + else if (strcmp(arg, "force") == 0) /* force ACPI to be enabled */ + param_acpi_force = true; + else + return -EINVAL; /* Core will print when we return error */ + + return 0; +} +early_param("acpi", parse_acpi); + +/* + * __acpi_map_table() will be called before page_init(), so early_ioremap() + * or early_memremap() should be called here to for ACPI table mapping. + */ +void __init __iomem *__acpi_map_table(unsigned long phys, unsigned long size) +{ + if (!size) + return NULL; + + return early_memremap(phys, size); +} + +void __init __acpi_unmap_table(void __iomem *map, unsigned long size) +{ + if (!map || !size) + return; + + early_memunmap(map, size); +} + +void *acpi_os_ioremap(acpi_physical_address phys, acpi_size size) +{ + return memremap(phys, size, MEMREMAP_WB); +} + +/* + * acpi_fadt_sanity_check() - Check FADT presence and carry out sanity + * checks on it + * + * Return 0 on success, <0 on failure + */ +static int __init acpi_fadt_sanity_check(void) +{ + struct acpi_table_header *table; + struct acpi_table_fadt *fadt; + acpi_status status; + int ret = 0; + + /* + * FADT is required on riscv; retrieve it to check its presence + * and carry out revision and ACPI HW reduced compliancy tests + */ + status = acpi_get_table(ACPI_SIG_FADT, 0, &table); + if (ACPI_FAILURE(status)) { + const char *msg = acpi_format_exception(status); + + pr_err("Failed to get FADT table, %s\n", msg); + return -ENODEV; + } + + fadt = (struct acpi_table_fadt *)table; + + /* + * TODO: Should we add FADT version checks? + */ + + if (!(fadt->flags & ACPI_FADT_HW_REDUCED)) { + pr_err("FADT not ACPI hardware reduced compliant\n"); + ret = -EINVAL; + } + + /* + * acpi_get_table() creates FADT table mapping that + * should be released after parsing and before resuming boot + */ + acpi_put_table(table); + return ret; +} + +/* + * acpi_boot_table_init() called from setup_arch(), always. + * 1. find RSDP and get its address, and then find XSDT + * 2. extract all tables and checksums them all + * 3. check ACPI FADT revision + * 4. check ACPI FADT HW reduced flag + * + * We can parse ACPI boot-time tables such as MADT after + * this function is called. + * + * On return ACPI is enabled if either: + * + * - ACPI tables are initialized and sanity checks passed + * - acpi=force was passed in the command line and ACPI was not disabled + * explicitly through acpi=off command line parameter + * + * ACPI is disabled on function return otherwise + */ +void __init acpi_boot_table_init(void) +{ + /* + * Enable ACPI instead of device tree unless + * - ACPI has been disabled explicitly (acpi=off), or + * - firmware has not populated ACPI ptr in EFI system table + */ + + if (param_acpi_off || (efi.acpi20 == EFI_INVALID_TABLE_ADDR)) + goto done; + /* + * ACPI is disabled at this point. Enable it in order to parse + * the ACPI tables and carry out sanity checks + */ + enable_acpi(); + + /* + * If ACPI tables are initialized and FADT sanity checks passed, + * leave ACPI enabled and carry on booting; otherwise disable ACPI + * on initialization error. + * If acpi=force was passed on the command line it forces ACPI + * to be enabled even if its initialization failed. + */ + if (acpi_table_init() || acpi_fadt_sanity_check()) { + pr_err("Failed to init ACPI tables\n"); + if (!param_acpi_force) + disable_acpi(); + } + +done: + if (acpi_disabled) { + if (earlycon_acpi_spcr_enable) + early_init_dt_scan_chosen_stdout(); + } else { + acpi_parse_spcr(earlycon_acpi_spcr_enable, true); + if (IS_ENABLED(CONFIG_ACPI_BGRT)) + acpi_table_parse(ACPI_SIG_BGRT, acpi_parse_bgrt); + } +} From patchwork Mon Jan 30 18:22:07 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 651056 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7073AC636D0 for ; Mon, 30 Jan 2023 18:24:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238101AbjA3SYB (ORCPT ); Mon, 30 Jan 2023 13:24:01 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57114 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238020AbjA3SXm (ORCPT ); Mon, 30 Jan 2023 13:23:42 -0500 Received: from mail-pj1-x102d.google.com (mail-pj1-x102d.google.com [IPv6:2607:f8b0:4864:20::102d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2BF3F18B06 for ; Mon, 30 Jan 2023 10:23:08 -0800 (PST) Received: by mail-pj1-x102d.google.com with SMTP id on9-20020a17090b1d0900b002300a96b358so559959pjb.1 for ; Mon, 30 Jan 2023 10:23:08 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ez9zOMlap25JS09j6G2VSm957wPlmGGDqcc/YOqCD/M=; b=ZALYsSd6QGZRuTtO53OYR7dsp9VVOw/W/YNYZ9/vVpK3xUlcx/wL651WUsOjDp9t7/ WwA7Cv9udLCB6QweFEHYqFxxXznTkUUVYOPxtnUXVHNn2KMirZ7uFyDqj1LJ4zFgjvi+ fLS+1TAT6YQG0vQo/kdBhwE5haBA8y/K+49TFsBnd5cfI+tlhBXXEZ9rRRXPpQIiqDCV W+4FpfdUqZyfoBklcJDVXTxZHlupNdKZOqtb1VvKGrvNySMlWdR+xWmUslkHuxTikP13 2S9NebTlIk+0VjZ5RTL2EpZZQ33E5/sD3TJXbejwgpmb00P/iX3S1LwGxM0dJOxRha3B FGgA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ez9zOMlap25JS09j6G2VSm957wPlmGGDqcc/YOqCD/M=; b=dbj/MHLOMAwU5JRM6RqatS36TfUy1gUdnBBrUZR3mPYQ0LSNV0MGpQtZghQr/5kAgK OfaHpgwr8zKMKMQTxGCECyD9jgVyzvo7az9JHTRhukG/A4Lw6PE5ZbG3HQxNaq/nL6jh RDWlB1JWllzl0OgGPza65oUuyaVB10cxSCXNrbpEHt50NlHNcuWoTJSejr2YBImuerWo TxY766frx2YnTJyxFTZJOIbb9xqBa2CFcifaoo6MmmjD6nNIeZmS7F2VHU2wSF/8fs6m afPE5ju816v/qFoFv/zHSqdJNFJi5gna+9X9oRFi36kbPTA+tyz7WABgnGWIZZ0wwAkD zLRA== X-Gm-Message-State: AO0yUKVpzMGk1xjvtFLzp1HXvZRYpLh16ZawNDaPG+T8MoHSwVLZ5eve PcbfTEz2ZMlN9QkubmqtwGWzQw== X-Google-Smtp-Source: AK7set+hs3F+v3tOHd/3gMihfw9zgIr4f+ZWLQ0nZzTPXFNry0CAa3JQqlMOykw+1FPSzHeMdZ3O/Q== X-Received: by 2002:a17:90b:3148:b0:22c:9a54:fea with SMTP id ip8-20020a17090b314800b0022c9a540feamr5483511pjb.48.1675102981886; Mon, 30 Jan 2023 10:23:01 -0800 (PST) Received: from kerodipc.Dlink ([49.206.9.96]) by smtp.gmail.com with ESMTPSA id j193-20020a638bca000000b00478162d9923sm7000291pge.13.2023.01.30.10.22.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 30 Jan 2023 10:23:01 -0800 (PST) From: Sunil V L To: Palmer Dabbelt , Albert Ou , "Rafael J . Wysocki" , Len Brown , Thomas Gleixner , Marc Zyngier , Daniel Lezcano , Jonathan Corbet Cc: linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Anup Patel , Andrew Jones , Atish Patra , Sunil V L Subject: [PATCH 06/24] RISC-V: ACPI: Add PCI functions to build ACPI core Date: Mon, 30 Jan 2023 23:52:07 +0530 Message-Id: <20230130182225.2471414-7-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.38.0 In-Reply-To: <20230130182225.2471414-1-sunilvl@ventanamicro.com> References: <20230130182225.2471414-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org When CONFIG_PCI is enabled, ACPI core expects few arch functions related to PCI. Add those functions so that ACPI core gets build. These are levraged from arm64. Signed-off-by: Sunil V L Reviewed-by: Conor Dooley --- arch/riscv/kernel/Makefile | 1 + arch/riscv/kernel/pci.c | 173 +++++++++++++++++++++++++++++++++++++ 2 files changed, 174 insertions(+) create mode 100644 arch/riscv/kernel/pci.c diff --git a/arch/riscv/kernel/Makefile b/arch/riscv/kernel/Makefile index f979dc8cf47d..e9d37639751d 100644 --- a/arch/riscv/kernel/Makefile +++ b/arch/riscv/kernel/Makefile @@ -92,3 +92,4 @@ obj-$(CONFIG_COMPAT) += compat_signal.o obj-$(CONFIG_COMPAT) += compat_vdso/ obj-$(CONFIG_ACPI) += acpi.o +obj-$(CONFIG_PCI) += pci.o diff --git a/arch/riscv/kernel/pci.c b/arch/riscv/kernel/pci.c new file mode 100644 index 000000000000..3388af3a67a0 --- /dev/null +++ b/arch/riscv/kernel/pci.c @@ -0,0 +1,173 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Code borrowed from ARM64 + * + * Copyright (C) 2003 Anton Blanchard , IBM + * Copyright (C) 2014 ARM Ltd. + * Copyright (C) 2022-2023 Ventana Micro System Inc. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#ifdef CONFIG_ACPI + +/* + * raw_pci_read/write - Platform-specific PCI config space access. + */ +int raw_pci_read(unsigned int domain, unsigned int bus, + unsigned int devfn, int reg, int len, u32 *val) +{ + struct pci_bus *b = pci_find_bus(domain, bus); + + if (!b) + return PCIBIOS_DEVICE_NOT_FOUND; + return b->ops->read(b, devfn, reg, len, val); +} + +int raw_pci_write(unsigned int domain, unsigned int bus, + unsigned int devfn, int reg, int len, u32 val) +{ + struct pci_bus *b = pci_find_bus(domain, bus); + + if (!b) + return PCIBIOS_DEVICE_NOT_FOUND; + return b->ops->write(b, devfn, reg, len, val); +} + + +struct acpi_pci_generic_root_info { + struct acpi_pci_root_info common; + struct pci_config_window *cfg; /* config space mapping */ +}; + +int acpi_pci_bus_find_domain_nr(struct pci_bus *bus) +{ + struct pci_config_window *cfg = bus->sysdata; + struct acpi_device *adev = to_acpi_device(cfg->parent); + struct acpi_pci_root *root = acpi_driver_data(adev); + + return root->segment; +} + +static int pci_acpi_root_prepare_resources(struct acpi_pci_root_info *ci) +{ + struct resource_entry *entry, *tmp; + int status; + + status = acpi_pci_probe_root_resources(ci); + resource_list_for_each_entry_safe(entry, tmp, &ci->resources) { + if (!(entry->res->flags & IORESOURCE_WINDOW)) + resource_list_destroy_entry(entry); + } + return status; +} + +/* + * Lookup the bus range for the domain in MCFG, and set up config space + * mapping. + */ +static struct pci_config_window * +pci_acpi_setup_ecam_mapping(struct acpi_pci_root *root) +{ + struct device *dev = &root->device->dev; + struct resource *bus_res = &root->secondary; + u16 seg = root->segment; + const struct pci_ecam_ops *ecam_ops; + struct resource cfgres; + struct acpi_device *adev; + struct pci_config_window *cfg; + int ret; + + ret = pci_mcfg_lookup(root, &cfgres, &ecam_ops); + if (ret) { + dev_err(dev, "%04x:%pR ECAM region not found\n", seg, bus_res); + return NULL; + } + + adev = acpi_resource_consumer(&cfgres); + if (adev) + dev_info(dev, "ECAM area %pR reserved by %s\n", &cfgres, + dev_name(&adev->dev)); + else + dev_warn(dev, FW_BUG "ECAM area %pR not reserved in ACPI namespace\n", + &cfgres); + + cfg = pci_ecam_create(dev, &cfgres, bus_res, ecam_ops); + if (IS_ERR(cfg)) { + dev_err(dev, "%04x:%pR error %ld mapping ECAM\n", seg, bus_res, + PTR_ERR(cfg)); + return NULL; + } + + return cfg; +} + +/* release_info: free resources allocated by init_info */ +static void pci_acpi_generic_release_info(struct acpi_pci_root_info *ci) +{ + struct acpi_pci_generic_root_info *ri; + + ri = container_of(ci, struct acpi_pci_generic_root_info, common); + pci_ecam_free(ri->cfg); + kfree(ci->ops); + kfree(ri); +} + + +/* Interface called from ACPI code to setup PCI host controller */ +struct pci_bus *pci_acpi_scan_root(struct acpi_pci_root *root) +{ + struct acpi_pci_generic_root_info *ri; + struct pci_bus *bus, *child; + struct acpi_pci_root_ops *root_ops; + struct pci_host_bridge *host; + + ri = kzalloc(sizeof(*ri), GFP_KERNEL); + if (!ri) + return NULL; + + root_ops = kzalloc(sizeof(*root_ops), GFP_KERNEL); + if (!root_ops) { + kfree(ri); + return NULL; + } + + ri->cfg = pci_acpi_setup_ecam_mapping(root); + if (!ri->cfg) { + kfree(ri); + kfree(root_ops); + return NULL; + } + + root_ops->release_info = pci_acpi_generic_release_info; + root_ops->prepare_resources = pci_acpi_root_prepare_resources; + root_ops->pci_ops = (struct pci_ops *)&ri->cfg->ops->pci_ops; + bus = acpi_pci_root_create(root, root_ops, &ri->common, ri->cfg); + if (!bus) + return NULL; + + /* If we must preserve the resource configuration, claim now */ + host = pci_find_host_bridge(bus); + if (host->preserve_config) + pci_bus_claim_resources(bus); + + /* + * Assign whatever was left unassigned. If we didn't claim above, + * this will reassign everything. + */ + pci_assign_unassigned_root_bus_resources(bus); + + list_for_each_entry(child, &bus->children, node) + pcie_bus_configure_settings(child); + + return bus; +} + +#endif From patchwork Mon Jan 30 18:22:08 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 648680 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 143BDC54EAA for ; Mon, 30 Jan 2023 18:24:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238107AbjA3SYC (ORCPT ); Mon, 30 Jan 2023 13:24:02 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57368 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237912AbjA3SXp (ORCPT ); Mon, 30 Jan 2023 13:23:45 -0500 Received: from mail-pl1-x631.google.com (mail-pl1-x631.google.com [IPv6:2607:f8b0:4864:20::631]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A4A40BB87 for ; Mon, 30 Jan 2023 10:23:12 -0800 (PST) Received: by mail-pl1-x631.google.com with SMTP id r8so5685654pls.2 for ; Mon, 30 Jan 2023 10:23:12 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ucIkerkqr4QmI5UkdMXW8uEBrl0PvtR2G4Rv/JZMzew=; b=GhrwpBT3N31+nOt/CtgKmnAGMi653hgs/75GWs74Cqht6JG/AUohZ9ARL3pkvdkfmj GGOZc26wqFHqO7mxkcg3Ji/bn0HnDTjs+diwm80n7Jus44aORApx5bQiKn82JGyfTCYv hLqZbyZnw2mPfz9cuau3/Zw6fHKe0n82KCiDP07hBTERsyddqX5tlDZsMxgaTW1bTNpo KxuF/f6QYreKfafdgIWZX2SL50FtFfyns379QlTz0qZo60LNmMpt4E2ApfVNvqyuC5TA bTk7rP8MGgWtYVewzHcJEdMTwddvaOYKbkRdF7nMfjQRFzmhTRP94xlgUWzIEO/hT95a UI5A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ucIkerkqr4QmI5UkdMXW8uEBrl0PvtR2G4Rv/JZMzew=; b=kavRkmIZrwJUEylf82yyUMizCCqZNDk8IC84ozZitlxFHUN9juJMtM8UUrzvgtxHci qq/eV5cKDzTev53WMnb/dMQSlUH9vphTje2Vgh/pavCnQ0M7l7Te+YpC0FWuXlcys0uZ kge28ELAVmzAIvg3bi0/pZKNRC6ADttP8UByif3ZDzx4YLPeEIpB61hR3Pfz2uKzChgo UM8VMMLcQ780USKBDZNSKiwoCgpPMcG+J0wBURGMC/ixVaprL1T+HWCFC3U9hf2eYJFl a0ZeaQgQ+9iHKyIYktZJVM+lcnb7iq8Xey8p1tFFxdm8QIFcB2P2IH47sv0peUMdqtQy urow== X-Gm-Message-State: AFqh2krQh/f3mSPldxEegvvW0KZiceY36sWsbdNxQugVF4kI0PxSlrMy wC+vnJLlLjp8FfiKQ4512w7Gbw== X-Google-Smtp-Source: AMrXdXuB44m0KVUm0j9aNOAU3dJJ68bswZ8ULTfSewfLquMpMN9Q/ZK2SmPbqXYnMOJ4+lGGcK7FKA== X-Received: by 2002:a17:90b:348e:b0:229:5cab:67a8 with SMTP id kd14-20020a17090b348e00b002295cab67a8mr52332355pjb.24.1675102986650; Mon, 30 Jan 2023 10:23:06 -0800 (PST) Received: from kerodipc.Dlink ([49.206.9.96]) by smtp.gmail.com with ESMTPSA id j193-20020a638bca000000b00478162d9923sm7000291pge.13.2023.01.30.10.23.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 30 Jan 2023 10:23:05 -0800 (PST) From: Sunil V L To: Palmer Dabbelt , Albert Ou , "Rafael J . Wysocki" , Len Brown , Thomas Gleixner , Marc Zyngier , Daniel Lezcano , Jonathan Corbet Cc: linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Anup Patel , Andrew Jones , Atish Patra , Sunil V L Subject: [PATCH 07/24] RISC-V: ACPI: Enable ACPI build infrastructure Date: Mon, 30 Jan 2023 23:52:08 +0530 Message-Id: <20230130182225.2471414-8-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.38.0 In-Reply-To: <20230130182225.2471414-1-sunilvl@ventanamicro.com> References: <20230130182225.2471414-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org Enable build infrastructure to add ACPI support for RISC-V. Signed-off-by: Sunil V L --- arch/riscv/Kconfig | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index d153e1cd890b..f664350679bc 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -12,6 +12,9 @@ config 32BIT config RISCV def_bool y + select ACPI_GENERIC_GSI if ACPI + select ACPI_MCFG if (ACPI && PCI) + select ACPI_REDUCED_HARDWARE_ONLY if ACPI select ARCH_CLOCKSOURCE_INIT select ARCH_ENABLE_HUGEPAGE_MIGRATION if HUGETLB_PAGE && MIGRATION select ARCH_ENABLE_SPLIT_PMD_PTLOCK if PGTABLE_LEVELS > 2 @@ -598,6 +601,7 @@ config EFI_STUB config EFI bool "UEFI runtime support" depends on OF && !XIP_KERNEL + select ARCH_SUPPORTS_ACPI if 64BIT select LIBFDT select UCS2_STRING select EFI_PARAMS_FROM_FDT @@ -703,3 +707,4 @@ source "drivers/cpufreq/Kconfig" endmenu # "CPU Power Management" source "arch/riscv/kvm/Kconfig" +source "drivers/acpi/Kconfig" From patchwork Mon Jan 30 18:22:09 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 651055 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4F843C636D3 for ; Mon, 30 Jan 2023 18:24:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236653AbjA3SYC (ORCPT ); Mon, 30 Jan 2023 13:24:02 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57390 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237920AbjA3SXq (ORCPT ); Mon, 30 Jan 2023 13:23:46 -0500 Received: from mail-pj1-x1033.google.com (mail-pj1-x1033.google.com [IPv6:2607:f8b0:4864:20::1033]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 870D33FF1C for ; Mon, 30 Jan 2023 10:23:13 -0800 (PST) Received: by mail-pj1-x1033.google.com with SMTP id b10so11891067pjo.1 for ; Mon, 30 Jan 2023 10:23:13 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=tPNO/SxCaad+QHrUHg1W5XYbXIP+iBGVf1xglNrkc7w=; b=WAt9qxmLcMCzx3x9infWfLlyTRY7lQwbLQgH+mqXQo8DaInODomPFYDru14it+/rwL FKOjU3kGSGvjRCJYGNq2J3I07ZEnZ2Bph7Cb19sB1kEq1iHguj5rtG6WsoXH3ZD7TYZN Ls5e3cWuM0m3oJ0jAOuLWK/MdCpxiTs0N/t0Izo9LfJy+vGfhYn87Vrttba7ZDWMziE/ A08N/tccmOYsLazLRWGMy8dyvGbcOWNX9dDkplIHbZ2N65daS8oRYxkaa404MTl8Exiw wpa6wUWNjRjFB4qsp0OXBmuBLPbZxKyUhU+EuhlYJBnfoixeacW/CA9qkRNTfKQxDHfo 1lpQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=tPNO/SxCaad+QHrUHg1W5XYbXIP+iBGVf1xglNrkc7w=; b=ToK0UZUpSPPeISVgKjHEu7o8wgBESfiHKxw1XsHNPPMZWfKVM4cCQ90La4BjKD1v30 A0xF9mxbI7VtKzJHCzk9qZgjDuF51JhxaBOtlu/UDXFG1f7jCXr4GF+I/iQkjAfgURXY ++QxRvbdCdJVgCkhpFce0psK3Xf3ZJESbWMJmGz5H35CWIBifgUAVl/7GlPK1jRdrjE9 EgMoXxuRN3HqRaHqE75YWxoFqDfL/cVIPQX6Vj2Bh4bq8jGuUt9WmW/MFZQimjeMMUa4 830bmJ0lemjFcu1djLaoPUiicwlSrerDjPqzcckNr9rRL9pvRKitZXYA0cwXPpjIg8fl 887A== X-Gm-Message-State: AO0yUKWezYp9KBupqqcX74S8j4uf1TLdHUyq0ArhzMBYgZjAlr1hvZZ2 Af259S/BX4RVrS71hua3zCb/7w== X-Google-Smtp-Source: AK7set+8WSMVCSxjvJ7pcIybsaePEVFCKPT/8u2wMLIFDS/YpCiIenEFMsDbeymxOLvTs+dp4pi/rw== X-Received: by 2002:a17:90b:20a:b0:22c:147d:137f with SMTP id fy10-20020a17090b020a00b0022c147d137fmr20585364pjb.17.1675102991516; Mon, 30 Jan 2023 10:23:11 -0800 (PST) Received: from kerodipc.Dlink ([49.206.9.96]) by smtp.gmail.com with ESMTPSA id j193-20020a638bca000000b00478162d9923sm7000291pge.13.2023.01.30.10.23.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 30 Jan 2023 10:23:10 -0800 (PST) From: Sunil V L To: Palmer Dabbelt , Albert Ou , "Rafael J . Wysocki" , Len Brown , Thomas Gleixner , Marc Zyngier , Daniel Lezcano , Jonathan Corbet Cc: linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Anup Patel , Andrew Jones , Atish Patra , Sunil V L Subject: [PATCH 08/24] ACPI: Enable ACPI_PROCESSOR for RISC-V Date: Mon, 30 Jan 2023 23:52:09 +0530 Message-Id: <20230130182225.2471414-9-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.38.0 In-Reply-To: <20230130182225.2471414-1-sunilvl@ventanamicro.com> References: <20230130182225.2471414-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org The ACPI processor driver is not currently enabled for RISC-V. Enable it Signed-off-by: Sunil V L --- drivers/acpi/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/acpi/Kconfig b/drivers/acpi/Kconfig index ccbeab9500ec..b44ac8e55b54 100644 --- a/drivers/acpi/Kconfig +++ b/drivers/acpi/Kconfig @@ -281,7 +281,7 @@ config ACPI_CPPC_LIB config ACPI_PROCESSOR tristate "Processor" - depends on X86 || IA64 || ARM64 || LOONGARCH + depends on X86 || IA64 || ARM64 || LOONGARCH || RISCV select ACPI_PROCESSOR_IDLE select ACPI_CPU_FREQ_PSS if X86 || IA64 || LOONGARCH select THERMAL From patchwork Mon Jan 30 18:22:10 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 648679 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8D102C54EAA for ; Mon, 30 Jan 2023 18:24:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238034AbjA3SYS (ORCPT ); Mon, 30 Jan 2023 13:24:18 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57146 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237660AbjA3SXz (ORCPT ); Mon, 30 Jan 2023 13:23:55 -0500 Received: from mail-pj1-x102c.google.com (mail-pj1-x102c.google.com [IPv6:2607:f8b0:4864:20::102c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AF0003BD80 for ; Mon, 30 Jan 2023 10:23:17 -0800 (PST) Received: by mail-pj1-x102c.google.com with SMTP id mi9so2724716pjb.4 for ; Mon, 30 Jan 2023 10:23:17 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Civb8WSgZLaGjy3GsEK+VfCJoO5XDczMEZxaUDDoy9s=; b=PSgeKdehYrE+PafjRwikFSIdgqSVP/6Dwf+FS0bio9ay+kO8Iq/DP55UzLxJ/0teml mvq507l+RrqXXtGjCegq0g7TLBJjmbSWhdM5dgwY0v649xk++pdojRYRpi6srgODCEX8 Uo9mPJiNfw2KG4leBHKApLZ0vCIAGbEaAh8W/xor1x+Q+a1Lfuh10l47pj75siTlDsbn eb7CTrsgaQM3o3V7ixmkkhz+3jXqGMGxOBTq3bjtqGeqQ2LRHByk7Bu5QeGzR6FsK4b9 YFzRilzo9k2a2ZEB3Su60FmyHlwt8/pzExTf+irfPULv2+5xGuGMe/aasN/pJ2aP1S95 itrg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Civb8WSgZLaGjy3GsEK+VfCJoO5XDczMEZxaUDDoy9s=; b=IIEw1kcyDr/PyPEMn49fWGMt/4zyjnE0JjrQFZHW5sIhw9dlmfO6rGRZvqD0mKHk30 zd5nZAKBvMD5mgC/gU9bBQKoDmRm+bBOl5h5QcgYW7G3GEp+QyzK3NjditqV+WNCINSI ntTS52Mvz+8vj/szLbLdXLVVhgFF3o+I5tMqErQNe62Gu6orT4ciSYbTc59eRY7DlsFm MUtXI9j1pkMPjGl8r/hZCrqHOvUzr1JaZrkSxF+HeicaEDN6zjAxG6CNdf7Eel8Wa9hp x3dmnR16LnX5ALXf/i9QsAg5y6QKuCNfP0W2ytOtYpyO2XkV57hN2QhYgDgdPd6tRMry cx0w== X-Gm-Message-State: AO0yUKUJanQI9N89QP5h7n7YoomFN2MzF7aTSX7zh2hJjZ/mXoSs/Rn1 5/H8YBHUvwo5ugwIjVTumnWUHg== X-Google-Smtp-Source: AK7set9oTDzJ0fET5I+XJ+M/whs8igubsgt819w38WChwLx4JRHaYMGFAZJAVm6ZNdmVCQgnm72BVg== X-Received: by 2002:a17:90b:3e81:b0:22c:b70d:45fb with SMTP id rj1-20020a17090b3e8100b0022cb70d45fbmr3191564pjb.23.1675102995734; Mon, 30 Jan 2023 10:23:15 -0800 (PST) Received: from kerodipc.Dlink ([49.206.9.96]) by smtp.gmail.com with ESMTPSA id j193-20020a638bca000000b00478162d9923sm7000291pge.13.2023.01.30.10.23.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 30 Jan 2023 10:23:15 -0800 (PST) From: Sunil V L To: Palmer Dabbelt , Albert Ou , "Rafael J . Wysocki" , Len Brown , Thomas Gleixner , Marc Zyngier , Daniel Lezcano , Jonathan Corbet Cc: linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Anup Patel , Andrew Jones , Atish Patra , Sunil V L Subject: [PATCH 09/24] ACPI: OSL: Make should_use_kmap() 0 for RISC-V. Date: Mon, 30 Jan 2023 23:52:10 +0530 Message-Id: <20230130182225.2471414-10-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.38.0 In-Reply-To: <20230130182225.2471414-1-sunilvl@ventanamicro.com> References: <20230130182225.2471414-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org Without this, if the tables are larger than 4K, acpi_map() will fail. Signed-off-by: Sunil V L --- drivers/acpi/osl.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/acpi/osl.c b/drivers/acpi/osl.c index 3269a888fb7a..f725813d0cce 100644 --- a/drivers/acpi/osl.c +++ b/drivers/acpi/osl.c @@ -276,7 +276,7 @@ acpi_map_lookup_virt(void __iomem *virt, acpi_size size) return NULL; } -#if defined(CONFIG_IA64) || defined(CONFIG_ARM64) +#if defined(CONFIG_IA64) || defined(CONFIG_ARM64) || defined(CONFIG_RISCV) /* ioremap will take care of cache attributes */ #define should_use_kmap(pfn) 0 #else From patchwork Mon Jan 30 18:22:11 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 651054 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6CB6DC61D97 for ; Mon, 30 Jan 2023 18:24:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238137AbjA3SYZ (ORCPT ); Mon, 30 Jan 2023 13:24:25 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56898 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238051AbjA3SX4 (ORCPT ); Mon, 30 Jan 2023 13:23:56 -0500 Received: from mail-pl1-x630.google.com (mail-pl1-x630.google.com [IPv6:2607:f8b0:4864:20::630]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E9F453D0AF for ; Mon, 30 Jan 2023 10:23:20 -0800 (PST) Received: by mail-pl1-x630.google.com with SMTP id p24so12518772plw.11 for ; Mon, 30 Jan 2023 10:23:20 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=USVS3mywTvdLvSTJeGXikExLlXPpzcs14a2ZRggZ7wY=; b=AdzPUrbp24xrj0FAMDk5+9RcVSjZCso58BavKvUv8Y2Jv3EBQs5Tt0/nPExBhQxEPI j1Ik71BoJYr9yc3WpMmfgQ24R7V4dmBuWpXBIo3eGXjF4q7GziPZ/dui+mh0CyZyuHvm eppGpPrLfUiliaq4Tkv0jgfObfdOkbx9KN4jdMMYleuS3fqZS1d61qS2s25o6BIth0Sh cmtfpu8dJcz8pmxvK+S5DqQKX/c9I0Hayd5E7TlqjRKz2eIdmONgZbi5uObiinByYY2S FGXOHytfliaegYVhWjoHeGGIm+SJdYaXtUrnp5p8EdDnHKzCdKJG66bYpTCn93ACKM9n QA2Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=USVS3mywTvdLvSTJeGXikExLlXPpzcs14a2ZRggZ7wY=; b=nLxrCRsvGSpGtOAOY0oyg1jAntBHhLL2arT0h+zT8+SksgOO0Pz3dMP/umOcfrMcnD mwv+oF1J7/C09hP5esmp8uYgyBTC7YKnFSHJ6jVuPm9veitu+S4ro/Qd4GXt20clYUK8 vFPLKyRz9taLcmrE1fuWvHQLyoZLTnKqJjBeoFxKQDXkGqkvBMJviPk1zWDZuUN4xM6i +K7KwGy1ugiJ0x1j22LnpoiWy84MBrbU0BhjrkSFwKljW4GM3F/XCaLc1sDWjjxfgvG6 VNRU8aF0AYncsNECFjD/LZW9bqoplcPAnKiWQzxfeHpVuE1Uk+7bGlGqEC+wD9O4IJMG Fd1w== X-Gm-Message-State: AO0yUKVwRB/geX3Mc/TMPGnmLzelQ0qoJkGNAAmVwwnHPlddLWf/RYZn 4Ubwyu2EkVMr4sD6WDwFkIm20A== X-Google-Smtp-Source: AK7set/iIY4N9lMJIQuuLqIcFatEy8RspvzQ7ycNCuigstyEk6Y9hWi2TzCwIFuNa78QmQWe8UUyAQ== X-Received: by 2002:a17:902:d4c3:b0:196:49a9:bf26 with SMTP id o3-20020a170902d4c300b0019649a9bf26mr20839616plg.15.1675103000228; Mon, 30 Jan 2023 10:23:20 -0800 (PST) Received: from kerodipc.Dlink ([49.206.9.96]) by smtp.gmail.com with ESMTPSA id j193-20020a638bca000000b00478162d9923sm7000291pge.13.2023.01.30.10.23.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 30 Jan 2023 10:23:19 -0800 (PST) From: Sunil V L To: Palmer Dabbelt , Albert Ou , "Rafael J . Wysocki" , Len Brown , Thomas Gleixner , Marc Zyngier , Daniel Lezcano , Jonathan Corbet Cc: linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Anup Patel , Andrew Jones , Atish Patra , Sunil V L Subject: [PATCH 10/24] ACPI: processor_core: RISC-V: Enable mapping processor to the hartid Date: Mon, 30 Jan 2023 23:52:11 +0530 Message-Id: <20230130182225.2471414-11-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.38.0 In-Reply-To: <20230130182225.2471414-1-sunilvl@ventanamicro.com> References: <20230130182225.2471414-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org processor_core needs arch specific functions to map the ACPI ID to the physical ID. In RISC-V platforms, hartid is the physical id and RINTC structure in MADT provides this mapping. Add arch specific function to get this mapping from RINTC. Signed-off-by: Sunil V L --- arch/riscv/include/asm/acpi.h | 3 +++ drivers/acpi/processor_core.c | 28 ++++++++++++++++++++++++++++ 2 files changed, 31 insertions(+) diff --git a/arch/riscv/include/asm/acpi.h b/arch/riscv/include/asm/acpi.h index 8b9babaf3f25..c5cb9f96d404 100644 --- a/arch/riscv/include/asm/acpi.h +++ b/arch/riscv/include/asm/acpi.h @@ -15,6 +15,9 @@ /* Basic configuration for ACPI */ #ifdef CONFIG_ACPI +typedef u64 phys_cpuid_t; +#define PHYS_CPUID_INVALID INVALID_HARTID + /* ACPI table mapping after acpi_permanent_mmap is set */ void *acpi_os_ioremap(acpi_physical_address phys, acpi_size size); #define acpi_os_ioremap acpi_os_ioremap diff --git a/drivers/acpi/processor_core.c b/drivers/acpi/processor_core.c index 2ac48cda5b20..889f495b3481 100644 --- a/drivers/acpi/processor_core.c +++ b/drivers/acpi/processor_core.c @@ -106,6 +106,31 @@ static int map_gicc_mpidr(struct acpi_subtable_header *entry, return -EINVAL; } +/* + * Retrieve the RISC-V hartid for the processor + */ +static int map_rintc_hartid(struct acpi_subtable_header *entry, + int device_declaration, u32 acpi_id, phys_cpuid_t *hartid) +{ + struct acpi_madt_rintc *rintc = + container_of(entry, struct acpi_madt_rintc, header); + + if (!(rintc->flags & ACPI_MADT_ENABLED)) + return -ENODEV; + + /* device_declaration means Device object in DSDT, in the + * RISC-V, logical processors are required to + * have a Processor Device object in the DSDT, so we should + * check device_declaration here + */ + if (device_declaration && (rintc->uid == acpi_id)) { + *hartid = rintc->hart_id; + return 0; + } + + return -EINVAL; +} + static phys_cpuid_t map_madt_entry(struct acpi_table_madt *madt, int type, u32 acpi_id) { @@ -136,6 +161,9 @@ static phys_cpuid_t map_madt_entry(struct acpi_table_madt *madt, } else if (header->type == ACPI_MADT_TYPE_GENERIC_INTERRUPT) { if (!map_gicc_mpidr(header, type, acpi_id, &phys_id)) break; + } else if (header->type == ACPI_MADT_TYPE_RINTC) { + if (!map_rintc_hartid(header, type, acpi_id, &phys_id)) + break; } entry += header->length; } From patchwork Mon Jan 30 18:22:12 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 648678 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CE480C61D97 for ; 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Mon, 30 Jan 2023 10:23:24 -0800 (PST) Received: from kerodipc.Dlink ([49.206.9.96]) by smtp.gmail.com with ESMTPSA id j193-20020a638bca000000b00478162d9923sm7000291pge.13.2023.01.30.10.23.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 30 Jan 2023 10:23:24 -0800 (PST) From: Sunil V L To: Palmer Dabbelt , Albert Ou , "Rafael J . Wysocki" , Len Brown , Thomas Gleixner , Marc Zyngier , Daniel Lezcano , Jonathan Corbet Cc: linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Anup Patel , Andrew Jones , Atish Patra , Sunil V L Subject: [PATCH 11/24] RISC-V: ACPI: irqchip/riscv-intc: Add ACPI support Date: Mon, 30 Jan 2023 23:52:12 +0530 Message-Id: <20230130182225.2471414-12-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.38.0 In-Reply-To: <20230130182225.2471414-1-sunilvl@ventanamicro.com> References: <20230130182225.2471414-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org Add support for initializing the RISC-V INTC driver on ACPI based platforms. Signed-off-by: Sunil V L --- drivers/irqchip/irq-riscv-intc.c | 79 +++++++++++++++++++++++++++----- 1 file changed, 67 insertions(+), 12 deletions(-) diff --git a/drivers/irqchip/irq-riscv-intc.c b/drivers/irqchip/irq-riscv-intc.c index f229e3e66387..044ec92fcba7 100644 --- a/drivers/irqchip/irq-riscv-intc.c +++ b/drivers/irqchip/irq-riscv-intc.c @@ -6,6 +6,7 @@ */ #define pr_fmt(fmt) "riscv-intc: " fmt +#include #include #include #include @@ -112,6 +113,30 @@ static struct fwnode_handle *riscv_intc_hwnode(void) return intc_domain->fwnode; } +static int __init riscv_intc_init_common(struct fwnode_handle *fn) +{ + int rc; + + intc_domain = irq_domain_create_linear(fn, BITS_PER_LONG, + &riscv_intc_domain_ops, NULL); + if (!intc_domain) { + pr_err("unable to add IRQ domain\n"); + return -ENXIO; + } + + rc = set_handle_irq(&riscv_intc_irq); + if (rc) { + pr_err("failed to set irq handler\n"); + return rc; + } + + riscv_set_intc_hwnode_fn(riscv_intc_hwnode); + + pr_info("%d local interrupts mapped\n", BITS_PER_LONG); + + return 0; +} + static int __init riscv_intc_init(struct device_node *node, struct device_node *parent) { @@ -133,24 +158,54 @@ static int __init riscv_intc_init(struct device_node *node, if (riscv_hartid_to_cpuid(hartid) != smp_processor_id()) return 0; - intc_domain = irq_domain_add_linear(node, BITS_PER_LONG, - &riscv_intc_domain_ops, NULL); - if (!intc_domain) { - pr_err("unable to add IRQ domain\n"); - return -ENXIO; - } - - rc = set_handle_irq(&riscv_intc_irq); + rc = riscv_intc_init_common(of_node_to_fwnode(node)); if (rc) { - pr_err("failed to set irq handler\n"); + pr_err("failed to initialize INTC\n"); return rc; } - riscv_set_intc_hwnode_fn(riscv_intc_hwnode); + return 0; +} - pr_info("%d local interrupts mapped\n", BITS_PER_LONG); +IRQCHIP_DECLARE(riscv, "riscv,cpu-intc", riscv_intc_init); + +#ifdef CONFIG_ACPI + +static int __init +riscv_intc_acpi_init(union acpi_subtable_headers *header, + const unsigned long end) +{ + int rc; + struct fwnode_handle *fn; + struct acpi_madt_rintc *rintc; + + rintc = (struct acpi_madt_rintc *)header; + + /* + * The ACPI MADT will have one INTC for each CPU (or HART) + * so riscv_intc_acpi_init() function will be called once + * for each INTC. We only need to do INTC initialization + * for the INTC belonging to the boot CPU (or boot HART). + */ + if (riscv_hartid_to_cpuid(rintc->hart_id) != smp_processor_id()) + return 0; + + fn = irq_domain_alloc_named_fwnode("RISCV-INTC"); + WARN_ON(fn == NULL); + if (!fn) { + pr_err("unable to allocate INTC FW node\n"); + return -1; + } + + rc = riscv_intc_init_common(fn); + if (rc) { + pr_err("failed to initialize INTC\n"); + return rc; + } return 0; } -IRQCHIP_DECLARE(riscv, "riscv,cpu-intc", riscv_intc_init); +IRQCHIP_ACPI_DECLARE(riscv_intc, ACPI_MADT_TYPE_RINTC, + NULL, 1, riscv_intc_acpi_init); +#endif From patchwork Mon Jan 30 18:22:13 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 651053 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A6A6DC61D97 for ; Mon, 30 Jan 2023 18:25:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237384AbjA3SZL (ORCPT ); Mon, 30 Jan 2023 13:25:11 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57390 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238094AbjA3SYA (ORCPT ); Mon, 30 Jan 2023 13:24:00 -0500 Received: from mail-pj1-x1029.google.com (mail-pj1-x1029.google.com [IPv6:2607:f8b0:4864:20::1029]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5FFB645BE6 for ; Mon, 30 Jan 2023 10:23:29 -0800 (PST) Received: by mail-pj1-x1029.google.com with SMTP id e10-20020a17090a630a00b0022bedd66e6dso16395936pjj.1 for ; Mon, 30 Jan 2023 10:23:29 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=2V4bEO8aGCUnvICkvYFTtflr32JlbC6lkp0g+wowtbM=; b=lk2FS4bi5tXkC1KwlB7IR9frYJNCQB46zRuLBebN5lBJ8cN3scRheCqCzNq02LquDZ T7s0yo1+o/et+QSWknYJCYgYVrAhIpx0Q9RFeIJULyKKzgmtGBS8BkeM/vl6wKvrBMjp mUvQzp6EXvFNRLO9+5Kiu1elg30zaPMBmDpWZO2NqlSDLjfGA8M/9cZI0DQaxiOgClDj 0kOWsS7nvZZg3rIfS/7ZgCLiyEXy42cw6D20wqCpo9xvkn4YN9s2Y8p41QXLbbX33pYG yt0yEkzirf4so3ujS3owGMIcP4HQ2+eRccoCcxPRQaOr8cvUU/UP8Tzs1QvpGKrSAhji ekYQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=2V4bEO8aGCUnvICkvYFTtflr32JlbC6lkp0g+wowtbM=; b=ieiMLc+k0BDmnavoKCmuQGlSEpqP1JvYlZdn/QSnwaNnD4iV5ZsNwFavEAvIib9rQf INdHdaAfvD2fviicVrKSQO+L/A7hTqMYez6yVpRmw8SvZ/ZUqfqMSpjLVOr34AhsBuMv qeuVv0Cc5PULYjtKGLbETN2ks/pOa1DLnVXCM7fNbw6ZMCo+TjaBseJQtjQ34gNlf7tz +f+nUl0raanxkV57CcSlV82hLrfkC2kTuOi4oOJG+3+wAa2d5pbi6MPyt2+UU5AlEcFi rrmD3wyCGlCEOJ+x8rB/H+YFQcNtw5wNWAQxt9MoKhH1KNcUAbksUrCQ0+BAIoaIG/pe KPkw== X-Gm-Message-State: AO0yUKVWk0KOPt0RybvuJT+9zBdxXT+Glxs6zjvsZOFjpUU/HYt9n99U umwhFfeub3c6bj6/FEeAer0uHA== X-Google-Smtp-Source: AK7set/tX5Xt8agYBu/KLyJy+OnSgmLrgEYtXB6QpcbJp9X24yqEp94vp4kVKhN3pU5/ZWvnJCibGA== X-Received: by 2002:a05:6a20:8e19:b0:bc:db54:27d7 with SMTP id y25-20020a056a208e1900b000bcdb5427d7mr5597928pzj.59.1675103009111; Mon, 30 Jan 2023 10:23:29 -0800 (PST) Received: from kerodipc.Dlink ([49.206.9.96]) by smtp.gmail.com with ESMTPSA id j193-20020a638bca000000b00478162d9923sm7000291pge.13.2023.01.30.10.23.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 30 Jan 2023 10:23:28 -0800 (PST) From: Sunil V L To: Palmer Dabbelt , Albert Ou , "Rafael J . Wysocki" , Len Brown , Thomas Gleixner , Marc Zyngier , Daniel Lezcano , Jonathan Corbet Cc: linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Anup Patel , Andrew Jones , Atish Patra , Sunil V L Subject: [PATCH 12/24] RISC-V: ACPI: smpboot: Create wrapper smp_setup() Date: Mon, 30 Jan 2023 23:52:13 +0530 Message-Id: <20230130182225.2471414-13-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.38.0 In-Reply-To: <20230130182225.2471414-1-sunilvl@ventanamicro.com> References: <20230130182225.2471414-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org smp_setup() currently assumes DT based platforms. To enable ACPI, first make this as a wrapper function and move existing code to a separate DT specific function. Signed-off-by: Sunil V L Reviewed-by: Conor Dooley --- arch/riscv/kernel/smpboot.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/arch/riscv/kernel/smpboot.c b/arch/riscv/kernel/smpboot.c index 00b53913d4c6..26214ddefaa4 100644 --- a/arch/riscv/kernel/smpboot.c +++ b/arch/riscv/kernel/smpboot.c @@ -70,7 +70,7 @@ void __init smp_prepare_cpus(unsigned int max_cpus) } } -void __init setup_smp(void) +static void __init of_parse_and_init_cpus(void) { struct device_node *dn; unsigned long hart; @@ -116,6 +116,11 @@ void __init setup_smp(void) } } +void __init setup_smp(void) +{ + of_parse_and_init_cpus(); +} + static int start_secondary_cpu(int cpu, struct task_struct *tidle) { if (cpu_ops[cpu]->cpu_start) From patchwork Mon Jan 30 18:22:14 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 648677 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D3A40C636D0 for ; Mon, 30 Jan 2023 18:25:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237665AbjA3SZM (ORCPT ); Mon, 30 Jan 2023 13:25:12 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56806 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237393AbjA3SYc (ORCPT ); Mon, 30 Jan 2023 13:24:32 -0500 Received: from mail-pj1-x102f.google.com (mail-pj1-x102f.google.com [IPv6:2607:f8b0:4864:20::102f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3021744A6 for ; Mon, 30 Jan 2023 10:23:38 -0800 (PST) Received: by mail-pj1-x102f.google.com with SMTP id j5so11865674pjn.5 for ; Mon, 30 Jan 2023 10:23:38 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Tmqm1KrH8Rx3qerFslFMAYGwIdVV+GEj7SnscFfXmQ0=; b=cPqIpB8prS7hDFjj+h2EyPJYy7PzmnnK7RExz1Ok8dR7rRKT+hcVUGsFGHWUlBqJwN 7TFI8iyfHhoGD4a989XpaHBs/LV8kw/QUgsWAYRqlX1j2J426hfu4JuvWvWp2Ur+aJva bIvHdZ3mMBp4tBmotAyHnxK+PkLaI1ltXKPKRM3DZCEAeySNiyDpT3o7bmmnIzIHMSvv NHmf9xDgFjhefd/ngOEANI2MN4vf8CxitwuTZvXZT7ThVciVKtcZRlVErvkJjCEEW2sn WchYKaK4+/IvPJhKS+PXyhvjlMpYJw11G5D54C68fDhwazqvPkacu5QTTU7uvSoVkfjg zARg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Tmqm1KrH8Rx3qerFslFMAYGwIdVV+GEj7SnscFfXmQ0=; b=iUcp7FjhJdPKvpT5qQEQdaUNT+FwbMrFit/i/4+vfbwH3a7fWRWPyw2CZv0KDKvCv/ 9Y2nPMPyHSoTIb5cowUpuD+kAu8qdWPzSlIogGvs2387EpveZsqEPE7pnhLiDJ31I1uC 8G8Sa+deSVAcUhBKajmCHoeGTkMLm0j0DiXPzbuV/tTd79Koaa/uOte2V/6vC6zr1dB1 7yEE9sfj3Dwk/UE43acjkzuXEaxIBmv6PE2i8wbEPI1i2UPrx4pq1RMMsMgef9OV6NJu Va7/251yhj/4AEQzhjbAi9NYeCwDeTVE/IEO+S5q8H4UD4P0ziESvTbEuAROBlsKD88J 4WTg== X-Gm-Message-State: AO0yUKUninspzzOA7pe60lZVOGu8Kk7I/nAnqyCejqoolrpC/AmIlUY7 4rk4i8Dwf4rvfH627GCVRIk6Ow== X-Google-Smtp-Source: AK7set8mUQ/h8KMYQ2zVbbHUXRL1WVlOMXJhgdTYz7w1If9zAbycA9u/XMnVWA+UBeINzP9AUSP2wA== X-Received: by 2002:a17:903:190:b0:196:869c:8c5c with SMTP id z16-20020a170903019000b00196869c8c5cmr5258522plg.51.1675103013599; Mon, 30 Jan 2023 10:23:33 -0800 (PST) Received: from kerodipc.Dlink ([49.206.9.96]) by smtp.gmail.com with ESMTPSA id j193-20020a638bca000000b00478162d9923sm7000291pge.13.2023.01.30.10.23.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 30 Jan 2023 10:23:33 -0800 (PST) From: Sunil V L To: Palmer Dabbelt , Albert Ou , "Rafael J . Wysocki" , Len Brown , Thomas Gleixner , Marc Zyngier , Daniel Lezcano , Jonathan Corbet Cc: linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Anup Patel , Andrew Jones , Atish Patra , Sunil V L Subject: [PATCH 13/24] RISC-V: ACPI: smpboot: Add ACPI support in smp_setup() Date: Mon, 30 Jan 2023 23:52:14 +0530 Message-Id: <20230130182225.2471414-14-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.38.0 In-Reply-To: <20230130182225.2471414-1-sunilvl@ventanamicro.com> References: <20230130182225.2471414-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org Add function to parse the RINTC structure in the MADT table and create the required initializations to enable SMP boot on ACPI based platforms. Signed-off-by: Sunil V L Reviewed-by: Conor Dooley --- arch/riscv/include/asm/acpi.h | 7 ++++ arch/riscv/kernel/smpboot.c | 73 ++++++++++++++++++++++++++++++++++- 2 files changed, 79 insertions(+), 1 deletion(-) diff --git a/arch/riscv/include/asm/acpi.h b/arch/riscv/include/asm/acpi.h index c5cb9f96d404..d1f1e53ec657 100644 --- a/arch/riscv/include/asm/acpi.h +++ b/arch/riscv/include/asm/acpi.h @@ -58,6 +58,13 @@ static inline bool acpi_has_cpu_in_madt(void) } static inline void arch_fix_phys_package_id(int num, u32 slot) { } + +#ifdef CONFIG_ACPI_NUMA +int acpi_numa_get_nid(unsigned int cpu); +#else +static inline int acpi_numa_get_nid(unsigned int cpu) { return NUMA_NO_NODE; } +#endif /* CONFIG_ACPI_NUMA */ + #endif #endif /*_ASM_ACPI_H*/ diff --git a/arch/riscv/kernel/smpboot.c b/arch/riscv/kernel/smpboot.c index 26214ddefaa4..e48cf88d0bc1 100644 --- a/arch/riscv/kernel/smpboot.c +++ b/arch/riscv/kernel/smpboot.c @@ -8,6 +8,7 @@ * Copyright (C) 2017 SiFive */ +#include #include #include #include @@ -70,6 +71,73 @@ void __init smp_prepare_cpus(unsigned int max_cpus) } } +#ifdef CONFIG_ACPI +static unsigned int cpu_count = 1; + +static int __init +acpi_parse_rintc(union acpi_subtable_headers *header, + const unsigned long end) +{ + unsigned long hart; + bool found_boot_cpu = false; + + struct acpi_madt_rintc *processor; + + processor = (struct acpi_madt_rintc *)header; + + /* RINTC entry which has !ACPI_MADT_ENABLED is not enabled so skip */ + if (!(processor->flags & ACPI_MADT_ENABLED)) + return 0; + + hart = processor->hart_id; + if (hart < 0) + return 0; + if (hart == cpuid_to_hartid_map(0)) { + BUG_ON(found_boot_cpu); + found_boot_cpu = 1; + early_map_cpu_to_node(0, acpi_numa_get_nid(cpu_count)); + return 0; + } + if (cpu_count >= NR_CPUS) { + pr_warn("Invalid cpuid [%d] for hartid [%lu]\n", + cpu_count, hart); + return 0; + } + + cpuid_to_hartid_map(cpu_count) = hart; + early_map_cpu_to_node(cpu_count, acpi_numa_get_nid(cpu_count)); + cpu_count++; + return 0; +} + +static void __init acpi_parse_and_init_cpus(void) +{ + int cpuid; + + cpu_set_ops(0); + /* + * do a walk of MADT to determine how many CPUs + * we have including disabled CPUs, and get information + * we need for SMP init. + */ + acpi_table_parse_madt(ACPI_MADT_TYPE_RINTC, + acpi_parse_rintc, 0); + + /* + * NUMA - TODO + */ + + for (cpuid = 1; cpuid < nr_cpu_ids; cpuid++) { + if (cpuid_to_hartid_map(cpuid) != INVALID_HARTID) { + cpu_set_ops(cpuid); + set_cpu_possible(cpuid, true); + } + } +} +#else +#define acpi_parse_and_init_cpus(...) do { } while (0) +#endif + static void __init of_parse_and_init_cpus(void) { struct device_node *dn; @@ -118,7 +186,10 @@ static void __init of_parse_and_init_cpus(void) void __init setup_smp(void) { - of_parse_and_init_cpus(); + if (acpi_disabled) + of_parse_and_init_cpus(); + else + acpi_parse_and_init_cpus(); } static int start_secondary_cpu(int cpu, struct task_struct *tidle) From patchwork Mon Jan 30 18:22:15 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 651052 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 59A0CC636CB for ; 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Mon, 30 Jan 2023 10:23:38 -0800 (PST) Received: from kerodipc.Dlink ([49.206.9.96]) by smtp.gmail.com with ESMTPSA id j193-20020a638bca000000b00478162d9923sm7000291pge.13.2023.01.30.10.23.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 30 Jan 2023 10:23:37 -0800 (PST) From: Sunil V L To: Palmer Dabbelt , Albert Ou , "Rafael J . Wysocki" , Len Brown , Thomas Gleixner , Marc Zyngier , Daniel Lezcano , Jonathan Corbet Cc: linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Anup Patel , Andrew Jones , Atish Patra , Sunil V L Subject: [PATCH 14/24] RISC-V: ACPI: smpboot: Add function to retrieve the hartid Date: Mon, 30 Jan 2023 23:52:15 +0530 Message-Id: <20230130182225.2471414-15-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.38.0 In-Reply-To: <20230130182225.2471414-1-sunilvl@ventanamicro.com> References: <20230130182225.2471414-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org hartid is in RINTC structuire in MADT table. Instead of parsing the ACPI table every time we need for a cpu, cache it and provide a function to read it. This is similar to acpi_get_madt_gicc() in arm64. Signed-off-by: Sunil V L --- arch/riscv/include/asm/acpi.h | 14 +++++++++++++- arch/riscv/kernel/smpboot.c | 21 +++++++++++++++++++++ 2 files changed, 34 insertions(+), 1 deletion(-) diff --git a/arch/riscv/include/asm/acpi.h b/arch/riscv/include/asm/acpi.h index d1f1e53ec657..69a880b7257a 100644 --- a/arch/riscv/include/asm/acpi.h +++ b/arch/riscv/include/asm/acpi.h @@ -65,6 +65,18 @@ int acpi_numa_get_nid(unsigned int cpu); static inline int acpi_numa_get_nid(unsigned int cpu) { return NUMA_NO_NODE; } #endif /* CONFIG_ACPI_NUMA */ -#endif +struct acpi_madt_rintc *acpi_get_madt_rintc(int cpu); +struct acpi_madt_rintc *acpi_cpu_get_madt_rintc(int cpu); +static inline u32 get_acpi_id_for_cpu(int cpu) +{ + return acpi_cpu_get_madt_rintc(cpu)->uid; +} +#else +static inline u32 get_acpi_id_for_cpu(int cpu) +{ + return -1; +} + +#endif /* CONFIG_ACPI */ #endif /*_ASM_ACPI_H*/ diff --git a/arch/riscv/kernel/smpboot.c b/arch/riscv/kernel/smpboot.c index e48cf88d0bc1..3a8b7a9eb5ac 100644 --- a/arch/riscv/kernel/smpboot.c +++ b/arch/riscv/kernel/smpboot.c @@ -73,6 +73,25 @@ void __init smp_prepare_cpus(unsigned int max_cpus) #ifdef CONFIG_ACPI static unsigned int cpu_count = 1; +static unsigned int intc_count; +static struct acpi_madt_rintc cpu_madt_rintc[NR_CPUS]; + +struct acpi_madt_rintc *acpi_get_madt_rintc(int cpu) +{ + return &cpu_madt_rintc[cpu]; +} + +struct acpi_madt_rintc *acpi_cpu_get_madt_rintc(int cpu) +{ + int i; + + for (i = 0; i < NR_CPUS; i++) { + if (riscv_hartid_to_cpuid(cpu_madt_rintc[i].hart_id) == cpu) + return &cpu_madt_rintc[i]; + } + return NULL; +} +EXPORT_SYMBOL_GPL(acpi_cpu_get_madt_rintc); static int __init acpi_parse_rintc(union acpi_subtable_headers *header, @@ -92,6 +111,8 @@ acpi_parse_rintc(union acpi_subtable_headers *header, hart = processor->hart_id; if (hart < 0) return 0; + + cpu_madt_rintc[intc_count++] = *processor; if (hart == cpuid_to_hartid_map(0)) { BUG_ON(found_boot_cpu); found_boot_cpu = 1; From patchwork Mon Jan 30 18:22:16 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 648676 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E48D7C61D97 for ; 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Mon, 30 Jan 2023 10:23:42 -0800 (PST) From: Sunil V L To: Palmer Dabbelt , Albert Ou , "Rafael J . Wysocki" , Len Brown , Thomas Gleixner , Marc Zyngier , Daniel Lezcano , Jonathan Corbet Cc: linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Anup Patel , Andrew Jones , Atish Patra , Sunil V L Subject: [PATCH 15/24] clocksource/timer-riscv: Refactor riscv_timer_init_dt() Date: Mon, 30 Jan 2023 23:52:16 +0530 Message-Id: <20230130182225.2471414-16-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.38.0 In-Reply-To: <20230130182225.2471414-1-sunilvl@ventanamicro.com> References: <20230130182225.2471414-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org Refactor the timer init function such that few things can be shared by both DT and ACPI based platforms. Signed-off-by: Anup Patel Signed-off-by: Sunil V L --- drivers/clocksource/timer-riscv.c | 79 +++++++++++++++---------------- 1 file changed, 37 insertions(+), 42 deletions(-) diff --git a/drivers/clocksource/timer-riscv.c b/drivers/clocksource/timer-riscv.c index 1b4b36df5484..4016c065a01c 100644 --- a/drivers/clocksource/timer-riscv.c +++ b/drivers/clocksource/timer-riscv.c @@ -119,61 +119,28 @@ static irqreturn_t riscv_timer_interrupt(int irq, void *dev_id) return IRQ_HANDLED; } -static int __init riscv_timer_init_dt(struct device_node *n) +static int __init riscv_timer_init_common(void) { - int cpuid, error; - unsigned long hartid; - struct device_node *child; - struct irq_domain *domain; - - error = riscv_of_processor_hartid(n, &hartid); - if (error < 0) { - pr_warn("Not valid hartid for node [%pOF] error = [%lu]\n", - n, hartid); - return error; - } - - cpuid = riscv_hartid_to_cpuid(hartid); - if (cpuid < 0) { - pr_warn("Invalid cpuid for hartid [%lu]\n", hartid); - return cpuid; - } - - if (cpuid != smp_processor_id()) - return 0; + int error; + struct fwnode_handle *intc_fwnode = riscv_get_intc_hwnode(); + struct irq_domain *domain = NULL; - child = of_find_compatible_node(NULL, NULL, "riscv,timer"); - if (child) { - riscv_timer_cannot_wake_cpu = of_property_read_bool(child, - "riscv,timer-cannot-wake-cpu"); - of_node_put(child); - } - domain = NULL; - child = of_get_compatible_child(n, "riscv,cpu-intc"); - if (!child) { - pr_err("Failed to find INTC node [%pOF]\n", n); - return -ENODEV; - } - domain = irq_find_host(child); - of_node_put(child); + domain = irq_find_matching_fwnode(intc_fwnode, DOMAIN_BUS_ANY); if (!domain) { - pr_err("Failed to find IRQ domain for node [%pOF]\n", n); + pr_err("Failed to find INTC node [%pfwP]\n", intc_fwnode); return -ENODEV; } riscv_clock_event_irq = irq_create_mapping(domain, RV_IRQ_TIMER); if (!riscv_clock_event_irq) { - pr_err("Failed to map timer interrupt for node [%pOF]\n", n); - return -ENODEV; + pr_err("Failed to map timer interrupt for node [%pfwP]\n", + intc_fwnode); } - pr_info("%s: Registering clocksource cpuid [%d] hartid [%lu]\n", - __func__, cpuid, hartid); error = clocksource_register_hz(&riscv_clocksource, riscv_timebase); if (error) { - pr_err("RISCV timer register failed [%d] for cpu = [%d]\n", - error, cpuid); + pr_err("clocksource register failed [%d]\n", error); return error; } @@ -199,7 +166,35 @@ static int __init riscv_timer_init_dt(struct device_node *n) static_branch_enable(&riscv_sstc_available); } + pr_info("timer registered using %s\n", + (static_branch_likely(&riscv_sstc_available)) ? + "RISC-V Sstc" : "RISC-V SBI"); + return error; } +static int __init riscv_timer_init_dt(struct device_node *n) +{ + int cpuid, error; + unsigned long hartid; + + error = riscv_of_processor_hartid(n, &hartid); + if (error < 0) { + pr_warn("Not valid hartid for node [%pOF] error = [%lu]\n", + n, hartid); + return error; + } + + cpuid = riscv_hartid_to_cpuid(hartid); + if (cpuid < 0) { + pr_warn("Invalid cpuid for hartid [%lu]\n", hartid); + return cpuid; + } + + if (cpuid != smp_processor_id()) + return 0; + + return riscv_timer_init_common(); +} + TIMER_OF_DECLARE(riscv_timer, "riscv", riscv_timer_init_dt); From patchwork Mon Jan 30 18:22:17 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 651051 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5ED33C63797 for ; Mon, 30 Jan 2023 18:25:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237982AbjA3SZQ (ORCPT ); Mon, 30 Jan 2023 13:25:16 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56804 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238216AbjA3SYw (ORCPT ); Mon, 30 Jan 2023 13:24:52 -0500 Received: from mail-pj1-x102e.google.com (mail-pj1-x102e.google.com [IPv6:2607:f8b0:4864:20::102e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2F9C14616D for ; Mon, 30 Jan 2023 10:23:51 -0800 (PST) Received: by mail-pj1-x102e.google.com with SMTP id z1-20020a17090a66c100b00226f05b9595so11990324pjl.0 for ; Mon, 30 Jan 2023 10:23:51 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=2cCnuU35jZVdGCs4yph98OuVncVWSdeJqbA2ZAZB9Sg=; b=NVtPhRYVJSJbR/Cn4eg5T9W8xFMyMV7bk4qOp93b6jBCozBeskRQIZ+EA9Z1qfBD9j E1Sd1jPsX8pG7hOnlx6mIsqgKxStk6YpAQcNjkgsOFtvhEZSA8JE9p8vBxv6rbLiQkV1 Whf1k/35Fovb7D3gyWhiSxoyXLHY0vPKsJI+5P8rjVD6Dg7KTUu/cGAtD74EGAWRsWzV rlnZitm/zmG3r4ZBslpFcNOnpb3QnyJeq/86JXJhcLrbn9ElxHwIWy0mJDeRMLn20Toy Hs80lxP5/A0rw3/QNj9Xqoegzn7mciAe5fzStukCmQpvpk7Ruh0qJh+GbNRkJPovzpHF 05Sw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=2cCnuU35jZVdGCs4yph98OuVncVWSdeJqbA2ZAZB9Sg=; b=4onE9aILiAP8G/tMjD7uXxTSuUQNuzwkjpoc9HlcRemaAuW2pYNjeFwGn6IUNJar6u +RIsQfCjRMeR2PwCI7fkp13BqXMTAsABhHMqIlaSWccAz1r+FW+N0elL0bKaseCx/IB8 cQ3XdvEZzXsCLScp+XFGoccHpOxZApADPe2wRIJVgUgetR18W8wxG7v3rW0yWHC9IeDj xySr+dIJt9RPOWUa+Pr82nYkHZ0vnkt+aQ7Gb0iQFoH/FZZM+rA+HXKyInAXgkV2FDye BqmruydCs7/FuguAhplWzmmqK8cAqGcixtaD/7MxmDGkV5SNgOMhtiQuthixIjCOkIUS 6ykA== X-Gm-Message-State: AO0yUKUNd7Lbb/cTFUOe28e+Z+aBeQmwTMEH9r2/8cvEA/L+s/vkysGS pCdkMAAwSxnaWaxNmyn0XVegMw== X-Google-Smtp-Source: AK7set/sHqOwf+i227vA8zak7mnLlMCBogBTamE5mkGyExKgvQi0skSSDX6wAhSKthnfxNl70LtsQw== X-Received: by 2002:a05:6a20:4282:b0:be:a189:1475 with SMTP id o2-20020a056a20428200b000bea1891475mr3044724pzj.47.1675103026826; Mon, 30 Jan 2023 10:23:46 -0800 (PST) Received: from kerodipc.Dlink ([49.206.9.96]) by smtp.gmail.com with ESMTPSA id j193-20020a638bca000000b00478162d9923sm7000291pge.13.2023.01.30.10.23.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 30 Jan 2023 10:23:46 -0800 (PST) From: Sunil V L To: Palmer Dabbelt , Albert Ou , "Rafael J . Wysocki" , Len Brown , Thomas Gleixner , Marc Zyngier , Daniel Lezcano , Jonathan Corbet Cc: linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Anup Patel , Andrew Jones , Atish Patra , Sunil V L Subject: [PATCH 16/24] RISC-V: ACPI: clocksource/timer-riscv: Add ACPI support Date: Mon, 30 Jan 2023 23:52:17 +0530 Message-Id: <20230130182225.2471414-17-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.38.0 In-Reply-To: <20230130182225.2471414-1-sunilvl@ventanamicro.com> References: <20230130182225.2471414-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org timer-riscv driver needs to get the timebase-frequency from RISC-V Hart Capabilities Table (RHCT) on ACPI platforms. Add support to read the information from RHCT. Signed-off-by: Sunil V L --- drivers/clocksource/timer-riscv.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/clocksource/timer-riscv.c b/drivers/clocksource/timer-riscv.c index 4016c065a01c..8079666753a6 100644 --- a/drivers/clocksource/timer-riscv.c +++ b/drivers/clocksource/timer-riscv.c @@ -10,6 +10,7 @@ #define pr_fmt(fmt) "riscv-timer: " fmt +#include #include #include #include @@ -198,3 +199,11 @@ static int __init riscv_timer_init_dt(struct device_node *n) } TIMER_OF_DECLARE(riscv_timer, "riscv", riscv_timer_init_dt); + +#ifdef CONFIG_ACPI +static int __init riscv_timer_acpi_init(struct acpi_table_header *table) +{ + return riscv_timer_init_common(); +} +TIMER_ACPI_DECLARE(aclint_mtimer, ACPI_SIG_RHCT, riscv_timer_acpi_init); +#endif From patchwork Mon Jan 30 18:22:18 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 648675 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 32B81C54EAA for ; Mon, 30 Jan 2023 18:25:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238129AbjA3SZn (ORCPT ); Mon, 30 Jan 2023 13:25:43 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57950 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238292AbjA3SZI (ORCPT ); Mon, 30 Jan 2023 13:25:08 -0500 Received: from mail-pj1-x1033.google.com (mail-pj1-x1033.google.com [IPv6:2607:f8b0:4864:20::1033]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 02B3046713 for ; Mon, 30 Jan 2023 10:23:57 -0800 (PST) Received: by mail-pj1-x1033.google.com with SMTP id m11so11914925pji.0 for ; Mon, 30 Jan 2023 10:23:56 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=oj1LIEiLCoH05jrvnS3NlcMWxNoKVbL+lD4xO5ixkXk=; b=Fif22sd+vUzBxEdZTO7ggfqnbyFrI2PJ8YxpRqjkwlowbQ/NkixyrA983sr/7ZeVmd leFJfBj9Lx9vkhEST6x3PRoEM1u4f/SDf5gomtoKWkZpW1oBzl5+xvoK5OnXzzfaHKVI BzyrTkNWdmsDKPjNYL26bqS6U5FnoB3dQumvpCbEptNphWmtp8/MHGkOiv8t2pyJRJ8f sC0JWzH38GqYdhkv+KzYl67hIKWkV6j9JgKyR1s9jMx7B/NQgHRyQm2kErlHlyXY5jiT XKrKUqiWGTQF2nv6LwhdJW/qcn9V9rZdhfVrADahWNvR/mfBgmqrheiz+ZYUrEImnzIQ pJoA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=oj1LIEiLCoH05jrvnS3NlcMWxNoKVbL+lD4xO5ixkXk=; b=hcLp2peQRuQNKdAghmXN6exk2ean6vBmnIrFaKBtPy+mFa2OaRruJSiGRm8v0SLW/x /DaNpssTCjinLNI4MCftFCeuij9/wdjM4ePMcxrCWJZtOpAyuf7jMuQZBXr8jGVNLdo1 4SWaWXw3kwV3qA1SGYh61Q/SDgDWcA2lxpD1wZAliCKj8OB0SIVNkkfXki2CfoXsWFzr x5UFNrDF8V/9lt49zPOFQd74bk8uWXCh7Qd7pxeI98rL2U6X9xb6MTooqIuP275UGIlV Qu/w9y1AitBCHEZshoI5u8//3HPKm2nI3ChnEn7/bV6WVrSxQ6vJ/eLDpQDcMbopBmQ/ Ht+g== X-Gm-Message-State: AO0yUKXz5B5SPw3XqP4WM08HEpEe9gZUcyUXJwhyfr+axHM4nl+eAwBl RrPX0TarOuIU/8pssxuZZkM6Dw== X-Google-Smtp-Source: AK7set+puhVa9cJ8iCwi92Dm20DUxJcSdv4a3WaLuK30pYTL5oETRGKnE0e7xLE+vt4N2Zob+KA6/g== X-Received: by 2002:a17:90b:4a10:b0:22b:f608:2aa6 with SMTP id kk16-20020a17090b4a1000b0022bf6082aa6mr24859836pjb.18.1675103031096; Mon, 30 Jan 2023 10:23:51 -0800 (PST) Received: from kerodipc.Dlink ([49.206.9.96]) by smtp.gmail.com with ESMTPSA id j193-20020a638bca000000b00478162d9923sm7000291pge.13.2023.01.30.10.23.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 30 Jan 2023 10:23:50 -0800 (PST) From: Sunil V L To: Palmer Dabbelt , Albert Ou , "Rafael J . Wysocki" , Len Brown , Thomas Gleixner , Marc Zyngier , Daniel Lezcano , Jonathan Corbet Cc: linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Anup Patel , Andrew Jones , Atish Patra , Sunil V L Subject: [PATCH 17/24] ACPI: RISC-V: drivers/acpi: Add RHCT related code Date: Mon, 30 Jan 2023 23:52:18 +0530 Message-Id: <20230130182225.2471414-18-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.38.0 In-Reply-To: <20230130182225.2471414-1-sunilvl@ventanamicro.com> References: <20230130182225.2471414-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org RHCT is a new table defined for RISC-V to communicate the features of the CPU to the OS. Create a new architecture folder in drivers/acpi and add RHCT parsing code. Signed-off-by: Sunil V L --- arch/riscv/include/asm/acpi.h | 5 ++ drivers/acpi/Makefile | 2 + drivers/acpi/riscv/Makefile | 2 + drivers/acpi/riscv/rhct.c | 93 +++++++++++++++++++++++++++++++++++ 4 files changed, 102 insertions(+) create mode 100644 drivers/acpi/riscv/Makefile create mode 100644 drivers/acpi/riscv/rhct.c diff --git a/arch/riscv/include/asm/acpi.h b/arch/riscv/include/asm/acpi.h index 69a880b7257a..4fec9ea3b874 100644 --- a/arch/riscv/include/asm/acpi.h +++ b/arch/riscv/include/asm/acpi.h @@ -71,11 +71,16 @@ static inline u32 get_acpi_id_for_cpu(int cpu) { return acpi_cpu_get_madt_rintc(cpu)->uid; } +int acpi_get_riscv_isa(struct acpi_table_header *table, unsigned int cpu, const char **isa); #else static inline u32 get_acpi_id_for_cpu(int cpu) { return -1; } +int acpi_get_riscv_isa(struct acpi_table_header *table, unsigned int cpu, const char **isa) +{ + return -1; +} #endif /* CONFIG_ACPI */ diff --git a/drivers/acpi/Makefile b/drivers/acpi/Makefile index feb36c0b9446..3fc5a0d54f6e 100644 --- a/drivers/acpi/Makefile +++ b/drivers/acpi/Makefile @@ -131,3 +131,5 @@ obj-y += dptf/ obj-$(CONFIG_ARM64) += arm64/ obj-$(CONFIG_ACPI_VIOT) += viot.o + +obj-$(CONFIG_RISCV) += riscv/ diff --git a/drivers/acpi/riscv/Makefile b/drivers/acpi/riscv/Makefile new file mode 100644 index 000000000000..8b3b126e0b94 --- /dev/null +++ b/drivers/acpi/riscv/Makefile @@ -0,0 +1,2 @@ +# SPDX-License-Identifier: GPL-2.0-only +obj-y += rhct.o diff --git a/drivers/acpi/riscv/rhct.c b/drivers/acpi/riscv/rhct.c new file mode 100644 index 000000000000..7c64be64d9d9 --- /dev/null +++ b/drivers/acpi/riscv/rhct.c @@ -0,0 +1,93 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (C) 2022-2023, Ventana Micro Systems Inc + * Author: Sunil V L + * + */ + +#define pr_fmt(fmt) "ACPI: RHCT: " fmt + +#include + +static void acpi_rhct_warn_missing(void) +{ + pr_warn_once("No RHCT table found\n"); +} + +static struct acpi_table_header *acpi_get_rhct(void) +{ + static struct acpi_table_header *rhct; + acpi_status status; + + /* + * RHCT will be used at runtime on every CPU, so we + * don't need to call acpi_put_table() to release the table mapping. + */ + if (!rhct) { + status = acpi_get_table(ACPI_SIG_RHCT, 0, &rhct); + if (ACPI_FAILURE(status)) + acpi_rhct_warn_missing(); + } + + return rhct; +} + +/* + * During early boot, the caller should call acpi_get_table() and pass its pointer to + * these functions(and free up later). At run time, since this table can be used + * multiple times, pass NULL so that the table remains in memory + */ +int acpi_get_riscv_isa(struct acpi_table_header *table, unsigned int acpi_cpu_id, const char **isa) +{ + struct acpi_rhct_node_header *node, *ref_node, *end; + struct acpi_table_rhct *rhct; + struct acpi_rhct_hart_info *hart_info; + struct acpi_rhct_isa_string *isa_node; + u32 *hart_info_node_offset; + int i, j; + + if (acpi_disabled) { + pr_debug("%s: acpi is disabled\n", __func__); + return -1; + } + + if (!table) { + rhct = (struct acpi_table_rhct *)acpi_get_rhct(); + if (!rhct) + return -ENOENT; + } else { + rhct = (struct acpi_table_rhct *)table; + } + + node = ACPI_ADD_PTR(struct acpi_rhct_node_header, rhct, rhct->node_offset); + end = ACPI_ADD_PTR(struct acpi_rhct_node_header, rhct, rhct->header.length); + + for (i = 0; i < rhct->node_count; i++) { + if (node >= end) + break; + switch (node->type) { + case ACPI_RHCT_NODE_TYPE_HART_INFO: + hart_info = ACPI_ADD_PTR(struct acpi_rhct_hart_info, node, + sizeof(struct acpi_rhct_node_header)); + hart_info_node_offset = ACPI_ADD_PTR(u32, hart_info, + sizeof(struct acpi_rhct_hart_info)); + if (acpi_cpu_id != hart_info->uid) + break; + for (j = 0; j < hart_info->num_offsets; j++) { + ref_node = ACPI_ADD_PTR(struct acpi_rhct_node_header, + rhct, hart_info_node_offset[j]); + if (ref_node->type == ACPI_RHCT_NODE_TYPE_ISA_STRING) { + isa_node = ACPI_ADD_PTR(struct acpi_rhct_isa_string, + ref_node, + sizeof(struct acpi_rhct_node_header)); + *isa = isa_node->isa; + return 0; + } + } + break; + } + node = ACPI_ADD_PTR(struct acpi_rhct_node_header, node, node->length); + } + + return -1; +} From patchwork Mon Jan 30 18:22:19 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 651050 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E06F7C54EED for ; Mon, 30 Jan 2023 18:25:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238184AbjA3SZy (ORCPT ); Mon, 30 Jan 2023 13:25:54 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57140 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238311AbjA3SZK (ORCPT ); Mon, 30 Jan 2023 13:25:10 -0500 Received: from mail-pj1-x1035.google.com (mail-pj1-x1035.google.com [IPv6:2607:f8b0:4864:20::1035]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1CE5646D44 for ; Mon, 30 Jan 2023 10:23:59 -0800 (PST) Received: by mail-pj1-x1035.google.com with SMTP id b10so11892963pjo.1 for ; Mon, 30 Jan 2023 10:23:59 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=HjibFpTqTShjczIJbVTkz5RGTuyNmy3y1G35vLo3EEc=; b=JIG4KdNIJo8a8e5DcMOlWOMk+SMYfFyg3Sc1+T9cyo/r6KA/knBlxhzkv6TiGdCEFh QjO2PFJXsESo+8PMKJwelpLyT4Vo86Khy7c6Z7o6X6a33TuC+f+kT9LsGwllBf2XqEK5 IEDoGCJNFCrY9/SkFjrWHgpKsYV1CNUXGhJ9Yn8evGLV6bv8sgnDZ0PIaPdedoyRjbLR ap7ZG6XW24t+kvvZedK4Buw158HCC84yxTP3DRLno7tqS/f+CTP6IZBNL1IIp28NwGhD sUunUcy8sZSCp8pqwKkOULMjeoXPWWA/ga6VwWeMZvqz37Xp18dsvJX+07/zKlwpRN5R uRrQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=HjibFpTqTShjczIJbVTkz5RGTuyNmy3y1G35vLo3EEc=; b=dS0gZxPjKrbjFX26imAW5mQeS0Y0vAHar15BJLCjt6efHMutKt9+NM7yY1YiOLm/ki 8z9PzN8lE3eEJILgH1ZX6N0uH11SFnDxrmMNqkqs+dAF7hNswhVO224T2knQR01WjRyN R+ihKnIDEEjHthFxPZyPMGs1D0fYIBjTg0AS2+OAurF++9/fU+pA4L10Bs7cNoP3qIP1 NSpWRIfsY2oLCtgDRNE1r0YtffQXJrycPB8hu18K/JTv28oYRFZ1JYBCBpCZ1Lthv52F FVHovXQQYebGyw/kRN9Kj/Kwl6qfp965NzW3UVp87YOt6m1YuwUru/XG9LvUpQk3bxZ6 Hs5A== X-Gm-Message-State: AFqh2kod/hQCkNMVW891vrbhSGGRyyaVm+jeCQKXZVFNCKIe6RhW4+g+ rMCYQnLEOxr/fu3Jgpz2/JTM2A== X-Google-Smtp-Source: AMrXdXtiX8G638QNxJdbmXV10F7Qf0CdgmUoIWBv0Ar85IkvXkqVVNNpBrhVhN1ABIlikG/btEedJg== X-Received: by 2002:a05:6a20:c706:b0:b6:c018:7fd8 with SMTP id hi6-20020a056a20c70600b000b6c0187fd8mr52692395pzb.11.1675103036632; Mon, 30 Jan 2023 10:23:56 -0800 (PST) Received: from kerodipc.Dlink ([49.206.9.96]) by smtp.gmail.com with ESMTPSA id j193-20020a638bca000000b00478162d9923sm7000291pge.13.2023.01.30.10.23.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 30 Jan 2023 10:23:56 -0800 (PST) From: Sunil V L To: Palmer Dabbelt , Albert Ou , "Rafael J . Wysocki" , Len Brown , Thomas Gleixner , Marc Zyngier , Daniel Lezcano , Jonathan Corbet Cc: linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Anup Patel , Andrew Jones , Atish Patra , Sunil V L Subject: [PATCH 18/24] RISC-V: ACPI: time.c: Add ACPI support for time_init() Date: Mon, 30 Jan 2023 23:52:19 +0530 Message-Id: <20230130182225.2471414-19-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.38.0 In-Reply-To: <20230130182225.2471414-1-sunilvl@ventanamicro.com> References: <20230130182225.2471414-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org On ACPI based platforms, timer related information is available in RHCT. Add ACPI based probe support to the timer initialization. Signed-off-by: Sunil V L --- arch/riscv/kernel/time.c | 25 +++++++++++++++++++------ 1 file changed, 19 insertions(+), 6 deletions(-) diff --git a/arch/riscv/kernel/time.c b/arch/riscv/kernel/time.c index 1cf21db4fcc7..e49b897fc657 100644 --- a/arch/riscv/kernel/time.c +++ b/arch/riscv/kernel/time.c @@ -4,6 +4,7 @@ * Copyright (C) 2017 SiFive */ +#include #include #include #include @@ -18,17 +19,29 @@ EXPORT_SYMBOL_GPL(riscv_timebase); void __init time_init(void) { struct device_node *cpu; + struct acpi_table_rhct *rhct; + acpi_status status; u32 prop; - cpu = of_find_node_by_path("/cpus"); - if (!cpu || of_property_read_u32(cpu, "timebase-frequency", &prop)) - panic(KERN_WARNING "RISC-V system with no 'timebase-frequency' in DTS\n"); - of_node_put(cpu); - riscv_timebase = prop; + if (acpi_disabled) { + cpu = of_find_node_by_path("/cpus"); + if (!cpu || of_property_read_u32(cpu, "timebase-frequency", &prop)) + panic("RISC-V system with no 'timebase-frequency' in DTS\n"); + of_node_put(cpu); + riscv_timebase = prop; + } else { + status = acpi_get_table(ACPI_SIG_RHCT, 0, (struct acpi_table_header **)&rhct); + if (ACPI_FAILURE(status)) + panic("RISC-V ACPI system with no RHCT table\n"); + riscv_timebase = rhct->time_base_freq; + acpi_put_table((struct acpi_table_header *)rhct); + } lpj_fine = riscv_timebase / HZ; - of_clk_init(NULL); + if (acpi_disabled) + of_clk_init(NULL); + timer_probe(); tick_setup_hrtimer_broadcast(); From patchwork Mon Jan 30 18:22:20 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 648674 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DCAF0C54EAA for ; Mon, 30 Jan 2023 18:26:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238046AbjA3S0D (ORCPT ); Mon, 30 Jan 2023 13:26:03 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57832 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238080AbjA3SZf (ORCPT ); Mon, 30 Jan 2023 13:25:35 -0500 Received: from mail-pj1-x1030.google.com (mail-pj1-x1030.google.com [IPv6:2607:f8b0:4864:20::1030]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 972AD46D5A for ; Mon, 30 Jan 2023 10:24:03 -0800 (PST) Received: by mail-pj1-x1030.google.com with SMTP id z1-20020a17090a66c100b00226f05b9595so11990991pjl.0 for ; Mon, 30 Jan 2023 10:24:03 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=UhwY+WHgnWrppFtmwiM46uOiQrz563HB2faXGIghFSU=; b=iInNpQ7clh9Xhn73EhLGThPE3LzvgxolaEMcMBFaNQcU0FyFUCrytg1AoN6qx54NGV tuUi0Rpk82IhdjSzcQlpvC9xnBE8caYnPCYVgCWf12zwykeR0GLxp2+KWVUsIC5wYGG2 tIgSyV5SLs+I8l5zLzzXHedeWug+DUd9Q8tzkSIlVrVJ06ujBh1K6SVIw96N8Y0dsUhg hjXwJr155I9BE2EEWoGASofgJkoKIEKq285EiImlHB3RMkZ2n/U553ecRygzNNXMdV/i YyYa8Vk40KYiz1AMOsip0jMKX+M0e/Sr5ZJ+HUXowwqIp+//AZjG/e3HW9jpCtLgRF/y 9oVA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=UhwY+WHgnWrppFtmwiM46uOiQrz563HB2faXGIghFSU=; b=kaZ5NXrENmjiISn7JvwtclGsg/l7uFPvCerj5IC3A/295CDIoIvsB40u2B11ZvW1Nc K3byHHzbshejbKLoo9HVo2WO25fTQETATeIQUIKL/HBOUbvMatHAvCgrJfjNJ3jsf3Az CKECYw8rjTKoHC4WrGEagb8Tt5vwwO8O7naI+WzuFacVjAw65S6fs9irkbifnvWezxdw tv+PwSlZjAsFsNdY5A97W9B1WMpqyLiP51259glmM72A12haHHPpDpZxaFTF/myNVf1M tp6uHq33/VNYGkyqZPIMvnN9aqppZy3CY2z3iet0XSk3WJ+WJ6E6qtKsdQnMNd6u8+z7 e3jQ== X-Gm-Message-State: AO0yUKUtjREmCXewqkltl0493NOvnBBIvZfifqmDlIrqCgGilC+zU5wJ Ict1qLkSbKfhsv3wNgh+La3ay2oz8C5Yhsub X-Google-Smtp-Source: AK7set8OI+5RJViJJd8quwMebJkruqM9mvugGA8nhl7tcJy8x2139ul4d8jSgUZ1k15UpaedB8w/4w== X-Received: by 2002:a05:6a20:9387:b0:b0:3329:c395 with SMTP id x7-20020a056a20938700b000b03329c395mr13317445pzh.30.1675103041308; Mon, 30 Jan 2023 10:24:01 -0800 (PST) Received: from kerodipc.Dlink ([49.206.9.96]) by smtp.gmail.com with ESMTPSA id j193-20020a638bca000000b00478162d9923sm7000291pge.13.2023.01.30.10.23.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 30 Jan 2023 10:24:00 -0800 (PST) From: Sunil V L To: Palmer Dabbelt , Albert Ou , "Rafael J . Wysocki" , Len Brown , Thomas Gleixner , Marc Zyngier , Daniel Lezcano , Jonathan Corbet Cc: linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Anup Patel , Andrew Jones , Atish Patra , Sunil V L Subject: [PATCH 19/24] RISC-V: ACPI: cpufeature: Add ACPI support in riscv_fill_hwcap() Date: Mon, 30 Jan 2023 23:52:20 +0530 Message-Id: <20230130182225.2471414-20-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.38.0 In-Reply-To: <20230130182225.2471414-1-sunilvl@ventanamicro.com> References: <20230130182225.2471414-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org On ACPI based systems, the information about the hart like ISA, extesions supported are defined in RISC-V Hart Capabilities Table (RHCT). Enable filling up hwcap structure based on the information in RHCT. Signed-off-by: Sunil V L --- arch/riscv/kernel/cpufeature.c | 45 ++++++++++++++++++++++++++++------ 1 file changed, 38 insertions(+), 7 deletions(-) diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c index 93e45560af30..c10177c608f8 100644 --- a/arch/riscv/kernel/cpufeature.c +++ b/arch/riscv/kernel/cpufeature.c @@ -6,12 +6,14 @@ * Copyright (C) 2017 SiFive */ +#include #include #include #include #include #include #include +#include #include #include #include @@ -21,6 +23,7 @@ #include #include #include +#include #define NUM_ALPHA_EXTS ('z' - 'a' + 1) @@ -93,7 +96,10 @@ void __init riscv_fill_hwcap(void) char print_str[NUM_ALPHA_EXTS + 1]; int i, j, rc; unsigned long isa2hwcap[26] = {0}; + struct acpi_table_header *rhct; + acpi_status status; unsigned long hartid; + unsigned int cpu; isa2hwcap['i' - 'a'] = COMPAT_HWCAP_ISA_I; isa2hwcap['m' - 'a'] = COMPAT_HWCAP_ISA_M; @@ -106,18 +112,38 @@ void __init riscv_fill_hwcap(void) bitmap_zero(riscv_isa, RISCV_ISA_EXT_MAX); - for_each_of_cpu_node(node) { + if (!acpi_disabled) { + + status = acpi_get_table(ACPI_SIG_RHCT, 0, &rhct); + if (ACPI_FAILURE(status)) + return; + } + + for_each_possible_cpu(cpu) { unsigned long this_hwcap = 0; DECLARE_BITMAP(this_isa, RISCV_ISA_EXT_MAX); const char *temp; - rc = riscv_of_processor_hartid(node, &hartid); - if (rc < 0) - continue; + if (acpi_disabled) { + node = of_cpu_device_node_get(cpu); + if (node) { + rc = riscv_of_processor_hartid(node, &hartid); + if (rc < 0) + continue; - if (of_property_read_string(node, "riscv,isa", &isa)) { - pr_warn("Unable to find \"riscv,isa\" devicetree entry\n"); - continue; + if (of_property_read_string(node, "riscv,isa", &isa)) { + pr_warn("Unable to find \"riscv,isa\" devicetree entry\n"); + continue; + } + of_node_put(node); + } + } else { + rc = acpi_get_riscv_isa(rhct, get_acpi_id_for_cpu(cpu), &isa); + if (rc < 0) { + pr_warn("Unable to get ISA for the hart - %d\n", + cpu); + continue; + } } temp = isa; @@ -248,6 +274,11 @@ void __init riscv_fill_hwcap(void) bitmap_and(riscv_isa, riscv_isa, this_isa, RISCV_ISA_EXT_MAX); } +#ifdef CONFIG_ACPI + if (!acpi_disabled) + acpi_put_table((struct acpi_table_header *)rhct); +#endif + /* We don't support systems with F but without D, so mask those out * here. */ if ((elf_hwcap & COMPAT_HWCAP_ISA_F) && !(elf_hwcap & COMPAT_HWCAP_ISA_D)) { From patchwork Mon Jan 30 18:22:21 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 651049 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 01ECEC61D97 for ; Mon, 30 Jan 2023 18:26:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238152AbjA3S0S (ORCPT ); Mon, 30 Jan 2023 13:26:18 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57394 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235730AbjA3SZm (ORCPT ); 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Mon, 30 Jan 2023 10:24:05 -0800 (PST) From: Sunil V L To: Palmer Dabbelt , Albert Ou , "Rafael J . Wysocki" , Len Brown , Thomas Gleixner , Marc Zyngier , Daniel Lezcano , Jonathan Corbet Cc: linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Anup Patel , Andrew Jones , Atish Patra , Sunil V L Subject: [PATCH 20/24] RISC-V: ACPI: cpu: Enable cpuinfo for ACPI systems Date: Mon, 30 Jan 2023 23:52:21 +0530 Message-Id: <20230130182225.2471414-21-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.38.0 In-Reply-To: <20230130182225.2471414-1-sunilvl@ventanamicro.com> References: <20230130182225.2471414-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org On ACPI based platforms, few details like ISA need to be read from the ACPI table. Enable cpuinfo on ACPI based systems. Signed-off-by: Sunil V L --- arch/riscv/kernel/cpu.c | 36 +++++++++++++++++++++++++++++------- 1 file changed, 29 insertions(+), 7 deletions(-) diff --git a/arch/riscv/kernel/cpu.c b/arch/riscv/kernel/cpu.c index 1b9a5a66e55a..bd6c0fcfe4ce 100644 --- a/arch/riscv/kernel/cpu.c +++ b/arch/riscv/kernel/cpu.c @@ -3,6 +3,7 @@ * Copyright (C) 2012 Regents of the University of California */ +#include #include #include #include @@ -256,26 +257,47 @@ static void c_stop(struct seq_file *m, void *v) { } +#ifdef CONFIG_ACPI +void acpi_print_hart_info(struct seq_file *m, + unsigned long cpu) +{ + const char *isa; + + if (!acpi_get_riscv_isa(NULL, get_acpi_id_for_cpu(cpu), &isa)) + print_isa(m, isa); + +} +#endif + static int c_show(struct seq_file *m, void *v) { unsigned long cpu_id = (unsigned long)v - 1; - struct device_node *node = of_get_cpu_node(cpu_id, NULL); struct riscv_cpuinfo *ci = per_cpu_ptr(&riscv_cpuinfo, cpu_id); + struct device_node *node; const char *compat, *isa; seq_printf(m, "processor\t: %lu\n", cpu_id); seq_printf(m, "hart\t\t: %lu\n", cpuid_to_hartid_map(cpu_id)); - if (!of_property_read_string(node, "riscv,isa", &isa)) - print_isa(m, isa); + + if (acpi_disabled) { + node = of_get_cpu_node(cpu_id, NULL); + if (!of_property_read_string(node, "riscv,isa", &isa)) + print_isa(m, isa); + if (!of_property_read_string(node, "compatible", &compat) + && strcmp(compat, "riscv")) + seq_printf(m, "uarch\t\t: %s\n", compat); + of_node_put(node); + } +#ifdef CONFIG_ACPI + else + acpi_print_hart_info(m, cpu_id); +#endif + print_mmu(m); - if (!of_property_read_string(node, "compatible", &compat) - && strcmp(compat, "riscv")) - seq_printf(m, "uarch\t\t: %s\n", compat); seq_printf(m, "mvendorid\t: 0x%lx\n", ci->mvendorid); seq_printf(m, "marchid\t\t: 0x%lx\n", ci->marchid); seq_printf(m, "mimpid\t\t: 0x%lx\n", ci->mimpid); seq_puts(m, "\n"); - of_node_put(node); return 0; } From patchwork Mon Jan 30 18:22:22 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 651048 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 53F23C61D97 for ; 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Mon, 30 Jan 2023 10:24:10 -0800 (PST) Received: from kerodipc.Dlink ([49.206.9.96]) by smtp.gmail.com with ESMTPSA id j193-20020a638bca000000b00478162d9923sm7000291pge.13.2023.01.30.10.24.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 30 Jan 2023 10:24:10 -0800 (PST) From: Sunil V L To: Palmer Dabbelt , Albert Ou , "Rafael J . Wysocki" , Len Brown , Thomas Gleixner , Marc Zyngier , Daniel Lezcano , Jonathan Corbet Cc: linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Anup Patel , Andrew Jones , Atish Patra , Sunil V L Subject: [PATCH 21/24] RISC-V: ACPI: Add ACPI initialization in setup_arch() Date: Mon, 30 Jan 2023 23:52:22 +0530 Message-Id: <20230130182225.2471414-22-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.38.0 In-Reply-To: <20230130182225.2471414-1-sunilvl@ventanamicro.com> References: <20230130182225.2471414-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org Initialize ACPI tables for RISC-V during boot. Signed-off-by: Sunil V L --- arch/riscv/kernel/setup.c | 19 ++++++++++++++----- 1 file changed, 14 insertions(+), 5 deletions(-) diff --git a/arch/riscv/kernel/setup.c b/arch/riscv/kernel/setup.c index 4335f08ffaf2..5b4ad1baf664 100644 --- a/arch/riscv/kernel/setup.c +++ b/arch/riscv/kernel/setup.c @@ -8,6 +8,7 @@ * Nick Kossifidis */ +#include #include #include #include @@ -276,14 +277,22 @@ void __init setup_arch(char **cmdline_p) efi_init(); paging_init(); + + /* Parse the ACPI tables for possible boot-time configuration */ + acpi_boot_table_init(); + if (acpi_disabled) { #if IS_ENABLED(CONFIG_BUILTIN_DTB) - unflatten_and_copy_device_tree(); + unflatten_and_copy_device_tree(); #else - if (early_init_dt_verify(__va(XIP_FIXUP(dtb_early_pa)))) - unflatten_device_tree(); - else - pr_err("No DTB found in kernel mappings\n"); + if (early_init_dt_verify(__va(XIP_FIXUP(dtb_early_pa)))) + unflatten_device_tree(); + else + pr_err("No DTB found in kernel mappings\n"); #endif + } else { + early_init_dt_verify(__va(XIP_FIXUP(dtb_early_pa))); + } + early_init_fdt_scan_reserved_mem(); misc_mem_init(); From patchwork Mon Jan 30 18:22:23 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 648673 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9EE1DC54EAA for ; Mon, 30 Jan 2023 18:26:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238187AbjA3S01 (ORCPT ); Mon, 30 Jan 2023 13:26:27 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56886 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238211AbjA3SZ4 (ORCPT ); Mon, 30 Jan 2023 13:25:56 -0500 Received: from mail-pl1-x62e.google.com (mail-pl1-x62e.google.com [IPv6:2607:f8b0:4864:20::62e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A821C470AF for ; Mon, 30 Jan 2023 10:24:15 -0800 (PST) Received: by mail-pl1-x62e.google.com with SMTP id v23so12558837plo.1 for ; Mon, 30 Jan 2023 10:24:15 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=vkGE01Mpgd0zQdA3GENSlYo9eU6sEMItLJR0OaGMyjQ=; b=jbIhshr5uVfA86th0bcTdtMzr9oS1VyqbMLYF5ZGlBRXNpHrcs8DWHf/D9IgTeFh1F Y5e11T4Vvtref1QDKQ+XiHXojUg0e+i+S38peWV4Apx94P0NKRcB0DAmJRk0RrJle8Fm 3awc1GpI7w1j7MnnGL3ciDCIf90r85C3QXXXCK0L3ojt2238HEnvWEsLTfjYhakRe3hG wbMlKcmEJuWJHEPilJoudPQPRUa6ARXhJ98TEnIkJtu3FyXxlmD89cMv78BzfLFR5kYy Qc3rHv2CCGYsIixWXWQgdM+5g+FKaEJDGviWmeoLzOH5zJk9RSqhHAdf13vmHvrp3x82 1r5Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=vkGE01Mpgd0zQdA3GENSlYo9eU6sEMItLJR0OaGMyjQ=; b=XDQ/EYDnBpQBqSMCvLbAlUUD+26MQZY1VPYWtB+dUFf8f58+cCmlfNl71QbJMlT31Q UeRp8ItVFslEaL1Dg9Rp93p2SaO2+tCGNDxDEUPX3LlTX4Ov7+/vA62r4jiisKLZNpNG wvH7GzfDU6OtqW5oabhBJPJiZxtNW1zZKIKZcfZ+7/fg4fNSB88FsyK7D6dM7pqRCeIR 9pAZewrWBD4tKaJrplgEsWO8wJQ1qGSwiSkMEs6E7/s5NxP3CEPf/TqPAIKIvg9pAqLL xlbR31N3/Giw4VnqvcUEfaI9SGAYeTNCC8jGJvWKn7x75iD6ABXR47dIxYa7Rl6rDR0s EwMQ== X-Gm-Message-State: AO0yUKUSIJFjvQjZ09kXNefVMQtgqjc0NDANeCSpUBJaLd/QYeVTOn5J yZjpvAgjPUILYtsdxd/ABKCDhg== X-Google-Smtp-Source: AK7set9Pnqr1BTxPCJQr0H6gTIG5Wj6YCKgECl1AdrucdYZkfWDBH80CoQiA1a+eIyoZ5cYvuPNGpQ== X-Received: by 2002:a17:90b:3909:b0:22e:5ffa:2a34 with SMTP id ob9-20020a17090b390900b0022e5ffa2a34mr1813190pjb.36.1675103055398; Mon, 30 Jan 2023 10:24:15 -0800 (PST) Received: from kerodipc.Dlink ([49.206.9.96]) by smtp.gmail.com with ESMTPSA id j193-20020a638bca000000b00478162d9923sm7000291pge.13.2023.01.30.10.24.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 30 Jan 2023 10:24:14 -0800 (PST) From: Sunil V L To: Palmer Dabbelt , Albert Ou , "Rafael J . Wysocki" , Len Brown , Thomas Gleixner , Marc Zyngier , Daniel Lezcano , Jonathan Corbet Cc: linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Anup Patel , Andrew Jones , Atish Patra , Sunil V L Subject: [PATCH 22/24] RISC-V: ACPI: Enable ACPI in defconfig Date: Mon, 30 Jan 2023 23:52:23 +0530 Message-Id: <20230130182225.2471414-23-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.38.0 In-Reply-To: <20230130182225.2471414-1-sunilvl@ventanamicro.com> References: <20230130182225.2471414-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org Add support to build ACPI subsystem in defconfig. Signed-off-by: Sunil V L --- arch/riscv/configs/defconfig | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig index 128dcf4c0814..8ce06fb0dde8 100644 --- a/arch/riscv/configs/defconfig +++ b/arch/riscv/configs/defconfig @@ -218,3 +218,7 @@ CONFIG_RCU_EQS_DEBUG=y # CONFIG_FTRACE is not set # CONFIG_RUNTIME_TESTING_MENU is not set CONFIG_MEMTEST=y +CONFIG_ARCH_SUPPORTS_ACPI=y +CONFIG_ACPI=y +CONFIG_ACPI_MCFG=y +# CONFIG_PCI_QUIRKS is not set From patchwork Mon Jan 30 18:22:24 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 648672 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DB632C636CB for ; Mon, 30 Jan 2023 18:26:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238218AbjA3S0k (ORCPT ); Mon, 30 Jan 2023 13:26:40 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57926 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238094AbjA3S0Q (ORCPT ); Mon, 30 Jan 2023 13:26:16 -0500 Received: from mail-pj1-x102f.google.com (mail-pj1-x102f.google.com [IPv6:2607:f8b0:4864:20::102f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A9EEA3D905 for ; Mon, 30 Jan 2023 10:24:25 -0800 (PST) Received: by mail-pj1-x102f.google.com with SMTP id n20-20020a17090aab9400b00229ca6a4636so16433894pjq.0 for ; Mon, 30 Jan 2023 10:24:25 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=0GmsS1bMG3vhs9nYaH5ehvEVh7IMrCbQji3r9uemxws=; b=FdQa5Nr8gTa9dhRoHNHv6DLl9MMrt0b8LGra3FlgdVR0HXDLToZe7M4Vw8FA842bxO ANogiCr8CkEluK5rksyrobBwZAKJ8A7G98bpLiz8xri62Tumhak9vvXobe/T1z4+dIij Jlqnftn2IXrjlaveSNTGwhALA2SpVI2d8kvV9HY86Y4JMm+idqkTZW4FJJkA1grLa2sm x0PYL9hJD9yklIp6Iu+3fct8g4Ub4r9NHKkc2cqYsfctvGHE+Vyr3INej/nu/6q7BWpl 03u7GIFOwrw/uDqPq7+wghYTYt8n5mYmkRz3QQNQr2axPeRxPYEMQorPSn4SyB0vyC3z ggHw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=0GmsS1bMG3vhs9nYaH5ehvEVh7IMrCbQji3r9uemxws=; b=kyrbq4VnzD1ksqk8kFSxk/qjEYxMs/ain3kG5G+TQbUm6xpvSfq5mody7aSjXARZhe kzrls7AnAzK0y88BPingW6RlgjUA5vOuUpjVRiz4E2120J/umvt0E89zE4Gbu9QWEQ65 M0H/fC1Ksj1hg3A8dYpB0LjeCy1QQjgt+rqql3h0FcoLTsJtc19d5vcVj4Z19E6otz9v y4ktkjAMRudBzKimYvKcxCP6FZ1wq7wuxMAv+xINM4naZX2V7bCsatrHWFvcTOjOtOuR lmCkdWI8CSEQeGYqLlCf2sKor0M4a9n274j1EEJTzlrPH8cCEBq/xFcdRSb4mVCNEySJ h7pg== X-Gm-Message-State: AO0yUKX/qu4zEuGBfUTUFlBA1Fz6tstOFeLxPJCCNdUeKA2Rcxw+jjXu hsEYzUxRRrhVNAoF6M2TLbBPfg== X-Google-Smtp-Source: AK7set/NaUdxXOXi68TuA9LtTnJuAZDAOVCnERp8kT07lTkCp48tqSeuSCZp3ML1m7atqGjopshDlQ== X-Received: by 2002:a05:6a20:841f:b0:be:7d46:e5 with SMTP id c31-20020a056a20841f00b000be7d4600e5mr4161873pzd.56.1675103059928; Mon, 30 Jan 2023 10:24:19 -0800 (PST) Received: from kerodipc.Dlink ([49.206.9.96]) by smtp.gmail.com with ESMTPSA id j193-20020a638bca000000b00478162d9923sm7000291pge.13.2023.01.30.10.24.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 30 Jan 2023 10:24:19 -0800 (PST) From: Sunil V L To: Palmer Dabbelt , Albert Ou , "Rafael J . Wysocki" , Len Brown , Thomas Gleixner , Marc Zyngier , Daniel Lezcano , Jonathan Corbet Cc: linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Anup Patel , Andrew Jones , Atish Patra , Sunil V L Subject: [PATCH 23/24] MAINTAINERS: Add entry for drivers/acpi/riscv Date: Mon, 30 Jan 2023 23:52:24 +0530 Message-Id: <20230130182225.2471414-24-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.38.0 In-Reply-To: <20230130182225.2471414-1-sunilvl@ventanamicro.com> References: <20230130182225.2471414-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org ACPI defines few RISC-V specific tables which need parsing code added in drivers/acpi/riscv. Add maintainer entries for this newly created folder. Signed-off-by: Sunil V L --- MAINTAINERS | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 8a5c25c20d00..b14ceb917a81 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -450,6 +450,13 @@ S: Orphan F: drivers/platform/x86/wmi.c F: include/uapi/linux/wmi.h +ACPI FOR RISC-V (ACPI/riscv) +M: Sunil V L +L: linux-acpi@vger.kernel.org +L: linux-riscv@lists.infradead.org +S: Maintained +F: drivers/acpi/riscv + ACRN HYPERVISOR SERVICE MODULE M: Fei Li L: acrn-dev@lists.projectacrn.org (subscribers-only) From patchwork Mon Jan 30 18:22:25 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 651047 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C23FFC54EAA for ; Mon, 30 Jan 2023 18:26:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238229AbjA3S0l (ORCPT ); Mon, 30 Jan 2023 13:26:41 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57936 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238098AbjA3S0R (ORCPT ); Mon, 30 Jan 2023 13:26:17 -0500 Received: from mail-pj1-x1031.google.com (mail-pj1-x1031.google.com [IPv6:2607:f8b0:4864:20::1031]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A86FD46D67 for ; Mon, 30 Jan 2023 10:24:26 -0800 (PST) Received: by mail-pj1-x1031.google.com with SMTP id e8-20020a17090a9a8800b0022c387f0f93so11351225pjp.3 for ; Mon, 30 Jan 2023 10:24:26 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=wuVGWrNUUEjIXx2KjigY2fz+dkSBCOERpinGp69EYJM=; b=iIZwFAAWGocdPshz3LmlC28vm5OGG56ziFBKl6XO1HZptYcLVhgEw6dYylimgH3fPM /9B3J5Y8Z5oJw8BWXUq7KJyb9hzrJEQ6lFjc1pcEcZkbDfsSey1/GskMpm4Hehh4ioBU Wt5Pm8Wx6kDDEj97kMeoEwJqCcK8bmo/I04WY0p9wPLCQTVCK7oSRboKeRvATTbLoWjS /eXynBB9Ka/mxjLhT+mtMnDY71dEocS7MrjhN4DDRdN4Kj0dm292Qdi9kCBQTP+i8mj1 uIkxGhN1NA5vTZ36y79ou9www5avH7oUT2PdeyaFoDgA5qOxVcK8Fof3w4fsrUICEmlw HjSA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=wuVGWrNUUEjIXx2KjigY2fz+dkSBCOERpinGp69EYJM=; b=KJCZL8vuBO68Kpc2tOl5wpoSuq/86gfYunKzqvxVZgeDPwhUppXI8mb8hGgOOUidGo rHnVN+VBPxIgjRFOp3YrGv1AW5eOwMDHABX00hNuhMq7QziBCpebWnhdLqxrrwJRFOGs Qso+Emu/A3dY1Reas9emcxpE3LRxpyISkl65rApBQ1kD6yyZ+rNHLAAlm7wBoa49FBPI io1KoikKM7mLCA632xaYJtVcLXeZCEC5XXH4eRMH+1bjrPzXBib+QaCIKbjsSCPbk3KD CvTTt34wd+nhgcI+dR3CWM7xGV8swx9unUAhFwx/NMrsFzz2y7nkz78jtgEIFX5v4yOs DUbw== X-Gm-Message-State: AO0yUKWex77t7EpKuhzkRpR3tYiRQ1XT8nFu+mTHUEPTZ1sV3IlCwUho TIpWEP+9zgQII35jmp9oxrDwrw== X-Google-Smtp-Source: AK7set+n/r2CZrElPyDBS1vKdJq6Onz/PLzE1JlEypVANy/qXderCMMOJZw49AYfFbT7RutNUjOs0A== X-Received: by 2002:a05:6a20:a003:b0:bc:3537:34a4 with SMTP id p3-20020a056a20a00300b000bc353734a4mr17049951pzj.39.1675103064549; Mon, 30 Jan 2023 10:24:24 -0800 (PST) Received: from kerodipc.Dlink ([49.206.9.96]) by smtp.gmail.com with ESMTPSA id j193-20020a638bca000000b00478162d9923sm7000291pge.13.2023.01.30.10.24.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 30 Jan 2023 10:24:23 -0800 (PST) From: Sunil V L To: Palmer Dabbelt , Albert Ou , "Rafael J . Wysocki" , Len Brown , Thomas Gleixner , Marc Zyngier , Daniel Lezcano , Jonathan Corbet Cc: linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Anup Patel , Andrew Jones , Atish Patra , Sunil V L Subject: [PATCH 24/24] Documentation/kernel-parameters.txt: Add RISC-V for ACPI parameter Date: Mon, 30 Jan 2023 23:52:25 +0530 Message-Id: <20230130182225.2471414-25-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.38.0 In-Reply-To: <20230130182225.2471414-1-sunilvl@ventanamicro.com> References: <20230130182225.2471414-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org With ACPI support added for RISC-V, this kernel parameter also supported on RISC-V. Hence, update the documentation. Signed-off-by: Sunil V L --- Documentation/admin-guide/kernel-parameters.txt | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt index 6cfa6e3996cf..d9795418aaf8 100644 --- a/Documentation/admin-guide/kernel-parameters.txt +++ b/Documentation/admin-guide/kernel-parameters.txt @@ -1,9 +1,9 @@ - acpi= [HW,ACPI,X86,ARM64] + acpi= [HW,ACPI,X86,ARM64,RISC-V] Advanced Configuration and Power Interface Format: { force | on | off | strict | noirq | rsdt | copy_dsdt } force -- enable ACPI if default was off - on -- enable ACPI but allow fallback to DT [arm64] + on -- enable ACPI but allow fallback to DT [arm64,riscv] off -- disable ACPI if default was on noirq -- do not use ACPI for IRQ routing strict -- Be less tolerant of platforms that are not @@ -12,6 +12,8 @@ copy_dsdt -- copy DSDT to memory For ARM64, ONLY "acpi=off", "acpi=on" or "acpi=force" are available + For RISC-V, ONLY "acpi=off", "acpi=on" or "acpi=force" + are available See also Documentation/power/runtime_pm.rst, pci=noacpi