From patchwork Fri Jan 27 00:47:24 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stephen Boyd X-Patchwork-Id: 92550 Delivered-To: patch@linaro.org Received: by 10.140.20.99 with SMTP id 90csp10356qgi; Thu, 26 Jan 2017 16:48:55 -0800 (PST) X-Received: by 10.98.220.91 with SMTP id t88mr6222842pfg.78.1485478135522; Thu, 26 Jan 2017 16:48:55 -0800 (PST) Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[68.101.172.78]) by smtp.gmail.com with ESMTPSA id k184sm6016152pgc.23.2017.01.26.16.47.31 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 26 Jan 2017 16:47:31 -0800 (PST) From: Stephen Boyd To: Andy Gross Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Bjorn Andersson Subject: [PATCH 1/5] ARM: dts: qcom: Remove s4/5vs1, 2 from RPM pm8941 control Date: Thu, 26 Jan 2017 16:47:24 -0800 Message-Id: <20170127004728.22490-2-stephen.boyd@linaro.org> X-Mailer: git-send-email 2.10.0.297.gf6727b0 In-Reply-To: <20170127004728.22490-1-stephen.boyd@linaro.org> References: <20170127004728.22490-1-stephen.boyd@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org These regulators are controlled by the SPMI regulator driver instead of the RPM regulator driver in the downstream android kernel sources. Let's remove them from the DTS here because they'll never be used by the RPM regulator driver. Cc: Bjorn Andersson Signed-off-by: Stephen Boyd --- arch/arm/boot/dts/qcom-msm8974-sony-xperia-honami.dts | 1 - arch/arm/boot/dts/qcom-msm8974.dtsi | 4 ---- 2 files changed, 5 deletions(-) -- 2.10.0.297.gf6727b0 diff --git a/arch/arm/boot/dts/qcom-msm8974-sony-xperia-honami.dts b/arch/arm/boot/dts/qcom-msm8974-sony-xperia-honami.dts index e7c1577d56f4..50966378f9e4 100644 --- a/arch/arm/boot/dts/qcom-msm8974-sony-xperia-honami.dts +++ b/arch/arm/boot/dts/qcom-msm8974-sony-xperia-honami.dts @@ -92,7 +92,6 @@ vdd_l9_l10_l17_l22-supply = <&vreg_boost>; vdd_l13_l20_l23_l24-supply = <&vreg_boost>; vdd_l21-supply = <&vreg_boost>; - vin_5vs-supply = <&pm8941_5v>; s1 { regulator-min-microvolt = <1300000>; diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi index 0e9bbede860d..6c167c031368 100644 --- a/arch/arm/boot/dts/qcom-msm8974.dtsi +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi @@ -735,7 +735,6 @@ pm8941_s1: s1 {}; pm8941_s2: s2 {}; pm8941_s3: s3 {}; - pm8941_5v: s4 {}; pm8941_l1: l1 {}; pm8941_l2: l2 {}; @@ -765,9 +764,6 @@ pm8941_lvs1: lvs1 {}; pm8941_lvs2: lvs2 {}; pm8941_lvs3: lvs3 {}; - - pm8941_5vs1: 5vs1 {}; - pm8941_5vs2: 5vs2 {}; }; }; }; From patchwork Fri Jan 27 00:47:25 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stephen Boyd X-Patchwork-Id: 92551 Delivered-To: patch@linaro.org Received: by 10.140.20.99 with SMTP id 90csp10491qgi; Thu, 26 Jan 2017 16:49:25 -0800 (PST) X-Received: by 10.99.100.3 with SMTP id y3mr6389332pgb.36.1485478165817; Thu, 26 Jan 2017 16:49:25 -0800 (PST) Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[68.101.172.78]) by smtp.gmail.com with ESMTPSA id k184sm6016152pgc.23.2017.01.26.16.47.32 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 26 Jan 2017 16:47:32 -0800 (PST) From: Stephen Boyd To: Andy Gross Cc: "Bird, Tim" , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Tim Bird Subject: [PATCH 2/5] ARM: dts: qcom: add charger otg regulator Date: Thu, 26 Jan 2017 16:47:25 -0800 Message-Id: <20170127004728.22490-3-stephen.boyd@linaro.org> X-Mailer: git-send-email 2.10.0.297.gf6727b0 In-Reply-To: <20170127004728.22490-1-stephen.boyd@linaro.org> References: <20170127004728.22490-1-stephen.boyd@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: "Bird, Tim" Add the otg regulator provided by the charger block. Signed-off-by: Tim Bird Reviewed-by: Bjorn Andersson [stephen.boyd@linaro.org: Fix otg supply property name] Signed-off-by: Stephen Boyd --- arch/arm/boot/dts/qcom-pm8941.dtsi | 4 ++++ 1 file changed, 4 insertions(+) -- 2.10.0.297.gf6727b0 diff --git a/arch/arm/boot/dts/qcom-pm8941.dtsi b/arch/arm/boot/dts/qcom-pm8941.dtsi index f8eb5e31c920..6b16b296f0fa 100644 --- a/arch/arm/boot/dts/qcom-pm8941.dtsi +++ b/arch/arm/boot/dts/qcom-pm8941.dtsi @@ -45,6 +45,10 @@ "chg-gone", "usb-valid", "dc-valid"; + + usb-otg-in-supply = <&pm8941_5vs1>; + + chg_otg: otg-vbus { }; }; pm8941_gpios: gpios@c000 { From patchwork Fri Jan 27 00:47:26 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stephen Boyd X-Patchwork-Id: 92553 Delivered-To: patch@linaro.org Received: by 10.140.20.99 with SMTP id 90csp10499qgi; Thu, 26 Jan 2017 16:49:28 -0800 (PST) X-Received: by 10.84.172.1 with SMTP id m1mr8113590plb.5.1485478168329; Thu, 26 Jan 2017 16:49:28 -0800 (PST) Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[68.101.172.78]) by smtp.gmail.com with ESMTPSA id k184sm6016152pgc.23.2017.01.26.16.47.33 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 26 Jan 2017 16:47:33 -0800 (PST) From: Stephen Boyd To: Andy Gross Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org Subject: [PATCH 3/5] ARM: dts: qcom-msm8974: Add HS usb node and OTG detection mechanisms Date: Thu, 26 Jan 2017 16:47:26 -0800 Message-Id: <20170127004728.22490-4-stephen.boyd@linaro.org> X-Mailer: git-send-email 2.10.0.297.gf6727b0 In-Reply-To: <20170127004728.22490-1-stephen.boyd@linaro.org> References: <20170127004728.22490-1-stephen.boyd@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This USB controller has two phys, so add them both underneath the ULPI bus, but only enable one of them based on the board configuration. To get OTG to work, we need to add the id and vbus detection info and also populate the regulators for the vbus supply. Signed-off-by: Stephen Boyd --- arch/arm/boot/dts/qcom-apq8074-dragonboard.dts | 20 +++++++++++ arch/arm/boot/dts/qcom-msm8974.dtsi | 49 ++++++++++++++++++++++++++ arch/arm/boot/dts/qcom-pm8941.dtsi | 32 ++++++++++++++++- 3 files changed, 100 insertions(+), 1 deletion(-) -- 2.10.0.297.gf6727b0 diff --git a/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts b/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts index e9ee6dbf81fb..42a95a086c0f 100644 --- a/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts +++ b/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts @@ -57,6 +57,26 @@ }; }; + usb@f9a55000 { + status = "ok"; + phys = <&usb_hs2_phy>; + phy-select = <&tcsr 0xb000 1>; + extcon = <&smbb>, <&usb_id>; + vbus-supply = <&chg_otg>; + hnp-disable; + srp-disable; + adp-disable; + ulpi { + phy@b { + status = "ok"; + v3p3-supply = <&pm8941_l24>; + v1p8-supply = <&pm8941_l6>; + extcon = <&smbb>; + qcom,init-seq = /bits/ 8 <0x1 0x63>; + }; + }; + }; + pinctrl@fd510000 { i2c11_pins: i2c11 { mux { diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi index 6c167c031368..c714c673ea0c 100644 --- a/arch/arm/boot/dts/qcom-msm8974.dtsi +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi @@ -511,6 +511,11 @@ reg = <0xfc400000 0x4000>; }; + tcsr: syscon@fd4a0000 { + compatible = "syscon"; + reg = <0xfd4a0000 0x10000>; + }; + tcsr_mutex_block: syscon@fd484000 { compatible = "syscon"; reg = <0xfd484000 0x2000>; @@ -618,6 +623,50 @@ }; }; + otg: usb@f9a55000 { + compatible = "qcom,ci-hdrc"; + reg = <0xf9a55000 0x200>, + <0xf9a55200 0x200>; + interrupts = ; + clocks = <&gcc GCC_USB_HS_AHB_CLK>, + <&gcc GCC_USB_HS_SYSTEM_CLK>; + clock-names = "iface", "core"; + assigned-clocks = <&gcc GCC_USB_HS_SYSTEM_CLK>; + assigned-clock-rates = <75000000>; + resets = <&gcc GCC_USB_HS_BCR>; + reset-names = "core"; + phy_type = "ulpi"; + dr_mode = "otg"; + ahb-burst-config = <0>; + phy-names = "usb-phy"; + status = "disabled"; + #reset-cells = <1>; + + ulpi { + usb_hs1_phy: phy@a { + compatible = "qcom,usb-hs-phy-msm8974", + "qcom,usb-hs-phy"; + #phy-cells = <0>; + clocks = <&xo_board>, <&gcc GCC_USB2A_PHY_SLEEP_CLK>; + clock-names = "ref", "sleep"; + resets = <&gcc GCC_USB2A_PHY_BCR>, <&otg 0>; + reset-names = "phy", "por"; + status = "disabled"; + }; + + usb_hs2_phy: phy@b { + compatible = "qcom,usb-hs-phy-msm8974", + "qcom,usb-hs-phy"; + #phy-cells = <0>; + clocks = <&xo_board>, <&gcc GCC_USB2B_PHY_SLEEP_CLK>; + clock-names = "ref", "sleep"; + resets = <&gcc GCC_USB2B_PHY_BCR>, <&otg 1>; + reset-names = "phy", "por"; + status = "disabled"; + }; + }; + }; + rng@f9bff000 { compatible = "qcom,prng"; reg = <0xf9bff000 0x200>; diff --git a/arch/arm/boot/dts/qcom-pm8941.dtsi b/arch/arm/boot/dts/qcom-pm8941.dtsi index 6b16b296f0fa..3fc9f34f45bb 100644 --- a/arch/arm/boot/dts/qcom-pm8941.dtsi +++ b/arch/arm/boot/dts/qcom-pm8941.dtsi @@ -26,7 +26,14 @@ bias-pull-up; }; - charger@1000 { + usb_id: misc@900 { + compatible = "qcom,pm8941-misc"; + reg = <0x900>; + interrupts = <0x0 0x9 0 IRQ_TYPE_EDGE_BOTH>; + interrupt-names = "usb_id"; + }; + + smbb: charger@1000 { compatible = "qcom,pm8941-charger"; reg = <0x1000>; interrupts = <0x0 0x10 7 IRQ_TYPE_EDGE_BOTH>, @@ -175,5 +182,28 @@ status = "disabled"; }; + + regulators { + compatible = "qcom,pm8941-regulators"; + interrupts = <0x1 0x83 0x2 0>, <0x1 0x84 0x2 0>; + interrupt-names = "ocp-5vs1", "ocp-5vs2"; + vin_5vs-supply = <&pm8941_5v>; + + pm8941_5v: s4 { + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-enable-ramp-delay = <500>; + }; + + pm8941_5vs1: 5vs1 { + regulator-enable-ramp-delay = <1000>; + regulator-pull-down; + regulator-over-current-protection; + qcom,ocp-max-retries = <10>; + qcom,ocp-retry-delay = <30>; + qcom,vs-soft-start-strength = <0>; + regulator-initial-mode = <1>; + }; + }; }; }; From patchwork Fri Jan 27 00:47:27 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stephen Boyd X-Patchwork-Id: 92554 Delivered-To: patch@linaro.org Received: by 10.140.20.99 with SMTP id 90csp10573qgi; Thu, 26 Jan 2017 16:49:47 -0800 (PST) X-Received: by 10.84.129.67 with SMTP id 61mr8318581plb.103.1485478187219; Thu, 26 Jan 2017 16:49:47 -0800 (PST) Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[68.101.172.78]) by smtp.gmail.com with ESMTPSA id k184sm6016152pgc.23.2017.01.26.16.47.34 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 26 Jan 2017 16:47:35 -0800 (PST) From: Stephen Boyd To: Andy Gross Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Bjorn Andersson , Srinivas Kandagatla , Nicolas Dechesne , John Stultz Subject: [PATCH 4/5] ARM: dts: qcom-apq8064: Collapse usb support into one node Date: Thu, 26 Jan 2017 16:47:27 -0800 Message-Id: <20170127004728.22490-5-stephen.boyd@linaro.org> X-Mailer: git-send-email 2.10.0.297.gf6727b0 In-Reply-To: <20170127004728.22490-1-stephen.boyd@linaro.org> References: <20170127004728.22490-1-stephen.boyd@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org We currently have three device nodes for the same USB hardware block, as evident by the reuse of the same reg address multiple times. Now that the chipidea driver fully supports OTG with the MSM wrapper we can collapse the three nodes into one USB device node, reflecting the true nature of the hardware. Since we're here, we also mark the irq trigger flags correctly, as IRQ_TYPE_LEVEL_HIGH instead of IRQ_TYPE_NONE. Cc: Bjorn Andersson Cc: Srinivas Kandagatla Cc: Nicolas Dechesne Cc: John Stultz Signed-off-by: Stephen Boyd --- .../arm/boot/dts/qcom-apq8064-arrow-sd-600eval.dts | 49 +++---- arch/arm/boot/dts/qcom-apq8064-asus-nexus7-flo.dts | 21 +-- arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts | 54 ++++--- arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 54 ++++--- .../arm/boot/dts/qcom-apq8064-sony-xperia-yuga.dts | 16 +-- arch/arm/boot/dts/qcom-apq8064.dtsi | 156 ++++++++++++--------- 6 files changed, 170 insertions(+), 180 deletions(-) -- 2.10.0.297.gf6727b0 diff --git a/arch/arm/boot/dts/qcom-apq8064-arrow-sd-600eval.dts b/arch/arm/boot/dts/qcom-apq8064-arrow-sd-600eval.dts index 39ae2bc8cb08..eb2d0402c0f8 100644 --- a/arch/arm/boot/dts/qcom-apq8064-arrow-sd-600eval.dts +++ b/arch/arm/boot/dts/qcom-apq8064-arrow-sd-600eval.dts @@ -290,44 +290,37 @@ target-supply = <&pm8921_lvs7>; }; - /* OTG */ - phy@12500000 { - status = "okay"; - dr_mode = "peripheral"; - vddcx-supply = <&pm8921_s3>; - v3p3-supply = <&pm8921_l3>; - v1p8-supply = <&pm8921_l4>; - }; - - phy@12520000 { - status = "okay"; - vddcx-supply = <&pm8921_s3>; - v3p3-supply = <&pm8921_l3>; - v1p8-supply = <&pm8921_l23>; - }; - - phy@12530000 { - status = "okay"; - vddcx-supply = <&pm8921_s3>; - v3p3-supply = <&pm8921_l3>; - v1p8-supply = <&pm8921_l23>; - }; - - gadget@12500000 { - status = "okay"; - }; - - /* OTG */ usb@12500000 { status = "okay"; + dr_mode = "peripheral"; + ulpi { + phy { + v3p3-supply = <&pm8921_l3>; + v1p8-supply = <&pm8921_l4>; + }; + }; }; usb@12520000 { status = "okay"; + dr_mode = "otg"; + ulpi { + phy { + v3p3-supply = <&pm8921_l3>; + v1p8-supply = <&pm8921_l23>; + }; + }; }; usb@12530000 { status = "okay"; + dr_mode = "otg"; + ulpi { + phy { + v3p3-supply = <&pm8921_l3>; + v1p8-supply = <&pm8921_l23>; + }; + }; }; amba { diff --git a/arch/arm/boot/dts/qcom-apq8064-asus-nexus7-flo.dts b/arch/arm/boot/dts/qcom-apq8064-asus-nexus7-flo.dts index e39440a86739..e5fef32342da 100644 --- a/arch/arm/boot/dts/qcom-apq8064-asus-nexus7-flo.dts +++ b/arch/arm/boot/dts/qcom-apq8064-asus-nexus7-flo.dts @@ -320,22 +320,15 @@ }; }; - /* OTG */ - phy@12500000 { - status = "okay"; - vddcx-supply = <&pm8921_s3>; - v3p3-supply = <&pm8921_l3>; - v1p8-supply = <&pm8921_l4>; - dr_mode = "otg"; - }; - - gadget@12500000 { - status = "okay"; - }; - - /* OTG */ usb@12500000 { status = "okay"; + dr_mode = "otg"; + ulpi { + phy { + v3p3-supply = <&pm8921_l3>; + v1p8-supply = <&pm8921_l4>; + }; + }; }; amba { diff --git a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts index 35f1d46edded..d7362033a91b 100644 --- a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts +++ b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts @@ -149,43 +149,37 @@ }; }; - /* OTG */ - usb1_phy: phy@12500000 { - status = "okay"; - vddcx-supply = <&pm8921_s3>; - v3p3-supply = <&pm8921_l3>; - v1p8-supply = <&pm8921_l4>; - }; - - usb3_phy: phy@12520000 { - status = "okay"; - vddcx-supply = <&pm8921_s3>; - v3p3-supply = <&pm8921_l3>; - v1p8-supply = <&pm8921_l23>; - }; - - usb4_phy: phy@12530000 { - status = "okay"; - vddcx-supply = <&pm8921_s3>; - v3p3-supply = <&pm8921_l3>; - v1p8-supply = <&pm8921_l23>; - }; - - gadget1: gadget@12500000 { - status = "ok"; - }; - - /* OTG */ - usb1: usb@12500000 { + usb@12500000 { status = "ok"; + dr_mode = "otg"; + ulpi { + phy { + v3p3-supply = <&pm8921_l3>; + v1p8-supply = <&pm8921_l4>; + }; + }; }; - usb3: usb@12520000 { + usb@12520000 { status = "okay"; + dr_mode = "host"; + ulpi { + phy { + v3p3-supply = <&pm8921_l3>; + v1p8-supply = <&pm8921_l23>; + }; + }; }; - usb4: usb@12530000 { + usb@12530000 { status = "okay"; + dr_mode = "host"; + ulpi { + phy { + v3p3-supply = <&pm8921_l3>; + v1p8-supply = <&pm8921_l23>; + }; + }; }; /* on board fixed 3.3v supply */ diff --git a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts index 3d37cab3b9a9..ec0b16fc48a1 100644 --- a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts +++ b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts @@ -262,43 +262,37 @@ target-supply = <&pm8921_s4>; }; - /* OTG */ - usb1_phy: phy@12500000 { - status = "okay"; - vddcx-supply = <&pm8921_s3>; - v3p3-supply = <&pm8921_l3>; - v1p8-supply = <&pm8921_l4>; - }; - - usb3_phy: phy@12520000 { - status = "okay"; - vddcx-supply = <&pm8921_s3>; - v3p3-supply = <&pm8921_l3>; - v1p8-supply = <&pm8921_l23>; - }; - - usb4_phy: phy@12530000 { - status = "okay"; - vddcx-supply = <&pm8921_s3>; - v3p3-supply = <&pm8921_l3>; - v1p8-supply = <&pm8921_l23>; - }; - - gadget1: gadget@12500000 { - status = "okay"; - }; - - /* OTG */ - usb1: usb@12500000 { + usb@12500000 { status = "okay"; + dr_mode = "otg"; + ulpi { + phy { + v3p3-supply = <&pm8921_l3>; + v1p8-supply = <&pm8921_l4>; + }; + }; }; - usb3: usb@12520000 { + usb@12520000 { status = "okay"; + dr_mode = "host"; + ulpi { + phy { + v3p3-supply = <&pm8921_l3>; + v1p8-supply = <&pm8921_l23>; + }; + }; }; - usb4: usb@12530000 { + usb@12530000 { status = "okay"; + dr_mode = "host"; + ulpi { + phy { + v3p3-supply = <&pm8921_l3>; + v1p8-supply = <&pm8921_l23>; + }; + }; }; pci@1b500000 { diff --git a/arch/arm/boot/dts/qcom-apq8064-sony-xperia-yuga.dts b/arch/arm/boot/dts/qcom-apq8064-sony-xperia-yuga.dts index ebd675ca94b4..e9083542d383 100644 --- a/arch/arm/boot/dts/qcom-apq8064-sony-xperia-yuga.dts +++ b/arch/arm/boot/dts/qcom-apq8064-sony-xperia-yuga.dts @@ -349,15 +349,15 @@ }; }; - phy@12500000 { - status = "okay"; - vddcx-supply = <&pm8921_s3>; - v3p3-supply = <&pm8921_l3>; - v1p8-supply = <&pm8921_l4>; - }; - - gadget@12500000 { + usb@12500000 { status = "okay"; + dr_mode = "otg"; + ulpi { + phy { + v3p3-supply = <&pm8921_l3>; + v1p8-supply = <&pm8921_l4>; + }; + }; }; gsbi@1a200000 { diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi index 268bd470c865..07b41b41f9ce 100644 --- a/arch/arm/boot/dts/qcom-apq8064.dtsi +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi @@ -179,7 +179,7 @@ }; clocks { - cxo_board { + cxo_board: cxo_board { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <19200000>; @@ -191,7 +191,7 @@ clock-frequency = <27000000>; }; - sleep_clk { + sleep_clk: sleep_clk { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <32768>; @@ -848,81 +848,97 @@ }; }; - usb1_phy: phy@12500000 { - compatible = "qcom,usb-otg-ci"; - reg = <0x12500000 0x400>; - interrupts = ; - status = "disabled"; - - clocks = <&gcc USB_HS1_XCVR_CLK>, - <&gcc USB_HS1_H_CLK>; - clock-names = "core", "iface"; - - resets = <&gcc USB_HS1_RESET>; - reset-names = "link"; - }; - - usb3_phy: phy@12520000 { - compatible = "qcom,usb-otg-ci"; - reg = <0x12520000 0x400>; - interrupts = ; - status = "disabled"; - dr_mode = "host"; - - clocks = <&gcc USB_HS3_XCVR_CLK>, - <&gcc USB_HS3_H_CLK>; - clock-names = "core", "iface"; - - resets = <&gcc USB_HS3_RESET>; - reset-names = "link"; - }; - - usb4_phy: phy@12530000 { - compatible = "qcom,usb-otg-ci"; - reg = <0x12530000 0x400>; - interrupts = ; - status = "disabled"; - dr_mode = "host"; - - clocks = <&gcc USB_HS4_XCVR_CLK>, - <&gcc USB_HS4_H_CLK>; - clock-names = "core", "iface"; - - resets = <&gcc USB_HS4_RESET>; - reset-names = "link"; - }; - - gadget1: gadget@12500000 { - compatible = "qcom,ci-hdrc"; - reg = <0x12500000 0x400>; - status = "disabled"; - dr_mode = "peripheral"; - interrupts = ; - usb-phy = <&usb1_phy>; - }; - usb1: usb@12500000 { - compatible = "qcom,ehci-host"; - reg = <0x12500000 0x400>; - interrupts = ; - status = "disabled"; - usb-phy = <&usb1_phy>; + compatible = "qcom,ci-hdrc"; + reg = <0x12500000 0x200>, + <0x12500200 0x200>; + interrupts = ; + clocks = <&gcc USB_HS1_XCVR_CLK>, <&gcc USB_HS1_H_CLK>; + clock-names = "core", "iface"; + assigned-clocks = <&gcc USB_HS1_XCVR_CLK>; + assigned-clock-rates = <60000000>; + resets = <&gcc USB_HS1_RESET>; + reset-names = "core"; + phy_type = "ulpi"; + ahb-burst-config = <0>; + phys = <&usb_hs1_phy>; + phy-names = "usb-phy"; + status = "disabled"; + #reset-cells = <1>; + + ulpi { + usb_hs1_phy: phy { + compatible = "qcom,usb-hs-phy-apq8064", + "qcom,usb-hs-phy"; + #phy-cells = <0>; + clocks = <&sleep_clk>, <&cxo_board>; + clock-names = "sleep", "ref"; + resets = <&usb1 0>; + reset-names = "por"; + }; + }; }; usb3: usb@12520000 { - compatible = "qcom,ehci-host"; - reg = <0x12520000 0x400>; - interrupts = ; - status = "disabled"; - usb-phy = <&usb3_phy>; + compatible = "qcom,ci-hdrc"; + reg = <0x12520000 0x200>, + <0x12520200 0x200>; + interrupts = ; + clocks = <&gcc USB_HS3_XCVR_CLK>, <&gcc USB_HS3_H_CLK>; + clock-names = "core", "iface"; + assigned-clocks = <&gcc USB_HS3_XCVR_CLK>; + assigned-clock-rates = <60000000>; + resets = <&gcc USB_HS3_RESET>; + reset-names = "core"; + phy_type = "ulpi"; + ahb-burst-config = <0>; + phys = <&usb_hs3_phy>; + phy-names = "usb-phy"; + status = "disabled"; + #reset-cells = <1>; + + ulpi { + usb_hs3_phy: phy { + compatible = "qcom,usb-hs-phy-apq8064", + "qcom,usb-hs-phy"; + #phy-cells = <0>; + clocks = <&sleep_clk>, <&cxo_board>; + clock-names = "sleep", "ref"; + resets = <&usb3 0>; + reset-names = "por"; + }; + }; }; usb4: usb@12530000 { - compatible = "qcom,ehci-host"; - reg = <0x12530000 0x400>; - interrupts = ; - status = "disabled"; - usb-phy = <&usb4_phy>; + compatible = "qcom,ci-hdrc"; + reg = <0x12530000 0x200>, + <0x12530200 0x200>; + interrupts = ; + clocks = <&gcc USB_HS4_XCVR_CLK>, <&gcc USB_HS4_H_CLK>; + clock-names = "core", "iface"; + assigned-clocks = <&gcc USB_HS4_XCVR_CLK>; + assigned-clock-rates = <60000000>; + resets = <&gcc USB_HS4_RESET>; + reset-names = "core"; + phy_type = "ulpi"; + ahb-burst-config = <0>; + phys = <&usb_hs4_phy>; + phy-names = "usb-phy"; + status = "disabled"; + #reset-cells = <1>; + + ulpi { + usb_hs4_phy: phy { + compatible = "qcom,usb-hs-phy-apq8064", + "qcom,usb-hs-phy"; + #phy-cells = <0>; + clocks = <&sleep_clk>, <&cxo_board>; + clock-names = "sleep", "ref"; + resets = <&usb4 0>; + reset-names = "por"; + }; + }; }; sata_phy0: phy@1b400000 { From patchwork Fri Jan 27 00:47:28 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stephen Boyd X-Patchwork-Id: 92552 Delivered-To: patch@linaro.org Received: by 10.140.20.99 with SMTP id 90csp10498qgi; Thu, 26 Jan 2017 16:49:27 -0800 (PST) X-Received: by 10.84.232.133 with SMTP id i5mr8091974plk.79.1485478167669; Thu, 26 Jan 2017 16:49:27 -0800 (PST) Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[68.101.172.78]) by smtp.gmail.com with ESMTPSA id k184sm6016152pgc.23.2017.01.26.16.47.36 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 26 Jan 2017 16:47:36 -0800 (PST) From: Stephen Boyd To: Andy Gross Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org Subject: [PATCH 5/5] arm64: dts: qcom: Collapse usb support into one node Date: Thu, 26 Jan 2017 16:47:28 -0800 Message-Id: <20170127004728.22490-6-stephen.boyd@linaro.org> X-Mailer: git-send-email 2.10.0.297.gf6727b0 In-Reply-To: <20170127004728.22490-1-stephen.boyd@linaro.org> References: <20170127004728.22490-1-stephen.boyd@linaro.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org We currently have three device nodes for the same USB hardware block, as evident by the reuse of the same reg address multiple times. Now that the chipidea driver fully supports OTG with the MSM wrapper we can collapse all these nodes into one USB device node, reflecting the true nature of the hardware. Signed-off-by: Stephen Boyd --- arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi | 34 +++++++++-------- arch/arm64/boot/dts/qcom/msm8916.dtsi | 62 +++++++++++++++---------------- 2 files changed, 47 insertions(+), 49 deletions(-) -- 2.10.0.297.gf6727b0 -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi b/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi index 08bd5ebafb4e..a9506619dfff 100644 --- a/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi +++ b/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi @@ -201,22 +201,16 @@ usb@78d9000 { extcon = <&usb_id>, <&usb_id>; status = "okay"; - }; - - ehci@78d9000 { - status = "okay"; - }; - - phy@78d9000 { - v1p8-supply = <&pm8916_l7>; - v3p3-supply = <&pm8916_l13>; - vddcx-supply = <&pm8916_s1>; - extcon = <&usb_id>, <&usb_id>; - dr_mode = "otg"; - status = "okay"; - switch-gpio = <&pm8916_gpios 4 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&usb_sw_sel_pm>; + adp-disable; + hnp-disable; + srp-disable; + ulpi { + phy { + v1p8-supply = <&pm8916_l7>; + v3p3-supply = <&pm8916_l13>; + extcon = <&usb_id>; + }; + }; }; lpass@07708000 { @@ -321,6 +315,14 @@ pinctrl-0 = <&usb_id_default>; }; + usb-switch { + compatible = "toshiba,tc7usb40mu"; + switch-gpios = <&pm8916_gpios 4 GPIO_ACTIVE_HIGH>; + extcon = <&usb_id>; + pinctrl-names = "default"; + pinctrl-0 = <&usb_sw_sel_pm>; + }; + hdmi-out { compatible = "hdmi-connector"; type = "a"; diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi index f8ff327667c5..5066fb23ed98 100644 --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi @@ -545,44 +545,40 @@ status = "disabled"; }; - usb_dev: usb@78d9000 { + otg: usb@78d9000 { compatible = "qcom,ci-hdrc"; - reg = <0x78d9000 0x400>; - dr_mode = "peripheral"; - interrupts = ; - usb-phy = <&usb_otg>; - status = "disabled"; - }; - - usb_host: ehci@78d9000 { - compatible = "qcom,ehci-host"; - reg = <0x78d9000 0x400>; - interrupts = ; - usb-phy = <&usb_otg>; - status = "disabled"; - }; - - usb_otg: phy@78d9000 { - compatible = "qcom,usb-otg-snps"; - reg = <0x78d9000 0x400>; + reg = <0x78d9000 0x200>, + <0x78d9200 0x200>; interrupts = , ; - - qcom,vdd-levels = <500000 1000000 1320000>; - qcom,phy-init-sequence = <0x44 0x6B 0x24 0x13>; - dr_mode = "peripheral"; - qcom,otg-control = <2>; // PMIC - qcom,manual-pullup; - clocks = <&gcc GCC_USB_HS_AHB_CLK>, - <&gcc GCC_USB_HS_SYSTEM_CLK>, - <&gcc GCC_USB2A_PHY_SLEEP_CLK>; - clock-names = "iface", "core", "sleep"; - - resets = <&gcc GCC_USB2A_PHY_BCR>, - <&gcc GCC_USB_HS_BCR>; - reset-names = "phy", "link"; + <&gcc GCC_USB_HS_SYSTEM_CLK>; + clock-names = "iface", "core"; + assigned-clocks = <&gcc GCC_USB_HS_SYSTEM_CLK>; + assigned-clock-rates = <80000000>; + resets = <&gcc GCC_USB_HS_BCR>; + reset-names = "core"; + phy_type = "ulpi"; + dr_mode = "otg"; + ahb-burst-config = <0>; + phy-names = "usb-phy"; + phys = <&usb_hs_phy>; status = "disabled"; + #reset-cells = <1>; + + ulpi { + usb_hs_phy: phy { + compatible = "qcom,usb-hs-phy-msm8916", + "qcom,usb-hs-phy"; + #phy-cells = <0>; + clocks = <&xo_board>, <&gcc GCC_USB2A_PHY_SLEEP_CLK>; + clock-names = "ref", "sleep"; + resets = <&gcc GCC_USB2A_PHY_BCR>, <&otg 0>; + reset-names = "phy", "por"; + qcom,init-seq = /bits/ 8 <0x0 0x44 + 0x1 0x6b 0x2 0x24 0x3 0x13>; + }; + }; }; intc: interrupt-controller@b000000 {