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[209.132.180.67]) by mx.google.com with ESMTP id t3si17184623pgv.447.2019.04.24.05.03.34; Wed, 24 Apr 2019 05:03:34 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=cUKIcCWZ; spf=pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-gpio-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729416AbfDXMDe (ORCPT + 5 others); Wed, 24 Apr 2019 08:03:34 -0400 Received: from mail-pf1-f195.google.com ([209.85.210.195]:35532 "EHLO mail-pf1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729145AbfDXMDd (ORCPT ); Wed, 24 Apr 2019 08:03:33 -0400 Received: by mail-pf1-f195.google.com with SMTP id t21so9222903pfh.2 for ; Wed, 24 Apr 2019 05:03:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=tkf8vIpZ00F6RrSzW/UjkH840NiiAxYvHaDcdpXXCV8=; b=cUKIcCWZiemwHGyUgrTjHfbcTTzbkYg7rRUjqUBPF8evO2qQt3W9gtKvK+K9LxnqYh MJ/SqhAuVr/cgghG69GlI+BTeytOf9uYHemWoFRWO5O28dd0qhZEE/qO42yoSbw4JJgD +L2oMc7uGLfHDFLWcY8SHoiPvP6Q1Td0EMb0mDJsHGhywEZZ781nqOG7wkexOE+aZHU6 z80UTO0DUyAioaVdTK5JJKbelb0uszqVhNfoZfv3yTgoSglBseQMWnDFxtWg82fDn06j 1iBTIWaLRBfaH3NlfBNCnpDzFBMeQ52q2NlfoHb+1U4TqVUOb08l3A/gaHqK8XU/DACS dBDg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=tkf8vIpZ00F6RrSzW/UjkH840NiiAxYvHaDcdpXXCV8=; b=d9lEQTEVfzyt7JVPCVKby0/w21yPxjDDkMQ8E/wVxeerhXq1JxCTaIqR2CWrNCDsuK 7CeBSBs2mbMwVw4W3yO/0ZVXG4LXkwcHok3Nn0/a6e8MfqSSDRdRucrNLgv5EvGjuqgM gQD3zaQiddbm1TX5XRrojmYMzMkmp591mj8EE5+U4+D5vS8lyRyd2VqTq0zwZ+68auUb TwwX12eAsrfh9NQkHbhOhqNr8NdzRAnra++LkzSGZgiRJF84pxPbe4xHTZHYnYV0XpjO iGT2ANt63WssV83v01lMSkRFql6II9WdvlivuUx42iwo98n26gmaXwPtkYSIxu48edNS 70sw== X-Gm-Message-State: APjAAAWx9wFVG3ZMnmC9FkgYIevjE1+OP2rh8u5l+3od2s91QiPytVSA 0FiQZ36EwyWSaQGe5sWhvs8K X-Received: by 2002:a63:5466:: with SMTP id e38mr30817372pgm.340.1556107412805; Wed, 24 Apr 2019 05:03:32 -0700 (PDT) Received: from localhost.localdomain ([2409:4072:711:bac8:7d48:1fca:4d86:743]) by smtp.gmail.com with ESMTPSA id j22sm25870840pfn.129.2019.04.24.05.03.28 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 24 Apr 2019 05:03:32 -0700 (PDT) From: Manivannan Sadhasivam To: linus.walleij@linaro.org, robh+dt@kernel.org Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, haitao.suo@bitmain.com, darren.tsao@bitmain.com, linux-gpio@vger.kernel.org, Manivannan Sadhasivam Subject: [PATCH 3/5] arm64: dts: bitmain: Add UART pinctrl support for Sophon Edge Date: Wed, 24 Apr 2019 17:32:22 +0530 Message-Id: <20190424120224.22660-4-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190424120224.22660-1-manivannan.sadhasivam@linaro.org> References: <20190424120224.22660-1-manivannan.sadhasivam@linaro.org> Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Add pinctrl support for UARTs exposed on the Sophon Edge board. Signed-off-by: Manivannan Sadhasivam --- .../boot/dts/bitmain/bm1880-sophon-edge.dts | 29 +++++++++++++++++++ 1 file changed, 29 insertions(+) -- 2.17.1 Acked-by: Linus Walleij diff --git a/arch/arm64/boot/dts/bitmain/bm1880-sophon-edge.dts b/arch/arm64/boot/dts/bitmain/bm1880-sophon-edge.dts index 6a3255597138..41da899963b2 100644 --- a/arch/arm64/boot/dts/bitmain/bm1880-sophon-edge.dts +++ b/arch/arm64/boot/dts/bitmain/bm1880-sophon-edge.dts @@ -34,17 +34,46 @@ }; }; +&pinctrl { + pinctrl_uart0_default: pinctrl-uart0-default { + pinmux { + groups = "uart0_grp"; + function = "uart0"; + }; + }; + + pinctrl_uart1_default: pinctrl-uart1-default { + pinmux { + groups = "uart1_grp"; + function = "uart1"; + }; + }; + + pinctrl_uart2_default: pinctrl-uart2-default { + pinmux { + groups = "uart2_grp"; + function = "uart2"; + }; + }; +}; + &uart0 { status = "okay"; clocks = <&uart_clk>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart0_default>; }; &uart1 { status = "okay"; clocks = <&uart_clk>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1_default>; }; &uart2 { status = "okay"; clocks = <&uart_clk>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart2_default>; };