From patchwork Wed Feb 8 06:56:33 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcel Ziswiler X-Patchwork-Id: 651956 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3B1CDC636D3 for ; Wed, 8 Feb 2023 06:57:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230252AbjBHG5W (ORCPT ); Wed, 8 Feb 2023 01:57:22 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36280 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229490AbjBHG5U (ORCPT ); Wed, 8 Feb 2023 01:57:20 -0500 Received: from mout.perfora.net (mout.perfora.net [74.208.4.194]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A97DD12F18; Tue, 7 Feb 2023 22:57:18 -0800 (PST) Received: from toolbox.int.toradex.com ([213.55.227.109]) by mrelay.perfora.net (mreueus002 [74.208.5.2]) with ESMTPSA (Nemesis) id 0MTjFe-1ozDZL28Lw-00QUlV; Wed, 08 Feb 2023 07:57:00 +0100 From: Marcel Ziswiler To: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org, Liu Ying , linux-imx@nxp.com, linux-arm-kernel@lists.infradead.org, Krzysztof Kozlowski , Max Krummenacher , Philippe Schenker , Marcel Ziswiler , Alexander Stein , Fabio Estevam , Krzysztof Kozlowski , Pengutronix Kernel Team , Rob Herring , Sascha Hauer , Shawn Guo Subject: [PATCH v7 02/10] arm64: dts: imx8-ss-dma: add io-channel-cells to adc nodes Date: Wed, 8 Feb 2023 07:56:33 +0100 Message-Id: <20230208065641.23544-3-marcel@ziswiler.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20230208065641.23544-1-marcel@ziswiler.com> References: <20230208065641.23544-1-marcel@ziswiler.com> MIME-Version: 1.0 X-Provags-ID: V03:K1:e9o8jMCkPT/G6ou1wpvLNcthsJilQC/1xmW8OfSgUfXndZEeNJp Z56IOH5FLthfqLg6QcDtPTHd4jZTqNVEEpYcqdcljfYDv/+mL8Zn3uDOaT1RL6YYGOVOclZ MK7/0Sz8TNThXmXyh7MdSpUzhp+VRkoE1og7Jipy+kfFYtO4FIjcboy3W9/j2FXgyam4r3H hVhq3SNTpvgyM2A1P6fug== UI-OutboundReport: notjunk:1;M01:P0:0d3oSiXa5F4=;Nun3pX/+x4n3Lmmkm2Cxm+BP1kH XLFRqAmHuMtAWs8hBOf2hGLhOnxZsyYQO/P8vdq0tYAT5W+I1r8vCF1tNQvPnEuYLEF4TAoND A+7ul/251t+70mtgfGKX4pdxlV0/G8XdIN59oqvr4LpeUX0CzUB1yzVeRkI7NfUr0JMIsVHYy iQ+xKy73K1hLBCYOKKIXjFfh8OeVSqLOEsOk++2ftd+PB5c2u3ofEzhQgfsqNlrLfgHV/vXlo T6aK0iBBysqJuBryh1dj8j48ybNLKp0IpNSHhKXe/CofTQEXihYurTTuPsUJCLGWX7eBY7gNn 0Q7E2fjKkteu+mRbN5SVMK6Jn+Znfwe/+S5HX3Cq8yW6KBU/R0hY84OPNd98McW9WorxlbLgm V72Mpw8ZO6vjH4KMASPxo9Ul5gN9WpU1XcLHIYneALw4Dp3n1MKCvsZAZwriEm30uyvqkTJXH fSvSNVEcxns7XDdW6l0HkcZY0ipO3SBW0SGTQ6MyFxk0oLPKgKcBpxRb0ck8b9jJOrGZdWHSY 2JXqFBUdXQOsxi+9KtTAkzgdzZWwfj7vyOiUiu/QTW99sgQNsahF4D6ppMYCkUezuquXmKYPL omPvkZx31zxb2iCTOwjrVGj+UvgScxMZVVcDLjnIMd5FLZeb19dgt/Hf4RK4pC/CXN7tdvzh/ hNiMISYNBZOQiKyPTSwzNptx/VyTD9zE+xtrJhyz0A== Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Max Krummenacher This commit adds io-channel-cells property to the ADC nodes. This property is required in order for an IIO consumer driver to work. Especially required for Apalis iMX8 QM, as the touchscreen driver uses ADC channels with the ADC driver based on IIO framework. Signed-off-by: Philippe Schenker Signed-off-by: Max Krummenacher Signed-off-by: Marcel Ziswiler Acked-by: Alexander Stein --- (no changes since v6) Changes in v6: - Add Alexander's acked-by. Thanks! Changes in v3: - Fix subject as pointed out by Shawn. Thanks! arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi index a943a1e2797f..6e5ef8b69bf8 100644 --- a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi @@ -270,6 +270,7 @@ i2c3: i2c@5a830000 { adc0: adc@5a880000 { compatible = "nxp,imx8qxp-adc"; + #io-channel-cells = <1>; reg = <0x5a880000 0x10000>; interrupts = ; interrupt-parent = <&gic>; @@ -284,6 +285,7 @@ adc0: adc@5a880000 { adc1: adc@5a890000 { compatible = "nxp,imx8qxp-adc"; + #io-channel-cells = <1>; reg = <0x5a890000 0x10000>; interrupts = ; interrupt-parent = <&gic>; From patchwork Wed Feb 8 06:56:36 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcel Ziswiler X-Patchwork-Id: 651954 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6FFEEC05027 for ; Wed, 8 Feb 2023 06:57:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230411AbjBHG5t (ORCPT ); Wed, 8 Feb 2023 01:57:49 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36648 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230359AbjBHG53 (ORCPT ); Wed, 8 Feb 2023 01:57:29 -0500 Received: from mout.perfora.net (mout.perfora.net [74.208.4.194]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BF0B5126EF; Tue, 7 Feb 2023 22:57:26 -0800 (PST) Received: from toolbox.int.toradex.com ([213.55.227.109]) by mrelay.perfora.net (mreueus002 [74.208.5.2]) with ESMTPSA (Nemesis) id 0LgrQ0-1ommkQ0KE2-00oCMB; Wed, 08 Feb 2023 07:57:12 +0100 From: Marcel Ziswiler To: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org, Liu Ying , linux-imx@nxp.com, linux-arm-kernel@lists.infradead.org, Krzysztof Kozlowski , Joakim Zhang , Marcel Ziswiler , Alexander Stein , Fabio Estevam , Krzysztof Kozlowski , Pengutronix Kernel Team , Rob Herring , Sascha Hauer , Shawn Guo Subject: [PATCH v7 05/10] arm64: dts: imx8qxp: add flexcan in adma Date: Wed, 8 Feb 2023 07:56:36 +0100 Message-Id: <20230208065641.23544-6-marcel@ziswiler.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20230208065641.23544-1-marcel@ziswiler.com> References: <20230208065641.23544-1-marcel@ziswiler.com> MIME-Version: 1.0 X-Provags-ID: V03:K1:e+4oXaJaC7ZRDTsJPAuc1ZGuyY+99oW8TkZwpi8in+0+BaPH0FD 8PvCcrEo7BWzt/CRJNPHS1VRFlkcplDQMHITtBLvF4oCprvaJmqXyRCi94/n2lALYtQDN26 ycJPpStQCsWsyzVbwXTR9odaCvAydzeCcFBhf97BxAp9pgxcz0cO1GzM1bC95vK5LKZGYv5 INWnxi+hBj3emHXBXoF5g== UI-OutboundReport: notjunk:1;M01:P0:dd8F53CH0j8=;Pv1NcLBR0Al7W7ZEss6nP9A+ZqD 82yA0ofySuFQFzxyBT0NhRI7ABxdPYcDZ1wlmVxuGA19q3TTVD8bqNLda1Gc7gg+EdvrO3M8o 8oPmHeGo4UPq1XDnB6qxxVYa7S0bz8otxFLNFSL0G5jMH7wYaP9ZYmUcat9ga68S3On5EVvNz YDStywBcb2js0DU/a9V3CEnjQgpL+KDvZO4yFqRTwBQvZSm4yv1lkwU9g+qos1rKFnpjPaBSH PTBXt93rqkq+y1k+DMvNrEvh6E7NXoVHkPIE62BMeP1Q18JjTOZWicXSgZRKeg/mhkBkQ/dB8 UqlIpVDgw6Dks6qbKX2OVxkaFdHbS0BfiRWLoao4HN6I5ChlYyDwRaVYItSdwrHWmPaAxmDD0 U9mM4UWbPR+kZfXRU44bgzJ6ljN0oLmIKfi59RaGbR7bTFP8jJkSG1B0ExQPFEllPNMWb03p0 HNwqllArfoHHzrQy3xFZtYqRSGL7FJYWpDO4WN17UBzK69q2VGLqrKtEUcvh58Qb+5y3Iktct RezGVaxILwJbZRf5Jeoihja5AK6J6qglVH0oCr+FiSZ7vNUrk9rGCNN00Oa4wKycDfVxLvG3I zPFwUGabOBbNGF4hCMM9DAw5OTnRDicEUPHXSy5ZSKbSNWjvR/Xvl4nlg1E89p7YVHwvM8yFI vcv+J+TWkpinq/5H1rK8jlXAgBJ4xHiBs6lOZ+/svw== Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Joakim Zhang Add FlexCAN decive in adma subsystem. Signed-off-by: Joakim Zhang Signed-off-by: Marcel Ziswiler Tested-by: Alexander Stein # TQMa8XQP --- (no changes since v6) Changes in v6: - Add Alexander's tested-by. Thanks! Changes in v4: - New patch combining the following downstream patches: commit e8fe3f57223a ("arm64: dts: imx8qxp: add FlexCAN in adma") commit 4e90361f1ed3 ("arm64: dts: imx8qxp: add multi-pd support for CAN1/2") commit 899f516e61f8 ("arm64: dts: imx8: dma: fully switched to new clk binding") commit 8a28ca15a058 ("arm64: dts: imx8qxp: drop multi-pd for CAN device") commit c493402197dd ("arm64: dts: imx8: update CAN fsl,clk-source and fsl,scu-index property") .../arm64/boot/dts/freescale/imx8-ss-dma.dtsi | 72 +++++++++++++++++++ 1 file changed, 72 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi index 6ccf926b77a5..2dce8f2ee3ea 100644 --- a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi @@ -298,6 +298,65 @@ adc1: adc@5a890000 { status = "disabled"; }; + flexcan1: can@5a8d0000 { + compatible = "fsl,imx8qm-flexcan"; + reg = <0x5a8d0000 0x10000>; + interrupts = ; + interrupt-parent = <&gic>; + clocks = <&can0_lpcg 1>, + <&can0_lpcg 0>; + clock-names = "ipg", "per"; + assigned-clocks = <&clk IMX_SC_R_CAN_0 IMX_SC_PM_CLK_PER>; + assigned-clock-rates = <40000000>; + power-domains = <&pd IMX_SC_R_CAN_0>; + /* SLSlice[4] */ + fsl,clk-source = /bits/ 8 <0>; + fsl,scu-index = /bits/ 8 <0>; + status = "disabled"; + }; + + flexcan2: can@5a8e0000 { + compatible = "fsl,imx8qm-flexcan"; + reg = <0x5a8e0000 0x10000>; + interrupts = ; + interrupt-parent = <&gic>; + /* CAN0 clock and PD is shared among all CAN instances as + * CAN1 shares CAN0's clock and to enable CAN0's clock it + * has to be powered on. + */ + clocks = <&can0_lpcg 1>, + <&can0_lpcg 0>; + clock-names = "ipg", "per"; + assigned-clocks = <&clk IMX_SC_R_CAN_0 IMX_SC_PM_CLK_PER>; + assigned-clock-rates = <40000000>; + power-domains = <&pd IMX_SC_R_CAN_1>; + /* SLSlice[4] */ + fsl,clk-source = /bits/ 8 <0>; + fsl,scu-index = /bits/ 8 <1>; + status = "disabled"; + }; + + flexcan3: can@5a8f0000 { + compatible = "fsl,imx8qm-flexcan"; + reg = <0x5a8f0000 0x10000>; + interrupts = ; + interrupt-parent = <&gic>; + /* CAN0 clock and PD is shared among all CAN instances as + * CAN2 shares CAN0's clock and to enable CAN0's clock it + * has to be powered on. + */ + clocks = <&can0_lpcg 1>, + <&can0_lpcg 0>; + clock-names = "ipg", "per"; + assigned-clocks = <&clk IMX_SC_R_CAN_0 IMX_SC_PM_CLK_PER>; + assigned-clock-rates = <40000000>; + power-domains = <&pd IMX_SC_R_CAN_2>; + /* SLSlice[4] */ + fsl,clk-source = /bits/ 8 <0>; + fsl,scu-index = /bits/ 8 <2>; + status = "disabled"; + }; + i2c0_lpcg: clock-controller@5ac00000 { compatible = "fsl,imx8qxp-lpcg"; reg = <0x5ac00000 0x10000>; @@ -369,4 +428,17 @@ adc1_lpcg: clock-controller@5ac90000 { "adc1_lpcg_ipg_clk"; power-domains = <&pd IMX_SC_R_ADC_1>; }; + + can0_lpcg: clock-controller@5acd0000 { + compatible = "fsl,imx8qxp-lpcg"; + reg = <0x5acd0000 0x10000>; + #clock-cells = <1>; + clocks = <&clk IMX_SC_R_CAN_0 IMX_SC_PM_CLK_PER>, + <&dma_ipg_clk>, <&dma_ipg_clk>; + clock-indices = , , ; + clock-output-names = "can0_lpcg_pe_clk", + "can0_lpcg_ipg_clk", + "can0_lpcg_chi_clk"; + power-domains = <&pd IMX_SC_R_CAN_0>; + }; }; From patchwork Wed Feb 8 06:56:38 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcel Ziswiler X-Patchwork-Id: 651953 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5C532C05027 for ; Wed, 8 Feb 2023 06:58:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230503AbjBHG6n (ORCPT ); Wed, 8 Feb 2023 01:58:43 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37506 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230352AbjBHG6Y (ORCPT ); Wed, 8 Feb 2023 01:58:24 -0500 Received: from mout.perfora.net (mout.perfora.net [74.208.4.196]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 53F644588E; Tue, 7 Feb 2023 22:57:38 -0800 (PST) Received: from toolbox.int.toradex.com ([213.55.227.109]) by mrelay.perfora.net (mreueus002 [74.208.5.2]) with ESMTPSA (Nemesis) id 0M2bYp-1oZk1s1A2f-00sRaO; Wed, 08 Feb 2023 07:57:21 +0100 From: Marcel Ziswiler To: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org, Liu Ying , linux-imx@nxp.com, linux-arm-kernel@lists.infradead.org, Krzysztof Kozlowski , Zhou Peng , Marcel Ziswiler , Fabio Estevam , Krzysztof Kozlowski , Pengutronix Kernel Team , Rob Herring , Sascha Hauer , Shawn Guo Subject: [PATCH v7 07/10] arm64: dts: imx8qm: add vpu decoder and encoder Date: Wed, 8 Feb 2023 07:56:38 +0100 Message-Id: <20230208065641.23544-8-marcel@ziswiler.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20230208065641.23544-1-marcel@ziswiler.com> References: <20230208065641.23544-1-marcel@ziswiler.com> MIME-Version: 1.0 X-Provags-ID: V03:K1:JzwJJ/Mr/emDRhGoG4LswUkHiG5In4mI5XG/eWcUTzI6SSW+H2l 6TZTnVtQXl3SwN4ZKxW6e1SgqibZ+v3KoBCQZfDGmxeNKjtXj6il/KYxsZp5VqlPQU6qTE7 dmpZ1gmYLLgXLnnCLyNIPkjxn25JfOQdSCU7ihHKK7N0nFqW3iw+dhNeBFtjscS634kbyEp 1O9gnhEP3iiCtIG3Ykgkg== UI-OutboundReport: notjunk:1;M01:P0:Qrf6HGw3b2s=;/UBTRRkJ+2CGq+fRH3RRYPdlW0s RwuWAFQIRHu1htkUIQbLwuC9B7+bBkHMijBtRspbZzGSaQyaXxVT4oUa4q1pbLzq7XYkUyh51 /RWp8vKOSuIPd1t/MJSBwBlxievfmJAlgnZ4rXptVscW+DPyatqYzBy1Exp4SJOhUK/Anx7oK JpTHvViw0MOou3tj4fOA9jALqhit/pXF5qmr2bMOendrLNPjq0rTKPX0V9A+C0678sonFNLbI rpc2WS1qLn7ZPCsoTmoJUFYgdcLiVOiC3HdqFZRUKpQdHFujG2uUQsbgnQo1CwydtjvzPpXrW d6MXQ9RUYCHvMeHV1LwS6ofKdcZL/A0OX+blRVH0mLksE3q3l881B1FE39c/Kw/kOsaVHOJZO 99iO6D0a7k/lR44n+nI/7NjWlEsk+82gCpYJCJy0E1ttjEZPy8jVpQtLMx0dmfIyt5sAZjw9D OCHd+HKSB4GuSqr63ym+I6eFsEosltZpLrLnlMPrCystW7hckZKcGRXpr/qHevpWdsTo6BFv2 eII2Y/+OWZD+xVvMIZa1ou4NBdFu7SzILrKHVsFUmzRWSsutOhW+bI5xuqEGsT4hoBiPpZ+a4 dsChkXuWSpInJCkViVvrxFIV7hizkkR3XRINa9/m+Qf7/MNWtq3rJnBsIJGx1PKkIWNcHvoMg a8jMLBORLh7mnHyAW96qsM2CZN5W0Topn0tpajoamw== Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Zhou Peng Enable VPU decoder and encoder functionality. Signed-off-by: Zhou Peng Signed-off-by: Marcel Ziswiler --- (no changes since v4) Changes in v4: - New patch combining the following downstream patches: commit 4f2147ce6f0e ("arm64: dts: imx8qm: add vpu decoder and encoder") commit 0c9f9b64d27d ("LF-6575: imx8q: vpu: switch to amphion upstream driver") arch/arm64/boot/dts/freescale/imx8qm.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8qm.dtsi b/arch/arm64/boot/dts/freescale/imx8qm.dtsi index 41ce8336f29e..9fff867709f0 100644 --- a/arch/arm64/boot/dts/freescale/imx8qm.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8qm.dtsi @@ -23,6 +23,9 @@ aliases { serial1 = &lpuart1; serial2 = &lpuart2; serial3 = &lpuart3; + vpu_core0 = &vpu_core0; + vpu_core1 = &vpu_core1; + vpu_core2 = &vpu_core2; }; cpus { @@ -212,6 +215,7 @@ rtc: rtc { }; /* sorted in register address */ + #include "imx8-ss-vpu.dtsi" #include "imx8-ss-img.dtsi" #include "imx8-ss-dma.dtsi" #include "imx8-ss-conn.dtsi" From patchwork Wed Feb 8 06:56:41 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcel Ziswiler X-Patchwork-Id: 651952 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 16AACC636CC for ; Wed, 8 Feb 2023 06:59:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230507AbjBHG7q (ORCPT ); Wed, 8 Feb 2023 01:59:46 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37328 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231134AbjBHG7Q (ORCPT ); Wed, 8 Feb 2023 01:59:16 -0500 Received: from mout.perfora.net (mout.perfora.net [74.208.4.194]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B574F45F56; Tue, 7 Feb 2023 22:58:23 -0800 (PST) Received: from toolbox.int.toradex.com ([213.55.227.109]) by mrelay.perfora.net (mreueus002 [74.208.5.2]) with ESMTPSA (Nemesis) id 0MWDHz-1p5ZDD0k37-00XLKC; Wed, 08 Feb 2023 07:57:34 +0100 From: Marcel Ziswiler To: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org, Liu Ying , linux-imx@nxp.com, linux-arm-kernel@lists.infradead.org, Krzysztof Kozlowski , Marcel Ziswiler , Fabio Estevam , Krzysztof Kozlowski , Pengutronix Kernel Team , Rob Herring , Sascha Hauer , Shawn Guo Subject: [PATCH v7 10/10] arm64: dts: freescale: add apalis imx8 aka quadmax carrier board support Date: Wed, 8 Feb 2023 07:56:41 +0100 Message-Id: <20230208065641.23544-11-marcel@ziswiler.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20230208065641.23544-1-marcel@ziswiler.com> References: <20230208065641.23544-1-marcel@ziswiler.com> MIME-Version: 1.0 X-Provags-ID: V03:K1:ayNOEviVtMVM/ctzGqkZPRv/2+FSo8lzGGSOyksYtckKl3ZMZtd SPe8Crl6C7dzx59/MVarPBmLXpiEPuuaplwvxABN66Tv/lZnQzFUuv+CrEioW+kbSwMzukX 98EfX7caU8NHSajQK+d45r6R+BM+lYt0CnDz0lqyIuRFERkklLLMeC1c+eAIdBk913O5Km7 9pmBe9dVkFaMoP7F4Qh0Q== UI-OutboundReport: notjunk:1;M01:P0:cmB7CY6Ez4g=;u6zV8Ns0wZjjK6UFM2QkReAHHdD ZpzD89b4LpURTIxPH41hZ7++T7DjzyYzcyVxn82XnW9s/+doWTbBIvrhpXoN4HPL3IqsiaSrQ cNnf2Iqq8dK7E4fimLDTf/0Z1aVOeYIsOKyfWJNrJW2bEq65y5vW7+HceSmjdw08Q/rt9tnVs UnGAlUTo2I3SOqsA4WgqdCZuKOuHuCoj9ehYEW/M2d4ddz4zQVsAG57fW13dYumInP/Ry3Ecw FN1+AzFHtB3FgKK52RoCheTSustVkBoxkDd/XGKldDa2f6vzYo+KOf6JrKmffPk731bHgYYKT E/9dzDQrw20Qa2RkVMOVsjPXCgtWO61Ykt+KRY5IvCkNIt9X7biIRgtnHJ36dW4eBTKiTSWQa rijQydQo6dvc6WDuPhsGwWWTstEcu1uJvhHaXAcUyumHF8uDMNZB2bzsiX3Hwc9Xsg0TeaovE RZrbgo1kyKf+xhQ0GRFCv3WSFqbL6u4dxrvDZhAVqoR5WqOhoqznDyo9IbXaxPtjyEg9v8QNI pDhRr5xn22ypO8MZj08YEhgj4nADj8KXnCh95IFC8xjQT6QvQZIPgV+PzGCVEv6slTMOkcj2X EmfnDsx9GkYEHVVG8JWX5abwyzMLZNkJUHgYNmA84npg8I3Yka09a4WOyjNUOYkMVMXFgaqtz pPf4VtJA+mU3pKzcJ3n3Wk63W8SF1xgTeVSZ5sZUYQ== Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Marcel Ziswiler The previous patch added the device tree to support Toradex Apalis iMX8 [1] aka QuadMax a computer on module which can be used on different carrier boards which this patch introduces. The module consists of an NXP i.MX 8 family SoC (either i.MX 8QuadMax or 8QuadPlus), two PF8100 PMICs, a KSZ9131 Gigabit Ethernet PHY, 2, 4 or 8 GB of LPDDR4 RAM, an eMMC, an SGTL5000 analogue audio codec, an USB3503A USB HSIC hub, an optional I2C EEPROM plus an optional Bluetooth/Wi-Fi module. Anything that is not self-contained on the module is disabled by default. The carrier board device trees contained in this patch include the module's device tree and enable the supported peripherals of the carrier board. Some level of display functionality just landed upstream but requires further integration/testing on our side. Therefore, currently only basic console UART, eMMC and Ethernet functionality work fine. As there is no i.MX 8QuadPlus device tree upstream those have been dropped. However, apart from an error message during boot about it failing to bring up the second Cortex-A72 core this boots fine on QuadPlus' as well. [1] https://www.toradex.com/computer-on-modules/apalis-arm-family/nxp-imx-8 Signed-off-by: Marcel Ziswiler --- Changes in v7: - Re-order device tree properties according to various more or less undocumented rules as e.g. pointed out by Shawn. Thanks! Changes in v5: - Remove LVDS PWM support waiting for Liu's patches to land first. - Remove bkl1_pwm functionality depending on the above. - Squashing all Apalis iMX8 specific device tree patches. As outlined by Krzysztof reviewers may simply use b4 diff. Changes in v4: - Shorten subject. Changes in v3: - Only use V1.1 compatible for V1.1 module dtsi. - Split patch into separate module and carrier boards parts as suggested by Shawn. - Put reg after compatible as requested by Shawn. - Move atmel_mxt_ts and rtc_i2c into module dtsi to save such duplications as suggested by Shawn. - Change iomuxc pinctrl indent style as suggested by Shawn. - Change led node names to the preferred first form as suggested by Shawn. While at it also add color (yikes), default-state and function properties and remove the deprecated label property. - Put enable-active-high properties after the gpio ones as suggested by Shawn. Thanks! - Remove adc node's vref-supply and accompanying reg_vref_1v8 regulator node. - Rename gpio-hogs adherring to dt schema naming convention. arch/arm64/boot/dts/freescale/Makefile | 5 + .../boot/dts/freescale/imx8-apalis-eval.dtsi | 144 ++++++++++ .../dts/freescale/imx8-apalis-ixora-v1.1.dtsi | 220 ++++++++++++++ .../dts/freescale/imx8-apalis-ixora-v1.2.dtsi | 270 ++++++++++++++++++ .../boot/dts/freescale/imx8qm-apalis-eval.dts | 16 ++ .../freescale/imx8qm-apalis-ixora-v1.1.dts | 16 ++ .../dts/freescale/imx8qm-apalis-v1.1-eval.dts | 16 ++ .../imx8qm-apalis-v1.1-ixora-v1.1.dts | 16 ++ .../imx8qm-apalis-v1.1-ixora-v1.2.dts | 16 ++ 9 files changed, 719 insertions(+) create mode 100644 arch/arm64/boot/dts/freescale/imx8-apalis-eval.dtsi create mode 100644 arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.1.dtsi create mode 100644 arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.2.dtsi create mode 100644 arch/arm64/boot/dts/freescale/imx8qm-apalis-eval.dts create mode 100644 arch/arm64/boot/dts/freescale/imx8qm-apalis-ixora-v1.1.dts create mode 100644 arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1-eval.dts create mode 100644 arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1-ixora-v1.1.dts create mode 100644 arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1-ixora-v1.2.dts diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile index ef6f364eaa18..c0d621d1d86e 100644 --- a/arch/arm64/boot/dts/freescale/Makefile +++ b/arch/arm64/boot/dts/freescale/Makefile @@ -112,6 +112,11 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mq-pico-pi.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mq-thor96.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mq-zii-ultra-rmb3.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mq-zii-ultra-zest.dtb +dtb-$(CONFIG_ARCH_MXC) += imx8qm-apalis-eval.dtb +dtb-$(CONFIG_ARCH_MXC) += imx8qm-apalis-ixora-v1.1.dtb +dtb-$(CONFIG_ARCH_MXC) += imx8qm-apalis-v1.1-eval.dtb +dtb-$(CONFIG_ARCH_MXC) += imx8qm-apalis-v1.1-ixora-v1.1.dtb +dtb-$(CONFIG_ARCH_MXC) += imx8qm-apalis-v1.1-ixora-v1.2.dtb dtb-$(CONFIG_ARCH_MXC) += imx8qm-mek.dtb dtb-$(CONFIG_ARCH_MXC) += imx8qxp-ai_ml.dtb dtb-$(CONFIG_ARCH_MXC) += imx8qxp-colibri-eval-v3.dtb diff --git a/arch/arm64/boot/dts/freescale/imx8-apalis-eval.dtsi b/arch/arm64/boot/dts/freescale/imx8-apalis-eval.dtsi new file mode 100644 index 000000000000..685d4294f4f1 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8-apalis-eval.dtsi @@ -0,0 +1,144 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +/ { + aliases { + rtc0 = &rtc_i2c; + rtc1 = &rtc; + }; + + reg_usb_host_vbus: regulator-usb-host-vbus { + regulator-name = "VCC USBH2(ABCD) / USBH(3|4)"; + }; +}; + +&adc0 { + status = "okay"; +}; + +&adc1 { + status = "okay"; +}; + +/* TODO: Audio Mixer */ + +/* TODO: Asynchronous Sample Rate Converter (ASRC) */ + +/* TODO: Display Controller */ + +/* TODO: DPU */ + +/* Apalis ETH1 */ +&fec1 { + status = "okay"; +}; + +/* Apalis CAN1 */ +&flexcan1 { + status = "okay"; +}; + +/* Apalis CAN2 */ +&flexcan2 { + status = "okay"; +}; + +/* TODO: GPU */ + +/* Apalis I2C1 */ +&i2c2 { + status = "okay"; + + /* M41T0M6 real time clock on carrier board */ + rtc_i2c: rtc@68 { + status = "okay"; + }; +}; + +/* Apalis I2C3 (CAM) */ +&i2c3 { + status = "okay"; +}; + +/* Apalis SPI1 */ +&lpspi0 { + status = "okay"; +}; + +/* Apalis SPI2 */ +&lpspi2 { + status = "okay"; +}; + +/* Apalis UART3 */ +&lpuart0 { + status = "okay"; +}; + +/* Apalis UART1 */ +&lpuart1 { + status = "okay"; +}; + +/* Apalis UART4 */ +&lpuart2 { + status = "okay"; +}; + +/* Apalis UART2 */ +&lpuart3 { + status = "okay"; +}; + +/* Apalis PWM3, MXM3 pin 6 */ +&lsio_pwm0 { + status = "okay"; +}; + +/* Apalis PWM4, MXM3 pin 8 */ +&lsio_pwm1 { + status = "okay"; +}; + +/* Apalis PWM1, MXM3 pin 2 */ +&lsio_pwm2 { + status = "okay"; +}; + +/* Apalis PWM2, MXM3 pin 4 */ +&lsio_pwm3 { + status = "okay"; +}; + +/* TODO: Apalis PCIE1 */ + +/* TODO: Apalis BKL1_PWM */ + +/* TODO: Apalis DAP1 */ + +/* TODO: Apalis Analogue Audio */ + +/* TODO: Apalis SATA1 */ + +/* TODO: Apalis SPDIF1 */ + +/* TODO: Apalis USBH2, Apalis USBH3 and on-module Wi-Fi via on-module HSIC Hub */ + +/* Apalis USBO1 */ +&usbotg1 { + status = "okay"; +}; + +/* TODO: Apalis USBH4 SuperSpeed */ + +/* Apalis MMC1 */ +&usdhc2 { + status = "okay"; +}; + +/* Apalis SD1 */ +&usdhc3 { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.1.dtsi b/arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.1.dtsi new file mode 100644 index 000000000000..c6d51f116298 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.1.dtsi @@ -0,0 +1,220 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +#include + +/ { + aliases { + rtc0 = &rtc_i2c; + rtc1 = &rtc; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_leds_ixora>; + + /* LED_4_GREEN / MXM3_188 */ + led-1 { + color = ; + default-state = "off"; + function = LED_FUNCTION_STATUS; + gpios = <&lsio_gpio5 27 GPIO_ACTIVE_HIGH>; + }; + + /* LED_4_RED / MXM3_178 */ + led-2 { + color = ; + default-state = "off"; + function = LED_FUNCTION_STATUS; + gpios = <&lsio_gpio5 29 GPIO_ACTIVE_HIGH>; + }; + + /* LED_5_GREEN / MXM3_152 */ + led-3 { + color = ; + default-state = "off"; + function = LED_FUNCTION_STATUS; + gpios = <&lsio_gpio5 20 GPIO_ACTIVE_HIGH>; + }; + + /* LED_5_RED / MXM3_156 */ + led-4 { + color = ; + default-state = "off"; + function = LED_FUNCTION_STATUS; + gpios = <&lsio_gpio5 21 GPIO_ACTIVE_HIGH>; + }; + }; + + reg_usb_host_vbus: regulator-usb-host-vbus { + regulator-name = "VCC_USBH(2|4)"; + }; +}; + +&adc0 { + status = "okay"; +}; + +&adc1 { + status = "okay"; +}; + +/* TODO: Audio Mixer */ + +/* TODO: Asynchronous Sample Rate Converter (ASRC) */ + +/* TODO: Display Controller */ + +/* TODO: DPU */ + +/* Apalis ETH1 */ +&fec1 { + status = "okay"; +}; + +/* Apalis CAN1 */ +&flexcan1 { + status = "okay"; +}; + +/* Apalis CAN2 */ +&flexcan2 { + status = "okay"; +}; + +/* TODO: GPU */ + +/* Apalis I2C1 */ +&i2c2 { + status = "okay"; + + /* M41T0M6 real time clock on carrier board */ + rtc_i2c: rtc@68 { + status = "okay"; + }; +}; + +/* Apalis I2C3 (CAM) */ +&i2c3 { + status = "okay"; +}; + +&iomuxc { + pinctrl-0 = <&pinctrl_cam1_gpios>, <&pinctrl_dap1_gpios>, + <&pinctrl_esai0_gpios>, <&pinctrl_fec2_gpios>, + <&pinctrl_gpio3>, <&pinctrl_gpio4>, <&pinctrl_gpio_usbh_oc_n>, + <&pinctrl_lpuart1ctrl>, <&pinctrl_lvds0_i2c0_gpio>, + <&pinctrl_lvds1_i2c0_gpios>, <&pinctrl_mipi_dsi_0_1_en>, + <&pinctrl_mipi_dsi1_gpios>, <&pinctrl_mlb_gpios>, + <&pinctrl_qspi1a_gpios>, <&pinctrl_sata1_act>, + <&pinctrl_sim0_gpios>, <&pinctrl_uart24_forceoff>, + <&pinctrl_usdhc1_gpios>; + + pinctrl_leds_ixora: ledsixoragrp { + fsl,pins = , /* LED_4_GREEN */ + , /* LED_4_RED */ + , /* LED_5_GREEN */ + ; /* LED_5_RED */ + }; + + pinctrl_uart24_forceoff: uart24forceoffgrp { + fsl,pins = ; + }; +}; + +/* Apalis SPI1 */ +&lpspi0 { + status = "okay"; +}; + +/* Apalis SPI2 */ +&lpspi2 { + status = "okay"; +}; + +/* Apalis UART3 */ +&lpuart0 { + status = "okay"; +}; + +/* Apalis UART1 */ +&lpuart1 { + status = "okay"; +}; + +/* Apalis UART4 */ +&lpuart2 { + status = "okay"; +}; + +/* Apalis UART2 */ +&lpuart3 { + status = "okay"; +}; + +&lsio_gpio5 { + gpio-line-names = "gpio5-00", "gpio5-01", "gpio5-02", "gpio5-03", + "gpio5-04", "gpio5-05", "gpio5-06", "gpio5-07", + "gpio5-08", "gpio5-09", "gpio5-10", "gpio5-11", + "gpio5-12", "gpio5-13", "gpio5-14", "gpio5-15", + "gpio5-16", "gpio5-17", "gpio5-18", "gpio5-19", + "LED-5-GREEN", "LED-5-RED", "gpio5-22", "gpio5-23", + "gpio5-24", "UART24-FORCEOFF", "gpio5-26", + "LED-4-GREEN", "gpio5-28", "LED-4-RED", "gpio5-30", + "gpio5-31"; + ngpios = <32>; +}; + +/* Apalis PWM3, MXM3 pin 6 */ +&lsio_pwm0 { + status = "okay"; +}; + +/* Apalis PWM4, MXM3 pin 8 */ +&lsio_pwm1 { + status = "okay"; +}; + +/* Apalis PWM1, MXM3 pin 2 */ +&lsio_pwm2 { + status = "okay"; +}; + +/* Apalis PWM2, MXM3 pin 4 */ +&lsio_pwm3 { + status = "okay"; +}; + +/* TODO: Apalis PCIE1 */ + +/* TODO: Apalis BKL1_PWM */ + +/* TODO: Apalis DAP1 */ + +/* TODO: Apalis Analogue Audio */ + +/* TODO: Apalis SATA1 */ + +/* TODO: Apalis SPDIF1 */ + +/* TODO: Apalis USBH2, Apalis USBH3 and on-module Wi-Fi via on-module HSIC Hub */ + +/* Apalis USBO1 */ +&usbotg1 { + status = "okay"; +}; + +/* TODO: Apalis USBH4 SuperSpeed */ + +/* Apalis MMC1 */ +&usdhc2 { + pinctrl-0 = <&pinctrl_usdhc2_4bit>, <&pinctrl_mmc1_cd>; + pinctrl-1 = <&pinctrl_usdhc2_4bit_100mhz>, <&pinctrl_mmc1_cd>; + pinctrl-2 = <&pinctrl_usdhc2_4bit_200mhz>, <&pinctrl_mmc1_cd>; + pinctrl-3 = <&pinctrl_usdhc2_4bit_sleep>, <&pinctrl_mmc1_cd_sleep>; + bus-width = <4>; + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.2.dtsi b/arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.2.dtsi new file mode 100644 index 000000000000..40067ab8aa74 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.2.dtsi @@ -0,0 +1,270 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +#include + +/ { + aliases { + rtc0 = &rtc_i2c; + rtc1 = &rtc; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_leds_ixora>; + + /* LED_4_GREEN / MXM3_188 */ + led-1 { + color = ; + default-state = "off"; + function = LED_FUNCTION_STATUS; + gpios = <&lsio_gpio5 27 GPIO_ACTIVE_HIGH>; + }; + + /* LED_4_RED / MXM3_178 */ + led-2 { + color = ; + default-state = "off"; + function = LED_FUNCTION_STATUS; + gpios = <&lsio_gpio5 29 GPIO_ACTIVE_HIGH>; + }; + + /* LED_5_GREEN / MXM3_152 */ + led-3 { + color = ; + default-state = "off"; + function = LED_FUNCTION_STATUS; + gpios = <&lsio_gpio5 20 GPIO_ACTIVE_HIGH>; + }; + + /* LED_5_RED / MXM3_156 */ + led-4 { + color = ; + default-state = "off"; + function = LED_FUNCTION_STATUS; + gpios = <&lsio_gpio5 21 GPIO_ACTIVE_HIGH>; + }; + }; + + reg_3v3_vmmc: regulator-3v3-vmmc { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enable_3v3_vmmc>; + /* MMC1_PWR_CTRL */ + gpio = <&lsio_gpio5 19 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <3300000>; + regulator-name = "3v3_vmmc"; + }; + + reg_can1_supply: regulator-can1-supply { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enable_can1_power>; + gpio = <&lsio_gpio5 22 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-name = "can1_supply"; + }; + + reg_can2_supply: regulator-can2-supply { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sata1_act>; + gpio = <&lsio_gpio2 8 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-name = "can2_supply"; + }; + + reg_usb_host_vbus: regulator-usb-host-vbus { + regulator-name = "VCC_USBH(2|4)"; + }; +}; + +&adc0 { + status = "okay"; +}; + +&adc1 { + status = "okay"; +}; + +/* TODO: Audio Mixer */ + +/* TODO: Asynchronous Sample Rate Converter (ASRC) */ + +/* TODO: Display Controller */ + +/* TODO: DPU */ + +/* Apalis ETH1 */ +&fec1 { + status = "okay"; +}; + +/* Apalis CAN1 */ +&flexcan1 { + xceiver-supply = <®_can1_supply>; + status = "okay"; +}; + +/* Apalis CAN2 */ +&flexcan2 { + xceiver-supply = <®_can2_supply>; + status = "okay"; +}; + +/* TODO: GPU */ + +/* Apalis I2C1 */ +&i2c2 { + status = "okay"; + + eeprom: eeprom@50 { + compatible = "atmel,24c02"; + reg = <0x50>; + pagesize = <16>; + }; + + /* M41T0M6 real time clock on carrier board */ + rtc_i2c: rtc@68 { + status = "okay"; + }; +}; + +/* Apalis I2C3 (CAM) */ +&i2c3 { + status = "okay"; +}; + +&iomuxc { + pinctrl-0 = <&pinctrl_cam1_gpios>, <&pinctrl_dap1_gpios>, + <&pinctrl_esai0_gpios>, <&pinctrl_fec2_gpios>, + <&pinctrl_gpio3>, <&pinctrl_gpio4>, <&pinctrl_gpio_usbh_oc_n>, + <&pinctrl_lpuart1ctrl>, <&pinctrl_lvds0_i2c0_gpio>, + <&pinctrl_lvds1_i2c0_gpios>, <&pinctrl_mipi_dsi_0_1_en>, + <&pinctrl_mipi_dsi1_gpios>, <&pinctrl_mlb_gpios>, + <&pinctrl_qspi1a_gpios>, <&pinctrl_sim0_gpios>, + <&pinctrl_uart24_forceoff>, <&pinctrl_usdhc1_gpios>; + + /* PMIC MMC1 power-switch */ + pinctrl_enable_3v3_vmmc: enable3v3vmmcgrp { + fsl,pins = ; /* MXM3_148, PMIC */ + }; + + /* FlexCAN PMIC */ + pinctrl_enable_can1_power: enablecan1powergrp { + fsl,pins = ; /* MXM3_158, PMIC */ + }; + + pinctrl_leds_ixora: ledsixoragrp { + fsl,pins = , /* LED_4_GREEN */ + , /* LED_4_RED */ + , /* LED_5_GREEN */ + ; /* LED_5_RED */ + }; + + pinctrl_uart24_forceoff: uart24forceoffgrp { + fsl,pins = ; + }; +}; + +/* Apalis SPI1 */ +&lpspi0 { + status = "okay"; +}; + +/* Apalis SPI2 */ +&lpspi2 { + status = "okay"; +}; + +/* Apalis UART3 */ +&lpuart0 { + status = "okay"; +}; + +/* Apalis UART1 */ +&lpuart1 { + status = "okay"; +}; + +/* Apalis UART4 */ +&lpuart2 { + status = "okay"; +}; + +/* Apalis UART2 */ +&lpuart3 { + status = "okay"; +}; + +&lsio_gpio5 { + gpio-line-names = "gpio5-00", "gpio5-01", "gpio5-02", "gpio5-03", + "gpio5-04", "gpio5-05", "gpio5-06", "gpio5-07", + "gpio5-08", "gpio5-09", "gpio5-10", "gpio5-11", + "gpio5-12", "gpio5-13", "gpio5-14", "gpio5-15", + "gpio5-16", "gpio5-17", "gpio5-18", "gpio5-19", + "LED-5-GREEN", "LED-5-RED", "gpio5-22", "gpio5-23", + "gpio5-24", "UART24-FORCEOFF", "gpio5-26", + "LED-4-GREEN", "gpio5-28", "LED-4-RED", "gpio5-30", + "gpio5-31"; + ngpios = <32>; +}; + +/* Apalis PWM3, MXM3 pin 6 */ +&lsio_pwm0 { + status = "okay"; +}; + +/* Apalis PWM4, MXM3 pin 8 */ +&lsio_pwm1 { + status = "okay"; +}; + +/* Apalis PWM1, MXM3 pin 2 */ +&lsio_pwm2 { + status = "okay"; +}; + +/* Apalis PWM2, MXM3 pin 4 */ +&lsio_pwm3 { + status = "okay"; +}; + +/* TODO: Apalis PCIE1 */ + +/* TODO: Apalis BKL1_PWM */ + +/* TODO: Apalis DAP1 */ + +/* TODO: Apalis Analogue Audio */ + +/* TODO: Apalis SATA1 */ + +/* TODO: Apalis SPDIF1 */ + +/* TODO: Apalis USBH2, Apalis USBH3 and on-module Wi-Fi via on-module HSIC Hub */ + +/* Apalis USBO1 */ +&usbotg1 { + status = "okay"; +}; + +/* TODO: Apalis USBH4 SuperSpeed */ + +/* Apalis MMC1 */ +&usdhc2 { + pinctrl-0 = <&pinctrl_usdhc2_4bit>, <&pinctrl_mmc1_cd>; + pinctrl-1 = <&pinctrl_usdhc2_4bit_100mhz>, <&pinctrl_mmc1_cd>; + pinctrl-2 = <&pinctrl_usdhc2_4bit_200mhz>, <&pinctrl_mmc1_cd>; + pinctrl-3 = <&pinctrl_usdhc2_4bit_sleep>, <&pinctrl_mmc1_cd_sleep>; + bus-width = <4>; + cap-power-off-card; + /delete-property/ no-1-8-v; + vmmc-supply = <®_3v3_vmmc>; + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/freescale/imx8qm-apalis-eval.dts b/arch/arm64/boot/dts/freescale/imx8qm-apalis-eval.dts new file mode 100644 index 000000000000..5ab0921eb599 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8qm-apalis-eval.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +/dts-v1/; + +#include "imx8qm-apalis.dtsi" +#include "imx8-apalis-eval.dtsi" + +/ { + model = "Toradex Apalis iMX8QM/QP on Apalis Evaluation Board"; + compatible = "toradex,apalis-imx8-eval", + "toradex,apalis-imx8", + "fsl,imx8qm"; +}; diff --git a/arch/arm64/boot/dts/freescale/imx8qm-apalis-ixora-v1.1.dts b/arch/arm64/boot/dts/freescale/imx8qm-apalis-ixora-v1.1.dts new file mode 100644 index 000000000000..68ce58dc7102 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8qm-apalis-ixora-v1.1.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +/dts-v1/; + +#include "imx8qm-apalis.dtsi" +#include "imx8-apalis-ixora-v1.1.dtsi" + +/ { + model = "Toradex Apalis iMX8QM/QP on Apalis Ixora V1.1 Carrier Board"; + compatible = "toradex,apalis-imx8-ixora-v1.1", + "toradex,apalis-imx8", + "fsl,imx8qm"; +}; diff --git a/arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1-eval.dts b/arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1-eval.dts new file mode 100644 index 000000000000..c8ff75831556 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1-eval.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +/dts-v1/; + +#include "imx8qm-apalis-v1.1.dtsi" +#include "imx8-apalis-eval.dtsi" + +/ { + model = "Toradex Apalis iMX8QM V1.1 on Apalis Evaluation Board"; + compatible = "toradex,apalis-imx8-v1.1-eval", + "toradex,apalis-imx8-v1.1", + "fsl,imx8qm"; +}; diff --git a/arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1-ixora-v1.1.dts b/arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1-ixora-v1.1.dts new file mode 100644 index 000000000000..ad7f644968fa --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1-ixora-v1.1.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +/dts-v1/; + +#include "imx8qm-apalis-v1.1.dtsi" +#include "imx8-apalis-ixora-v1.1.dtsi" + +/ { + model = "Toradex Apalis iMX8QM V1.1 on Apalis Ixora V1.1 Carrier Board"; + compatible = "toradex,apalis-imx8-v1.1-ixora-v1.1", + "toradex,apalis-imx8-v1.1", + "fsl,imx8qm"; +}; diff --git a/arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1-ixora-v1.2.dts b/arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1-ixora-v1.2.dts new file mode 100644 index 000000000000..3b2e8c93b846 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1-ixora-v1.2.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +/dts-v1/; + +#include "imx8qm-apalis-v1.1.dtsi" +#include "imx8-apalis-ixora-v1.2.dtsi" + +/ { + model = "Toradex Apalis iMX8QM V1.1 on Apalis Ixora V1.2 Carrier Board"; + compatible = "toradex,apalis-imx8-v1.1-ixora-v1.2", + "toradex,apalis-imx8-v1.1", + "fsl,imx8qm"; +};