From patchwork Fri Feb 10 14:44:21 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 652488 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8DFCFC05027 for ; Fri, 10 Feb 2023 14:44:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232047AbjBJOob (ORCPT ); Fri, 10 Feb 2023 09:44:31 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40442 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231970AbjBJOoa (ORCPT ); Fri, 10 Feb 2023 09:44:30 -0500 Received: from mail-wm1-x330.google.com (mail-wm1-x330.google.com [IPv6:2a00:1450:4864:20::330]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DD3E47101F for ; Fri, 10 Feb 2023 06:44:29 -0800 (PST) Received: by mail-wm1-x330.google.com with SMTP id c4-20020a1c3504000000b003d9e2f72093so6457290wma.1 for ; Fri, 10 Feb 2023 06:44:29 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=PBcGm9IzqWfmksEDhkD68OpL5s1KaoBkDeTtWamSELM=; b=bXizAmn2gf0l5vIIzA92CHnCI90y5zxHF1fXqgncVuKHCS77Q3D5dX9iGaIFs9nDhu C+H3yF83O/IQfEiQedMza0rr5jnHK1qn0KnFTo3lH5RPjef/1MOizRV2t8dLAF5e1EqE aFF5XVqeTnJsryypRP5oYQM32y5dtrFDAFzTrUqzEub1nErdKbjVxYL7blrJpoMDEWMR A+d+z+vWmLE+Lu6LP0byail3av2zRMQKxRN5SvkOikfHoPvbNydOKTxmdX2BBfmpc7si HTt5Jn9DyQEDoPGtMwqXnTmjodrSANgJ6cIl5EUo1d96F9J5HlKaHHq+D7gJl712Q1k6 QDow== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=PBcGm9IzqWfmksEDhkD68OpL5s1KaoBkDeTtWamSELM=; b=ByTJmg8XpDStgFn1S4ecMAdB4NwfDjOIh1b3Bi8YREpWOXv6fJmJrylnMAJ0KwxZGa 6aLifrDvl2U52st7+9Su57X7X0xg8aOQq/BiH+8QRwG9a9HZga+5lrhoR6v6xzpurv1G ebkhPaF1OjrOBvoO6pYVP0R9TQaVtdZEiav5YFdmP7D+Eic+oZaj33hzvs31Glx2NqRH 6RGIqqHbtAm/CWiEs0biOml/Vxz9srGDGMFxNTZyfMQNl09VEnWBcFlB04E5f0qyggWC ul/nW+ZdBxDeDpTtcQY+SEpgLt1L3XAC7K86LSWknYiOm3I+06uBbtk441j1EdGzaaC9 TjXA== X-Gm-Message-State: AO0yUKV02HgR0KqeDZwSbrlgo6YUh8/UpB9Ph/cvSa8PcwnTiDIEi2yV 5Yvktm1M+t7gyanhd3aZQGRxkg== X-Google-Smtp-Source: AK7set+dGBFdCroYD2odoMoBeu4+jdR3D8Rinih/XtZOitYmHrSq67Oop1sb+cCj4mAx9+Ydrjt6QA== X-Received: by 2002:a05:600c:4d97:b0:3de:e8c5:d833 with SMTP id v23-20020a05600c4d9700b003dee8c5d833mr16841360wmp.22.1676040268518; Fri, 10 Feb 2023 06:44:28 -0800 (PST) Received: from arrakeen.starnux.net ([2a01:e0a:982:cbb0:8261:5fff:fe11:bdda]) by smtp.gmail.com with ESMTPSA id l40-20020a05600c1d2800b003dd1b00bd9asm6103000wms.32.2023.02.10.06.44.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 10 Feb 2023 06:44:27 -0800 (PST) From: Neil Armstrong Date: Fri, 10 Feb 2023 15:44:21 +0100 Subject: [PATCH v3 1/5] dt-bindings: display: msm: dp-controller: document SM8450 compatible MIME-Version: 1.0 Message-Id: <20230206-topic-sm8450-upstream-dp-controller-v3-1-636ef9e99932@linaro.org> References: <20230206-topic-sm8450-upstream-dp-controller-v3-0-636ef9e99932@linaro.org> In-Reply-To: <20230206-topic-sm8450-upstream-dp-controller-v3-0-636ef9e99932@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Kuogee Hsieh , Andy Gross , Bjorn Andersson , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Neil Armstrong , Krzysztof Kozlowski X-Mailer: b4 0.12.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The SM8450 & SM350 shares the same DT TX IP version, use the SM8350 compatible as fallback for SM8450. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Neil Armstrong --- .../bindings/display/msm/dp-controller.yaml | 25 +++++++++++++--------- 1 file changed, 15 insertions(+), 10 deletions(-) diff --git a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml index 0e8d8df686dc..f0c2237d5f82 100644 --- a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml +++ b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml @@ -15,16 +15,21 @@ description: | properties: compatible: - enum: - - qcom,sc7180-dp - - qcom,sc7280-dp - - qcom,sc7280-edp - - qcom,sc8180x-dp - - qcom,sc8180x-edp - - qcom,sc8280xp-dp - - qcom,sc8280xp-edp - - qcom,sdm845-dp - - qcom,sm8350-dp + oneOf: + - enum: + - qcom,sc7180-dp + - qcom,sc7280-dp + - qcom,sc7280-edp + - qcom,sc8180x-dp + - qcom,sc8180x-edp + - qcom,sc8280xp-dp + - qcom,sc8280xp-edp + - qcom,sdm845-dp + - qcom,sm8350-dp + - items: + - enum: + - qcom,sm8450-dp + - const: qcom,sm8350-dp reg: minItems: 4 From patchwork Fri Feb 10 14:44:22 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 652942 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 21E8BC636CD for ; Fri, 10 Feb 2023 14:44:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232357AbjBJOof (ORCPT ); Fri, 10 Feb 2023 09:44:35 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40522 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232098AbjBJOoc (ORCPT ); Fri, 10 Feb 2023 09:44:32 -0500 Received: from mail-wm1-x32c.google.com (mail-wm1-x32c.google.com [IPv6:2a00:1450:4864:20::32c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1B42C73580 for ; Fri, 10 Feb 2023 06:44:31 -0800 (PST) Received: by mail-wm1-x32c.google.com with SMTP id l21-20020a05600c1d1500b003dfe462b7e4so5714806wms.0 for ; Fri, 10 Feb 2023 06:44:31 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=KG+b13pYRqQ3AMotewCXMg/fvG9C+W/U/A7+qVFsrG4=; b=tIWrV+lpsn1HJHyWCwwSR2K9yrdY+9dcj7U78S0bVemI7uyLshNqtlOWB0TIiW7Kq5 4XORWhuuzt2v1y47DkRcNB/dfi/o+FSzOyrHRRHX8+UDmRMfEASH/DhwZxx32eTyJYLH W/v7k+WzfNG+LGCjNP/VFViHQP1TNlZoiWwiwkKvzTu6KJXbIoZ3/mFSjamRtDCpv7ae UzE3cq+mp16kGMh9wwJGKT5MM2v2HJXiTjwnHenGVCHRwsg0wbM2vsKkqcIZ25jKz5k5 NK0OwC7WOhpPyz1jkB2Hl6LMkEtciW5zFVVIfNeR3/+MbQPm8vJOF84CwHCHDEEvYmCu JSnw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=KG+b13pYRqQ3AMotewCXMg/fvG9C+W/U/A7+qVFsrG4=; b=RF8d2als/TGB+djsbp2G9VbYCbXnIfySomv1QICT2AeU6XrnHp2FhrLxSOC0JaA3wV qNGwYUG6/Ar6OENEtbK7W1JIVh+wWuJt2GIYkI1U6MGGT8zlBePe7zwyxvQhqxWUAMla iqy/mdPx3Sb6wG5k/t4rRVzOqFWfym1DFIM8nipMpU/ZXN+tGiv2LCW5kPCfF8zS918e ZiFZwadaaghIb7MR/r3YdL3B0z4A/TJWvjxIyyGydxUTt34baPZ9DSwLPMF6stBjVmce fr1q5GOmZzC1HN73LAPcMhIhBt/uR9sQQw6e3B9RaGS3z4dtrKGhDe4hNsOEyxjoVNBe vLgw== X-Gm-Message-State: AO0yUKW4oILaY6vnOwbDP5OQvmYAfgiktqegHnj3VhXMXu3/lCLyYJWI fAnbO3WQorOTgHvcRGofOt3Zrg== X-Google-Smtp-Source: AK7set958I/4vTBYy7M77sJE898iVLCK4Kq7ICf6ZqdPmw/HGtkxqEsjQ/effSYQan6kIYJrK0KnOQ== X-Received: by 2002:a05:600c:16c5:b0:3db:1434:c51a with SMTP id l5-20020a05600c16c500b003db1434c51amr13124252wmn.40.1676040269667; Fri, 10 Feb 2023 06:44:29 -0800 (PST) Received: from arrakeen.starnux.net ([2a01:e0a:982:cbb0:8261:5fff:fe11:bdda]) by smtp.gmail.com with ESMTPSA id l40-20020a05600c1d2800b003dd1b00bd9asm6103000wms.32.2023.02.10.06.44.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 10 Feb 2023 06:44:29 -0800 (PST) From: Neil Armstrong Date: Fri, 10 Feb 2023 15:44:22 +0100 Subject: [PATCH v3 2/5] arm64: dts: qcom: sm8350: switch to combo usb3/dp phy MIME-Version: 1.0 Message-Id: <20230206-topic-sm8450-upstream-dp-controller-v3-2-636ef9e99932@linaro.org> References: <20230206-topic-sm8450-upstream-dp-controller-v3-0-636ef9e99932@linaro.org> In-Reply-To: <20230206-topic-sm8450-upstream-dp-controller-v3-0-636ef9e99932@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Kuogee Hsieh , Andy Gross , Bjorn Andersson , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Neil Armstrong X-Mailer: b4 0.12.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The first QMP PHY is an USB3/DP combo phy, switch to the newly documented bindings and register the clocks to the GCC and DISPCC controllers. Reviewed-by: Dmitry Baryshkov Tested-by: Dmitry Baryshkov #SM8350-HDK Signed-off-by: Neil Armstrong --- arch/arm64/boot/dts/qcom/sm8350.dtsi | 42 +++++++++++++----------------------- 1 file changed, 15 insertions(+), 27 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi index 4c1a2f814b5c..6638704ff469 100644 --- a/arch/arm64/boot/dts/qcom/sm8350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi @@ -13,6 +13,7 @@ #include #include #include +#include #include #include #include @@ -653,7 +654,7 @@ gcc: clock-controller@100000 { <&ufs_mem_phy_lanes 0>, <&ufs_mem_phy_lanes 1>, <&ufs_mem_phy_lanes 2>, - <0>, + <&usb_1_qmpphy QMP_USB43DP_USB3_PIPE_CLK>, <0>; }; @@ -2125,37 +2126,24 @@ usb_2_hsphy: phy@88e4000 { resets = <&gcc GCC_QUSB2PHY_SEC_BCR>; }; - usb_1_qmpphy: phy-wrapper@88e9000 { - compatible = "qcom,sm8350-qmp-usb3-phy"; - reg = <0 0x088e9000 0 0x200>, - <0 0x088e8000 0 0x20>; - status = "disabled"; - #address-cells = <2>; - #size-cells = <2>; - ranges; + usb_1_qmpphy: phy@88e9000 { + compatible = "qcom,sm8350-qmp-usb3-dp-phy"; + reg = <0 0x088e8000 0 0x3000>; clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>, <&rpmhcc RPMH_CXO_CLK>, - <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>; - clock-names = "aux", "ref_clk_src", "com_aux"; + <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>, + <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>; + clock-names = "aux", "ref", "com_aux", "usb3_pipe"; resets = <&gcc GCC_USB3_DP_PHY_PRIM_BCR>, <&gcc GCC_USB3_PHY_PRIM_BCR>; reset-names = "phy", "common"; - usb_1_ssphy: phy@88e9200 { - reg = <0 0x088e9200 0 0x200>, - <0 0x088e9400 0 0x200>, - <0 0x088e9c00 0 0x400>, - <0 0x088e9600 0 0x200>, - <0 0x088e9800 0 0x200>, - <0 0x088e9a00 0 0x100>; - #phy-cells = <0>; - #clock-cells = <0>; - clocks = <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>; - clock-names = "pipe0"; - clock-output-names = "usb3_phy_pipe_clk_src"; - }; + #clock-cells = <1>; + #phy-cells = <1>; + + status = "disabled"; }; usb_2_qmpphy: phy-wrapper@88eb000 { @@ -2258,7 +2246,7 @@ usb_1_dwc3: usb@a600000 { iommus = <&apps_smmu 0x0 0x0>; snps,dis_u2_susphy_quirk; snps,dis_enblslpm_quirk; - phys = <&usb_1_hsphy>, <&usb_1_ssphy>; + phys = <&usb_1_hsphy>, <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>; phy-names = "usb2-phy", "usb3-phy"; }; }; @@ -2623,8 +2611,8 @@ dispcc: clock-controller@af00000 { clocks = <&rpmhcc RPMH_CXO_CLK>, <&mdss_dsi0_phy 0>, <&mdss_dsi0_phy 1>, <&mdss_dsi1_phy 0>, <&mdss_dsi1_phy 1>, - <0>, - <0>; + <&usb_1_qmpphy QMP_USB43DP_DP_LINK_CLK>, + <&usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>; clock-names = "bi_tcxo", "dsi0_phy_pll_out_byteclk", "dsi0_phy_pll_out_dsiclk", From patchwork Fri Feb 10 14:44:23 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 652487 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AF6C0C636D4 for ; Fri, 10 Feb 2023 14:44:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232399AbjBJOoh (ORCPT ); Fri, 10 Feb 2023 09:44:37 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40442 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232125AbjBJOod (ORCPT ); Fri, 10 Feb 2023 09:44:33 -0500 Received: from mail-wm1-x32b.google.com (mail-wm1-x32b.google.com [IPv6:2a00:1450:4864:20::32b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 27A647407C for ; Fri, 10 Feb 2023 06:44:32 -0800 (PST) Received: by mail-wm1-x32b.google.com with SMTP id n13so3976071wmr.4 for ; Fri, 10 Feb 2023 06:44:32 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=Ve8TPSXCg5Pm5cVBZiDNGOJIRFMbfy8PNTtvb1lSqUA=; b=j5hHSt5Sm8TVnbY14lI7SvNqqP5RRD/LJYeUaueV7C/e1k3PkV/B4rF2yCmkjceN0B AzJCd34OYDVwBhSXiKmfVTMo3l74jeI5t1AuAa+Y5MpQLTwhZCzPTY2To/Xgg3b/v1iK CgHNuugoMK9BnF+fJ1xxVdgk8lvzS6QMCVuZMrqc6Jv0kPkBaq4o8ZxnAY2BFYWLLUF9 m/tt70xa76uO2xD3udohVG+jJvFR9PdCffffaV1egwr2A6lAuU3A2SNe03XCCAo7Mz1k fKTyVXI4A517BUrYLwL9akxD0TBJvPKMDUqRMW9SjjgVGncuwZlLD0oaQ89EcOJTg2RA Ep7w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Ve8TPSXCg5Pm5cVBZiDNGOJIRFMbfy8PNTtvb1lSqUA=; b=P4fLbULpJ+YIaRgH9ETe2x0JNEodNCuUchgw1lA4CvRCrzU2K+zB650h8jH4epIjJ9 2O4OkG8E3d86CguOz4BWlWTKtqTquXXUCsDcRXXtzv9CErFACZGxeZCVWhfXKHpsv8Vx o8+I6TiLr1uhphyzZV1RG4uAEEwpClKNof8dkK11hYV5F3MPDZnRdDO7Lfzdq7+HJ/b6 r3mXWUT12Vn5ScJX4h/+xiFb28VJMnVdKhb+eWncca29SYaqksMGjir53CX2NLBeEInK 8QoS1a/fTJ1RKC6XR1pQtzDRJslGxrWygwzlvmxBpJv3H0s9lS8/2tDrZRuj86cWum5u RYQg== X-Gm-Message-State: AO0yUKV00osCHAxGKFEmwTmu/L/8sxjKMEN5xlx9hgJSy07TcrdtlLyG rb+sUkk5x6kjfeQ/xgnUokLmAA== X-Google-Smtp-Source: AK7set81jZLTE303M9v5g8qn7rcNQqLgH0xV789PoXp7tStGUMbSbioGvuHVi9mLmQsQ30bo6hP9cg== X-Received: by 2002:a05:600c:130f:b0:3dc:4313:fd1e with SMTP id j15-20020a05600c130f00b003dc4313fd1emr12747567wmf.34.1676040270750; Fri, 10 Feb 2023 06:44:30 -0800 (PST) Received: from arrakeen.starnux.net ([2a01:e0a:982:cbb0:8261:5fff:fe11:bdda]) by smtp.gmail.com with ESMTPSA id l40-20020a05600c1d2800b003dd1b00bd9asm6103000wms.32.2023.02.10.06.44.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 10 Feb 2023 06:44:30 -0800 (PST) From: Neil Armstrong Date: Fri, 10 Feb 2023 15:44:23 +0100 Subject: [PATCH v3 3/5] arm64: dts: qcom: sm8350: add dp controller MIME-Version: 1.0 Message-Id: <20230206-topic-sm8450-upstream-dp-controller-v3-3-636ef9e99932@linaro.org> References: <20230206-topic-sm8450-upstream-dp-controller-v3-0-636ef9e99932@linaro.org> In-Reply-To: <20230206-topic-sm8450-upstream-dp-controller-v3-0-636ef9e99932@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Kuogee Hsieh , Andy Gross , Bjorn Andersson , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Neil Armstrong X-Mailer: b4 0.12.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add the Display Port controller subnode to the MDSS node. Tested-by: Dmitry Baryshkov #SM8350-HDK Signed-off-by: Neil Armstrong --- arch/arm64/boot/dts/qcom/sm8350.dtsi | 79 ++++++++++++++++++++++++++++++++++++ 1 file changed, 79 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi index 6638704ff469..f48523790883 100644 --- a/arch/arm64/boot/dts/qcom/sm8350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi @@ -2405,6 +2405,85 @@ dpu_intf2_out: endpoint { remote-endpoint = <&mdss_dsi1_in>; }; }; + + port@2 { + reg = <2>; + dpu_intf0_out: endpoint { + remote-endpoint = <&mdss_dp_in>; + }; + }; + }; + }; + + mdss_dp: displayport-controller@ae90000 { + compatible = "qcom,sm8350-dp"; + reg = <0 0xae90000 0 0x200>, + <0 0xae90200 0 0x200>, + <0 0xae90400 0 0x600>, + <0 0xae91000 0 0x400>, + <0 0xae91400 0 0x400>; + interrupt-parent = <&mdss>; + interrupts = <12>; + clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, + <&dispcc DISP_CC_MDSS_DP_AUX_CLK>, + <&dispcc DISP_CC_MDSS_DP_LINK_CLK>, + <&dispcc DISP_CC_MDSS_DP_LINK_INTF_CLK>, + <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK>; + clock-names = "core_iface", + "core_aux", + "ctrl_link", + "ctrl_link_iface", + "stream_pixel"; + + assigned-clocks = <&dispcc DISP_CC_MDSS_DP_LINK_CLK_SRC>, + <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC>; + assigned-clock-parents = <&usb_1_qmpphy QMP_USB43DP_DP_LINK_CLK>, + <&usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>; + + phys = <&usb_1_qmpphy QMP_USB43DP_DP_PHY>; + phy-names = "dp"; + + #sound-dai-cells = <0>; + + operating-points-v2 = <&dp_opp_table>; + power-domains = <&rpmhpd SM8350_MMCX>; + + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + mdss_dp_in: endpoint { + remote-endpoint = <&dpu_intf0_out>; + }; + }; + }; + + dp_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-160000000 { + opp-hz = /bits/ 64 <160000000>; + required-opps = <&rpmhpd_opp_low_svs>; + }; + + opp-270000000 { + opp-hz = /bits/ 64 <270000000>; + required-opps = <&rpmhpd_opp_svs>; + }; + + opp-540000000 { + opp-hz = /bits/ 64 <540000000>; + required-opps = <&rpmhpd_opp_svs_l1>; + }; + + opp-810000000 { + opp-hz = /bits/ 64 <810000000>; + required-opps = <&rpmhpd_opp_nom>; + }; }; }; From patchwork Fri Feb 10 14:44:24 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 652941 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BCDE0C05027 for ; Fri, 10 Feb 2023 14:44:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232475AbjBJOoj (ORCPT ); Fri, 10 Feb 2023 09:44:39 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40444 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232225AbjBJOoe (ORCPT ); Fri, 10 Feb 2023 09:44:34 -0500 Received: from mail-wm1-x32c.google.com (mail-wm1-x32c.google.com [IPv6:2a00:1450:4864:20::32c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3BB7D7407E for ; Fri, 10 Feb 2023 06:44:32 -0800 (PST) Received: by mail-wm1-x32c.google.com with SMTP id j32-20020a05600c1c2000b003dc4fd6e61dso6445497wms.5 for ; Fri, 10 Feb 2023 06:44:32 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=rvmILHGHRiEBAL60Q1kTYGHYuMMQeQV5XTePYzXe7bg=; b=RtLcrRO/LUGc8yiQO2u2yii4zPvm+E4hxi4va0gZx6eFwdRLutGyLGjQdSQkPt4M8n fYNth7Vj83nDuCOLQ1yhoy2BZQSfedE1pd/IVRG0DqSsHCxW+j6zHWp393ReIdboivfS JnYqc8y8D+TizQuYvN7w108Zue4/XGLqwzQMgOd4JdLVhqq7vg0xiEEDPbyWMrnXk6Ur kmf9MbB5ZdhisbDmoAEW2w8Bfli9Bpx2Gn91zi/tGi3NxBSimy7sm6kEilM32Bkl6g0W mG6e9Jup/qA1xCFApSFYvQ7Du2/lS6QicNSG19rBkfhWZSvn88/I2uwJ4/S63vHJTVU4 u35Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=rvmILHGHRiEBAL60Q1kTYGHYuMMQeQV5XTePYzXe7bg=; b=vmJhPEALGxZxnf5jmlusnd6mXNTEkMqhmDHMvUcxfV4uZhOgA9/8NFEGqyMcWXCrw/ IiEx+7UUyce77o51dtpAZhh+47we/z6HHgn5JDeEGP0ksP5/TynuR3TzCmvkro2Xir31 0GnNaFQl+ZYfcJuUENFk9oZks5zdC9CM+i6EOUMh0yhhuapn+q7T/dzrB/4eEw+pIplV Um5iMc5f3+ysuM5Y+7WHjwkq21hOaQxLiL9jjHYRE3BCgfKhOYOoUl5YeSjvIZfjcUe1 zxSRaaFrKs3+TGnvc8J5QAMFV+FJYwqZoSZ0MF5burEuvwM3/WWQIIDv/5mGtx6U8cBV 7a6w== X-Gm-Message-State: AO0yUKV0Cl2ZA6Jnf4UMGgDlOtwh+mIG5zPbGwgHgcLIYD40YfvnpQ35 uIR1SVsH2yT5UwHrLpUqNWgaMw== X-Google-Smtp-Source: AK7set+ARRJdx6Iflt2eZ0GPPMsOdlqgm7ZlKsvUWTcop95DU7W/5Rht0fGLu90tHm5q+0xAWQSuWg== X-Received: by 2002:a05:600c:4d17:b0:3df:218d:b62c with SMTP id u23-20020a05600c4d1700b003df218db62cmr12910510wmp.12.1676040271821; Fri, 10 Feb 2023 06:44:31 -0800 (PST) Received: from arrakeen.starnux.net ([2a01:e0a:982:cbb0:8261:5fff:fe11:bdda]) by smtp.gmail.com with ESMTPSA id l40-20020a05600c1d2800b003dd1b00bd9asm6103000wms.32.2023.02.10.06.44.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 10 Feb 2023 06:44:31 -0800 (PST) From: Neil Armstrong Date: Fri, 10 Feb 2023 15:44:24 +0100 Subject: [PATCH v3 4/5] arm64: dts: qcom: sm8450: switch to usb3/dp combo phy MIME-Version: 1.0 Message-Id: <20230206-topic-sm8450-upstream-dp-controller-v3-4-636ef9e99932@linaro.org> References: <20230206-topic-sm8450-upstream-dp-controller-v3-0-636ef9e99932@linaro.org> In-Reply-To: <20230206-topic-sm8450-upstream-dp-controller-v3-0-636ef9e99932@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Kuogee Hsieh , Andy Gross , Bjorn Andersson , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Neil Armstrong X-Mailer: b4 0.12.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The QMP PHY is a USB3/DP combo phy, switch to the newly documented bindings and register the clocks to the GCC and DISPCC controllers. Signed-off-by: Neil Armstrong --- arch/arm64/boot/dts/qcom/sm8450.dtsi | 42 +++++++++++++----------------------- 1 file changed, 15 insertions(+), 27 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi index 1a744a33bcf4..6caa2c8efb46 100644 --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi @@ -11,6 +11,7 @@ #include #include #include +#include #include #include #include @@ -748,7 +749,7 @@ gcc: clock-controller@100000 { <&ufs_mem_phy_lanes 0>, <&ufs_mem_phy_lanes 1>, <&ufs_mem_phy_lanes 2>, - <0>; + <&usb_1_qmpphy QMP_USB43DP_USB3_PIPE_CLK>; clock-names = "bi_tcxo", "sleep_clk", "pcie_0_pipe_clk", @@ -2034,37 +2035,24 @@ usb_1_hsphy: phy@88e3000 { resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>; }; - usb_1_qmpphy: phy-wrapper@88e9000 { - compatible = "qcom,sm8450-qmp-usb3-phy"; - reg = <0 0x088e9000 0 0x200>, - <0 0x088e8000 0 0x20>; - status = "disabled"; - #address-cells = <2>; - #size-cells = <2>; - ranges; + usb_1_qmpphy: phy@88e8000 { + compatible = "qcom,sm8450-qmp-usb3-dp-phy"; + reg = <0 0x088e8000 0 0x4000>; clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>, <&rpmhcc RPMH_CXO_CLK>, - <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>; - clock-names = "aux", "ref_clk_src", "com_aux"; + <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>, + <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>; + clock-names = "aux", "ref", "com_aux", "usb3_pipe"; resets = <&gcc GCC_USB3_DP_PHY_PRIM_BCR>, <&gcc GCC_USB3_PHY_PRIM_BCR>; reset-names = "phy", "common"; - usb_1_ssphy: phy@88e9200 { - reg = <0 0x088e9200 0 0x200>, - <0 0x088e9400 0 0x200>, - <0 0x088e9c00 0 0x400>, - <0 0x088e9600 0 0x200>, - <0 0x088e9800 0 0x200>, - <0 0x088e9a00 0 0x100>; - #phy-cells = <0>; - #clock-cells = <0>; - clocks = <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>; - clock-names = "pipe0"; - clock-output-names = "usb3_phy_pipe_clk_src"; - }; + #clock-cells = <1>; + #phy-cells = <1>; + + status = "disabled"; }; remoteproc_slpi: remoteproc@2400000 { @@ -2972,8 +2960,8 @@ dispcc: clock-controller@af00000 { <&mdss_dsi0_phy 1>, <&mdss_dsi1_phy 0>, <&mdss_dsi1_phy 1>, - <0>, /* dp0 */ - <0>, + <&usb_1_qmpphy QMP_USB43DP_DP_LINK_CLK>, + <&usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>, <0>, /* dp1 */ <0>, <0>, /* dp2 */ @@ -4153,7 +4141,7 @@ usb_1_dwc3: usb@a600000 { iommus = <&apps_smmu 0x0 0x0>; snps,dis_u2_susphy_quirk; snps,dis_enblslpm_quirk; - phys = <&usb_1_hsphy>, <&usb_1_ssphy>; + phys = <&usb_1_hsphy>, <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>; phy-names = "usb2-phy", "usb3-phy"; }; }; From patchwork Fri Feb 10 14:44:25 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 652486 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 75034C636D7 for ; Fri, 10 Feb 2023 14:44:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232163AbjBJOol (ORCPT ); Fri, 10 Feb 2023 09:44:41 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40570 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232296AbjBJOof (ORCPT ); Fri, 10 Feb 2023 09:44:35 -0500 Received: from mail-wm1-x336.google.com (mail-wm1-x336.google.com [IPv6:2a00:1450:4864:20::336]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5F382765E4 for ; Fri, 10 Feb 2023 06:44:33 -0800 (PST) Received: by mail-wm1-x336.google.com with SMTP id n28-20020a05600c3b9c00b003ddca7a2bcbso4220729wms.3 for ; Fri, 10 Feb 2023 06:44:33 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=oB/TvOEFZT+W+sDYygPAtotZsUziIZY1jUdQwqpQGl4=; b=oLF0a73loPNaqavl96UdisNYXdtJXeqN6xIdiG927eZjyuErwCqfQ7x6CMAd8N2Y4s OS0EbKlfNC9ah58QdEY6Wyz3YBOH272Qcxi6omYBSgjr2Z55iMcC5/6u/whZoUeiPWP7 OKbEBtsHBhKGSNYr8uNKds90xe8Hn+csABnGcH/Q64M1F7UT5BjoCY/P3Q/2WisqL3hz HCllgFcM3PRWtsj1XReV0aavOSkmPXKOsFBU2lkBNsrHkpcKGdMLeHUAwN2iy+Y8EENI XW8KV0EMd0uKFaPw4qAcjGgxPUX6xuFC5IxMnYJlyTmEJ6b9pmmXVbSAqEblx44KCMkS zaBw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=oB/TvOEFZT+W+sDYygPAtotZsUziIZY1jUdQwqpQGl4=; b=vJPwBR4KIm/mCGbea8HjBNJuYwD56nxw4ZcFnwP40tBY4epPS+gMKpP+fLkcitEfNY qLihhknNL7ydU16lIrg+1EpO8DHZ4c8NOFdbv3aZodc5xG6UQ14n3P9im9gCVluEJulR 7pbyIfFh4l3i1Xok1v5ZysQyBQ6KiwT0SRMlj1xVTkT+6Y8niQF2efFnarSDdDCDYzx9 6E/xiUB3jVWwLjSu9gxQ+bRfxKUrv7Qx+SqwrLFwIoma99isRUpoL7479O+o8fIhNfxc LtFjWU6fONkVtfrEyP6Gi/DagksXOB2slGOAsz2cMMb135GNIAUZNpMi24Jjf0f+QaFq JFHA== X-Gm-Message-State: AO0yUKVFiMeM3r4Tu/+/URkWIUJrV0G4lbXEZO0f/aAwBYMGCaLU2f7k RcOjSa4O2BNEcscZahqU6+19qg== X-Google-Smtp-Source: AK7set/bpm2sO+qBJOu0PVt39/eQpQu2LGg5gAcFgui5x/8vlhsySdyVoXrfTbwkLjEdgumDqQujcA== X-Received: by 2002:a05:600c:4a9c:b0:3dd:1b6f:4f30 with SMTP id b28-20020a05600c4a9c00b003dd1b6f4f30mr17297527wmp.3.1676040272957; Fri, 10 Feb 2023 06:44:32 -0800 (PST) Received: from arrakeen.starnux.net ([2a01:e0a:982:cbb0:8261:5fff:fe11:bdda]) by smtp.gmail.com with ESMTPSA id l40-20020a05600c1d2800b003dd1b00bd9asm6103000wms.32.2023.02.10.06.44.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 10 Feb 2023 06:44:32 -0800 (PST) From: Neil Armstrong Date: Fri, 10 Feb 2023 15:44:25 +0100 Subject: [PATCH v3 5/5] arm64: dts: qcom: sm8450: add dp controller MIME-Version: 1.0 Message-Id: <20230206-topic-sm8450-upstream-dp-controller-v3-5-636ef9e99932@linaro.org> References: <20230206-topic-sm8450-upstream-dp-controller-v3-0-636ef9e99932@linaro.org> In-Reply-To: <20230206-topic-sm8450-upstream-dp-controller-v3-0-636ef9e99932@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Kuogee Hsieh , Andy Gross , Bjorn Andersson , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Neil Armstrong X-Mailer: b4 0.12.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add the Display Port controller subnode to the MDSS node. Signed-off-by: Neil Armstrong --- arch/arm64/boot/dts/qcom/sm8450.dtsi | 79 ++++++++++++++++++++++++++++++++++++ 1 file changed, 79 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi index 6caa2c8efb46..72d54beb7d7c 100644 --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi @@ -2751,6 +2751,13 @@ dpu_intf2_out: endpoint { }; }; + port@2 { + reg = <2>; + dpu_intf0_out: endpoint { + remote-endpoint = <&mdss_dp0_in>; + }; + }; + }; mdp_opp_table: opp-table { @@ -2783,6 +2790,78 @@ opp-500000000 { }; }; + mdss_dp0: displayport-controller@ae90000 { + compatible = "qcom,sm8350-dp"; + reg = <0 0xae90000 0 0xfc>, + <0 0xae90200 0 0xc0>, + <0 0xae90400 0 0x770>, + <0 0xae91000 0 0x98>, + <0 0xae91400 0 0x98>; + interrupt-parent = <&mdss>; + interrupts = <12>; + clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, + <&dispcc DISP_CC_MDSS_DPTX0_AUX_CLK>, + <&dispcc DISP_CC_MDSS_DPTX0_LINK_CLK>, + <&dispcc DISP_CC_MDSS_DPTX0_LINK_INTF_CLK>, + <&dispcc DISP_CC_MDSS_DPTX0_PIXEL0_CLK>; + clock-names = "core_iface", + "core_aux", + "ctrl_link", + "ctrl_link_iface", + "stream_pixel"; + + assigned-clocks = <&dispcc DISP_CC_MDSS_DPTX0_LINK_CLK_SRC>, + <&dispcc DISP_CC_MDSS_DPTX0_PIXEL0_CLK_SRC>; + assigned-clock-parents = <&usb_1_qmpphy QMP_USB43DP_DP_LINK_CLK>, + <&usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>; + + phys = <&usb_1_qmpphy QMP_USB43DP_DP_PHY>; + phy-names = "dp"; + + #sound-dai-cells = <0>; + + operating-points-v2 = <&dp_opp_table>; + power-domains = <&rpmhpd SM8450_MMCX>; + + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + mdss_dp0_in: endpoint { + remote-endpoint = <&dpu_intf0_out>; + }; + }; + }; + + dp_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-160000000 { + opp-hz = /bits/ 64 <160000000>; + required-opps = <&rpmhpd_opp_low_svs>; + }; + + opp-270000000 { + opp-hz = /bits/ 64 <270000000>; + required-opps = <&rpmhpd_opp_svs>; + }; + + opp-540000000 { + opp-hz = /bits/ 64 <540000000>; + required-opps = <&rpmhpd_opp_svs_l1>; + }; + + opp-810000000 { + opp-hz = /bits/ 64 <810000000>; + required-opps = <&rpmhpd_opp_nom>; + }; + }; + }; + mdss_dsi0: dsi@ae94000 { compatible = "qcom,sm8450-dsi-ctrl", "qcom,mdss-dsi-ctrl"; reg = <0 0x0ae94000 0 0x400>;