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[144.178.202.138]) by smtp.gmail.com with ESMTPSA id f22-20020a50a6d6000000b004acc6cbc451sm1616515edc.36.2023.02.13.05.08.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 13 Feb 2023 05:08:08 -0800 (PST) From: Luca Weiss X-Google-Original-From: Luca Weiss Date: Mon, 13 Feb 2023 14:08:06 +0100 Subject: [PATCH v2 1/2] clk: qcom: camcc-sm6350: add pm_runtime support MIME-Version: 1.0 Message-Id: <20230213-sm6350-camcc-runtime_pm-v2-1-60a507bf3e68@z3ntu.xyz> References: <20230213-sm6350-camcc-runtime_pm-v2-0-60a507bf3e68@z3ntu.xyz> In-Reply-To: <20230213-sm6350-camcc-runtime_pm-v2-0-60a507bf3e68@z3ntu.xyz> To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski Cc: ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Luca Weiss X-Mailer: b4 0.12.1 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Make sure that we can enable and disable the power domains used for camcc when the clocks are and aren't used. Signed-off-by: Luca Weiss --- drivers/clk/qcom/camcc-sm6350.c | 29 ++++++++++++++++++++++++++++- 1 file changed, 28 insertions(+), 1 deletion(-) diff --git a/drivers/clk/qcom/camcc-sm6350.c b/drivers/clk/qcom/camcc-sm6350.c index acba9f99d960..dd65f3ef0857 100644 --- a/drivers/clk/qcom/camcc-sm6350.c +++ b/drivers/clk/qcom/camcc-sm6350.c @@ -7,6 +7,8 @@ #include #include #include +#include +#include #include #include @@ -1869,6 +1871,19 @@ MODULE_DEVICE_TABLE(of, camcc_sm6350_match_table); static int camcc_sm6350_probe(struct platform_device *pdev) { struct regmap *regmap; + int ret; + + ret = devm_pm_runtime_enable(&pdev->dev); + if (ret < 0) + return ret; + + ret = devm_pm_clk_create(&pdev->dev); + if (ret < 0) + return ret; + + ret = pm_runtime_get(&pdev->dev); + if (ret) + return ret; regmap = qcom_cc_map(pdev, &camcc_sm6350_desc); if (IS_ERR(regmap)) @@ -1879,14 +1894,26 @@ static int camcc_sm6350_probe(struct platform_device *pdev) clk_agera_pll_configure(&camcc_pll2, regmap, &camcc_pll2_config); clk_fabia_pll_configure(&camcc_pll3, regmap, &camcc_pll3_config); - return qcom_cc_really_probe(pdev, &camcc_sm6350_desc, regmap); + ret = qcom_cc_really_probe(pdev, &camcc_sm6350_desc, regmap); + pm_runtime_put(&pdev->dev); + if (ret < 0) { + dev_err(&pdev->dev, "Failed to register CAM CC clocks\n"); + return ret; + } + + return 0; } +static const struct dev_pm_ops camcc_pm_ops = { + SET_RUNTIME_PM_OPS(pm_clk_suspend, pm_clk_resume, NULL) +}; + static struct platform_driver camcc_sm6350_driver = { .probe = camcc_sm6350_probe, .driver = { .name = "sm6350-camcc", .of_match_table = camcc_sm6350_match_table, + .pm = &camcc_pm_ops, }, };