From patchwork Wed May 1 13:58:18 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 163214 Delivered-To: patch@linaro.org Received: by 2002:a92:7e86:0:0:0:0:0 with SMTP id q6csp4554508ill; Wed, 1 May 2019 06:58:43 -0700 (PDT) X-Google-Smtp-Source: APXvYqwx6SR6G21WkjzvBxouAPR6ZoaYJvKmjKhq7onreYmPQVGZhhDz3vkPa3ITCU8Fs2rHIAdG X-Received: by 2002:a63:2b03:: with SMTP id r3mr72576515pgr.105.1556719123106; Wed, 01 May 2019 06:58:43 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1556719123; cv=none; d=google.com; s=arc-20160816; b=jfOeSGi+oBa5vf2XmAKXpV3PxdUd9ezWP4Oh9HYSOmcS3xXm31Ef/en9VYL1kWKNCh AAFHur8grgtnQZBudLbwiootigm+gfj27cDYdSPCKMi9lYtLpixdzbRiHI4sIwU78WsB Bf9CpS6unbRz44TMoHKWQwDGrVS9DM/PD8rW5zJ/g5JgQOH7kQ6dDTvVN885h/ZGghPX lmYE6n4CpQpAyaQ4kyPCtQVMEUKOBf2lA8DBlIBAt4G38ET8fv7ql5h1NBacC1EVRYtU 8wR3el/aoWRmc14pLUVwD0jCaKWdxYOKVJ1KQ9oA2GWUZvJAEaeT8jhmpT8zDVMz/egX zCvg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from; bh=UE3R0bqJPKC1ooBa14iyFi/RRTLXYg8/O3fIBDG6sag=; b=DJuqW1u4jmeBW9qm6kEA2AuD2HZaUt1prZ3c6XIlUX25v+F1wPDkS1/mYAgLYLOT+D aJ9eGK12W2SjnsL2MsYHkij27z6NodO7VkJsXTWguBIrN2Vm4aCZT8swRVTnXlowy+cL gb+2XPa7CZSSwEVTFIcnD3EL63y50wKXHtQUOXlR+jFMI9VmQRjguPtdSCiqxq1gC7iB DBwDF83auUTZXAD6FGP5PrjSkm9ixlCfOteHWBQCmh4fGDR10Cr1jHFFHrrZInEM92Pb adjRrQKoAGMajo962Bb1lK56NMiguj0GidHd8OMLdDRh5Y2afTLtI7Pr2+hV/kU43Oa6 hCmA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id gn14si40588495plb.7.2019.05.01.06.58.42; Wed, 01 May 2019 06:58:43 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726620AbfEAN6l (ORCPT + 30 others); Wed, 1 May 2019 09:58:41 -0400 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:59632 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726382AbfEAN6i (ORCPT ); Wed, 1 May 2019 09:58:38 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 50277EBD; Wed, 1 May 2019 06:58:38 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id D117B3F5AF; Wed, 1 May 2019 06:58:35 -0700 (PDT) From: Julien Grall To: linux-kernel@vger.kernel.org, iommu@lists.linux-foundation.org Cc: logang@deltatee.com, douliyangs@gmail.com, miquel.raynal@bootlin.com, marc.zyngier@arm.com, jason@lakedaemon.net, tglx@linutronix.de, joro@8bytes.org, robin.murphy@arm.com, bigeasy@linutronix.de, linux-rt-users@vger.kernel.org, Julien Grall , Eric Auger Subject: [PATCH v3 1/7] genirq/msi: Add a new field in msi_desc to store an IOMMU cookie Date: Wed, 1 May 2019 14:58:18 +0100 Message-Id: <20190501135824.25586-2-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190501135824.25586-1-julien.grall@arm.com> References: <20190501135824.25586-1-julien.grall@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org When an MSI doorbell is located downstream of an IOMMU, it is required to swizzle the physical address with an appropriately-mapped IOVA for any device attached to one of our DMA ops domain. At the moment, the allocation of the mapping may be done when composing the message. However, the composing may be done in non-preemtible context while the allocation requires to be called from preemptible context. A follow-up change will split the current logic in two functions requiring to keep an IOMMU cookie per MSI. A new field is introduced in msi_desc to store an IOMMU cookie. As the cookie may not be required in some configuration, the field is protected under a new config CONFIG_IRQ_MSI_IOMMU. A pair of helpers has also been introduced to access the field. Signed-off-by: Julien Grall Reviewed-by: Robin Murphy Reviewed-by: Eric Auger --- Changes in v3: - Add Robin's and Eric's reviewed-by Changes in v2: - Update the commit message to use imperative mood - Protect the field with a new config that will be selected by IOMMU_DMA later on - Add a set of helpers to access the new field --- include/linux/msi.h | 26 ++++++++++++++++++++++++++ kernel/irq/Kconfig | 3 +++ 2 files changed, 29 insertions(+) -- 2.11.0 diff --git a/include/linux/msi.h b/include/linux/msi.h index 7e9b81c3b50d..82a308c19222 100644 --- a/include/linux/msi.h +++ b/include/linux/msi.h @@ -77,6 +77,9 @@ struct msi_desc { struct device *dev; struct msi_msg msg; struct irq_affinity_desc *affinity; +#ifdef CONFIG_IRQ_MSI_IOMMU + const void *iommu_cookie; +#endif union { /* PCI MSI/X specific data */ @@ -119,6 +122,29 @@ struct msi_desc { #define for_each_msi_entry_safe(desc, tmp, dev) \ list_for_each_entry_safe((desc), (tmp), dev_to_msi_list((dev)), list) +#ifdef CONFIG_IRQ_MSI_IOMMU +static inline const void *msi_desc_get_iommu_cookie(struct msi_desc *desc) +{ + return desc->iommu_cookie; +} + +static inline void msi_desc_set_iommu_cookie(struct msi_desc *desc, + const void *iommu_cookie) +{ + desc->iommu_cookie = iommu_cookie; +} +#else +static inline const void *msi_desc_get_iommu_cookie(struct msi_desc *desc) +{ + return NULL; +} + +static inline void msi_desc_set_iommu_cookie(struct msi_desc *desc, + const void *iommu_cookie) +{ +} +#endif + #ifdef CONFIG_PCI_MSI #define first_pci_msi_entry(pdev) first_msi_entry(&(pdev)->dev) #define for_each_pci_msi_entry(desc, pdev) \ diff --git a/kernel/irq/Kconfig b/kernel/irq/Kconfig index 5f3e2baefca9..8fee06625c37 100644 --- a/kernel/irq/Kconfig +++ b/kernel/irq/Kconfig @@ -91,6 +91,9 @@ config GENERIC_MSI_IRQ_DOMAIN select IRQ_DOMAIN_HIERARCHY select GENERIC_MSI_IRQ +config IRQ_MSI_IOMMU + bool + config HANDLE_DOMAIN_IRQ bool From patchwork Wed May 1 13:58:19 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 163215 Delivered-To: patch@linaro.org Received: by 2002:a92:7e86:0:0:0:0:0 with SMTP id q6csp4554529ill; Wed, 1 May 2019 06:58:44 -0700 (PDT) X-Google-Smtp-Source: APXvYqyrs+zAaSuiXBWyOHG9Uni/W2r5rKOYvaQpZGDbv33BU2n8wZhS/pJ86HeD4hUjGf4ZPUp+ X-Received: by 2002:a62:e00e:: with SMTP id f14mr21269569pfh.257.1556719124230; Wed, 01 May 2019 06:58:44 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1556719124; cv=none; d=google.com; s=arc-20160816; b=r2qDLdMaLk6pryqoei2fsTxI40USWF9F73ZFp9T85BPHTqaZ8X07ceD/xHP5YcKBRV x+ogvU6uAnIRnORg27txknMh+Y40Hm3IeBZsblEdMMUuO5tgvmxAy/NXVadyE/nuklcq cBaf7AzJrGi9yilj1WCdFzFennVUJLKXK82tuZ5ANw3gFSq0ypQksgzFZblymc8hBGay aG4r1nKwR4fSdKqwgwD2Fy0RP4RQRfJhJ0j50KkFFWnEb1vOg6wI3euUyVqQnARB9SGW j/fnh2g9THtS9bj6Ek5tMzk2gXbjdRCV39gFkbAcRxhGFit7CPUg+kZGRQUpleUnx7nE akjQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from; bh=RRNlFnqXMqQvNnwIE+ccVcQmv5RrD38ma5PTwmHlVq8=; b=lSWx/aS2m+sJl5OCmfjhZjaMkwAglz3Nwh6EGuhshHgPHZqKUtNWHVTzYpQsuz553l ATrhH3vVyhHvC5LHTFGM6VGx4dtNY6Up+SiiMCEc51u2NiOIHiQc4Y2zgwmTmPILKmE3 8pml0PUZxPgOPUSB85XN09Jry0IO2Lt4W9DdcyVZcYtSMr/bb5NSawUFec1MMYILWeUt JfWKGIAU/saWukuH0VoLUSuiOfG0Yfcsj379wwU5Ew6t88bvI2o9Ag1DYC/LAFYXds7v ho9D27sWdmf8vdc6oLcz9HKcEbsKpwGn6DdZR6PX2hPiMO3TGPM/7TvQFgcOv6uR9jHk ZVAA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id gn14si40588495plb.7.2019.05.01.06.58.43; Wed, 01 May 2019 06:58:44 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726582AbfEAN6n (ORCPT + 30 others); Wed, 1 May 2019 09:58:43 -0400 Received: from foss.arm.com ([217.140.101.70]:59650 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726617AbfEAN6l (ORCPT ); Wed, 1 May 2019 09:58:41 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 119E015AD; Wed, 1 May 2019 06:58:41 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 9201E3F5AF; Wed, 1 May 2019 06:58:38 -0700 (PDT) From: Julien Grall To: linux-kernel@vger.kernel.org, iommu@lists.linux-foundation.org Cc: logang@deltatee.com, douliyangs@gmail.com, miquel.raynal@bootlin.com, marc.zyngier@arm.com, jason@lakedaemon.net, tglx@linutronix.de, joro@8bytes.org, robin.murphy@arm.com, bigeasy@linutronix.de, linux-rt-users@vger.kernel.org, Julien Grall , Eric Auguer Subject: [PATCH v3 2/7] iommu/dma-iommu: Split iommu_dma_map_msi_msg() in two parts Date: Wed, 1 May 2019 14:58:19 +0100 Message-Id: <20190501135824.25586-3-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190501135824.25586-1-julien.grall@arm.com> References: <20190501135824.25586-1-julien.grall@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On RT, iommu_dma_map_msi_msg() may be called from non-preemptible context. This will lead to a splat with CONFIG_DEBUG_ATOMIC_SLEEP as the function is using spin_lock (they can sleep on RT). iommu_dma_map_msi_msg() is used to map the MSI page in the IOMMU PT and update the MSI message with the IOVA. Only the part to lookup for the MSI page requires to be called in preemptible context. As the MSI page cannot change over the lifecycle of the MSI interrupt, the lookup can be cached and re-used later on. iomma_dma_map_msi_msg() is now split in two functions: - iommu_dma_prepare_msi(): This function will prepare the mapping in the IOMMU and store the cookie in the structure msi_desc. This function should be called in preemptible context. - iommu_dma_compose_msi_msg(): This function will update the MSI message with the IOVA when the device is behind an IOMMU. Signed-off-by: Julien Grall Reviewed-by: Robin Murphy Reviewed-by: Eric Auguer --- Changes in v3: - Update the comment to use kerneldoc format - Fix typoes in the comments - More use of msi_desc_set_iommu_cookie - Add Robin's and Eric's reviewed-by Changes in v2: - Rework the commit message to use imperative mood - Use the MSI accessor to get/set the iommu cookie - Don't use ternary on return - Select CONFIG_IRQ_MSI_IOMMU - Pass an msi_desc rather than the irq number --- drivers/iommu/Kconfig | 1 + drivers/iommu/dma-iommu.c | 46 +++++++++++++++++++++++++++++++++++++--------- include/linux/dma-iommu.h | 25 +++++++++++++++++++++++++ 3 files changed, 63 insertions(+), 9 deletions(-) -- 2.11.0 Acked-by: Joerg Roedel diff --git a/drivers/iommu/Kconfig b/drivers/iommu/Kconfig index 6f07f3b21816..eb1c8cd243f9 100644 --- a/drivers/iommu/Kconfig +++ b/drivers/iommu/Kconfig @@ -94,6 +94,7 @@ config IOMMU_DMA bool select IOMMU_API select IOMMU_IOVA + select IRQ_MSI_IOMMU select NEED_SG_DMA_LENGTH config FSL_PAMU diff --git a/drivers/iommu/dma-iommu.c b/drivers/iommu/dma-iommu.c index 77aabe637a60..f847904098f7 100644 --- a/drivers/iommu/dma-iommu.c +++ b/drivers/iommu/dma-iommu.c @@ -888,17 +888,18 @@ static struct iommu_dma_msi_page *iommu_dma_get_msi_page(struct device *dev, return NULL; } -void iommu_dma_map_msi_msg(int irq, struct msi_msg *msg) +int iommu_dma_prepare_msi(struct msi_desc *desc, phys_addr_t msi_addr) { - struct device *dev = msi_desc_to_dev(irq_get_msi_desc(irq)); + struct device *dev = msi_desc_to_dev(desc); struct iommu_domain *domain = iommu_get_domain_for_dev(dev); struct iommu_dma_cookie *cookie; struct iommu_dma_msi_page *msi_page; - phys_addr_t msi_addr = (u64)msg->address_hi << 32 | msg->address_lo; unsigned long flags; - if (!domain || !domain->iova_cookie) - return; + if (!domain || !domain->iova_cookie) { + desc->iommu_cookie = NULL; + return 0; + } cookie = domain->iova_cookie; @@ -911,7 +912,36 @@ void iommu_dma_map_msi_msg(int irq, struct msi_msg *msg) msi_page = iommu_dma_get_msi_page(dev, msi_addr, domain); spin_unlock_irqrestore(&cookie->msi_lock, flags); - if (WARN_ON(!msi_page)) { + msi_desc_set_iommu_cookie(desc, msi_page); + + if (!msi_page) + return -ENOMEM; + return 0; +} + +void iommu_dma_compose_msi_msg(struct msi_desc *desc, + struct msi_msg *msg) +{ + struct device *dev = msi_desc_to_dev(desc); + const struct iommu_domain *domain = iommu_get_domain_for_dev(dev); + const struct iommu_dma_msi_page *msi_page; + + msi_page = msi_desc_get_iommu_cookie(desc); + + if (!domain || !domain->iova_cookie || WARN_ON(!msi_page)) + return; + + msg->address_hi = upper_32_bits(msi_page->iova); + msg->address_lo &= cookie_msi_granule(domain->iova_cookie) - 1; + msg->address_lo += lower_32_bits(msi_page->iova); +} + +void iommu_dma_map_msi_msg(int irq, struct msi_msg *msg) +{ + struct msi_desc *desc = irq_get_msi_desc(irq); + phys_addr_t msi_addr = (u64)msg->address_hi << 32 | msg->address_lo; + + if (WARN_ON(iommu_dma_prepare_msi(desc, msi_addr))) { /* * We're called from a void callback, so the best we can do is * 'fail' by filling the message with obviously bogus values. @@ -922,8 +952,6 @@ void iommu_dma_map_msi_msg(int irq, struct msi_msg *msg) msg->address_lo = ~0U; msg->data = ~0U; } else { - msg->address_hi = upper_32_bits(msi_page->iova); - msg->address_lo &= cookie_msi_granule(cookie) - 1; - msg->address_lo += lower_32_bits(msi_page->iova); + iommu_dma_compose_msi_msg(desc, msg); } } diff --git a/include/linux/dma-iommu.h b/include/linux/dma-iommu.h index e760dc5d1fa8..0b781a98ee73 100644 --- a/include/linux/dma-iommu.h +++ b/include/linux/dma-iommu.h @@ -71,12 +71,26 @@ void iommu_dma_unmap_resource(struct device *dev, dma_addr_t handle, size_t size, enum dma_data_direction dir, unsigned long attrs); /* The DMA API isn't _quite_ the whole story, though... */ +/* + * iommu_dma_prepare_msi() - Map the MSI page in the IOMMU device + * + * The MSI page will be stored in @desc. + * + * Return: 0 on success otherwise an error describing the failure. + */ +int iommu_dma_prepare_msi(struct msi_desc *desc, phys_addr_t msi_addr); + +/* Update the MSI message if required. */ +void iommu_dma_compose_msi_msg(struct msi_desc *desc, + struct msi_msg *msg); + void iommu_dma_map_msi_msg(int irq, struct msi_msg *msg); void iommu_dma_get_resv_regions(struct device *dev, struct list_head *list); #else struct iommu_domain; +struct msi_desc; struct msi_msg; struct device; @@ -99,6 +113,17 @@ static inline void iommu_put_dma_cookie(struct iommu_domain *domain) { } +static inline int iommu_dma_prepare_msi(struct msi_desc *desc, + phys_addr_t msi_addr) +{ + return 0; +} + +static inline void iommu_dma_compose_msi_msg(struct msi_desc *desc, + struct msi_msg *msg) +{ +} + static inline void iommu_dma_map_msi_msg(int irq, struct msi_msg *msg) { } From patchwork Wed May 1 13:58:22 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 163218 Delivered-To: patch@linaro.org Received: by 2002:a92:7e86:0:0:0:0:0 with SMTP id q6csp4554675ill; Wed, 1 May 2019 06:58:53 -0700 (PDT) X-Google-Smtp-Source: APXvYqyCcyWjHhgvUpHKXELSB4hQ2BcRDZN+5hOsjy9iJV3kfNbFMNb6Q01Yah3ErZIZ8z94QciU X-Received: by 2002:a17:902:e485:: with SMTP id cj5mr52276683plb.280.1556719133617; Wed, 01 May 2019 06:58:53 -0700 (PDT) ARC-Seal: i=1; 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[209.132.180.67]) by mx.google.com with ESMTP id u4si39884444pga.245.2019.05.01.06.58.53; Wed, 01 May 2019 06:58:53 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726703AbfEAN6v (ORCPT + 30 others); Wed, 1 May 2019 09:58:51 -0400 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:59716 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726669AbfEAN6t (ORCPT ); Wed, 1 May 2019 09:58:49 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 2366215AD; Wed, 1 May 2019 06:58:49 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id C884F3F5AF; Wed, 1 May 2019 06:58:46 -0700 (PDT) From: Julien Grall To: linux-kernel@vger.kernel.org, iommu@lists.linux-foundation.org Cc: logang@deltatee.com, douliyangs@gmail.com, miquel.raynal@bootlin.com, marc.zyngier@arm.com, jason@lakedaemon.net, tglx@linutronix.de, joro@8bytes.org, robin.murphy@arm.com, bigeasy@linutronix.de, linux-rt-users@vger.kernel.org, Julien Grall Subject: [PATCH v3 5/7] irqchip/ls-scfg-msi: Don't map the MSI page in ls_scfg_msi_compose_msg() Date: Wed, 1 May 2019 14:58:22 +0100 Message-Id: <20190501135824.25586-6-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190501135824.25586-1-julien.grall@arm.com> References: <20190501135824.25586-1-julien.grall@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org ls_scfg_msi_compose_msg() may be called from non-preemptible context. However, on RT, iommu_dma_map_msi_msg() requires to be called from a preemptible context. A recent patch split iommu_dma_map_msi_msg() in two new functions: one that should be called in preemptible context, the other does not have any requirement. The FreeScale SCFG MSI driver is reworked to avoid executing preemptible code in non-preemptible context. This can be achieved by preparing the MSI maping when allocating the MSI interrupt. Signed-off-by: Julien Grall --- Changes in v2: - Rework the commit message to use imperative mood --- drivers/irqchip/irq-ls-scfg-msi.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) -- 2.11.0 diff --git a/drivers/irqchip/irq-ls-scfg-msi.c b/drivers/irqchip/irq-ls-scfg-msi.c index c671b3212010..669d29105772 100644 --- a/drivers/irqchip/irq-ls-scfg-msi.c +++ b/drivers/irqchip/irq-ls-scfg-msi.c @@ -100,7 +100,7 @@ static void ls_scfg_msi_compose_msg(struct irq_data *data, struct msi_msg *msg) msg->data |= cpumask_first(mask); } - iommu_dma_map_msi_msg(data->irq, msg); + iommu_dma_compose_msi_msg(irq_data_get_msi_desc(data), msg); } static int ls_scfg_msi_set_affinity(struct irq_data *irq_data, @@ -141,6 +141,7 @@ static int ls_scfg_msi_domain_irq_alloc(struct irq_domain *domain, unsigned int nr_irqs, void *args) { + msi_alloc_info_t *info = args; struct ls_scfg_msi *msi_data = domain->host_data; int pos, err = 0; @@ -157,6 +158,10 @@ static int ls_scfg_msi_domain_irq_alloc(struct irq_domain *domain, if (err) return err; + err = iommu_dma_prepare_msi(info->desc, msi_data->msiir_addr); + if (err) + return err; + irq_domain_set_info(domain, virq, pos, &ls_scfg_msi_parent_chip, msi_data, handle_simple_irq, NULL, NULL); From patchwork Wed May 1 13:58:23 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 163219 Delivered-To: patch@linaro.org Received: by 2002:a92:7e86:0:0:0:0:0 with SMTP id q6csp4554717ill; Wed, 1 May 2019 06:58:55 -0700 (PDT) X-Google-Smtp-Source: APXvYqytPOvFL1dV8t2mfOVllQfZTsHN/pafPVaWKCGkcC23Tl4giv31zjj2cwWhtmyNK1Qq5gXR X-Received: by 2002:a65:6212:: with SMTP id d18mr74182898pgv.162.1556719135889; Wed, 01 May 2019 06:58:55 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1556719135; cv=none; d=google.com; s=arc-20160816; b=Of09Q30mLvGKKkUA9hR1jM5qEIdECcMnkcipGDmJjhgNK9u8iBV44oBhI4oDg2Xwj9 d3T3SC/6JvOt9E+mjvNZhG/FrjUIc9rCHeaR9T2Txy/l+mBQF9xq97T0UtwwI1oXNIVo aDO/bnxUHHxK1o+BxL1KR4RUh8TUoiY0/QFDeFOjcQZwE+BoKrIP5dK3SMnorFEOHHCd AjAxB6SR/nc9vE0EBgjgT1kWT+XtuAf6W0I0Fd+uBzbtYzPTnLPYpjc/oENiQukkMObe idASYwd/XzFnH0bvzd7N59HI5QHKhkecTQAUheM2QsqLaj8IG+KWg7gdeAAJM2v59EbN /EQg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from; bh=5YWucx5YeVmREPbqE3wTqTILeV6VyM7Q/wrTqluclv8=; b=t9NJYV3Wg/lOjx+WGqhJHznOG0vBeJmegDFWBIXxAKk7fFQ+VG8xE4cuJCZDFgvO3J wdqyOujauZk2ifZgJHbOOx94XQoeorWcsVN+0Gh0Zwn2CbCpExebrrbBpXBH8M7Ix75w JkRG8FlQQjVxolfRcslGoyAQmQ02yE9A1E5Vh/iIauLeheRw6KUhJY6gptZQmZmtQQcR D2WFdR3zDCmP5XQ2QteKe8y7pSMkssy6xFj764ImIl/a9PBlySuUfyjjhJzG0zWxiM9U t3dKK7D1B8L3vN/L3RXWcXy3JMFHdRL2dzzbbSCsCABWO6FXG9vZMmabaXohIi+GmVXa CRBA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id u4si39884444pga.245.2019.05.01.06.58.55; Wed, 01 May 2019 06:58:55 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726724AbfEAN6y (ORCPT + 30 others); Wed, 1 May 2019 09:58:54 -0400 Received: from foss.arm.com ([217.140.101.70]:59732 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726423AbfEAN6w (ORCPT ); Wed, 1 May 2019 09:58:52 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id B372BA78; Wed, 1 May 2019 06:58:51 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 64E6E3F5AF; Wed, 1 May 2019 06:58:49 -0700 (PDT) From: Julien Grall To: linux-kernel@vger.kernel.org, iommu@lists.linux-foundation.org Cc: logang@deltatee.com, douliyangs@gmail.com, miquel.raynal@bootlin.com, marc.zyngier@arm.com, jason@lakedaemon.net, tglx@linutronix.de, joro@8bytes.org, robin.murphy@arm.com, bigeasy@linutronix.de, linux-rt-users@vger.kernel.org, Julien Grall Subject: [PATCH v3 6/7] irqchip/gic-v3-mbi: Don't map the MSI page in mbi_compose_m{b, s}i_msg() Date: Wed, 1 May 2019 14:58:23 +0100 Message-Id: <20190501135824.25586-7-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190501135824.25586-1-julien.grall@arm.com> References: <20190501135824.25586-1-julien.grall@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The functions mbi_compose_m{b, s}i_msg may be called from non-preemptible context. However, on RT, iommu_dma_map_msi_msg() requires to be called from a preemptible context. A recent patch split iommu_dma_map_msi_msg in two new functions: one that should be called in preemptible context, the other does not have any requirement. The GICv3 MSI driver is reworked to avoid executing preemptible code in non-preemptible context. This can be achieved by preparing the two MSI mappings when allocating the MSI interrupt. Signed-off-by: Julien Grall --- Changes in v2: - Rework the commit message to use imperative mood --- drivers/irqchip/irq-gic-v3-mbi.c | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) -- 2.11.0 diff --git a/drivers/irqchip/irq-gic-v3-mbi.c b/drivers/irqchip/irq-gic-v3-mbi.c index fbfa7ff6deb1..d50f6cdf043c 100644 --- a/drivers/irqchip/irq-gic-v3-mbi.c +++ b/drivers/irqchip/irq-gic-v3-mbi.c @@ -84,6 +84,7 @@ static void mbi_free_msi(struct mbi_range *mbi, unsigned int hwirq, static int mbi_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, unsigned int nr_irqs, void *args) { + msi_alloc_info_t *info = args; struct mbi_range *mbi = NULL; int hwirq, offset, i, err = 0; @@ -104,6 +105,16 @@ static int mbi_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, hwirq = mbi->spi_start + offset; + err = iommu_dma_prepare_msi(info->desc, + mbi_phys_base + GICD_CLRSPI_NSR); + if (err) + return err; + + err = iommu_dma_prepare_msi(info->desc, + mbi_phys_base + GICD_SETSPI_NSR); + if (err) + return err; + for (i = 0; i < nr_irqs; i++) { err = mbi_irq_gic_domain_alloc(domain, virq + i, hwirq + i); if (err) @@ -142,7 +153,7 @@ static void mbi_compose_msi_msg(struct irq_data *data, struct msi_msg *msg) msg[0].address_lo = lower_32_bits(mbi_phys_base + GICD_SETSPI_NSR); msg[0].data = data->parent_data->hwirq; - iommu_dma_map_msi_msg(data->irq, msg); + iommu_dma_compose_msi_msg(irq_data_get_msi_desc(data), msg); } #ifdef CONFIG_PCI_MSI @@ -202,7 +213,7 @@ static void mbi_compose_mbi_msg(struct irq_data *data, struct msi_msg *msg) msg[1].address_lo = lower_32_bits(mbi_phys_base + GICD_CLRSPI_NSR); msg[1].data = data->parent_data->hwirq; - iommu_dma_map_msi_msg(data->irq, &msg[1]); + iommu_dma_compose_msi_msg(irq_data_get_msi_desc(data), &msg[1]); } /* Platform-MSI specific irqchip */ From patchwork Wed May 1 13:58:24 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 163220 Delivered-To: patch@linaro.org Received: by 2002:a92:7e86:0:0:0:0:0 with SMTP id q6csp4554751ill; Wed, 1 May 2019 06:58:58 -0700 (PDT) X-Google-Smtp-Source: APXvYqwZNmXCPoAjEsfz1SiJCXa+/gNwmsNWhC/dMVOD3x6Q5YkaJIZC7RjLyAN3XmjmJ0EDqmzx X-Received: by 2002:a65:6688:: with SMTP id b8mr51490723pgw.81.1556719138761; Wed, 01 May 2019 06:58:58 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1556719138; cv=none; d=google.com; s=arc-20160816; b=JsNJaZYYQ1T+BzjzktduJLHV/Zk+RF4lCm/Dc0wLYrC5hDaHMpxo1fkozOorxa2to4 ceP3ryEbW99Xek3Kr5ebMlqh4AhBnkD/wcmh0N5WfFalyzmUfPG0qQLStML6L1bocLlS b9DcFti7XIBvh0VFApnbSdFoNkTkou4nnkiE74TzhiCznclRVatd1PugNlGRe/8mynaO FqMe+HEXeISwUFsJmmC17WirxbVIgXBd9rIW2bDTwd6EXXOvdBonCYyhhyOSLFk4EWM+ 6WpTYwJE4M292hLDJtAxbHQ0GYzIDR/yOJZUqJmfEH0a7Tc/WsLRkeQTnXQECvQIvDVk g82A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from; bh=MMDPb+rKSRQ12dw90+71TPUXBVe4BI4p4ARWII0uWys=; b=a83Zv7F9vr2BQqMzY91J/El49GojPo4+qruey6YzV1qYQsdOwO2O4BW94ZgDin8VS/ EskNKPmybmlJ8j6i4SzlXV80NcKCnR2BUlpfiMSQvPleFUQ9y/pVeAww3WIlnHjnTXEV lyOWUh7R98zeizO/zNW2goAKsxCXG+iSY/NHg+2ygTNl4KQGnTpyOPcAezwN3Ld016ih srR09kolo8K79nT4/tUTpEMl1DtrTTWHwzVL5kI/FhLEwcW5ZXFS0Z4VqqipkyqYgQHU S/okNbwk8cVrAIMOjkjl6Frqujcv0U9GJBaR/ozeyXcPNelBGhpZ7iwuGCa5ak8l7Be+ QNYw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id k1si38728229pgq.219.2019.05.01.06.58.58; Wed, 01 May 2019 06:58:58 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726744AbfEAN64 (ORCPT + 30 others); Wed, 1 May 2019 09:58:56 -0400 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:59756 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726721AbfEAN6z (ORCPT ); Wed, 1 May 2019 09:58:55 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 7424AA78; Wed, 1 May 2019 06:58:54 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 00E743F5AF; Wed, 1 May 2019 06:58:51 -0700 (PDT) From: Julien Grall To: linux-kernel@vger.kernel.org, iommu@lists.linux-foundation.org Cc: logang@deltatee.com, douliyangs@gmail.com, miquel.raynal@bootlin.com, marc.zyngier@arm.com, jason@lakedaemon.net, tglx@linutronix.de, joro@8bytes.org, robin.murphy@arm.com, bigeasy@linutronix.de, linux-rt-users@vger.kernel.org, Julien Grall , Eric Auger Subject: [PATCH v3 7/7] iommu/dma-iommu: Remove iommu_dma_map_msi_msg() Date: Wed, 1 May 2019 14:58:24 +0100 Message-Id: <20190501135824.25586-8-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190501135824.25586-1-julien.grall@arm.com> References: <20190501135824.25586-1-julien.grall@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org A recent change split iommu_dma_map_msi_msg() in two new functions. The function was still implemented to avoid modifying all the callers at once. Now that all the callers have been reworked, iommu_dma_map_msi_msg() can be removed. Signed-off-by: Julien Grall Reviewed-by: Robin Murphy Reviewed-by: Eric Auger --- Changes in v3: - Add Robin's and Eric's reviewed-by Changes in v2: - Rework the commit message --- drivers/iommu/dma-iommu.c | 20 -------------------- include/linux/dma-iommu.h | 5 ----- 2 files changed, 25 deletions(-) -- 2.11.0 Acked-by: Joerg Roedel diff --git a/drivers/iommu/dma-iommu.c b/drivers/iommu/dma-iommu.c index f847904098f7..13916fefeb27 100644 --- a/drivers/iommu/dma-iommu.c +++ b/drivers/iommu/dma-iommu.c @@ -935,23 +935,3 @@ void iommu_dma_compose_msi_msg(struct msi_desc *desc, msg->address_lo &= cookie_msi_granule(domain->iova_cookie) - 1; msg->address_lo += lower_32_bits(msi_page->iova); } - -void iommu_dma_map_msi_msg(int irq, struct msi_msg *msg) -{ - struct msi_desc *desc = irq_get_msi_desc(irq); - phys_addr_t msi_addr = (u64)msg->address_hi << 32 | msg->address_lo; - - if (WARN_ON(iommu_dma_prepare_msi(desc, msi_addr))) { - /* - * We're called from a void callback, so the best we can do is - * 'fail' by filling the message with obviously bogus values. - * Since we got this far due to an IOMMU being present, it's - * not like the existing address would have worked anyway... - */ - msg->address_hi = ~0U; - msg->address_lo = ~0U; - msg->data = ~0U; - } else { - iommu_dma_compose_msi_msg(desc, msg); - } -} diff --git a/include/linux/dma-iommu.h b/include/linux/dma-iommu.h index 0b781a98ee73..476e0c54de2d 100644 --- a/include/linux/dma-iommu.h +++ b/include/linux/dma-iommu.h @@ -84,7 +84,6 @@ int iommu_dma_prepare_msi(struct msi_desc *desc, phys_addr_t msi_addr); void iommu_dma_compose_msi_msg(struct msi_desc *desc, struct msi_msg *msg); -void iommu_dma_map_msi_msg(int irq, struct msi_msg *msg); void iommu_dma_get_resv_regions(struct device *dev, struct list_head *list); #else @@ -124,10 +123,6 @@ static inline void iommu_dma_compose_msi_msg(struct msi_desc *desc, { } -static inline void iommu_dma_map_msi_msg(int irq, struct msi_msg *msg) -{ -} - static inline void iommu_dma_get_resv_regions(struct device *dev, struct list_head *list) { }