From patchwork Fri Feb 17 14:18:31 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 654420 Delivered-To: patch@linaro.org Received: by 2002:adf:9bcd:0:0:0:0:0 with SMTP id e13csp577935wrc; Fri, 17 Feb 2023 06:20:18 -0800 (PST) X-Google-Smtp-Source: AK7set+5t4RN4Ku/qOhuVb99ilN2eiXlgFL7K4KPs9KD6SbbhJ/P7myOC5rTaDJsV7zxS9FRlVvb X-Received: by 2002:a05:6214:d62:b0:56e:a5ea:1450 with SMTP id 2-20020a0562140d6200b0056ea5ea1450mr1087364qvs.6.1676643617903; Fri, 17 Feb 2023 06:20:17 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1676643617; cv=none; d=google.com; s=arc-20160816; b=fVl3pSO/Htusy4/VauvmMWNkStRr4ZB2zr86y+V9AdMXYdirSJvjLIg0rMjVYufYJ5 omv3lUEDzVD8DmJGjsgSKIwG0LlwThuk321p9zATnQwdTdGgshEA8UNrDDbhpAkRiJhs fDVApaJ5zHs+qqjhLZR5aks3yXCtStj0IwpAvnsn3D2RV+q5kosdhmz4Ze0ul1+sHE/8 8EXAu0iXDcRmX/KA+M8qJ07SW1AU6xhvhHdd15eSjEhdwGHA54dhnqUuw7M3RQ0xPweb vM9SOyT/BcWxFNN4VgSvKV+FDtRJdsiRwNZxHyipO0owQ2XkINbFWqEaWw4MDGc2SoMw 6dSg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=AmdraG6wSunb7ZlzZqyn0FBRFU3it2FPZJFh0CF4PdM=; b=tBOmohTJ2xydX+rFmAgE2+hO6tbaRgm+aEjtiC9sQ3f9w9sMtoHhbWJs/3lOvZUcz2 Cpsw4vzXq9C/y/TyvYG7zMbLFVae7Cgrsqx78Fr8LuSBnpJHmPPJGO4TPWMF3e5T/fZ4 81OWZLyOy/1B7hCu9dRKGxAl8iHiBkUSliBedHcG+Qu8/P6nwpOr4PD0PQyWbZZM8ILi 4igY186mzXS04XCwHtOaByM9d0alwZy2DouiWkhCS0bYdSCbhRZBvaZlKkiBnKamXC2F VBKmWyeZQA8lrjGUn4/8kpKzesP/oOqIQJZH67k+eoDxa7UUZX+N5BYo7C5J6XPtaZdw /PWw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=xwfHSGzJ; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id x6-20020a376306000000b0072107202decsi3593963qkb.48.2023.02.17.06.20.17 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Fri, 17 Feb 2023 06:20:17 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=xwfHSGzJ; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pT1Zr-0004sk-4i; Fri, 17 Feb 2023 09:19:07 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pT1ZU-0004a1-Vt for qemu-devel@nongnu.org; Fri, 17 Feb 2023 09:18:46 -0500 Received: from mail-wm1-x336.google.com ([2a00:1450:4864:20::336]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pT1ZS-0005Us-AL for qemu-devel@nongnu.org; Fri, 17 Feb 2023 09:18:44 -0500 Received: by mail-wm1-x336.google.com with SMTP id m21-20020a05600c3b1500b003e1f5f2a29cso1085610wms.4 for ; Fri, 17 Feb 2023 06:18:41 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=AmdraG6wSunb7ZlzZqyn0FBRFU3it2FPZJFh0CF4PdM=; b=xwfHSGzJNDhMKANmdgxutSeNW6nER18v9Kq4VVOVjXfogo878eiPUKNmJb7y/BU6Bq k669jq4sWZo1QXeM5hzkg9tK2yxvZulQeN7RkFf4CRpE1cjXFOgUT3HxEKPt8L8Xcsqf P+EKN5C8BljcTZZI3aEsEV2jXQn66sCtOmmMkA++Ac9SiSoA1c/zEiRFuW5xM5ZQYNLH R6NIR63JpdoPfzO4leifcCP/AUz9zUd7rIZ4YBhXw/+2unZwGLYVum7z13162T9o/c2u uksKF5NRAoPDGncZ6+z2oLRHqep+nzy0D5mWyWT1/EfYDdzgwv7zXVS8SpDTVwWATI4o kXkQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=AmdraG6wSunb7ZlzZqyn0FBRFU3it2FPZJFh0CF4PdM=; b=EORhlu0MOLikCWfiQ+j579D+dDmFXaBA6NFRas6GcJNcKrsB4fyzknykiFnOh8WKPN qrnu5saS8Yp6wztq/BAz/ee9yn9X+8eaae0ymXksL99B5vK6l0CBP7Pzf5bKUsSufTH2 IQPOfkH7uLtodQ6dw7w+lM4L8dbK03LJN+3Nn/VcFvfWUgYEi7SCOhbQtrfLWQYNkMXM YPXTx+ahKd+fumhbaa2dTjrUUsQ9NwHf28KPxR25ho1me87wF0oStG5srEtDtMeUa7xp Ep3a6Wo1SGucLg29n33p6A2wDdbZd9FGDk6qjWwOn+53xm88I+CouZBxZYAEwMyVNJ6C myxg== X-Gm-Message-State: AO0yUKW+NpSdaLNv8iCiYtwmCmxK7P1ZbSzUt7fw428DuhOP6Ze7snHo dziWYmYMSXd/XvXAGdj/hC9uBNoBRWP5O3mW X-Received: by 2002:a05:600c:181a:b0:3e1:f8b3:6333 with SMTP id n26-20020a05600c181a00b003e1f8b36333mr616746wmp.27.1676643519998; Fri, 17 Feb 2023 06:18:39 -0800 (PST) Received: from localhost.localdomain ([81.0.6.76]) by smtp.gmail.com with ESMTPSA id m17-20020a7bce11000000b003e209b45f6bsm5682410wmc.29.2023.02.17.06.18.38 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 17 Feb 2023 06:18:39 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, Markus Armbruster , Thomas Huth , qemu-arm@nongnu.org, "Dr . David Alan Gilbert" , =?utf-8?q?Philippe_Mathieu?= =?utf-8?q?-Daud=C3=A9?= Subject: [PATCH 1/2] qemu/typedefs: Sort in case-insensitive alphabetical order (again) Date: Fri, 17 Feb 2023 15:18:31 +0100 Message-Id: <20230217141832.24777-2-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230217141832.24777-1-philmd@linaro.org> References: <20230217141832.24777-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::336; envelope-from=philmd@linaro.org; helo=mail-wm1-x336.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Following the recommendation added in commit a98c370c46 ("typedefs: (Re-)sort entries alphabetically"), and similarly to commit 64baadc272 ("Sort include/qemu/typedefs.h"), sort again the type definitions (in case-insensitive alphabetical order, using 'sort --ignore-case'). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- include/qemu/typedefs.h | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/include/qemu/typedefs.h b/include/qemu/typedefs.h index c7c8a85315..df4b55ac65 100644 --- a/include/qemu/typedefs.h +++ b/include/qemu/typedefs.h @@ -49,6 +49,7 @@ typedef struct DeviceState DeviceState; typedef struct DirtyBitmapSnapshot DirtyBitmapSnapshot; typedef struct DisplayChangeListener DisplayChangeListener; typedef struct DriveInfo DriveInfo; +typedef struct DumpState DumpState; typedef struct Error Error; typedef struct EventNotifier EventNotifier; typedef struct FlatView FlatView; @@ -56,6 +57,7 @@ typedef struct FWCfgEntry FWCfgEntry; typedef struct FWCfgIoState FWCfgIoState; typedef struct FWCfgMemState FWCfgMemState; typedef struct FWCfgState FWCfgState; +typedef struct GraphicHwOps GraphicHwOps; typedef struct HostMemoryBackend HostMemoryBackend; typedef struct I2CBus I2CBus; typedef struct I2SCodec I2SCodec; @@ -90,10 +92,10 @@ typedef struct PCIDevice PCIDevice; typedef struct PCIEAERErr PCIEAERErr; typedef struct PCIEAERLog PCIEAERLog; typedef struct PCIEAERMsg PCIEAERMsg; -typedef struct PCIESriovPF PCIESriovPF; -typedef struct PCIESriovVF PCIESriovVF; typedef struct PCIEPort PCIEPort; typedef struct PCIESlot PCIESlot; +typedef struct PCIESriovPF PCIESriovPF; +typedef struct PCIESriovVF PCIESriovVF; typedef struct PCIExpressDevice PCIExpressDevice; typedef struct PCIExpressHost PCIExpressHost; typedef struct PCIHostDeviceAddress PCIHostDeviceAddress; @@ -106,6 +108,7 @@ typedef struct QBool QBool; typedef struct QDict QDict; typedef struct QEMUBH QEMUBH; typedef struct QemuConsole QemuConsole; +typedef struct QEMUCursor QEMUCursor; typedef struct QEMUFile QEMUFile; typedef struct QemuLockable QemuLockable; typedef struct QemuMutex QemuMutex; @@ -132,9 +135,6 @@ typedef struct VirtIODevice VirtIODevice; typedef struct Visitor Visitor; typedef struct VMChangeStateEntry VMChangeStateEntry; typedef struct VMStateDescription VMStateDescription; -typedef struct DumpState DumpState; -typedef struct GraphicHwOps GraphicHwOps; -typedef struct QEMUCursor QEMUCursor; /* * Pointer types From patchwork Fri Feb 17 14:18:32 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 654421 Delivered-To: patch@linaro.org Received: by 2002:adf:9bcd:0:0:0:0:0 with SMTP id e13csp577941wrc; Fri, 17 Feb 2023 06:20:18 -0800 (PST) X-Google-Smtp-Source: AK7set+WUnnKczl5lynnSYpwmJYO3QdWJd/x0BIsKsTMvxfkpTnA3ArImOTTz6OEZM88zabpYYcp X-Received: by 2002:a05:622a:348:b0:3b5:2a7:b4f5 with SMTP id r8-20020a05622a034800b003b502a7b4f5mr204415qtw.10.1676643618394; Fri, 17 Feb 2023 06:20:18 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1676643618; cv=none; d=google.com; s=arc-20160816; b=ncpY8d4F3h1l2UkobtkIXqgK1dPZN7N8f7SCvpgznjo4LTnhp7llG9fPXLKLIxfZtQ LgJZ4EjsTCqUVFs1otVASmMR3pnElgtp2iW51Tih83YuSzsRy65v6VU5Bx20sAfFNiER 6JS+mupWLA74/iH1ZlDuNdg/bRZP1jcTYKVs1m58bjIg0InL7N1tLy4zE0lrKWJ4HCS+ mfdbn4b8O02noZGqdUHpJ2uZKan2A/7vtaICd9VMK0TXSrFRcZNOxpg9/uzZyMU0SK0c GteLQVuTOrLjlpEQ/O+drFl22k2UYJ8btw397T79k7VZWPvbxAqdQecw49YDzKtw3/WI MTpQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=DCCPE7r2euKSyBUC8DVFJ0uB3bn50uLLJ1J1YYpZfwY=; b=iUHhvTnlHVkiBIHLHuSfzKfFPeRDa4IdCdKFXvgZE1cAsjTV+AkU61TuxxIt7Nhji7 btyoj6Xv8NSowscUqviAv5sqHPpnZVTWxuPcQeJwV6vIT7GGMARf8yWhFJdnlNHpOWyy SrYJz41JawLasbkgIaWhjqwwlRIbdYLzXdus5A6Vv2QYqr3G3+hzzcMq0PWPAPDMXHCj 70648VxBFqCn6i5+0N00S78QZyhvMqSeCow3ma3clim8BffVKJT86ysG9ACRF+am2eZB xoTF5pQWHBEy7vpmvy3doaMYpt6VKeEAnU1fapawHVVkpEDxswZ1zr3/FgkO3Y8gmvwv cejg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=jgGdMQ0K; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id g12-20020ac87f4c000000b003bd0eaf04cfsi2882445qtk.401.2023.02.17.06.20.18 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Fri, 17 Feb 2023 06:20:18 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=jgGdMQ0K; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pT1Zs-00050U-LU; Fri, 17 Feb 2023 09:19:08 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pT1Ze-0004kj-7B for qemu-devel@nongnu.org; Fri, 17 Feb 2023 09:18:56 -0500 Received: from mail-wr1-x435.google.com ([2a00:1450:4864:20::435]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pT1ZZ-0005Wp-4M for qemu-devel@nongnu.org; Fri, 17 Feb 2023 09:18:53 -0500 Received: by mail-wr1-x435.google.com with SMTP id bw20so1333577wrb.12 for ; Fri, 17 Feb 2023 06:18:48 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=DCCPE7r2euKSyBUC8DVFJ0uB3bn50uLLJ1J1YYpZfwY=; b=jgGdMQ0Kq7t1U5JJ7sdZVGI8/iKScCD72zBl7YXlmXFbFx1xcpGqiuwWTfqU9nIeP0 8dq3vHW8xSSk4r3oNiIOZ4JcGFFVxkQBG+EAgi8IlpYeiH/cjljN7JpVTu4c6OG/0oza dyeEeCYnjV53Ggv+xtGqwDOztQXIRgC4b9H0uoq1p//D8lohqv3Q129e8Pk65UYlyAMc tMb3O+f9PDAdGBy0liqrUA5ebSU1SUPgp48yzVxZI6ORXuttM09jpAzuwSxxw5h6nAFv evfFXT6WG9sJDaIQhfHDAVnYfHy2q8OTWzfWDdqYiyxQu2g/I6FHT0+psI5gQDL6GF9g ZWLg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=DCCPE7r2euKSyBUC8DVFJ0uB3bn50uLLJ1J1YYpZfwY=; b=oG/m4uOmlDjOdsE7mFWvyPp7RNgwMNTwNmrHp5btmTuJs85si1KUnRktm2rRkoqzoo 0DPIPBvJ0eso/7BlmUUmGd1uy4odgPt41dYSMvvn6HzSUnwgCFwy41um8TR34ptWZ3XL BlYRlwBTjjXB/8jqfGV7y+VnMdSREJEn/VtODKuTkQHBD0radhAJdHzdCl7ecLIXUHjB 6b73FBSqaPTDubQtzBRw4nh+e4kdsrQA4HEBqDrW25NE0h84aCeWOknYUno8ghgIasDe 25dYuNqjXgkYcj21f2/ZVKTluCxJqH9KBtXDinvIhdFcAguDhzK27DB9SahZlY60mlGl j9ig== X-Gm-Message-State: AO0yUKWldh+YjPEFclvQUUaSp349K5ChU2LGdSzqqdzaQAP4BIwbcFPD KxbD00WXjGVJF48+bt7ZuICHUsDEpzvOAwA8 X-Received: by 2002:a5d:4bc5:0:b0:2c5:579e:1a2c with SMTP id l5-20020a5d4bc5000000b002c5579e1a2cmr7306724wrt.48.1676643526724; Fri, 17 Feb 2023 06:18:46 -0800 (PST) Received: from localhost.localdomain ([81.0.6.76]) by smtp.gmail.com with ESMTPSA id f2-20020adffcc2000000b002c5691f13eesm4511725wrs.50.2023.02.17.06.18.44 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 17 Feb 2023 06:18:46 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, Markus Armbruster , Thomas Huth , qemu-arm@nongnu.org, "Dr . David Alan Gilbert" , =?utf-8?q?Philippe_Mathieu?= =?utf-8?q?-Daud=C3=A9?= , Alistair Francis , "Edgar E. Iglesias" , Peter Maydell , Vikram Garhwal , Francisco Iglesias , Pavel Pisa , Jason Wang , Beniamino Galvani , Strahinja Jankovic , Fabien Chouteau , Frederic Konrad , Subbaraya Sundeep , Jean-Christophe Dubois , Antony Pavlov Subject: [PATCH 2/2] hw/timer: Reduce 'hw/ptimer.h' inclusion Date: Fri, 17 Feb 2023 15:18:32 +0100 Message-Id: <20230217141832.24777-3-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230217141832.24777-1-philmd@linaro.org> References: <20230217141832.24777-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::435; envelope-from=philmd@linaro.org; helo=mail-wr1-x435.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org "hw/ptimer.h" API is mostly used by timer / watchdog device models. Since the SoC / machines only access the ptimer via reference, they don't need its definition: the declartion is enough. On order to reduce the inclusion on the source files, forward-declare 'ptimer_state' in "qemu/typedefs.h". Use the typedef in few place instead of the structure. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- "30 files changed"... but since this is trivial, there is no point in splitting per subsystem IMO. --- hw/display/xlnx_dp.c | 1 + hw/net/can/xlnx-zynqmp-can.c | 1 + hw/net/fsl_etsec/etsec.h | 3 +-- hw/timer/allwinner-a10-pit.c | 1 + hw/timer/arm_mptimer.c | 4 ++-- hw/timer/armv7m_systick.c | 1 + hw/timer/cmsdk-apb-dualtimer.c | 1 + hw/timer/cmsdk-apb-timer.c | 1 + hw/timer/grlib_gptimer.c | 2 +- hw/timer/imx_epit.c | 1 + hw/timer/imx_gpt.c | 1 + hw/timer/mss-timer.c | 1 + hw/watchdog/cmsdk-apb-watchdog.c | 1 + hw/watchdog/wdt_imx2.c | 1 + include/hw/display/xlnx_dp.h | 1 - include/hw/dma/xlnx_csu_dma.h | 1 - include/hw/net/xlnx-zynqmp-can.h | 1 - include/hw/ptimer.h | 1 - include/hw/timer/allwinner-a10-pit.h | 1 - include/hw/timer/arm_mptimer.h | 2 +- include/hw/timer/armv7m_systick.h | 1 - include/hw/timer/cmsdk-apb-dualtimer.h | 3 +-- include/hw/timer/cmsdk-apb-timer.h | 3 +-- include/hw/timer/digic-timer.h | 1 - include/hw/timer/imx_epit.h | 1 - include/hw/timer/imx_gpt.h | 1 - include/hw/timer/mss-timer.h | 1 - include/hw/watchdog/cmsdk-apb-watchdog.h | 3 +-- include/hw/watchdog/wdt_imx2.h | 5 ++--- include/qemu/typedefs.h | 1 + 30 files changed, 22 insertions(+), 25 deletions(-) diff --git a/hw/display/xlnx_dp.c b/hw/display/xlnx_dp.c index b0828d65aa..d3e7696134 100644 --- a/hw/display/xlnx_dp.c +++ b/hw/display/xlnx_dp.c @@ -29,6 +29,7 @@ #include "qemu/module.h" #include "hw/display/xlnx_dp.h" #include "hw/irq.h" +#include "hw/ptimer.h" #include "migration/vmstate.h" #ifndef DEBUG_DP diff --git a/hw/net/can/xlnx-zynqmp-can.c b/hw/net/can/xlnx-zynqmp-can.c index e93e6c5e19..28b9db78d4 100644 --- a/hw/net/can/xlnx-zynqmp-can.c +++ b/hw/net/can/xlnx-zynqmp-can.c @@ -33,6 +33,7 @@ #include "hw/sysbus.h" #include "hw/register.h" #include "hw/irq.h" +#include "hw/ptimer.h" #include "qapi/error.h" #include "qemu/bitops.h" #include "qemu/log.h" diff --git a/hw/net/fsl_etsec/etsec.h b/hw/net/fsl_etsec/etsec.h index 3c625c955c..9321a2f9a0 100644 --- a/hw/net/fsl_etsec/etsec.h +++ b/hw/net/fsl_etsec/etsec.h @@ -27,7 +27,6 @@ #include "hw/sysbus.h" #include "net/net.h" -#include "hw/ptimer.h" #include "qom/object.h" /* Buffer Descriptors */ @@ -142,7 +141,7 @@ struct eTSEC { uint16_t phy_control; /* Polling */ - struct ptimer_state *ptimer; + ptimer_state *ptimer; /* Whether we should flush the rx queue when buffer becomes available. */ bool need_flush; diff --git a/hw/timer/allwinner-a10-pit.c b/hw/timer/allwinner-a10-pit.c index 971f78462a..7cce098508 100644 --- a/hw/timer/allwinner-a10-pit.c +++ b/hw/timer/allwinner-a10-pit.c @@ -17,6 +17,7 @@ #include "qemu/osdep.h" #include "hw/irq.h" +#include "hw/ptimer.h" #include "hw/qdev-properties.h" #include "hw/sysbus.h" #include "hw/timer/allwinner-a10-pit.h" diff --git a/hw/timer/arm_mptimer.c b/hw/timer/arm_mptimer.c index cdfca3000b..104c3d8af8 100644 --- a/hw/timer/arm_mptimer.c +++ b/hw/timer/arm_mptimer.c @@ -65,7 +65,7 @@ static inline uint32_t timerblock_scale(uint32_t control) } /* Must be called within a ptimer transaction block */ -static inline void timerblock_set_count(struct ptimer_state *timer, +static inline void timerblock_set_count(ptimer_state *timer, uint32_t control, uint64_t *count) { /* PTimer would trigger interrupt for periodic timer when counter set @@ -78,7 +78,7 @@ static inline void timerblock_set_count(struct ptimer_state *timer, } /* Must be called within a ptimer transaction block */ -static inline void timerblock_run(struct ptimer_state *timer, +static inline void timerblock_run(ptimer_state *timer, uint32_t control, uint32_t load) { if ((control & 1) && ((control & 0xff00) || load != 0)) { diff --git a/hw/timer/armv7m_systick.c b/hw/timer/armv7m_systick.c index 5dfe39afe3..36fba84f15 100644 --- a/hw/timer/armv7m_systick.c +++ b/hw/timer/armv7m_systick.c @@ -13,6 +13,7 @@ #include "hw/timer/armv7m_systick.h" #include "migration/vmstate.h" #include "hw/irq.h" +#include "hw/ptimer.h" #include "hw/sysbus.h" #include "hw/qdev-clock.h" #include "qemu/timer.h" diff --git a/hw/timer/cmsdk-apb-dualtimer.c b/hw/timer/cmsdk-apb-dualtimer.c index d4a509c798..c967988035 100644 --- a/hw/timer/cmsdk-apb-dualtimer.c +++ b/hw/timer/cmsdk-apb-dualtimer.c @@ -23,6 +23,7 @@ #include "qemu/module.h" #include "hw/sysbus.h" #include "hw/irq.h" +#include "hw/ptimer.h" #include "hw/qdev-properties.h" #include "hw/registerfields.h" #include "hw/qdev-clock.h" diff --git a/hw/timer/cmsdk-apb-timer.c b/hw/timer/cmsdk-apb-timer.c index 68aa1a7636..cce9135eb1 100644 --- a/hw/timer/cmsdk-apb-timer.c +++ b/hw/timer/cmsdk-apb-timer.c @@ -34,6 +34,7 @@ #include "trace.h" #include "hw/sysbus.h" #include "hw/irq.h" +#include "hw/ptimer.h" #include "hw/registerfields.h" #include "hw/qdev-clock.h" #include "hw/timer/cmsdk-apb-timer.h" diff --git a/hw/timer/grlib_gptimer.c b/hw/timer/grlib_gptimer.c index 5c4923c1e0..8347e3047f 100644 --- a/hw/timer/grlib_gptimer.c +++ b/hw/timer/grlib_gptimer.c @@ -61,7 +61,7 @@ OBJECT_DECLARE_SIMPLE_TYPE(GPTimerUnit, GRLIB_GPTIMER) typedef struct GPTimer GPTimer; struct GPTimer { - struct ptimer_state *ptimer; + ptimer_state *ptimer; qemu_irq irq; int id; diff --git a/hw/timer/imx_epit.c b/hw/timer/imx_epit.c index 3a869782bc..6fab1be5cf 100644 --- a/hw/timer/imx_epit.c +++ b/hw/timer/imx_epit.c @@ -17,6 +17,7 @@ #include "hw/timer/imx_epit.h" #include "migration/vmstate.h" #include "hw/irq.h" +#include "hw/ptimer.h" #include "hw/misc/imx_ccm.h" #include "qemu/module.h" #include "qemu/log.h" diff --git a/hw/timer/imx_gpt.c b/hw/timer/imx_gpt.c index 7222b1b387..ab2e13d3a0 100644 --- a/hw/timer/imx_gpt.c +++ b/hw/timer/imx_gpt.c @@ -14,6 +14,7 @@ #include "qemu/osdep.h" #include "hw/irq.h" +#include "hw/ptimer.h" #include "hw/timer/imx_gpt.h" #include "migration/vmstate.h" #include "qemu/module.h" diff --git a/hw/timer/mss-timer.c b/hw/timer/mss-timer.c index ee7438f168..18174d0b8d 100644 --- a/hw/timer/mss-timer.c +++ b/hw/timer/mss-timer.c @@ -27,6 +27,7 @@ #include "qemu/module.h" #include "qemu/log.h" #include "hw/irq.h" +#include "hw/ptimer.h" #include "hw/qdev-properties.h" #include "hw/timer/mss-timer.h" #include "migration/vmstate.h" diff --git a/hw/watchdog/cmsdk-apb-watchdog.c b/hw/watchdog/cmsdk-apb-watchdog.c index 5a2cd46eb7..e30da55101 100644 --- a/hw/watchdog/cmsdk-apb-watchdog.c +++ b/hw/watchdog/cmsdk-apb-watchdog.c @@ -28,6 +28,7 @@ #include "sysemu/watchdog.h" #include "hw/sysbus.h" #include "hw/irq.h" +#include "hw/ptimer.h" #include "hw/qdev-properties.h" #include "hw/registerfields.h" #include "hw/qdev-clock.h" diff --git a/hw/watchdog/wdt_imx2.c b/hw/watchdog/wdt_imx2.c index e776a2fbd4..316a959beb 100644 --- a/hw/watchdog/wdt_imx2.c +++ b/hw/watchdog/wdt_imx2.c @@ -15,6 +15,7 @@ #include "sysemu/watchdog.h" #include "migration/vmstate.h" #include "hw/qdev-properties.h" +#include "hw/ptimer.h" #include "hw/watchdog/wdt_imx2.h" diff --git a/include/hw/display/xlnx_dp.h b/include/hw/display/xlnx_dp.h index e86a87f235..f859da66f9 100644 --- a/include/hw/display/xlnx_dp.h +++ b/include/hw/display/xlnx_dp.h @@ -35,7 +35,6 @@ #include "hw/dma/xlnx_dpdma.h" #include "audio/audio.h" #include "qom/object.h" -#include "hw/ptimer.h" #define AUD_CHBUF_MAX_DEPTH (32 * KiB) #define MAX_QEMU_BUFFER_SIZE (4 * KiB) diff --git a/include/hw/dma/xlnx_csu_dma.h b/include/hw/dma/xlnx_csu_dma.h index 922ab80eb6..2b3a52c58b 100644 --- a/include/hw/dma/xlnx_csu_dma.h +++ b/include/hw/dma/xlnx_csu_dma.h @@ -23,7 +23,6 @@ #include "hw/sysbus.h" #include "hw/register.h" -#include "hw/ptimer.h" #include "hw/stream.h" #define TYPE_XLNX_CSU_DMA "xlnx.csu_dma" diff --git a/include/hw/net/xlnx-zynqmp-can.h b/include/hw/net/xlnx-zynqmp-can.h index fd2aa77760..2cacaf6181 100644 --- a/include/hw/net/xlnx-zynqmp-can.h +++ b/include/hw/net/xlnx-zynqmp-can.h @@ -35,7 +35,6 @@ #include "net/can_emu.h" #include "net/can_host.h" #include "qemu/fifo32.h" -#include "hw/ptimer.h" #include "hw/qdev-clock.h" #define TYPE_XLNX_ZYNQMP_CAN "xlnx.zynqmp-can" diff --git a/include/hw/ptimer.h b/include/hw/ptimer.h index 4dc02b0de4..30b7eac7ad 100644 --- a/include/hw/ptimer.h +++ b/include/hw/ptimer.h @@ -94,7 +94,6 @@ #define PTIMER_POLICY_TRIGGER_ONLY_ON_DECREMENT (1 << 5) /* ptimer.c */ -typedef struct ptimer_state ptimer_state; typedef void (*ptimer_cb)(void *opaque); /** diff --git a/include/hw/timer/allwinner-a10-pit.h b/include/hw/timer/allwinner-a10-pit.h index 8435758ad6..31054b231c 100644 --- a/include/hw/timer/allwinner-a10-pit.h +++ b/include/hw/timer/allwinner-a10-pit.h @@ -1,7 +1,6 @@ #ifndef ALLWINNER_A10_PIT_H #define ALLWINNER_A10_PIT_H -#include "hw/ptimer.h" #include "hw/sysbus.h" #include "qom/object.h" diff --git a/include/hw/timer/arm_mptimer.h b/include/hw/timer/arm_mptimer.h index 65a96e2a0d..339cb9fe4b 100644 --- a/include/hw/timer/arm_mptimer.h +++ b/include/hw/timer/arm_mptimer.h @@ -30,7 +30,7 @@ typedef struct { uint32_t control; uint32_t status; - struct ptimer_state *timer; + ptimer_state *timer; qemu_irq irq; MemoryRegion iomem; } TimerBlock; diff --git a/include/hw/timer/armv7m_systick.h b/include/hw/timer/armv7m_systick.h index ee09b13881..deb1d66a51 100644 --- a/include/hw/timer/armv7m_systick.h +++ b/include/hw/timer/armv7m_systick.h @@ -14,7 +14,6 @@ #include "hw/sysbus.h" #include "qom/object.h" -#include "hw/ptimer.h" #include "hw/clock.h" #define TYPE_SYSTICK "armv7m_systick" diff --git a/include/hw/timer/cmsdk-apb-dualtimer.h b/include/hw/timer/cmsdk-apb-dualtimer.h index f3ec86c00b..5d8450eda1 100644 --- a/include/hw/timer/cmsdk-apb-dualtimer.h +++ b/include/hw/timer/cmsdk-apb-dualtimer.h @@ -27,7 +27,6 @@ #define CMSDK_APB_DUALTIMER_H #include "hw/sysbus.h" -#include "hw/ptimer.h" #include "hw/clock.h" #include "qom/object.h" @@ -38,7 +37,7 @@ OBJECT_DECLARE_SIMPLE_TYPE(CMSDKAPBDualTimer, CMSDK_APB_DUALTIMER) /* One of the two identical timer modules in the dual-timer module */ typedef struct CMSDKAPBDualTimerModule { CMSDKAPBDualTimer *parent; - struct ptimer_state *timer; + ptimer_state *timer; qemu_irq timerint; /* * We must track the guest LOAD and VALUE register state by hand diff --git a/include/hw/timer/cmsdk-apb-timer.h b/include/hw/timer/cmsdk-apb-timer.h index c4c7eae849..b61e254d4d 100644 --- a/include/hw/timer/cmsdk-apb-timer.h +++ b/include/hw/timer/cmsdk-apb-timer.h @@ -14,7 +14,6 @@ #include "hw/qdev-properties.h" #include "hw/sysbus.h" -#include "hw/ptimer.h" #include "hw/clock.h" #include "qom/object.h" @@ -34,7 +33,7 @@ struct CMSDKAPBTimer { /*< public >*/ MemoryRegion iomem; qemu_irq timerint; - struct ptimer_state *timer; + ptimer_state *timer; Clock *pclk; uint32_t ctrl; diff --git a/include/hw/timer/digic-timer.h b/include/hw/timer/digic-timer.h index da82fb4663..6c422a8451 100644 --- a/include/hw/timer/digic-timer.h +++ b/include/hw/timer/digic-timer.h @@ -19,7 +19,6 @@ #define HW_TIMER_DIGIC_TIMER_H #include "hw/sysbus.h" -#include "hw/ptimer.h" #include "qom/object.h" #define TYPE_DIGIC_TIMER "digic-timer" diff --git a/include/hw/timer/imx_epit.h b/include/hw/timer/imx_epit.h index 79aff0cec2..55f2611f79 100644 --- a/include/hw/timer/imx_epit.h +++ b/include/hw/timer/imx_epit.h @@ -30,7 +30,6 @@ #define IMX_EPIT_H #include "hw/sysbus.h" -#include "hw/ptimer.h" #include "hw/misc/imx_ccm.h" #include "qom/object.h" diff --git a/include/hw/timer/imx_gpt.h b/include/hw/timer/imx_gpt.h index 5a1230da35..d5743778e0 100644 --- a/include/hw/timer/imx_gpt.h +++ b/include/hw/timer/imx_gpt.h @@ -30,7 +30,6 @@ #define IMX_GPT_H #include "hw/sysbus.h" -#include "hw/ptimer.h" #include "hw/misc/imx_ccm.h" #include "qom/object.h" diff --git a/include/hw/timer/mss-timer.h b/include/hw/timer/mss-timer.h index da38512904..783cec30e3 100644 --- a/include/hw/timer/mss-timer.h +++ b/include/hw/timer/mss-timer.h @@ -26,7 +26,6 @@ #define HW_MSS_TIMER_H #include "hw/sysbus.h" -#include "hw/ptimer.h" #include "qom/object.h" #define TYPE_MSS_TIMER "mss-timer" diff --git a/include/hw/watchdog/cmsdk-apb-watchdog.h b/include/hw/watchdog/cmsdk-apb-watchdog.h index c6b3e78731..d02bfd0dd7 100644 --- a/include/hw/watchdog/cmsdk-apb-watchdog.h +++ b/include/hw/watchdog/cmsdk-apb-watchdog.h @@ -32,7 +32,6 @@ #define CMSDK_APB_WATCHDOG_H #include "hw/sysbus.h" -#include "hw/ptimer.h" #include "hw/clock.h" #include "qom/object.h" @@ -53,7 +52,7 @@ struct CMSDKAPBWatchdog { MemoryRegion iomem; qemu_irq wdogint; bool is_luminary; - struct ptimer_state *timer; + ptimer_state *timer; Clock *wdogclk; uint32_t control; diff --git a/include/hw/watchdog/wdt_imx2.h b/include/hw/watchdog/wdt_imx2.h index 600a552d2e..d4cddac352 100644 --- a/include/hw/watchdog/wdt_imx2.h +++ b/include/hw/watchdog/wdt_imx2.h @@ -15,7 +15,6 @@ #include "qemu/bitops.h" #include "hw/sysbus.h" #include "hw/irq.h" -#include "hw/ptimer.h" #include "qom/object.h" #define TYPE_IMX2_WDT "imx2.wdt" @@ -71,8 +70,8 @@ struct IMX2WdtState { MemoryRegion mmio; qemu_irq irq; - struct ptimer_state *timer; - struct ptimer_state *itimer; + ptimer_state *timer; + ptimer_state *itimer; bool pretimeout_support; bool wicr_locked; diff --git a/include/qemu/typedefs.h b/include/qemu/typedefs.h index df4b55ac65..effcba4bca 100644 --- a/include/qemu/typedefs.h +++ b/include/qemu/typedefs.h @@ -104,6 +104,7 @@ typedef struct PICCommonState PICCommonState; typedef struct PostcopyDiscardState PostcopyDiscardState; typedef struct Property Property; typedef struct PropertyInfo PropertyInfo; +typedef struct ptimer_state ptimer_state; typedef struct QBool QBool; typedef struct QDict QDict; typedef struct QEMUBH QEMUBH; From patchwork Fri Feb 17 21:58:36 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 654424 Delivered-To: patch@linaro.org Received: by 2002:adf:9bcd:0:0:0:0:0 with SMTP id e13csp170660wrc; Fri, 17 Feb 2023 14:01:03 -0800 (PST) X-Google-Smtp-Source: AK7set9qzFY1+Vc1EEPX+bTIE/bNmdccUPp7SI4W3PxlqMWEzQKVoP4gQadfiGx/+/cruLCAyliT X-Received: by 2002:ac8:5b4d:0:b0:3b6:9817:18e4 with SMTP id n13-20020ac85b4d000000b003b6981718e4mr2642049qtw.49.1676671263281; Fri, 17 Feb 2023 14:01:03 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1676671263; cv=none; d=google.com; s=arc-20160816; b=mj3+a2VTsWAqvC4kaKere5LPVP8pxl0hfDwSKJQzYDDjaaf8WpH8Cj3N7nVzDE2zR0 d3AY0cF/K2ADtsMnby3xd3m+Kq3HiQF349QPcOhjYVMKtomoKQjzmQMEHYehncXls+2d /GvxLC4nDH7H8jWQKbkuPIbHKdX5txfg7ah2cHMxu2lAz9wPJG2raePBwNKNJHqWyzj2 mnUQXVQUWGaUkuiHIxETrWTkApnTU/1UbTLgfI3Iajq8moQrqj0aAwolw7jRSYDsT2J5 h9U1YEYvBNPprBKlR05Wil1eSrJHRQUyaMshBJ7opxlSMD+bDfUKEjVCSCw9izyEWWdS zhpg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=i+w+Dcsqbsw/jsO7u1Bm2nAId84YIJDMk2FJbPBfsoU=; b=lfw+zEZDgOsspf21xpGk8SamsqmphQhxAy10CaniS+5OCLf96f3AibvBL5U/h7xdRD TLXpAiMQuC1UoKaABwYUP9cJhFQl4XuiXj85c2YzQcvEekxLmPRk3z1ztENJge1oBDTJ sufyuYSEmuf58z6VmfDQvzr6dB9ppY1ZfiAFFQcoe6fdswCeiSIrzA3tqXgP2gvKDSZr ipGXRGGR/Qll65YVJhCXoab2TrmHlf+lyC54ljIYTPqNCyZilbayBv7Y/ovCgyHyZGhU CUTaCM8wAnjN+8YQNk4QXLuFppfTVf6ixbmEAMo9PO0kwTUerpHqiKFBi5NXzvtjp1BP vj1Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=vArJ3BEN; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id n13-20020a05622a11cd00b003b9b6d54068si4464303qtk.590.2023.02.17.14.01.03 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Fri, 17 Feb 2023 14:01:03 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=vArJ3BEN; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pT8lf-0004dc-5O; Fri, 17 Feb 2023 16:59:47 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pT8lc-0004ce-IW for qemu-devel@nongnu.org; Fri, 17 Feb 2023 16:59:44 -0500 Received: from mail-wm1-x336.google.com ([2a00:1450:4864:20::336]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pT8lZ-0000Tr-4W for qemu-devel@nongnu.org; Fri, 17 Feb 2023 16:59:44 -0500 Received: by mail-wm1-x336.google.com with SMTP id ja15-20020a05600c556f00b003dc52fed235so1806461wmb.1 for ; Fri, 17 Feb 2023 13:59:39 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=i+w+Dcsqbsw/jsO7u1Bm2nAId84YIJDMk2FJbPBfsoU=; b=vArJ3BENvA//jLHEl/1JHS684jxNLsw6fGkmB0wHYCIoTrxxb/c4u5qCqk0LOuqHRI BnHv0USqvfktxa+IGDt9Xtei6kUlkTygMp3FuPnjgEz1j2P+bKaqs1TmajzVDLqoeCg+ OMXkR1DaWCri+IIknrTcyIBIh4Bv6STuTCAUbQv2jP4Zf+eho5G01EuXhuN6mPAUmVD9 yMW9azwbwSkfyYy3GTy2CVkgxgfBkfUc214gTB9KGWrAfBo/fXp9e4eZgawMSHCh0/jD dchu4JpTk5IY+HChe/NKr0CT9cQgG8ohNHfl0/wrfqPIEDg8lXtlI/fx7VpWRBtpRr+Z oeMw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=i+w+Dcsqbsw/jsO7u1Bm2nAId84YIJDMk2FJbPBfsoU=; b=W1fRCJ2RM/z0UfJxmtgsllpkglso4neYYMJJG1brrz4u+691N4n58VOb7y80Ga3IQg M0sOXcpBwIG+l5TWy0cxaz/Z4LjD36HuDUs6jZfpGKRVmVx866XKZrbhfJ+CTxK+zON8 +t/weCPwuZS9irBChvLcqF3uSSsRF7WzxMD3TUr8kwDsYpQvpliqzpfSTeb1henaJrWA ROgzrXvBufMybwq87wCeEq9kr44nd9Qa0aIHY9DXr4e3GH6zwCEOswl6h6vKZlRP99ZL nNeEFEnhqnzpsbX8kE7r31Lqywuo1I9Q3cJXwFIXtk9npg4IaZTLB3BV9WuN4aITZ60n zZkg== X-Gm-Message-State: AO0yUKXDLYaMyaN3v2hT1kpIcbNJVc61aertGZYiWQZo9EJBNua3TweW C99qgodfUy1rqJr7NAjz0npoFH/h9M3MMfti X-Received: by 2002:a05:600c:2b46:b0:3e0:1ab:cf2a with SMTP id e6-20020a05600c2b4600b003e001abcf2amr1581683wmf.39.1676671178021; Fri, 17 Feb 2023 13:59:38 -0800 (PST) Received: from localhost.localdomain (201.red-88-29-176.dynamicip.rima-tde.net. [88.29.176.201]) by smtp.gmail.com with ESMTPSA id b4-20020a05600c4e0400b003d1d5a83b2esm2713746wmq.35.2023.02.17.13.59.12 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 17 Feb 2023 13:59:37 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Markus Armbruster , Peter Maydell , qemu-arm@nongnu.org, Jan Kiszka , Vikram Garhwal , Alistair Francis , qemu-ppc@nongnu.org, Subbaraya Sundeep , Thomas Huth , Francisco Iglesias , Fabien Chouteau , Yoshinori Sato , Jason Wang , Beniamino Galvani , Thomas Huth , Mark Cave-Ayland , Strahinja Jankovic , Jean-Christophe Dubois , Antony Pavlov , "Edgar E. Iglesias" , Igor Mitsyanko , Magnus Damm , Frederic Konrad , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= Subject: [PATCH 3/2] hw/timer: Rename ptimer_state -> PTimer Date: Fri, 17 Feb 2023 22:58:36 +0100 Message-Id: <20230217215836.40328-1-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230217141832.24777-1-philmd@linaro.org> References: <20230217141832.24777-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::336; envelope-from=philmd@linaro.org; helo=mail-wm1-x336.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Remove a pointless cast in ptimer_tick() and rename 'ptimer_state' as 'PTimer' to follow the Structure naming convention. See docs/devel/style.rst: Variables are lower_case_with_underscores; easy to type and read. Structured type names are in CamelCase; harder to type but standing out. Enum type names and function type names should also be in CamelCase. Scalar type names are lower_case_with_underscores_ending_with_a_t, like the POSIX uint64_t and family. Mechanical change doing: $ sed -i -e s/ptimer_state/PTimer/g \ $(git grep -l ptimer_state) Suggested-by: Thomas Huth Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Thomas Huth --- hw/arm/musicpal.c | 2 +- hw/core/ptimer.c | 56 ++++++++++++------------ hw/dma/xilinx_axidma.c | 2 +- hw/m68k/mcf5206.c | 2 +- hw/m68k/mcf5208.c | 2 +- hw/net/fsl_etsec/etsec.h | 2 +- hw/net/lan9118.c | 2 +- hw/rtc/exynos4210_rtc.c | 4 +- hw/timer/altera_timer.c | 2 +- hw/timer/arm_mptimer.c | 4 +- hw/timer/arm_timer.c | 2 +- hw/timer/etraxfs_timer.c | 8 ++-- hw/timer/exynos4210_mct.c | 8 ++-- hw/timer/exynos4210_pwm.c | 2 +- hw/timer/grlib_gptimer.c | 2 +- hw/timer/sh_timer.c | 2 +- hw/timer/slavio_timer.c | 2 +- hw/timer/xilinx_timer.c | 2 +- include/hw/display/xlnx_dp.h | 2 +- include/hw/dma/xlnx_csu_dma.h | 2 +- include/hw/net/xlnx-zynqmp-can.h | 2 +- include/hw/ptimer.h | 34 +++++++------- include/hw/timer/allwinner-a10-pit.h | 2 +- include/hw/timer/arm_mptimer.h | 2 +- include/hw/timer/armv7m_systick.h | 2 +- include/hw/timer/cmsdk-apb-dualtimer.h | 2 +- include/hw/timer/cmsdk-apb-timer.h | 2 +- include/hw/timer/digic-timer.h | 2 +- include/hw/timer/imx_epit.h | 4 +- include/hw/timer/imx_gpt.h | 2 +- include/hw/timer/mss-timer.h | 2 +- include/hw/watchdog/cmsdk-apb-watchdog.h | 2 +- include/hw/watchdog/wdt_imx2.h | 4 +- include/qemu/typedefs.h | 2 +- tests/unit/ptimer-test.c | 22 +++++----- 35 files changed, 98 insertions(+), 98 deletions(-) diff --git a/hw/arm/musicpal.c b/hw/arm/musicpal.c index 89b66606c3..63e0bbda95 100644 --- a/hw/arm/musicpal.c +++ b/hw/arm/musicpal.c @@ -435,7 +435,7 @@ static const TypeInfo mv88w8618_pic_info = { #define MP_BOARD_RESET_MAGIC 0x10000 typedef struct mv88w8618_timer_state { - ptimer_state *ptimer; + PTimer *ptimer; uint32_t limit; int freq; qemu_irq irq; diff --git a/hw/core/ptimer.c b/hw/core/ptimer.c index eb5ba1aff7..3ff49a0a04 100644 --- a/hw/core/ptimer.c +++ b/hw/core/ptimer.c @@ -19,7 +19,7 @@ #define DELTA_ADJUST 1 #define DELTA_NO_ADJUST -1 -struct ptimer_state +struct PTimer { uint8_t enabled; /* 0 = disabled, 1 = periodic, 2 = oneshot. */ uint64_t limit; @@ -43,12 +43,12 @@ struct ptimer_state }; /* Use a bottom-half routine to avoid reentrancy issues. */ -static void ptimer_trigger(ptimer_state *s) +static void ptimer_trigger(PTimer *s) { s->callback(s->callback_opaque); } -static void ptimer_reload(ptimer_state *s, int delta_adjust) +static void ptimer_reload(PTimer *s, int delta_adjust) { uint32_t period_frac; uint64_t period; @@ -73,7 +73,7 @@ static void ptimer_reload(ptimer_state *s, int delta_adjust) /* * Note that ptimer_trigger() might call the device callback function, * which can then modify timer state, so we must not cache any fields - * from ptimer_state until after we have called it. + * from PTimer state until after we have called it. */ delta = s->delta; period = s->period; @@ -154,7 +154,7 @@ static void ptimer_reload(ptimer_state *s, int delta_adjust) static void ptimer_tick(void *opaque) { - ptimer_state *s = (ptimer_state *)opaque; + PTimer *s = opaque; bool trigger = true; /* @@ -198,7 +198,7 @@ static void ptimer_tick(void *opaque) ptimer_transaction_commit(s); } -uint64_t ptimer_get_count(ptimer_state *s) +uint64_t ptimer_get_count(PTimer *s) { uint64_t counter; @@ -294,7 +294,7 @@ uint64_t ptimer_get_count(ptimer_state *s) return counter; } -void ptimer_set_count(ptimer_state *s, uint64_t count) +void ptimer_set_count(PTimer *s, uint64_t count) { assert(s->in_transaction); s->delta = count; @@ -303,7 +303,7 @@ void ptimer_set_count(ptimer_state *s, uint64_t count) } } -void ptimer_run(ptimer_state *s, int oneshot) +void ptimer_run(PTimer *s, int oneshot) { bool was_disabled = !s->enabled; @@ -323,7 +323,7 @@ void ptimer_run(ptimer_state *s, int oneshot) /* Pause a timer. Note that this may cause it to "lose" time, even if it is immediately restarted. */ -void ptimer_stop(ptimer_state *s) +void ptimer_stop(PTimer *s) { assert(s->in_transaction); @@ -337,7 +337,7 @@ void ptimer_stop(ptimer_state *s) } /* Set counter increment interval in nanoseconds. */ -void ptimer_set_period(ptimer_state *s, int64_t period) +void ptimer_set_period(PTimer *s, int64_t period) { assert(s->in_transaction); s->delta = ptimer_get_count(s); @@ -349,7 +349,7 @@ void ptimer_set_period(ptimer_state *s, int64_t period) } /* Set counter increment interval from a Clock */ -void ptimer_set_period_from_clock(ptimer_state *s, const Clock *clk, +void ptimer_set_period_from_clock(PTimer *s, const Clock *clk, unsigned int divisor) { /* @@ -382,7 +382,7 @@ void ptimer_set_period_from_clock(ptimer_state *s, const Clock *clk, } /* Set counter frequency in Hz. */ -void ptimer_set_freq(ptimer_state *s, uint32_t freq) +void ptimer_set_freq(PTimer *s, uint32_t freq) { assert(s->in_transaction); s->delta = ptimer_get_count(s); @@ -395,7 +395,7 @@ void ptimer_set_freq(ptimer_state *s, uint32_t freq) /* Set the initial countdown value. If reload is nonzero then also set count = limit. */ -void ptimer_set_limit(ptimer_state *s, uint64_t limit, int reload) +void ptimer_set_limit(PTimer *s, uint64_t limit, int reload) { assert(s->in_transaction); s->limit = limit; @@ -406,19 +406,19 @@ void ptimer_set_limit(ptimer_state *s, uint64_t limit, int reload) } } -uint64_t ptimer_get_limit(ptimer_state *s) +uint64_t ptimer_get_limit(PTimer *s) { return s->limit; } -void ptimer_transaction_begin(ptimer_state *s) +void ptimer_transaction_begin(PTimer *s) { assert(!s->in_transaction); s->in_transaction = true; s->need_reload = false; } -void ptimer_transaction_commit(ptimer_state *s) +void ptimer_transaction_commit(PTimer *s) { assert(s->in_transaction); /* @@ -442,27 +442,27 @@ const VMStateDescription vmstate_ptimer = { .version_id = 1, .minimum_version_id = 1, .fields = (VMStateField[]) { - VMSTATE_UINT8(enabled, ptimer_state), - VMSTATE_UINT64(limit, ptimer_state), - VMSTATE_UINT64(delta, ptimer_state), - VMSTATE_UINT32(period_frac, ptimer_state), - VMSTATE_INT64(period, ptimer_state), - VMSTATE_INT64(last_event, ptimer_state), - VMSTATE_INT64(next_event, ptimer_state), - VMSTATE_TIMER_PTR(timer, ptimer_state), + VMSTATE_UINT8(enabled, PTimer), + VMSTATE_UINT64(limit, PTimer), + VMSTATE_UINT64(delta, PTimer), + VMSTATE_UINT32(period_frac, PTimer), + VMSTATE_INT64(period, PTimer), + VMSTATE_INT64(last_event, PTimer), + VMSTATE_INT64(next_event, PTimer), + VMSTATE_TIMER_PTR(timer, PTimer), VMSTATE_END_OF_LIST() } }; -ptimer_state *ptimer_init(ptimer_cb callback, void *callback_opaque, +PTimer *ptimer_init(ptimer_cb callback, void *callback_opaque, uint8_t policy_mask) { - ptimer_state *s; + PTimer *s; /* The callback function is mandatory. */ assert(callback); - s = g_new0(ptimer_state, 1); + s = g_new0(PTimer, 1); s->timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, ptimer_tick, s); s->policy_mask = policy_mask; s->callback = callback; @@ -478,7 +478,7 @@ ptimer_state *ptimer_init(ptimer_cb callback, void *callback_opaque, return s; } -void ptimer_free(ptimer_state *s) +void ptimer_free(PTimer *s) { timer_free(s->timer); g_free(s); diff --git a/hw/dma/xilinx_axidma.c b/hw/dma/xilinx_axidma.c index 6030c76435..5710192da3 100644 --- a/hw/dma/xilinx_axidma.c +++ b/hw/dma/xilinx_axidma.c @@ -102,7 +102,7 @@ enum { struct Stream { struct XilinxAXIDMA *dma; - ptimer_state *ptimer; + PTimer *ptimer; qemu_irq irq; int nr; diff --git a/hw/m68k/mcf5206.c b/hw/m68k/mcf5206.c index 2ab1b4f059..61ed70f2b1 100644 --- a/hw/m68k/mcf5206.c +++ b/hw/m68k/mcf5206.c @@ -24,7 +24,7 @@ typedef struct { uint16_t trr; uint16_t tcr; uint16_t ter; - ptimer_state *timer; + PTimer *timer; qemu_irq irq; int irq_state; } m5206_timer_state; diff --git a/hw/m68k/mcf5208.c b/hw/m68k/mcf5208.c index be1033f84f..006a1ee5c5 100644 --- a/hw/m68k/mcf5208.c +++ b/hw/m68k/mcf5208.c @@ -43,7 +43,7 @@ typedef struct { MemoryRegion iomem; qemu_irq irq; - ptimer_state *timer; + PTimer *timer; uint16_t pcsr; uint16_t pmr; uint16_t pcntr; diff --git a/hw/net/fsl_etsec/etsec.h b/hw/net/fsl_etsec/etsec.h index 9321a2f9a0..947dd063d8 100644 --- a/hw/net/fsl_etsec/etsec.h +++ b/hw/net/fsl_etsec/etsec.h @@ -141,7 +141,7 @@ struct eTSEC { uint16_t phy_control; /* Polling */ - ptimer_state *ptimer; + PTimer *ptimer; /* Whether we should flush the rx queue when buffer becomes available. */ bool need_flush; diff --git a/hw/net/lan9118.c b/hw/net/lan9118.c index f1cba55967..6356ab49d5 100644 --- a/hw/net/lan9118.c +++ b/hw/net/lan9118.c @@ -201,7 +201,7 @@ struct lan9118_state { NICConf conf; qemu_irq irq; MemoryRegion mmio; - ptimer_state *timer; + PTimer *timer; uint32_t irq_cfg; uint32_t int_sts; diff --git a/hw/rtc/exynos4210_rtc.c b/hw/rtc/exynos4210_rtc.c index 2b8a38a296..95a44be7a8 100644 --- a/hw/rtc/exynos4210_rtc.c +++ b/hw/rtc/exynos4210_rtc.c @@ -105,8 +105,8 @@ struct Exynos4210RTCState { uint32_t reg_almyear; uint32_t reg_curticcnt; - ptimer_state *ptimer; /* tick timer */ - ptimer_state *ptimer_1Hz; /* clock timer */ + PTimer *ptimer; /* tick timer */ + PTimer *ptimer_1Hz; /* clock timer */ uint32_t freq; qemu_irq tick_irq; /* Time Tick Generator irq */ diff --git a/hw/timer/altera_timer.c b/hw/timer/altera_timer.c index 0f1f54206a..5f2e411358 100644 --- a/hw/timer/altera_timer.c +++ b/hw/timer/altera_timer.c @@ -52,7 +52,7 @@ struct AlteraTimer { MemoryRegion mmio; qemu_irq irq; uint32_t freq_hz; - ptimer_state *ptimer; + PTimer *ptimer; uint32_t regs[R_MAX]; }; diff --git a/hw/timer/arm_mptimer.c b/hw/timer/arm_mptimer.c index 104c3d8af8..124eb43215 100644 --- a/hw/timer/arm_mptimer.c +++ b/hw/timer/arm_mptimer.c @@ -65,7 +65,7 @@ static inline uint32_t timerblock_scale(uint32_t control) } /* Must be called within a ptimer transaction block */ -static inline void timerblock_set_count(ptimer_state *timer, +static inline void timerblock_set_count(PTimer *timer, uint32_t control, uint64_t *count) { /* PTimer would trigger interrupt for periodic timer when counter set @@ -78,7 +78,7 @@ static inline void timerblock_set_count(ptimer_state *timer, } /* Must be called within a ptimer transaction block */ -static inline void timerblock_run(ptimer_state *timer, +static inline void timerblock_run(PTimer *timer, uint32_t control, uint32_t load) { if ((control & 1) && ((control & 0xff00) || load != 0)) { diff --git a/hw/timer/arm_timer.c b/hw/timer/arm_timer.c index 69c8863472..06063a8fb1 100644 --- a/hw/timer/arm_timer.c +++ b/hw/timer/arm_timer.c @@ -30,7 +30,7 @@ #define TIMER_CTRL_ENABLE (1 << 7) typedef struct { - ptimer_state *timer; + PTimer *timer; uint32_t control; uint32_t limit; int freq; diff --git a/hw/timer/etraxfs_timer.c b/hw/timer/etraxfs_timer.c index 2d6d92ef93..e3c8eb51d6 100644 --- a/hw/timer/etraxfs_timer.c +++ b/hw/timer/etraxfs_timer.c @@ -61,9 +61,9 @@ struct ETRAXTimerState { qemu_irq irq; qemu_irq nmi; - ptimer_state *ptimer_t0; - ptimer_state *ptimer_t1; - ptimer_state *ptimer_wd; + PTimer *ptimer_t0; + PTimer *ptimer_t1; + PTimer *ptimer_wd; uint32_t wd_hits; @@ -151,7 +151,7 @@ static void update_ctrl(ETRAXTimerState *t, int tnum) unsigned int div; uint32_t ctrl; - ptimer_state *timer; + PTimer *timer; if (tnum == 0) { ctrl = t->rw_tmr0_ctrl; diff --git a/hw/timer/exynos4210_mct.c b/hw/timer/exynos4210_mct.c index c17b247da3..53206d697f 100644 --- a/hw/timer/exynos4210_mct.c +++ b/hw/timer/exynos4210_mct.c @@ -201,7 +201,7 @@ typedef struct { uint64_t count; /* Value FRC was armed with */ int32_t curr_comp; /* Current comparator FRC is running to */ - ptimer_state *ptimer_frc; /* FRC timer */ + PTimer *ptimer_frc; /* FRC timer */ } Exynos4210MCTGT; @@ -224,12 +224,12 @@ typedef struct { uint64_t progress; /* progress when counting by steps */ uint64_t count; /* count to arm timer with */ - ptimer_state *ptimer_tick; /* timer for tick counter */ + PTimer *ptimer_tick; /* timer for tick counter */ } tick_timer; /* use ptimer.c to represent count down timer */ - ptimer_state *ptimer_frc; /* timer for free running counter */ + PTimer *ptimer_frc; /* timer for free running counter */ /* registers */ struct lregs { @@ -981,7 +981,7 @@ static void exynos4210_ltick_event(void *opaque) exynos4210_ltick_int_start(&s->tick_timer); } -static void tx_ptimer_set_freq(ptimer_state *s, uint32_t freq) +static void tx_ptimer_set_freq(PTimer *s, uint32_t freq) { /* * callers of exynos4210_mct_update_freq() never do anything diff --git a/hw/timer/exynos4210_pwm.c b/hw/timer/exynos4210_pwm.c index 3528d0f33a..4895a7770f 100644 --- a/hw/timer/exynos4210_pwm.c +++ b/hw/timer/exynos4210_pwm.c @@ -92,7 +92,7 @@ typedef struct { uint32_t freq; /* timer frequency */ /* use ptimer.c to represent count down timer */ - ptimer_state *ptimer; /* timer */ + PTimer *ptimer; /* timer */ /* registers */ uint32_t reg_tcntb; /* counter register buffer */ diff --git a/hw/timer/grlib_gptimer.c b/hw/timer/grlib_gptimer.c index 8347e3047f..50963def2e 100644 --- a/hw/timer/grlib_gptimer.c +++ b/hw/timer/grlib_gptimer.c @@ -61,7 +61,7 @@ OBJECT_DECLARE_SIMPLE_TYPE(GPTimerUnit, GRLIB_GPTIMER) typedef struct GPTimer GPTimer; struct GPTimer { - ptimer_state *ptimer; + PTimer *ptimer; qemu_irq irq; int id; diff --git a/hw/timer/sh_timer.c b/hw/timer/sh_timer.c index 7788939766..713151b9a0 100644 --- a/hw/timer/sh_timer.c +++ b/hw/timer/sh_timer.c @@ -34,7 +34,7 @@ #define OFFSET_TCPR 3 typedef struct { - ptimer_state *timer; + PTimer *timer; uint32_t tcnt; uint32_t tcor; uint32_t tcr; diff --git a/hw/timer/slavio_timer.c b/hw/timer/slavio_timer.c index 8c4f6eb06b..569d590e4e 100644 --- a/hw/timer/slavio_timer.c +++ b/hw/timer/slavio_timer.c @@ -52,7 +52,7 @@ typedef struct CPUTimerState { qemu_irq irq; - ptimer_state *timer; + PTimer *timer; uint32_t count, counthigh, reached; /* processor only */ uint32_t run; diff --git a/hw/timer/xilinx_timer.c b/hw/timer/xilinx_timer.c index 32a9df69e0..359c1fad6e 100644 --- a/hw/timer/xilinx_timer.c +++ b/hw/timer/xilinx_timer.c @@ -52,7 +52,7 @@ struct xlx_timer { - ptimer_state *ptimer; + PTimer *ptimer; void *parent; int nr; /* for debug. */ diff --git a/include/hw/display/xlnx_dp.h b/include/hw/display/xlnx_dp.h index f859da66f9..e50c955700 100644 --- a/include/hw/display/xlnx_dp.h +++ b/include/hw/display/xlnx_dp.h @@ -108,7 +108,7 @@ struct XlnxDPState { DPCDState *dpcd; I2CDDCState *edid; - ptimer_state *vblank; + PTimer *vblank; }; #define TYPE_XLNX_DP "xlnx.v-dp" diff --git a/include/hw/dma/xlnx_csu_dma.h b/include/hw/dma/xlnx_csu_dma.h index 2b3a52c58b..84a7aac892 100644 --- a/include/hw/dma/xlnx_csu_dma.h +++ b/include/hw/dma/xlnx_csu_dma.h @@ -37,7 +37,7 @@ typedef struct XlnxCSUDMA { AddressSpace dma_as; qemu_irq irq; StreamSink *tx_dev; /* Used as generic StreamSink */ - ptimer_state *src_timer; + PTimer *src_timer; uint16_t width; bool is_dst; diff --git a/include/hw/net/xlnx-zynqmp-can.h b/include/hw/net/xlnx-zynqmp-can.h index 2cacaf6181..88eb849d8d 100644 --- a/include/hw/net/xlnx-zynqmp-can.h +++ b/include/hw/net/xlnx-zynqmp-can.h @@ -72,7 +72,7 @@ typedef struct XlnxZynqMPCANState { Fifo32 tx_fifo; Fifo32 txhpb_fifo; - ptimer_state *can_timer; + PTimer *can_timer; } XlnxZynqMPCANState; #endif diff --git a/include/hw/ptimer.h b/include/hw/ptimer.h index 30b7eac7ad..baa38aa987 100644 --- a/include/hw/ptimer.h +++ b/include/hw/ptimer.h @@ -124,9 +124,9 @@ typedef void (*ptimer_cb)(void *opaque); * the ptimer state such that another ptimer expiry is triggered, then * the callback will be called a second time after the first call returns. */ -ptimer_state *ptimer_init(ptimer_cb callback, - void *callback_opaque, - uint8_t policy_mask); +PTimer *ptimer_init(ptimer_cb callback, + void *callback_opaque, + uint8_t policy_mask); /** * ptimer_free - Free a ptimer @@ -134,7 +134,7 @@ ptimer_state *ptimer_init(ptimer_cb callback, * * Free a ptimer created using ptimer_init(). */ -void ptimer_free(ptimer_state *s); +void ptimer_free(PTimer *s); /** * ptimer_transaction_begin() - Start a ptimer modification transaction @@ -146,7 +146,7 @@ void ptimer_free(ptimer_state *s); * It is an error to call this function for a BH-based ptimer; * attempting to do this will trigger an assert. */ -void ptimer_transaction_begin(ptimer_state *s); +void ptimer_transaction_begin(PTimer *s); /** * ptimer_transaction_commit() - Commit a ptimer modification transaction @@ -156,7 +156,7 @@ void ptimer_transaction_begin(ptimer_state *s); * ptimer state now means that we should trigger the timer expiry * callback, it will be called directly. */ -void ptimer_transaction_commit(ptimer_state *s); +void ptimer_transaction_commit(PTimer *s); /** * ptimer_set_period - Set counter increment interval in nanoseconds @@ -170,7 +170,7 @@ void ptimer_transaction_commit(ptimer_state *s); * This function will assert if it is called outside a * ptimer_transaction_begin/commit block. */ -void ptimer_set_period(ptimer_state *s, int64_t period); +void ptimer_set_period(PTimer *s, int64_t period); /** * ptimer_set_period_from_clock - Set counter increment from a Clock @@ -191,7 +191,7 @@ void ptimer_set_period(ptimer_state *s, int64_t period); * This function will assert if it is called outside a * ptimer_transaction_begin/commit block. */ -void ptimer_set_period_from_clock(ptimer_state *s, const Clock *clock, +void ptimer_set_period_from_clock(PTimer *s, const Clock *clock, unsigned int divisor); /** @@ -208,7 +208,7 @@ void ptimer_set_period_from_clock(ptimer_state *s, const Clock *clock, * This function will assert if it is called outside a * ptimer_transaction_begin/commit block. */ -void ptimer_set_freq(ptimer_state *s, uint32_t freq); +void ptimer_set_freq(PTimer *s, uint32_t freq); /** * ptimer_get_limit - Get the configured limit of the ptimer @@ -223,7 +223,7 @@ void ptimer_set_freq(ptimer_state *s, uint32_t freq); * and set limit functions rather than needing to also track it * in their own state structure. */ -uint64_t ptimer_get_limit(ptimer_state *s); +uint64_t ptimer_get_limit(PTimer *s); /** * ptimer_set_limit - Set the limit of the ptimer @@ -238,7 +238,7 @@ uint64_t ptimer_get_limit(ptimer_state *s); * This function will assert if it is called outside a * ptimer_transaction_begin/commit block. */ -void ptimer_set_limit(ptimer_state *s, uint64_t limit, int reload); +void ptimer_set_limit(PTimer *s, uint64_t limit, int reload); /** * ptimer_get_count - Get the current value of the ptimer @@ -248,7 +248,7 @@ void ptimer_set_limit(ptimer_state *s, uint64_t limit, int reload); * return the correct value whether the counter is enabled or * disabled. */ -uint64_t ptimer_get_count(ptimer_state *s); +uint64_t ptimer_get_count(PTimer *s); /** * ptimer_set_count - Set the current value of the ptimer @@ -262,7 +262,7 @@ uint64_t ptimer_get_count(ptimer_state *s); * This function will assert if it is called outside a * ptimer_transaction_begin/commit block. */ -void ptimer_set_count(ptimer_state *s, uint64_t count); +void ptimer_set_count(PTimer *s, uint64_t count); /** * ptimer_run - Start a ptimer counting @@ -279,7 +279,7 @@ void ptimer_set_count(ptimer_state *s, uint64_t count); * This function will assert if it is called outside a * ptimer_transaction_begin/commit block. */ -void ptimer_run(ptimer_state *s, int oneshot); +void ptimer_run(PTimer *s, int oneshot); /** * ptimer_stop - Stop a ptimer counting @@ -294,15 +294,15 @@ void ptimer_run(ptimer_state *s, int oneshot); * This function will assert if it is called outside a * ptimer_transaction_begin/commit block. */ -void ptimer_stop(ptimer_state *s); +void ptimer_stop(PTimer *s); extern const VMStateDescription vmstate_ptimer; #define VMSTATE_PTIMER(_field, _state) \ - VMSTATE_STRUCT_POINTER_V(_field, _state, 1, vmstate_ptimer, ptimer_state) + VMSTATE_STRUCT_POINTER_V(_field, _state, 1, vmstate_ptimer, PTimer) #define VMSTATE_PTIMER_ARRAY(_f, _s, _n) \ VMSTATE_ARRAY_OF_POINTER_TO_STRUCT(_f, _s, _n, 0, \ - vmstate_ptimer, ptimer_state) + vmstate_ptimer, PTimer) #endif diff --git a/include/hw/timer/allwinner-a10-pit.h b/include/hw/timer/allwinner-a10-pit.h index 31054b231c..939fb103c8 100644 --- a/include/hw/timer/allwinner-a10-pit.h +++ b/include/hw/timer/allwinner-a10-pit.h @@ -47,7 +47,7 @@ struct AwA10PITState { SysBusDevice parent_obj; /*< public >*/ qemu_irq irq[AW_A10_PIT_TIMER_NR]; - ptimer_state * timer[AW_A10_PIT_TIMER_NR]; + PTimer *timer[AW_A10_PIT_TIMER_NR]; AwA10TimerContext timer_context[AW_A10_PIT_TIMER_NR]; MemoryRegion iomem; uint32_t clk_freq[4]; diff --git a/include/hw/timer/arm_mptimer.h b/include/hw/timer/arm_mptimer.h index 339cb9fe4b..174fbe6c88 100644 --- a/include/hw/timer/arm_mptimer.h +++ b/include/hw/timer/arm_mptimer.h @@ -30,7 +30,7 @@ typedef struct { uint32_t control; uint32_t status; - ptimer_state *timer; + PTimer *timer; qemu_irq irq; MemoryRegion iomem; } TimerBlock; diff --git a/include/hw/timer/armv7m_systick.h b/include/hw/timer/armv7m_systick.h index deb1d66a51..074efb5fb2 100644 --- a/include/hw/timer/armv7m_systick.h +++ b/include/hw/timer/armv7m_systick.h @@ -39,7 +39,7 @@ struct SysTickState { uint32_t control; uint32_t reload; int64_t tick; - ptimer_state *ptimer; + PTimer *ptimer; MemoryRegion iomem; qemu_irq irq; Clock *refclk; diff --git a/include/hw/timer/cmsdk-apb-dualtimer.h b/include/hw/timer/cmsdk-apb-dualtimer.h index 5d8450eda1..1bab7e7961 100644 --- a/include/hw/timer/cmsdk-apb-dualtimer.h +++ b/include/hw/timer/cmsdk-apb-dualtimer.h @@ -37,7 +37,7 @@ OBJECT_DECLARE_SIMPLE_TYPE(CMSDKAPBDualTimer, CMSDK_APB_DUALTIMER) /* One of the two identical timer modules in the dual-timer module */ typedef struct CMSDKAPBDualTimerModule { CMSDKAPBDualTimer *parent; - ptimer_state *timer; + PTimer *timer; qemu_irq timerint; /* * We must track the guest LOAD and VALUE register state by hand diff --git a/include/hw/timer/cmsdk-apb-timer.h b/include/hw/timer/cmsdk-apb-timer.h index b61e254d4d..c3d68f1154 100644 --- a/include/hw/timer/cmsdk-apb-timer.h +++ b/include/hw/timer/cmsdk-apb-timer.h @@ -33,7 +33,7 @@ struct CMSDKAPBTimer { /*< public >*/ MemoryRegion iomem; qemu_irq timerint; - ptimer_state *timer; + PTimer *timer; Clock *pclk; uint32_t ctrl; diff --git a/include/hw/timer/digic-timer.h b/include/hw/timer/digic-timer.h index 6c422a8451..38e363faf4 100644 --- a/include/hw/timer/digic-timer.h +++ b/include/hw/timer/digic-timer.h @@ -36,7 +36,7 @@ struct DigicTimerState { /*< public >*/ MemoryRegion iomem; - ptimer_state *ptimer; + PTimer *ptimer; uint32_t control; uint32_t relvalue; diff --git a/include/hw/timer/imx_epit.h b/include/hw/timer/imx_epit.h index 55f2611f79..351af8dbdb 100644 --- a/include/hw/timer/imx_epit.h +++ b/include/hw/timer/imx_epit.h @@ -64,8 +64,8 @@ struct IMXEPITState { SysBusDevice parent_obj; /*< public >*/ - ptimer_state *timer_reload; - ptimer_state *timer_cmp; + PTimer *timer_reload; + PTimer *timer_cmp; MemoryRegion iomem; IMXCCMState *ccm; diff --git a/include/hw/timer/imx_gpt.h b/include/hw/timer/imx_gpt.h index d5743778e0..377ce42611 100644 --- a/include/hw/timer/imx_gpt.h +++ b/include/hw/timer/imx_gpt.h @@ -91,7 +91,7 @@ struct IMXGPTState { SysBusDevice parent_obj; /*< public >*/ - ptimer_state *timer; + PTimer *timer; MemoryRegion iomem; IMXCCMState *ccm; diff --git a/include/hw/timer/mss-timer.h b/include/hw/timer/mss-timer.h index 783cec30e3..48098e336c 100644 --- a/include/hw/timer/mss-timer.h +++ b/include/hw/timer/mss-timer.h @@ -45,7 +45,7 @@ OBJECT_DECLARE_SIMPLE_TYPE(MSSTimerState, MSS_TIMER) #define R_TIM1_MAX 6 struct Msf2Timer { - ptimer_state *ptimer; + PTimer *ptimer; uint32_t regs[R_TIM1_MAX]; qemu_irq irq; diff --git a/include/hw/watchdog/cmsdk-apb-watchdog.h b/include/hw/watchdog/cmsdk-apb-watchdog.h index d02bfd0dd7..74bea181dd 100644 --- a/include/hw/watchdog/cmsdk-apb-watchdog.h +++ b/include/hw/watchdog/cmsdk-apb-watchdog.h @@ -52,7 +52,7 @@ struct CMSDKAPBWatchdog { MemoryRegion iomem; qemu_irq wdogint; bool is_luminary; - ptimer_state *timer; + PTimer *timer; Clock *wdogclk; uint32_t control; diff --git a/include/hw/watchdog/wdt_imx2.h b/include/hw/watchdog/wdt_imx2.h index d4cddac352..de1b73c752 100644 --- a/include/hw/watchdog/wdt_imx2.h +++ b/include/hw/watchdog/wdt_imx2.h @@ -70,8 +70,8 @@ struct IMX2WdtState { MemoryRegion mmio; qemu_irq irq; - ptimer_state *timer; - ptimer_state *itimer; + PTimer *timer; + PTimer *itimer; bool pretimeout_support; bool wicr_locked; diff --git a/include/qemu/typedefs.h b/include/qemu/typedefs.h index effcba4bca..e687ffe5fc 100644 --- a/include/qemu/typedefs.h +++ b/include/qemu/typedefs.h @@ -104,7 +104,7 @@ typedef struct PICCommonState PICCommonState; typedef struct PostcopyDiscardState PostcopyDiscardState; typedef struct Property Property; typedef struct PropertyInfo PropertyInfo; -typedef struct ptimer_state ptimer_state; +typedef struct PTimer PTimer; typedef struct QBool QBool; typedef struct QDict QDict; typedef struct QEMUBH QEMUBH; diff --git a/tests/unit/ptimer-test.c b/tests/unit/ptimer-test.c index 04b5f4e3d0..907fe75996 100644 --- a/tests/unit/ptimer-test.c +++ b/tests/unit/ptimer-test.c @@ -66,7 +66,7 @@ static void qemu_clock_step(uint64_t ns) static void check_set_count(gconstpointer arg) { const uint8_t *policy = arg; - ptimer_state *ptimer = ptimer_init(ptimer_trigger, NULL, *policy); + PTimer *ptimer = ptimer_init(ptimer_trigger, NULL, *policy); triggered = false; @@ -81,7 +81,7 @@ static void check_set_count(gconstpointer arg) static void check_set_limit(gconstpointer arg) { const uint8_t *policy = arg; - ptimer_state *ptimer = ptimer_init(ptimer_trigger, NULL, *policy); + PTimer *ptimer = ptimer_init(ptimer_trigger, NULL, *policy); triggered = false; @@ -104,7 +104,7 @@ static void check_set_limit(gconstpointer arg) static void check_oneshot(gconstpointer arg) { const uint8_t *policy = arg; - ptimer_state *ptimer = ptimer_init(ptimer_trigger, NULL, *policy); + PTimer *ptimer = ptimer_init(ptimer_trigger, NULL, *policy); bool no_round_down = (*policy & PTIMER_POLICY_NO_COUNTER_ROUND_DOWN); triggered = false; @@ -222,7 +222,7 @@ static void check_oneshot(gconstpointer arg) static void check_periodic(gconstpointer arg) { const uint8_t *policy = arg; - ptimer_state *ptimer = ptimer_init(ptimer_trigger, NULL, *policy); + PTimer *ptimer = ptimer_init(ptimer_trigger, NULL, *policy); bool wrap_policy = (*policy & PTIMER_POLICY_WRAP_AFTER_ONE_PERIOD); bool no_immediate_trigger = (*policy & PTIMER_POLICY_NO_IMMEDIATE_TRIGGER); bool no_immediate_reload = (*policy & PTIMER_POLICY_NO_IMMEDIATE_RELOAD); @@ -408,7 +408,7 @@ static void check_periodic(gconstpointer arg) static void check_on_the_fly_mode_change(gconstpointer arg) { const uint8_t *policy = arg; - ptimer_state *ptimer = ptimer_init(ptimer_trigger, NULL, *policy); + PTimer *ptimer = ptimer_init(ptimer_trigger, NULL, *policy); bool wrap_policy = (*policy & PTIMER_POLICY_WRAP_AFTER_ONE_PERIOD); bool no_round_down = (*policy & PTIMER_POLICY_NO_COUNTER_ROUND_DOWN); @@ -460,7 +460,7 @@ static void check_on_the_fly_mode_change(gconstpointer arg) static void check_on_the_fly_period_change(gconstpointer arg) { const uint8_t *policy = arg; - ptimer_state *ptimer = ptimer_init(ptimer_trigger, NULL, *policy); + PTimer *ptimer = ptimer_init(ptimer_trigger, NULL, *policy); bool no_round_down = (*policy & PTIMER_POLICY_NO_COUNTER_ROUND_DOWN); triggered = false; @@ -496,7 +496,7 @@ static void check_on_the_fly_period_change(gconstpointer arg) static void check_on_the_fly_freq_change(gconstpointer arg) { const uint8_t *policy = arg; - ptimer_state *ptimer = ptimer_init(ptimer_trigger, NULL, *policy); + PTimer *ptimer = ptimer_init(ptimer_trigger, NULL, *policy); bool no_round_down = (*policy & PTIMER_POLICY_NO_COUNTER_ROUND_DOWN); triggered = false; @@ -532,7 +532,7 @@ static void check_on_the_fly_freq_change(gconstpointer arg) static void check_run_with_period_0(gconstpointer arg) { const uint8_t *policy = arg; - ptimer_state *ptimer = ptimer_init(ptimer_trigger, NULL, *policy); + PTimer *ptimer = ptimer_init(ptimer_trigger, NULL, *policy); triggered = false; @@ -551,7 +551,7 @@ static void check_run_with_period_0(gconstpointer arg) static void check_run_with_delta_0(gconstpointer arg) { const uint8_t *policy = arg; - ptimer_state *ptimer = ptimer_init(ptimer_trigger, NULL, *policy); + PTimer *ptimer = ptimer_init(ptimer_trigger, NULL, *policy); bool wrap_policy = (*policy & PTIMER_POLICY_WRAP_AFTER_ONE_PERIOD); bool no_immediate_trigger = (*policy & PTIMER_POLICY_NO_IMMEDIATE_TRIGGER); bool no_immediate_reload = (*policy & PTIMER_POLICY_NO_IMMEDIATE_RELOAD); @@ -664,7 +664,7 @@ static void check_run_with_delta_0(gconstpointer arg) static void check_periodic_with_load_0(gconstpointer arg) { const uint8_t *policy = arg; - ptimer_state *ptimer = ptimer_init(ptimer_trigger, NULL, *policy); + PTimer *ptimer = ptimer_init(ptimer_trigger, NULL, *policy); bool continuous_trigger = (*policy & PTIMER_POLICY_CONTINUOUS_TRIGGER); bool no_immediate_trigger = (*policy & PTIMER_POLICY_NO_IMMEDIATE_TRIGGER); bool trig_only_on_dec = (*policy & PTIMER_POLICY_TRIGGER_ONLY_ON_DECREMENT); @@ -729,7 +729,7 @@ static void check_periodic_with_load_0(gconstpointer arg) static void check_oneshot_with_load_0(gconstpointer arg) { const uint8_t *policy = arg; - ptimer_state *ptimer = ptimer_init(ptimer_trigger, NULL, *policy); + PTimer *ptimer = ptimer_init(ptimer_trigger, NULL, *policy); bool no_immediate_trigger = (*policy & PTIMER_POLICY_NO_IMMEDIATE_TRIGGER); bool trig_only_on_dec = (*policy & PTIMER_POLICY_TRIGGER_ONLY_ON_DECREMENT);