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[173.198.77.218]) by smtp.gmail.com with ESMTPSA id 2-20020a170902c10200b00189743ed3b6sm91468pli.64.2023.02.21.18.00.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 21 Feb 2023 18:00:27 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, Sid Manning , =?utf-8?q?J?= =?utf-8?q?=C3=B8rgen_Hansen?= , =?utf-8?q?Philippe_M?= =?utf-8?q?athieu-Daud=C3=A9?= Subject: [PULL v2 1/8] accel/tcg: Allow the second page of an instruction to be MMIO Date: Tue, 21 Feb 2023 16:00:16 -1000 Message-Id: <20230222020023.904232-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230222020023.904232-1-richard.henderson@linaro.org> References: <20230222020023.904232-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::629; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x629.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org If an instruction straddles a page boundary, and the first page was ram, but the second page was MMIO, we would abort. Handle this as if both pages are MMIO, by setting the ram_addr_t for the first page to -1. Reported-by: Sid Manning Reported-by: Jørgen Hansen Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- accel/tcg/translator.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/accel/tcg/translator.c b/accel/tcg/translator.c index ef5193c67e..1cf404ced0 100644 --- a/accel/tcg/translator.c +++ b/accel/tcg/translator.c @@ -176,8 +176,16 @@ static void *translator_access(CPUArchState *env, DisasContextBase *db, if (host == NULL) { tb_page_addr_t phys_page = get_page_addr_code_hostp(env, base, &db->host_addr[1]); - /* We cannot handle MMIO as second page. */ - assert(phys_page != -1); + + /* + * If the second page is MMIO, treat as if the first page + * was MMIO as well, so that we do not cache the TB. + */ + if (unlikely(phys_page == -1)) { + tb_set_page_addr0(tb, -1); + return NULL; + } + tb_set_page_addr1(tb, phys_page); #ifdef CONFIG_USER_ONLY page_protect(end); From patchwork Wed Feb 22 02:00:17 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 655654 Delivered-To: patch@linaro.org Received: by 2002:adf:a3c6:0:0:0:0:0 with SMTP id m6csp444332wrb; Tue, 21 Feb 2023 18:02:06 -0800 (PST) X-Google-Smtp-Source: AK7set/XAAoRCVJ1IdVl4/47/jPxPXGuJlguIJt6taIPy5zeJ9R4uW/u0eC9fEqCR4y5W7S2qns+ X-Received: by 2002:ac2:5613:0:b0:4d6:ef7f:fc53 with SMTP id v19-20020ac25613000000b004d6ef7ffc53mr2362157lfd.34.1677031326167; Tue, 21 Feb 2023 18:02:06 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1677031326; cv=none; d=google.com; s=arc-20160816; b=Id5yD81wOtnyVI9Ubdj5+FUZEvoxnlhDYQkkuwul9sCQKE0mwVmgD0ipK3EKgSyNiR HzWFjiBgYN/WpQD7blpTvNg0Jo4wkUrNegmNiXG0XEsJJHZrrEQO9+cN5XCZeQWtmNSM ntnBqOyfKQp5ZBsOXeqIsdkfDzpSkSwNdWXJE5kPmc5+TU2mybpdUgWYhEvZ/m6AHgu+ rUFfmbXW6kiugav5QXCKckcQRc9xK5Stszdlj0m8JCM/y2DghgSGLURB1Le3Vt7W2MY3 vhbOjeaEUqHsR6b3eNNCbMvb5KcRn3aBbVolOhuZR2Df+jQvIXZhGecR5t1IXaTo/cDH lX+w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=4zhGePcD91yQ6ch+7pxzLZ4Aayz4MXPEoGj6QOyVgUM=; b=nIgBDh2rIZz8HKCDD2VpFn/rm71faK1k/tle686UKWwiTKfdxhksENQB0TsCrUqejW dQMD2h7U3B6PQQzC1Q8OpZiysRi0RvjWP1nhpiRk4fN/ZWC6XLcKHmU5B1IAIzZ18sKa 2aEdxguy64eq/cfi1oz4JWmGO0mtfMBBjHCRgnPGIbRz/NjM8izxjgGxcUgxvj1xrXod waDPPvKV38a5m7daaXMWg+9n64saELBp0p7Z9WmcCsA4luwDWhSRLq2K1GujQKw/m8mz YR6+dNSr2wQX6/B5H+bxG86JWHQFnhlzJ7ZgfNWYkBobN70BLKGUwfynl7JPI9b/ySXW dYeg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=H8Gn3iyK; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[173.198.77.218]) by smtp.gmail.com with ESMTPSA id 2-20020a170902c10200b00189743ed3b6sm91468pli.64.2023.02.21.18.00.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 21 Feb 2023 18:00:28 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, Ilya Leoshkevich Subject: [PULL v2 2/8] linux-user/sparc: Raise SIGILL for all unhandled software traps Date: Tue, 21 Feb 2023 16:00:17 -1000 Message-Id: <20230222020023.904232-3-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230222020023.904232-1-richard.henderson@linaro.org> References: <20230222020023.904232-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::1030; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1030.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org The linux kernel's trap tables vector all unassigned trap numbers to BAD_TRAP, which then raises SIGILL. Tested-by: Ilya Leoshkevich Reported-by: Ilya Leoshkevich Signed-off-by: Richard Henderson --- linux-user/sparc/cpu_loop.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/linux-user/sparc/cpu_loop.c b/linux-user/sparc/cpu_loop.c index 434c90a55f..c120c42278 100644 --- a/linux-user/sparc/cpu_loop.c +++ b/linux-user/sparc/cpu_loop.c @@ -248,6 +248,14 @@ void cpu_loop (CPUSPARCState *env) cpu_exec_step_atomic(cs); break; default: + /* + * Most software trap numbers vector to BAD_TRAP. + * Handle anything not explicitly matched above. + */ + if (trapnr >= TT_TRAP && trapnr <= TT_TRAP + 0x7f) { + force_sig_fault(TARGET_SIGILL, ILL_ILLTRP, env->pc); + break; + } fprintf(stderr, "Unhandled trap: 0x%x\n", trapnr); cpu_dump_state(cs, stderr, 0); exit(EXIT_FAILURE); From patchwork Wed Feb 22 02:00:18 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 655648 Delivered-To: patch@linaro.org Received: by 2002:adf:a3c6:0:0:0:0:0 with SMTP id m6csp443989wrb; Tue, 21 Feb 2023 18:01:22 -0800 (PST) X-Google-Smtp-Source: AK7set+AxQQ/GPOEQygXo7ZYqE/S+RxAtnDVC6Jae7mU79T8LDtLRqoCkTF5d9f+wvXDolYrMeaR X-Received: by 2002:ac2:5984:0:b0:4b9:f5e5:8fbc with SMTP id w4-20020ac25984000000b004b9f5e58fbcmr2229790lfn.30.1677031282465; Tue, 21 Feb 2023 18:01:22 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1677031282; cv=none; d=google.com; s=arc-20160816; b=agOt/bVHByHoVbVDu1Pkle0DDDwYMc5VMdNXuIUa8D6BTXU9nXnVscq28HRdu2sfnh w+fO8SK6InJn94+RrTBV3DAFS3lwNjqUspIDcr6DxGFjNSOpBF6Oi6suy3JdT0YHwlB6 MaW1mYp77fQN2Hv4i4mA9DXgQibEa3ErB9e2pUJeBvMp/YDc3DXzAHPP1dfKrvUpThNH SV1AAgoezizL3PfXTIMWiq5xStR0TLzLpjesi1b2VwF/wxlcoOv1cZXQrGMVtD/ZGU9l Cku2CykCiyQsr1EteVvZujuLxDcNjDYYu418B82GGfcRffJzgLlKfkk4bI+b+YcucN96 f0YQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=nN1Nd19UG7Ob6HhOyu1ZExnb36Rzel7CeIAQhipYNRY=; b=pMzcXxNC3IXvgZmcjzK++SrtHbrQkwgE5vMF0EDqRPVZkJgBAEenJz7bE8nyOfRMYB 2DqpKRBEdmCX+JDudVaVk2D+jWqWADkWsKhp6X1120xyHzBQ1DI0lIG87Wa7LZJzKhMw qGkKgbGz27Miz/3WlcLiqKdjQoju43H11Qa92daMTjPX+Yjbw7k8iJiWygHORRyq2LZE C1TMLUHD/alfKTWT1VtdUVn9j0PzDALLghmDuqhzSSDBpxZGx2ZyEyllsksebdFKRWJC SyJbrpsbLiigYh7TY8iZ/sDJZGqt0cIDyDn7ZFGy78+K5VAXxG2LLt8QczUIFsdLHw6o G9pQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=j9n06ynx; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[173.198.77.218]) by smtp.gmail.com with ESMTPSA id 2-20020a170902c10200b00189743ed3b6sm91468pli.64.2023.02.21.18.00.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 21 Feb 2023 18:00:31 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, Ilya Leoshkevich , =?utf-8?q?Alex_Benn=C3=A9e?= Subject: [PULL v2 3/8] linux-user: Always exit from exclusive state in fork_end() Date: Tue, 21 Feb 2023 16:00:18 -1000 Message-Id: <20230222020023.904232-4-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230222020023.904232-1-richard.henderson@linaro.org> References: <20230222020023.904232-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::102b; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Ilya Leoshkevich fork()ed processes currently start with current_cpu->in_exclusive_context set, which is, strictly speaking, not correct, but does not cause problems (even assertion failures). With one of the next patches, the code begins to rely on this value, so fix it by always calling end_exclusive() in fork_end(). Reviewed-by: Richard Henderson Reviewed-by: Alex Bennée Signed-off-by: Ilya Leoshkevich Message-Id: <20230214140829.45392-2-iii@linux.ibm.com> Signed-off-by: Richard Henderson --- linux-user/main.c | 10 ++++++---- linux-user/syscall.c | 1 + 2 files changed, 7 insertions(+), 4 deletions(-) diff --git a/linux-user/main.c b/linux-user/main.c index 4290651c3c..4ff30ff980 100644 --- a/linux-user/main.c +++ b/linux-user/main.c @@ -161,13 +161,15 @@ void fork_end(int child) } qemu_init_cpu_list(); gdbserver_fork(thread_cpu); - /* qemu_init_cpu_list() takes care of reinitializing the - * exclusive state, so we don't need to end_exclusive() here. - */ } else { cpu_list_unlock(); - end_exclusive(); } + /* + * qemu_init_cpu_list() reinitialized the child exclusive state, but we + * also need to keep current_cpu consistent, so call end_exclusive() for + * both child and parent. + */ + end_exclusive(); } __thread CPUState *thread_cpu; diff --git a/linux-user/syscall.c b/linux-user/syscall.c index 1e868e9b0e..a6c426d73c 100644 --- a/linux-user/syscall.c +++ b/linux-user/syscall.c @@ -6752,6 +6752,7 @@ static int do_fork(CPUArchState *env, unsigned int flags, abi_ulong newsp, cpu_clone_regs_parent(env, flags); fork_end(0); } + g_assert(!cpu_in_exclusive_context(cpu)); } return ret; } From patchwork Wed Feb 22 02:00:19 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 655656 Delivered-To: patch@linaro.org Received: by 2002:adf:a3c6:0:0:0:0:0 with SMTP id m6csp444492wrb; Tue, 21 Feb 2023 18:02:29 -0800 (PST) X-Google-Smtp-Source: AK7set+P/lFA1u+1AS/0H6FZOh3Dl4ZMzJW2cnFzFwJWV8BZ+jzXZhNTQDx36PVPdH+hSaHD/03Y X-Received: by 2002:a05:622a:189c:b0:3b6:3577:2fe7 with SMTP id v28-20020a05622a189c00b003b635772fe7mr26574742qtc.49.1677031349216; Tue, 21 Feb 2023 18:02:29 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1677031349; cv=none; d=google.com; s=arc-20160816; b=bGg9gKTrM6MDSWSpfct69NQInXK7v8dH9aY5Y5zIiE9BbyrhmuXRjWzZclc22uZOPy g61NzdpJCN88NelpqHoowBJTrhKvNq+6ohh2Vj9MDYyfGEi8SXtZ6kPETO/zeT8+WkpJ IaZr110I8yStG8U+3Mdlzl59qJ0qmRnzqI1HnTTatnFtTrQwoKvKJEpuv71NhM1cTK6J dFZ7uom+oxrFRJQiHvRswPnCTR+2sZQ7mZOCUo51BOU9vIP9rG5nXWNtGjVojjbJ3/pI zRbV39B/7rkedbz4KUF4q9Y2i8sAXobq2vZpiVYz4KMK2l0WYFvh/ojFtyilRwZVL4Kl n25w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=zxPSc8yJkvzSaYSSEPoT7SrrtEyyDZGvKalhQ2ISznU=; b=ArLpIkQ7c47yNJU4L0ZrsYinx0893WVjwfNUj2QQbmKnga0JTJ0pCnnq6zuYpRnjXc 3kF2BiQSfdz9J1EpvnapatYzo30aV1HgHnO7BcMYoClW0u/HTTrqCNtv3UqVH+JBytUk e/0ZZgWkHccTalvwP6DW1dB+5ul7C0ssw1fV+NXsG5qgCUgZalfq91KGqYw2l5JepLtz 9h5Rt4fu470gn12O1y9sqCpT03ZhWhPiUu4/mg3oTQx9s44g/YC3qalAT+bCzC0qrcWH 1UoUoHzDdLtMxQkX5vcIOiDMNB0SJAkWX8hdjmgYjfopRkujRXTfIDqwZ7/3fT+qXo/K bfeA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=vWAf7VNJ; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[173.198.77.218]) by smtp.gmail.com with ESMTPSA id 2-20020a170902c10200b00189743ed3b6sm91468pli.64.2023.02.21.18.00.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 21 Feb 2023 18:00:32 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, Ilya Leoshkevich , =?utf-8?q?Alex_Benn=C3=A9e?= Subject: [PULL v2 4/8] cpus: Make {start,end}_exclusive() recursive Date: Tue, 21 Feb 2023 16:00:19 -1000 Message-Id: <20230222020023.904232-5-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230222020023.904232-1-richard.henderson@linaro.org> References: <20230222020023.904232-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::630; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x630.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Ilya Leoshkevich Currently dying to one of the core_dump_signal()s deadlocks, because dump_core_and_abort() calls start_exclusive() two times: first via stop_all_tasks(), and then via preexit_cleanup() -> qemu_plugin_user_exit(). There are a number of ways to solve this: resume after dumping core; check cpu_in_exclusive_context() in qemu_plugin_user_exit(); or make {start,end}_exclusive() recursive. Pick the last option, since it's the most straightforward one. Fixes: da91c1920242 ("linux-user: Clean up when exiting due to a signal") Reviewed-by: Richard Henderson Reviewed-by: Alex Bennée Signed-off-by: Ilya Leoshkevich Message-Id: <20230214140829.45392-3-iii@linux.ibm.com> Signed-off-by: Richard Henderson --- include/hw/core/cpu.h | 4 ++-- cpus-common.c | 12 ++++++++++-- 2 files changed, 12 insertions(+), 4 deletions(-) diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index 2417597236..671f041bec 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -349,7 +349,7 @@ struct CPUState { bool unplug; bool crash_occurred; bool exit_request; - bool in_exclusive_context; + int exclusive_context_count; uint32_t cflags_next_tb; /* updates protected by BQL */ uint32_t interrupt_request; @@ -758,7 +758,7 @@ void async_safe_run_on_cpu(CPUState *cpu, run_on_cpu_func func, run_on_cpu_data */ static inline bool cpu_in_exclusive_context(const CPUState *cpu) { - return cpu->in_exclusive_context; + return cpu->exclusive_context_count; } /** diff --git a/cpus-common.c b/cpus-common.c index 793364dc0e..39f355de98 100644 --- a/cpus-common.c +++ b/cpus-common.c @@ -192,6 +192,11 @@ void start_exclusive(void) CPUState *other_cpu; int running_cpus; + if (current_cpu->exclusive_context_count) { + current_cpu->exclusive_context_count++; + return; + } + qemu_mutex_lock(&qemu_cpu_list_lock); exclusive_idle(); @@ -219,13 +224,16 @@ void start_exclusive(void) */ qemu_mutex_unlock(&qemu_cpu_list_lock); - current_cpu->in_exclusive_context = true; + current_cpu->exclusive_context_count = 1; } /* Finish an exclusive operation. */ void end_exclusive(void) { - current_cpu->in_exclusive_context = false; + current_cpu->exclusive_context_count--; + if (current_cpu->exclusive_context_count) { + return; + } qemu_mutex_lock(&qemu_cpu_list_lock); qatomic_set(&pending_cpus, 0); From patchwork Wed Feb 22 02:00:20 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 655655 Delivered-To: patch@linaro.org Received: by 2002:adf:a3c6:0:0:0:0:0 with SMTP id m6csp444493wrb; Tue, 21 Feb 2023 18:02:29 -0800 (PST) X-Google-Smtp-Source: AK7set/rPzNjGesfrjCzDch79WZ4cSFmnMpFnDObAUb0J3XN17JKdIVdkCUlHYDVBgq/zwasHVNl X-Received: by 2002:ac8:57d5:0:b0:3b8:5057:376a with SMTP id w21-20020ac857d5000000b003b85057376amr11817543qta.66.1677031349196; Tue, 21 Feb 2023 18:02:29 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1677031349; cv=none; d=google.com; s=arc-20160816; b=aRXmon/ZU9S6sxYHfLGrBUyvO9431Hite6NhKD84UoeONT5gtt/Qf/HDRL/AIFBm64 lXO0sgdcdiGaOFGz5VLpyZtePb8nKG7tDswAgtAb5TNd+1bM2B0bLLPesgmjbW+M4jFr 4OtCfvyr67tc3XqWXeuCZulI9OUVQlx+M7YNcenedKTOkDnsCPcPu/RwBiS17SrqVa6u v4XLoshu24p6YmuG9gcyhPglAPTJiXZq4DRerit6vL/EPE9gTQdxx2UEteVzzSPTG90I kmEn6KbHIZybh14R+TawupMeU0efuD2gbUcxQGMvzBCd2Sx27JWOmQaH343oC77S88yy u6Ng== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=JKMBaWZBGONH22d4GZ6aoQ5NI2bVoqwHKZG9lz4sA9s=; b=kgtM+talTXdoVUk4ZbaJxUhbPZ749UfN8xhhuSGTHLCnwtKlItfxcEH4e3umE4mkHu fqPUUzaxlLz+ITu8Bc+ZPPi14vTTqgV6TH0rkXG9BveFgYURSIPmGQb5VbMV+N0ICvxw PllExSZEBdcOmzpnsbKumG5PWznWprH1VP6NsVpuLxM0jIBRDOdjoTU975vegnwJNCYT PquK5i/nkuosifGr5bX2xWd7tuuqI5TRGKswzEbm4dDH/po1CKqjWVkGNGfYo9MM1IXw BtE9EbkX+Z/tRw2CgSOuIs/W9K0yo50mOFYKHThbllJhMlIF/RlaIIOhSaTD9m67Shpu FtMw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=r+sIy3Kc; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[173.198.77.218]) by smtp.gmail.com with ESMTPSA id 2-20020a170902c10200b00189743ed3b6sm91468pli.64.2023.02.21.18.00.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 21 Feb 2023 18:00:33 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, Ilya Leoshkevich Subject: [PULL v2 5/8] linux-user/microblaze: Handle privileged exception Date: Tue, 21 Feb 2023 16:00:20 -1000 Message-Id: <20230222020023.904232-6-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230222020023.904232-1-richard.henderson@linaro.org> References: <20230222020023.904232-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::102d; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Ilya Leoshkevich Follow what kernel's full_exception() is doing. Reviewed-by: Richard Henderson Signed-off-by: Ilya Leoshkevich Message-Id: <20230214140829.45392-4-iii@linux.ibm.com> Signed-off-by: Richard Henderson --- linux-user/microblaze/cpu_loop.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/linux-user/microblaze/cpu_loop.c b/linux-user/microblaze/cpu_loop.c index 5ccf9e942e..212e62d0a6 100644 --- a/linux-user/microblaze/cpu_loop.c +++ b/linux-user/microblaze/cpu_loop.c @@ -25,8 +25,8 @@ void cpu_loop(CPUMBState *env) { + int trapnr, ret, si_code, sig; CPUState *cs = env_cpu(env); - int trapnr, ret, si_code; while (1) { cpu_exec_start(cs); @@ -76,6 +76,7 @@ void cpu_loop(CPUMBState *env) env->iflags &= ~(IMM_FLAG | D_FLAG); switch (env->esr & 31) { case ESR_EC_DIVZERO: + sig = TARGET_SIGFPE; si_code = TARGET_FPE_INTDIV; break; case ESR_EC_FPU: @@ -84,6 +85,7 @@ void cpu_loop(CPUMBState *env) * if there's no recognized bit set. Possibly this * implies that si_code is 0, but follow the structure. */ + sig = TARGET_SIGFPE; si_code = env->fsr; if (si_code & FSR_IO) { si_code = TARGET_FPE_FLTINV; @@ -97,13 +99,17 @@ void cpu_loop(CPUMBState *env) si_code = TARGET_FPE_FLTRES; } break; + case ESR_EC_PRIVINSN: + sig = SIGILL; + si_code = ILL_PRVOPC; + break; default: fprintf(stderr, "Unhandled hw-exception: 0x%x\n", env->esr & ESR_EC_MASK); cpu_dump_state(cs, stderr, 0); exit(EXIT_FAILURE); } - force_sig_fault(TARGET_SIGFPE, si_code, env->pc); + force_sig_fault(sig, si_code, env->pc); break; case EXCP_DEBUG: From patchwork Wed Feb 22 02:00:21 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 655650 Delivered-To: patch@linaro.org Received: by 2002:adf:a3c6:0:0:0:0:0 with SMTP id m6csp443992wrb; Tue, 21 Feb 2023 18:01:23 -0800 (PST) X-Google-Smtp-Source: AK7set/cV+tluvAbXqS1BEblndn73leQzNf7a2AMtj0NXfKC3UMaA86IjG3ZNwGxMDavgwK5NUy8 X-Received: by 2002:a05:6512:ac7:b0:4d8:86c1:4789 with SMTP id n7-20020a0565120ac700b004d886c14789mr3544621lfu.30.1677031283425; Tue, 21 Feb 2023 18:01:23 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1677031283; cv=none; d=google.com; s=arc-20160816; b=BRhBp50KHEa00Ymgm1vsyasjjgGCvDZ2guBQv8Q46hoZiXcudltva00b+/fRJuBhn3 5k8m+vfQAWslEgyEcKoBRRMlq8wfObKYgPndUURf0tqN3Wm473YuwHd1UnMskz5fknNZ +7I2Owot+QN0qObVv7QzcDA/ySNPLJttSQ6y9HNuBZlJLqad8OLCON0mBWMIi6lVXoNG etIwq5mOMxoeql6S/PzVzSJmv9/AnvYkEIF0Q8jbjuUAcD6Rc1YT5BPe26wxht/frc/F /DOL2A4Z3Cmpha9MbXxsJh+TAX5lqlJrhfI6RRggq+gSCkU4apMlIa6VL18YSQZkXGVL VrSA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=ngk3dzZxI8QiHG0YRp0EJu4+0G0CZqPrFok24rpK6qg=; b=vDASFUMWT26avlboA3PrfVx/UySAZFlmk/XcvHQmxk35xEJ81/vs0BwZ1rzRkyON+u Jna+AOAUcFZr+OfaNFCvCPtL4HzcuEIWW6OP9geZQFta0BqSY64pRUyiq8qXbD5FJEJ2 SZF6Bp0SpRPgu0KzHPHjKVgqbZ6iTHUYrSPArx7I7ULHWEtGMvtOFoMbrRptMtw/B/Jp 6/UzDWJWV2AxN2W0wyGnxiBEDPiLl+tzftUgP//H//aEiC7YEd2YLbEtUHGzr+A/ma5N /D9PlOv46z9vBTNZ+j3+wFKukoLq3dowGETa/CXPytJzm5VVdMRMJ3SSZO8puB3a3lO7 C9Mg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=un9FJDjQ; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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(rrcs-173-198-77-218.west.biz.rr.com. [173.198.77.218]) by smtp.gmail.com with ESMTPSA id 2-20020a170902c10200b00189743ed3b6sm91468pli.64.2023.02.21.18.00.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 21 Feb 2023 18:00:35 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, "Edgar E . Iglesias" Subject: [PULL v2 6/8] target/microblaze: Add gdbstub xml Date: Tue, 21 Feb 2023 16:00:21 -1000 Message-Id: <20230222020023.904232-7-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230222020023.904232-1-richard.henderson@linaro.org> References: <20230222020023.904232-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::102e; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Mirroring the upstream gdb xml files, the two stack boundary registers are separated out. Reviewed-by: Edgar E. Iglesias Signed-off-by: Richard Henderson --- target/microblaze/cpu.h | 2 + target/microblaze/cpu.c | 7 ++- target/microblaze/gdbstub.c | 51 +++++++++++----- configs/targets/microblaze-linux-user.mak | 1 + configs/targets/microblaze-softmmu.mak | 1 + configs/targets/microblazeel-linux-user.mak | 1 + configs/targets/microblazeel-softmmu.mak | 1 + gdb-xml/microblaze-core.xml | 67 +++++++++++++++++++++ gdb-xml/microblaze-stack-protect.xml | 12 ++++ 9 files changed, 128 insertions(+), 15 deletions(-) create mode 100644 gdb-xml/microblaze-core.xml create mode 100644 gdb-xml/microblaze-stack-protect.xml diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h index 1e84dd8f47..e541fbb0b3 100644 --- a/target/microblaze/cpu.h +++ b/target/microblaze/cpu.h @@ -367,6 +367,8 @@ hwaddr mb_cpu_get_phys_page_attrs_debug(CPUState *cpu, vaddr addr, MemTxAttrs *attrs); int mb_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg); int mb_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); +int mb_cpu_gdb_read_stack_protect(CPUArchState *cpu, GByteArray *buf, int reg); +int mb_cpu_gdb_write_stack_protect(CPUArchState *cpu, uint8_t *buf, int reg); static inline uint32_t mb_cpu_read_msr(const CPUMBState *env) { diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c index 817681f9b2..a2d2f5c340 100644 --- a/target/microblaze/cpu.c +++ b/target/microblaze/cpu.c @@ -28,6 +28,7 @@ #include "qemu/module.h" #include "hw/qdev-properties.h" #include "exec/exec-all.h" +#include "exec/gdbstub.h" #include "fpu/softfloat-helpers.h" static const struct { @@ -294,6 +295,9 @@ static void mb_cpu_initfn(Object *obj) CPUMBState *env = &cpu->env; cpu_set_cpustate_pointers(cpu); + gdb_register_coprocessor(CPU(cpu), mb_cpu_gdb_read_stack_protect, + mb_cpu_gdb_write_stack_protect, 2, + "microblaze-stack-protect.xml", 0); set_float_rounding_mode(float_round_nearest_even, &env->fp_status); @@ -422,7 +426,8 @@ static void mb_cpu_class_init(ObjectClass *oc, void *data) cc->sysemu_ops = &mb_sysemu_ops; #endif device_class_set_props(dc, mb_properties); - cc->gdb_num_core_regs = 32 + 27; + cc->gdb_num_core_regs = 32 + 25; + cc->gdb_core_xml_file = "microblaze-core.xml"; cc->disas_set_info = mb_disas_set_info; cc->tcg_ops = &mb_tcg_ops; diff --git a/target/microblaze/gdbstub.c b/target/microblaze/gdbstub.c index 2e6e070051..8143fcae88 100644 --- a/target/microblaze/gdbstub.c +++ b/target/microblaze/gdbstub.c @@ -39,8 +39,11 @@ enum { GDB_PVR0 = 32 + 6, GDB_PVR11 = 32 + 17, GDB_EDR = 32 + 18, - GDB_SLR = 32 + 25, - GDB_SHR = 32 + 26, +}; + +enum { + GDB_SP_SHL, + GDB_SP_SHR, }; int mb_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n) @@ -83,12 +86,6 @@ int mb_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n) case GDB_EDR: val = env->edr; break; - case GDB_SLR: - val = env->slr; - break; - case GDB_SHR: - val = env->shr; - break; default: /* Other SRegs aren't modeled, so report a value of 0 */ val = 0; @@ -97,6 +94,23 @@ int mb_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n) return gdb_get_reg32(mem_buf, val); } +int mb_cpu_gdb_read_stack_protect(CPUMBState *env, GByteArray *mem_buf, int n) +{ + uint32_t val; + + switch (n) { + case GDB_SP_SHL: + val = env->slr; + break; + case GDB_SP_SHR: + val = env->shr; + break; + default: + return 0; + } + return gdb_get_reg32(mem_buf, val); +} + int mb_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) { MicroBlazeCPU *cpu = MICROBLAZE_CPU(cs); @@ -135,12 +149,21 @@ int mb_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) case GDB_EDR: env->edr = tmp; break; - case GDB_SLR: - env->slr = tmp; - break; - case GDB_SHR: - env->shr = tmp; - break; + } + return 4; +} + +int mb_cpu_gdb_write_stack_protect(CPUMBState *env, uint8_t *mem_buf, int n) +{ + switch (n) { + case GDB_SP_SHL: + env->slr = ldl_p(mem_buf); + break; + case GDB_SP_SHR: + env->shr = ldl_p(mem_buf); + break; + default: + return 0; } return 4; } diff --git a/configs/targets/microblaze-linux-user.mak b/configs/targets/microblaze-linux-user.mak index 4249a37f65..0a2322c249 100644 --- a/configs/targets/microblaze-linux-user.mak +++ b/configs/targets/microblaze-linux-user.mak @@ -3,3 +3,4 @@ TARGET_SYSTBL_ABI=common TARGET_SYSTBL=syscall.tbl TARGET_BIG_ENDIAN=y TARGET_HAS_BFLT=y +TARGET_XML_FILES=gdb-xml/microblaze-core.xml gdb-xml/microblaze-stack-protect.xml diff --git a/configs/targets/microblaze-softmmu.mak b/configs/targets/microblaze-softmmu.mak index 8385e2d333..e84c0cc728 100644 --- a/configs/targets/microblaze-softmmu.mak +++ b/configs/targets/microblaze-softmmu.mak @@ -2,3 +2,4 @@ TARGET_ARCH=microblaze TARGET_BIG_ENDIAN=y TARGET_SUPPORTS_MTTCG=y TARGET_NEED_FDT=y +TARGET_XML_FILES=gdb-xml/microblaze-core.xml gdb-xml/microblaze-stack-protect.xml diff --git a/configs/targets/microblazeel-linux-user.mak b/configs/targets/microblazeel-linux-user.mak index d0e775d840..270743156a 100644 --- a/configs/targets/microblazeel-linux-user.mak +++ b/configs/targets/microblazeel-linux-user.mak @@ -2,3 +2,4 @@ TARGET_ARCH=microblaze TARGET_SYSTBL_ABI=common TARGET_SYSTBL=syscall.tbl TARGET_HAS_BFLT=y +TARGET_XML_FILES=gdb-xml/microblaze-core.xml gdb-xml/microblaze-stack-protect.xml diff --git a/configs/targets/microblazeel-softmmu.mak b/configs/targets/microblazeel-softmmu.mak index af40391f2f..9b688036bd 100644 --- a/configs/targets/microblazeel-softmmu.mak +++ b/configs/targets/microblazeel-softmmu.mak @@ -1,3 +1,4 @@ TARGET_ARCH=microblaze TARGET_SUPPORTS_MTTCG=y TARGET_NEED_FDT=y +TARGET_XML_FILES=gdb-xml/microblaze-core.xml gdb-xml/microblaze-stack-protect.xml diff --git a/gdb-xml/microblaze-core.xml b/gdb-xml/microblaze-core.xml new file mode 100644 index 0000000000..becf77c89c --- /dev/null +++ b/gdb-xml/microblaze-core.xml @@ -0,0 +1,67 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/gdb-xml/microblaze-stack-protect.xml b/gdb-xml/microblaze-stack-protect.xml new file mode 100644 index 0000000000..997301e8a2 --- /dev/null +++ b/gdb-xml/microblaze-stack-protect.xml @@ -0,0 +1,12 @@ + + + + + + + + From patchwork Wed Feb 22 02:00:22 2023 Content-Type: text/plain; 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[173.198.77.218]) by smtp.gmail.com with ESMTPSA id 2-20020a170902c10200b00189743ed3b6sm91468pli.64.2023.02.21.18.00.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 21 Feb 2023 18:00:36 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, Pierrick Bouvier Subject: [PULL v2 7/8] util/cacheflush: fix cache on windows-arm64 Date: Tue, 21 Feb 2023 16:00:22 -1000 Message-Id: <20230222020023.904232-8-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230222020023.904232-1-richard.henderson@linaro.org> References: <20230222020023.904232-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::102c; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Pierrick Bouvier ctr_el0 access is privileged on this platform and fails as an illegal instruction. Windows does not offer a way to flush data cache from userspace, and only FlushInstructionCache is available in Windows API. The generic implementation of flush_idcache_range uses, __builtin___clear_cache, which already use the FlushInstructionCache function. So we rely on that. Signed-off-by: Pierrick Bouvier Reviewed-by: Richard Henderson Message-Id: <20230221153006.20300-2-pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson --- util/cacheflush.c | 14 +++++++++++--- 1 file changed, 11 insertions(+), 3 deletions(-) diff --git a/util/cacheflush.c b/util/cacheflush.c index 2c2c73e085..06c2333a60 100644 --- a/util/cacheflush.c +++ b/util/cacheflush.c @@ -121,8 +121,12 @@ static void sys_cache_info(int *isize, int *dsize) static bool have_coherent_icache; #endif -#if defined(__aarch64__) && !defined(CONFIG_DARWIN) -/* Apple does not expose CTR_EL0, so we must use system interfaces. */ +#if defined(__aarch64__) && !defined(CONFIG_DARWIN) && !defined(CONFIG_WIN32) +/* + * Apple does not expose CTR_EL0, so we must use system interfaces. + * Windows neither, but we use a generic implementation of flush_idcache_range + * in this case. + */ static uint64_t save_ctr_el0; static void arch_cache_info(int *isize, int *dsize) { @@ -225,7 +229,11 @@ static void __attribute__((constructor)) init_cache_info(void) /* Caches are coherent and do not require flushing; symbol inline. */ -#elif defined(__aarch64__) +#elif defined(__aarch64__) && !defined(CONFIG_WIN32) +/* + * For Windows, we use generic implementation of flush_idcache_range, that + * performs a call to FlushInstructionCache, through __builtin___clear_cache. + */ #ifdef CONFIG_DARWIN /* Apple does not expose CTR_EL0, so we must use system interfaces. */ From patchwork Wed Feb 22 02:00:23 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 655653 Delivered-To: patch@linaro.org Received: by 2002:adf:a3c6:0:0:0:0:0 with SMTP id m6csp444327wrb; Tue, 21 Feb 2023 18:02:05 -0800 (PST) X-Google-Smtp-Source: AK7set8pAEoL3Fi13/JmkuAXCksjpQh26haCTWSh7lP8Kz7/tE8iYzP3Wfx1jpDxs2hbteMP2vxW X-Received: by 2002:ac2:4bd3:0:b0:4b6:fddc:1fcd with SMTP id o19-20020ac24bd3000000b004b6fddc1fcdmr2364699lfq.23.1677031325663; Tue, 21 Feb 2023 18:02:05 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1677031325; cv=none; d=google.com; s=arc-20160816; b=hJYk5bvNTzJpAglblSoHPSEVQ5pqqeQTsUqJWF+a48YNzimUQF6Eklqfo8xGaF9d8j y2xxACOHh3+sp8otmzir5tYAVg5x8eByOS2yjQy/gIu/HWj1joayQyzwcpH9P9nVWSlI Ff3mxmNzgtw2ox/ZUeybtrbSR2Swhu+W2m0/govDZtFK/tHpMnzAPAkLkHfRC6SLoLm5 Cw5w5o/VnNOcboDOCf1L7pKsFxQdtzUD22konGB1JDvjikhxh0Bs6/5x6OGiEY0lu8Gw SwRUVpBNxwUd5TmOXCJLzKEYfwHlh8Fiwr97tOhO7FVYHctK0iNngriDmQNel4V2zTrc dRSQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=65HRmCDkLuuur1UpqMIRZDfCJCF1ZUxrkWbM7vUK1aI=; b=icD7cdS3fBjHi8UX0DYilFRaKJ3qjwD0FGn1fL1WpirmMx2lZbdwYU2RpeRRMCo8cF eFwK24GZSwIRVTtTSVpMfMbOhKeEW8swRTXq0pVkRkymt7p/RhMgtOUIfdbxwdwf0DNG r+rlnZjb8Zi6wbxsTp5bW9R5kZiV0WJmOFKORCTfZLHVqo9O+twbS7BZrINB9St6h+dM 65zC2vR6GwjTfiCZam6J91pP/SPPLDTOAT+oQ+YKUbYdKNAdIkl1PWRHfVN3CrCvpGPl Z31E+cxLjR5VrQpbOrXmU141oVlZYgpLEKi1BZ5QHHOCPK1v0i3KX+AEKGF/tZVsIU7g q1sw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=pjrQaHse; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[173.198.77.218]) by smtp.gmail.com with ESMTPSA id 2-20020a170902c10200b00189743ed3b6sm91468pli.64.2023.02.21.18.00.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 21 Feb 2023 18:00:38 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, Pierrick Bouvier , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PULL v2 8/8] sysemu/os-win32: fix setjmp/longjmp on windows-arm64 Date: Tue, 21 Feb 2023 16:00:23 -1000 Message-Id: <20230222020023.904232-9-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230222020023.904232-1-richard.henderson@linaro.org> References: <20230222020023.904232-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::102b; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Pierrick Bouvier Windows implementation of setjmp/longjmp is done in C:/WINDOWS/system32/ucrtbase.dll. Alas, on arm64, it seems to *always* perform stack unwinding, which crashes from generated code. By using alternative implementation built in mingw, we avoid doing stack unwinding and this fixes crash when calling longjmp. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Pierrick Bouvier Acked-by: Richard Henderson Message-Id: <20230221153006.20300-3-pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson --- include/sysemu/os-win32.h | 28 ++++++++++++++++++++++++---- meson.build | 21 +++++++++++++++++++++ 2 files changed, 45 insertions(+), 4 deletions(-) diff --git a/include/sysemu/os-win32.h b/include/sysemu/os-win32.h index 5b38c7bd04..97d0243aee 100644 --- a/include/sysemu/os-win32.h +++ b/include/sysemu/os-win32.h @@ -51,14 +51,34 @@ typedef struct sockaddr_un { extern "C" { #endif -#if defined(_WIN64) -/* On w64, setjmp is implemented by _setjmp which needs a second parameter. +#if defined(__aarch64__) +/* + * On windows-arm64, setjmp is available in only one variant, and longjmp always + * does stack unwinding. This crash with generated code. + * Thus, we use another implementation of setjmp (not windows one), coming from + * mingw, which never performs stack unwinding. + */ +#undef setjmp +#undef longjmp +/* + * These functions are not declared in setjmp.h because __aarch64__ defines + * setjmp to _setjmpex instead. However, they are still defined in libmingwex.a, + * which gets linked automatically. + */ +extern int __mingw_setjmp(jmp_buf); +extern void __attribute__((noreturn)) __mingw_longjmp(jmp_buf, int); +#define setjmp(env) __mingw_setjmp(env) +#define longjmp(env, val) __mingw_longjmp(env, val) +#elif defined(_WIN64) +/* + * On windows-x64, setjmp is implemented by _setjmp which needs a second parameter. * If this parameter is NULL, longjump does no stack unwinding. * That is what we need for QEMU. Passing the value of register rsp (default) - * lets longjmp try a stack unwinding which will crash with generated code. */ + * lets longjmp try a stack unwinding which will crash with generated code. + */ # undef setjmp # define setjmp(env) _setjmp(env, NULL) -#endif +#endif /* __aarch64__ */ /* QEMU uses sigsetjmp()/siglongjmp() as the portable way to specify * "longjmp and don't touch the signal masks". Since we know that the * savemask parameter will always be zero we can safely define these diff --git a/meson.build b/meson.build index bc7e5b1d15..6a139e7085 100644 --- a/meson.build +++ b/meson.build @@ -2466,6 +2466,27 @@ if targetos == 'windows' }''', name: '_lock_file and _unlock_file')) endif +if targetos == 'windows' + mingw_has_setjmp_longjmp = cc.links(''' + #include + int main(void) { + /* + * These functions are not available in setjmp header, but may be + * available at link time, from libmingwex.a. + */ + extern int __mingw_setjmp(jmp_buf); + extern void __attribute__((noreturn)) __mingw_longjmp(jmp_buf, int); + jmp_buf env; + __mingw_setjmp(env); + __mingw_longjmp(env, 0); + } + ''', name: 'mingw setjmp and longjmp') + + if cpu == 'aarch64' and not mingw_has_setjmp_longjmp + error('mingw must provide setjmp/longjmp for windows-arm64') + endif +endif + ######################## # Target configuration # ########################