From patchwork Thu Feb 23 19:42:25 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Jonker X-Patchwork-Id: 656084 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C5D2BC61DA4 for ; Thu, 23 Feb 2023 19:42:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229604AbjBWTma (ORCPT ); Thu, 23 Feb 2023 14:42:30 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35588 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229491AbjBWTma (ORCPT ); Thu, 23 Feb 2023 14:42:30 -0500 Received: from mail-ed1-x533.google.com (mail-ed1-x533.google.com [IPv6:2a00:1450:4864:20::533]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D02B859E41; Thu, 23 Feb 2023 11:42:28 -0800 (PST) Received: by mail-ed1-x533.google.com with SMTP id cy6so40823987edb.5; Thu, 23 Feb 2023 11:42:28 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:content-language:cc:to:subject:from :user-agent:mime-version:date:message-id:from:to:cc:subject:date :message-id:reply-to; bh=8BXWAwPXU4gL7NDBNH5IiDYMBbcpymX6jA+XKQ4A+7Y=; b=Z9qIIeH4K2XaOajUagHIDfr3qHg6UXZN8iDBhj6FFX0dIjfQCBvZnks9KcNGHHY19G ldGQ9mahmCf7kjx2w1OPaz4kn6RnIsQC2dYq6V3Pby6VVovYfUveaWaBMaYGGj90m54q xOe9VekczEw87U22eyuTextgD4lzevi8ETHyOkm3ySyTAl0OtGv4jfqzDRDtKIhOO0+S 21Df/7kwahDs6AbQ2P3SP4JS8Ipm6YUYhZscMNwa7+WcNpkVz0xD9QxfkCrSbuJkPrDO dwKvak9Ck8GAKMCuwVgpk1sf63ERU9F9bxOzeBJvQs3DbJtG8mJMcd7+JDw9U/oMftjH j/Gg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:content-language:cc:to:subject:from :user-agent:mime-version:date:message-id:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=8BXWAwPXU4gL7NDBNH5IiDYMBbcpymX6jA+XKQ4A+7Y=; b=1SCEMBb6B5OoLlQeePZtSqN/hldSVzYx30y3aEUNhdCuiXmcZH7azdb9rzvK57JHqg X4K4APZMiPskteSCbF6RxJo5QUrMFY18ogbRhBLtmiakQZ2fJKpe3KGoylv42KcsPi0B bon8FYU+shaFHYlXECLkTFJJOaddQzGMlSVPgYqumIHaYFTMcq2LCr9h/fBoxQZbddOH cxOcQNWSjh5lz6QpKe2jLYEwjR596z5yrSXPA0tT5/TT2sODl+cBxzLnxSyIvCD0u0zj Bvvfvkb0EzMHFAlfIHXgAsmvG0Zn9zqHVFFP5pLJ6BJ+h9G+0z6XCoU/IGbhksvMBuie S2Dw== X-Gm-Message-State: AO0yUKXfVUfnzmBOUcenyjGDOtx1Ee4rqsZDBj1nM2TCi9BbpKkHcSQh v8kC7G3uyO/AE+DTzsFe5FM= X-Google-Smtp-Source: AK7set/x32vBkRksysZ8SuzBqjVeMXtXLVaQQBia6jjruTfaGG5eWsPI6iBac7ydZdrGPp4yl+5qcQ== X-Received: by 2002:a17:906:9bc3:b0:8a5:3d1e:6302 with SMTP id de3-20020a1709069bc300b008a53d1e6302mr19527041ejc.56.1677181347149; Thu, 23 Feb 2023 11:42:27 -0800 (PST) Received: from [192.168.2.1] (81-204-249-205.fixed.kpn.net. [81.204.249.205]) by smtp.gmail.com with ESMTPSA id bk15-20020a170906b0cf00b008f398f25beesm19079ejb.189.2023.02.23.11.42.26 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 23 Feb 2023 11:42:26 -0800 (PST) Message-ID: <3eeaa940-9d40-5e33-bc36-c9b0449ded9f@gmail.com> Date: Thu, 23 Feb 2023 20:42:25 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.6.0 From: Johan Jonker Subject: [PATCH v4 1/7] dt-bindings: gpio: rockchip, gpio-bank: add compatible string per SoC To: linus.walleij@linaro.org, brgl@bgdev.pl Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, heiko@sntech.de, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Content-Language: en-US Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Currently all Rockchip gpio nodes have the same compatible. Compatible strings should be SoC related. Signed-off-by: Johan Jonker Reviewed-by: Linus Walleij Reviewed-by: Krzysztof Kozlowski --- Changed V3: Keep enum --- .../bindings/gpio/rockchip,gpio-bank.yaml | 27 ++++++++++++++++--- 1 file changed, 23 insertions(+), 4 deletions(-) -- 2.20.1 diff --git a/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml b/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml index affd823c8..2e9a5179c 100644 --- a/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml +++ b/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml @@ -11,9 +11,28 @@ maintainers: properties: compatible: - enum: - - rockchip,gpio-bank - - rockchip,rk3188-gpio-bank0 + oneOf: + - enum: + - rockchip,gpio-bank + - rockchip,rk3188-gpio-bank0 + - items: + - enum: + - rockchip,px30-gpio-bank + - rockchip,rk3036-gpio-bank + - rockchip,rk3066a-gpio-bank + - rockchip,rk3128-gpio-bank + - rockchip,rk3188-gpio-bank + - rockchip,rk3228-gpio-bank + - rockchip,rk3288-gpio-bank + - rockchip,rk3328-gpio-bank + - rockchip,rk3308-gpio-bank + - rockchip,rk3368-gpio-bank + - rockchip,rk3399-gpio-bank + - rockchip,rk3568-gpio-bank + - rockchip,rk3588-gpio-bank + - rockchip,rv1108-gpio-bank + - rockchip,rv1126-gpio-bank + - const: rockchip,gpio-bank reg: maxItems: 1 @@ -75,7 +94,7 @@ examples: }; gpio1: gpio@2003c000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3188-gpio-bank", "rockchip,gpio-bank"; reg = <0x2003c000 0x100>; interrupts = ; clocks = <&clk_gates8 10>; From patchwork Thu Feb 23 19:46:24 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Jonker X-Patchwork-Id: 656083 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 36447C61DA4 for ; Thu, 23 Feb 2023 19:46:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229673AbjBWTqg (ORCPT ); Thu, 23 Feb 2023 14:46:36 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40744 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229491AbjBWTqf (ORCPT ); Thu, 23 Feb 2023 14:46:35 -0500 Received: from mail-ed1-x52d.google.com (mail-ed1-x52d.google.com [IPv6:2a00:1450:4864:20::52d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4B1DE4A1ED; Thu, 23 Feb 2023 11:46:33 -0800 (PST) Received: by mail-ed1-x52d.google.com with SMTP id ee7so31237516edb.2; Thu, 23 Feb 2023 11:46:33 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:in-reply-to:content-language:references :cc:to:subject:from:user-agent:mime-version:date:message-id:from:to :cc:subject:date:message-id:reply-to; bh=7LRpyWijqVyBIlwSuNRfzUQ+ZyqaAsfdjoJlUPAZASg=; b=eiKKSe9UeePiVEO64ojOtxKiPLmGaZ/nMjseZGtFE1mHQ/dw/eAfDtPDodcqVozXUA 8ouHsxCJDV/s9IRvv4PDdc+v3FSNXivEqL48uYolADGle5prCL6/1cVeB+2iC4rY2Qtg ju8Tb28IBNNKtcX810XhnsoV33LxMT/2YBLUVwr90z6SHsyB0XxvEWB4mjy6l5ZS2B5u 8imWQ5oG70AF5JpbyjhPLKN/9aO2P0QFL4zqltsEVWFAtji6yf+9IuJS2t+K1YQFIy4M yaexE1Dk/dyUSLhc0m4Wn7nXEEEYmxSy22sJYCXYK8vmuuVlpFT6hCwMeJCERZYrFFAY UGxw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:in-reply-to:content-language:references :cc:to:subject:from:user-agent:mime-version:date:message-id :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=7LRpyWijqVyBIlwSuNRfzUQ+ZyqaAsfdjoJlUPAZASg=; b=Y7w2RgUZawc5cqTq3OxWLWj90+9iOgrXIoozo6HNaaY8/8bzxEDNP07+5M0BM1TkIf eL8r8CVDqiOCO4vemQ8MptB/4AH5fHvm6RJzCXa2F+vBcDWw2sc/DMAVodnc52nbHv9Z lwjKUIK1ThB8Fc5qOiM/LUhpOphAAwp5hnC4xgPvj9mUFrGR/qVVib8zxrMCzryNNOsc OH006YExXVPMppatfzVneJsoRLvyR+1MuVW+BTJ6k6SNwfKv8aJ37QVOMypYodNq0OHr IHp/AuxUQdiZi2aqAHenyOUb7qv3Ha46IIaRZLtZPxXZNgLaaYJY5EcNS+/3cFcNBCmt oALA== X-Gm-Message-State: AO0yUKVrf8AnZZyYipgPJ+MTmq4eqO1z4PYrTsQGfsf5kluC/blF+MQS Np6tRlDRhWHzXtkxxWqJs3I= X-Google-Smtp-Source: AK7set/L1t843g5XkUkLOvox4r8KPibycedF4hiL/gNFQX5exFdwNgcdM0cnvDhKLdr/jDZ0jWjWcw== X-Received: by 2002:a17:906:44b:b0:839:74cf:7c4f with SMTP id e11-20020a170906044b00b0083974cf7c4fmr20087502eja.8.1677181591729; Thu, 23 Feb 2023 11:46:31 -0800 (PST) Received: from [192.168.2.1] (81-204-249-205.fixed.kpn.net. [81.204.249.205]) by smtp.gmail.com with ESMTPSA id mi10-20020a1709071a8a00b008e938e98046sm1960676ejc.223.2023.02.23.11.46.26 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 23 Feb 2023 11:46:28 -0800 (PST) Message-ID: <774d712d-bcdf-677a-2d9c-a49ed829e965@gmail.com> Date: Thu, 23 Feb 2023 20:46:24 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.6.0 From: Johan Jonker Subject: [PATCH v4 2/7] dt-bindings: gpio: rockchip,gpio-bank: add unique hardware GPIO ID To: linus.walleij@linaro.org, brgl@bgdev.pl Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, heiko@sntech.de, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org References: <3eeaa940-9d40-5e33-bc36-c9b0449ded9f@gmail.com> Content-Language: en-US In-Reply-To: <3eeaa940-9d40-5e33-bc36-c9b0449ded9f@gmail.com> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add a unique hardware GPIO ID to the Rockchip GPIO nodes with the "rockchip,gpio-controller" property to be independent from aliases and probe order. "gpio-ranges" can't be used for that, because there is no semantic restrictions on how they are set up. Signed-off-by: Johan Jonker --- See discussion: https://lore.kernel.org/u-boot/CACRpkdZx8EaSFLeh4vruRsdC+Sx_ieBiKmuE7t37zhiYqtS3WQ@mail.gmail.com/ --- .../devicetree/bindings/gpio/rockchip,gpio-bank.yaml | 6 ++++++ 1 file changed, 6 insertions(+) -- 2.20.1 diff --git a/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml b/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml index 2e9a5179c..39ac41e9d 100644 --- a/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml +++ b/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml @@ -52,6 +52,12 @@ properties: gpio-line-names: true + rockchip,gpio-controller: + $ref: /schemas/types.yaml#/definitions/uint32 + maximum: 8 + description: + Unique hardware GPIO ID. + "#gpio-cells": const: 2 From patchwork Thu Feb 23 19:46:47 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Jonker X-Patchwork-Id: 657308 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B708FC678D5 for ; Thu, 23 Feb 2023 19:46:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230024AbjBWTq6 (ORCPT ); Thu, 23 Feb 2023 14:46:58 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41144 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229928AbjBWTq6 (ORCPT ); Thu, 23 Feb 2023 14:46:58 -0500 Received: from mail-ed1-x533.google.com (mail-ed1-x533.google.com [IPv6:2a00:1450:4864:20::533]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 015864FAA8; Thu, 23 Feb 2023 11:46:52 -0800 (PST) Received: by mail-ed1-x533.google.com with SMTP id cq23so46069222edb.1; Thu, 23 Feb 2023 11:46:52 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:in-reply-to:content-language:references :cc:to:subject:from:user-agent:mime-version:date:message-id:from:to :cc:subject:date:message-id:reply-to; bh=Ef/IxwVqWizxA0usa6LnkU7NUiiONXkz62uBg/LMdV0=; b=DHpjhYh63B43zvg0u2ye7FkhNr6DMcDzU0v8Dm1bTpckJKsmkMIGJv7V+rPcmepQBF udAz1vgLNTHQ1dYC5ct/f33z1N0ny5xl19DFfnNqaRrwms/gFmhzEr+C1G27iZh/G4bF mCboVX629DJzjaVurtnSsxSaY8E+bKxPVavDvzvSh6Fv5sll6lbR9bohhdYkuxpr2Uiu 90HVob01i3LNMs8l0dC6hjfMEq0082vxUez3MpadcZSr6k+fKGoNis0jyHwSf6c0xCsO OBpsX8C23nhLDDSrXRnp2AUIlfOVF9f+q6U4vst7em1X9VtWmNl3BJOgfaX/4MVmFKw2 gLow== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:in-reply-to:content-language:references :cc:to:subject:from:user-agent:mime-version:date:message-id :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=Ef/IxwVqWizxA0usa6LnkU7NUiiONXkz62uBg/LMdV0=; b=WJTSbZyFW47xtYcpH4U7i4db0gxq9fiG8GYzqaQZi2Pbgqm5jR5QAg4frSAEGmuDR3 rX4E44Egwy9mJKW3CFzFXDrcjaf57xlYqdKKm0ZKOlAm93at58yEhZwyApmq6YkFTrXj GnnhsjJnBKL+YePpmGkr4RxvTxHfw/4WBqRsnBdsBE4ndzr4ADlHnPQy//1OZrikwHl3 MCuOEyNf8Lpz2hlgzTkuHlMaXDFJyThzgcQG8k7JBqkZyIGXChezcMDTdQYF1yC+NdNS 2SF8gYrq1fca8JWThftmf5FH1ieU7uxhUe0zRU5FqdLeYvFCXOho/MwZ5zsRG1lgieC+ NhnA== X-Gm-Message-State: AO0yUKWq9ZUp7hMpt+vWA8REB9NvJuqlo3rvy496ndgXOPu3PEZ7l6uV BFrzGHbDOS8kX1U84JGNB9xIerC+8Fk= X-Google-Smtp-Source: AK7set/31K5DJ6qn1JJs6uRxQx06XyLdkNkcHNdxs6bHWakbmS54DnLSUgse5hWxoGh8etM4sdztuQ== X-Received: by 2002:a17:906:d118:b0:8d9:383a:be39 with SMTP id b24-20020a170906d11800b008d9383abe39mr14476208ejz.41.1677181611487; Thu, 23 Feb 2023 11:46:51 -0800 (PST) Received: from [192.168.2.1] (81-204-249-205.fixed.kpn.net. [81.204.249.205]) by smtp.gmail.com with ESMTPSA id g3-20020a170906538300b008ee5356801dsm992464ejo.187.2023.02.23.11.46.47 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 23 Feb 2023 11:46:49 -0800 (PST) Message-ID: <4a18d6b6-a8a4-a2e6-6841-fa78951792e7@gmail.com> Date: Thu, 23 Feb 2023 20:46:47 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.6.0 From: Johan Jonker Subject: [PATCH v4 3/7] gpio: gpio-rockchip: parse rockchip,gpio-controller property for bank id To: linus.walleij@linaro.org, brgl@bgdev.pl Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, heiko@sntech.de, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org References: <3eeaa940-9d40-5e33-bc36-c9b0449ded9f@gmail.com> Content-Language: en-US In-Reply-To: <3eeaa940-9d40-5e33-bc36-c9b0449ded9f@gmail.com> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Parse the rockchip,gpio-controller property in Rockchip gpio nodes to be independent from aliases and probe order for our bank id. Signed-off-by: Johan Jonker --- drivers/gpio/gpio-rockchip.c | 26 ++++++++++++++++++++------ 1 file changed, 20 insertions(+), 6 deletions(-) -- 2.20.1 diff --git a/drivers/gpio/gpio-rockchip.c b/drivers/gpio/gpio-rockchip.c index e5de15a2a..47e45299f 100644 --- a/drivers/gpio/gpio-rockchip.c +++ b/drivers/gpio/gpio-rockchip.c @@ -702,24 +702,38 @@ static int rockchip_gpio_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; struct device_node *np = dev->of_node; - struct device_node *pctlnp = of_get_parent(np); + struct device_node *pctlnp; struct pinctrl_dev *pctldev = NULL; struct rockchip_pin_bank *bank = NULL; struct rockchip_pin_deferred *cfg; + struct of_phandle_args args; static int gpio; int id, ret; - if (!np || !pctlnp) + if (!np) return -ENODEV; + ret = of_parse_phandle_with_fixed_args(np, "gpio-ranges", 3, 0, &args); + if (!ret) + pctlnp = args.np; + else + pctlnp = of_get_parent(np); + + if (!pctlnp) + return -ENODEV; + + ret = of_property_read_u32(np, "rockchip,gpio-controller", &id); + if (ret) { + id = of_alias_get_id(np, "gpio"); + if (id < 0) + id = gpio++; + } + pctldev = of_pinctrl_get(pctlnp); + of_node_put(pctlnp); if (!pctldev) return -EPROBE_DEFER; - id = of_alias_get_id(np, "gpio"); - if (id < 0) - id = gpio++; - bank = rockchip_gpio_find_bank(pctldev, id); if (!bank) return -EINVAL; From patchwork Thu Feb 23 19:47:06 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Jonker X-Patchwork-Id: 656082 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D6CC2C677F1 for ; Thu, 23 Feb 2023 19:47:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230200AbjBWTrZ (ORCPT ); Thu, 23 Feb 2023 14:47:25 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41796 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229928AbjBWTrY (ORCPT ); Thu, 23 Feb 2023 14:47:24 -0500 Received: from mail-ed1-x532.google.com (mail-ed1-x532.google.com [IPv6:2a00:1450:4864:20::532]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7632057D05; Thu, 23 Feb 2023 11:47:22 -0800 (PST) Received: by mail-ed1-x532.google.com with SMTP id h16so46516223edz.10; Thu, 23 Feb 2023 11:47:22 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:in-reply-to:content-language:references :cc:to:subject:from:user-agent:mime-version:date:message-id:from:to :cc:subject:date:message-id:reply-to; bh=07h6Vdlg5BXBW6Sf5yZUF1nhr8tbTqNR0BC4zVhT3/k=; b=RMdCjFuo8u/zsA9CZ1/AHf7vAj20C9E8B3RadzyddSsIKjiwu8xV0481ueCEJo8YDE ESSWodsfgOb1Nkso54OdH39yGMQhAO+MnjJiwW8N4dpL6iPC+sWl8WkRpNoSNeIdjyva YsPRAyVaQTHHT0t1k0Hivs0WABagH1fesPjB9ZxosA+XbOIJM7BSimn9OjGAwIhunU84 uc4M6dbZu5RaE6dIVWF85G/9sVk7F+Vf7LWjXkIkRYm5hkGfo4+tbx41ACzlAsLoeIk1 7fWOoHCVGthYAruwNDy7t4FKXXwTEr091j2ovvZdKnufWK7dvlw2Xj1G6UsdpiOzjaGf 1pZw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:in-reply-to:content-language:references :cc:to:subject:from:user-agent:mime-version:date:message-id :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=07h6Vdlg5BXBW6Sf5yZUF1nhr8tbTqNR0BC4zVhT3/k=; b=V+cENLLc3KuznG4f16ZZGyNlbnpCZzNKnqOaGpSt1tX/z+Z8PQG9Lt34wYh/jskXGA bbB6jGmJwaSohpmeUsuRCQQOULn1xdgfo5dkEm5dxYDOKclD05BeauRHj2TvrV34pj91 rMisFdQcW2pQyAnhBcf8PM2mno+GqBjtsI+7VUarYYVxfJcLoK4p446nGpwRDB5IX+1a SX4wfv9sLZekgtgLo+8U/EZtRdH6EHo/8IO+dFefj24xgzJTZ8aZCoHZmUwv34UJytg6 0LlrDwAaieiD3fCiCIN4te5Trn4z27YXtCenyHBKyvfdCvMbmjjR746WKoJbQSHjBG3h aSGg== X-Gm-Message-State: AO0yUKVGb11q1EcXLCrKJzc/RwcXTwztq9EaDtJimlKYH93WoyVar3N5 rivMXz/6iqEtIhKWb8EnhQReCwntzng= X-Google-Smtp-Source: AK7set88gO/KQ+HYBuDGpPxjjQCZTAhVyM0J35FQrRvD2S4K6wzlvfIEwp2Z8fwW7Wk0SyCl1Ik3sg== X-Received: by 2002:a17:907:9849:b0:8b2:37b5:cc9 with SMTP id jj9-20020a170907984900b008b237b50cc9mr22358689ejc.17.1677181640902; Thu, 23 Feb 2023 11:47:20 -0800 (PST) Received: from [192.168.2.1] (81-204-249-205.fixed.kpn.net. [81.204.249.205]) by smtp.gmail.com with ESMTPSA id h21-20020a170906591500b008def483cf79sm3683747ejq.168.2023.02.23.11.47.07 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 23 Feb 2023 11:47:09 -0800 (PST) Message-ID: Date: Thu, 23 Feb 2023 20:47:06 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.6.0 From: Johan Jonker Subject: [PATCH v4 4/7] ARM: dts: rockchip: add rockchip,gpio-controller property to gpio nodes To: linus.walleij@linaro.org, brgl@bgdev.pl Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, heiko@sntech.de, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org References: <3eeaa940-9d40-5e33-bc36-c9b0449ded9f@gmail.com> Content-Language: en-US In-Reply-To: <3eeaa940-9d40-5e33-bc36-c9b0449ded9f@gmail.com> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add a rockchip,gpio-controller property to Rockchip gpio nodes to be independent from aliases and probe order for our bank id. Signed-off-by: Johan Jonker --- --- arch/arm/boot/dts/rk3036.dtsi | 3 +++ arch/arm/boot/dts/rk3066a.dtsi | 6 ++++++ arch/arm/boot/dts/rk3128.dtsi | 4 ++++ arch/arm/boot/dts/rk3188.dtsi | 4 ++++ arch/arm/boot/dts/rk322x.dtsi | 4 ++++ arch/arm/boot/dts/rk3288.dtsi | 9 +++++++++ arch/arm/boot/dts/rv1108.dtsi | 4 ++++ arch/arm/boot/dts/rv1126.dtsi | 5 +++++ 8 files changed, 39 insertions(+) -- 2.20.1 diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi index 78686fc72..ef748dc5d 100644 --- a/arch/arm/boot/dts/rk3036.dtsi +++ b/arch/arm/boot/dts/rk3036.dtsi @@ -582,6 +582,7 @@ clocks = <&cru PCLK_GPIO0>; gpio-controller; + rockchip,gpio-controller = <0>; #gpio-cells = <2>; interrupt-controller; @@ -595,6 +596,7 @@ clocks = <&cru PCLK_GPIO1>; gpio-controller; + rockchip,gpio-controller = <1>; #gpio-cells = <2>; interrupt-controller; @@ -608,6 +610,7 @@ clocks = <&cru PCLK_GPIO2>; gpio-controller; + rockchip,gpio-controller = <2>; #gpio-cells = <2>; interrupt-controller; diff --git a/arch/arm/boot/dts/rk3066a.dtsi b/arch/arm/boot/dts/rk3066a.dtsi index de9915d94..cc20b4214 100644 --- a/arch/arm/boot/dts/rk3066a.dtsi +++ b/arch/arm/boot/dts/rk3066a.dtsi @@ -280,6 +280,7 @@ clocks = <&cru PCLK_GPIO0>; gpio-controller; + rockchip,gpio-controller = <0>; #gpio-cells = <2>; interrupt-controller; @@ -293,6 +294,7 @@ clocks = <&cru PCLK_GPIO1>; gpio-controller; + rockchip,gpio-controller = <1>; #gpio-cells = <2>; interrupt-controller; @@ -306,6 +308,7 @@ clocks = <&cru PCLK_GPIO2>; gpio-controller; + rockchip,gpio-controller = <2>; #gpio-cells = <2>; interrupt-controller; @@ -319,6 +322,7 @@ clocks = <&cru PCLK_GPIO3>; gpio-controller; + rockchip,gpio-controller = <3>; #gpio-cells = <2>; interrupt-controller; @@ -332,6 +336,7 @@ clocks = <&cru PCLK_GPIO4>; gpio-controller; + rockchip,gpio-controller = <4>; #gpio-cells = <2>; interrupt-controller; @@ -345,6 +350,7 @@ clocks = <&cru PCLK_GPIO6>; gpio-controller; + rockchip,gpio-controller = <6>; #gpio-cells = <2>; interrupt-controller; diff --git a/arch/arm/boot/dts/rk3128.dtsi b/arch/arm/boot/dts/rk3128.dtsi index b63bd4ad3..01c8a6b33 100644 --- a/arch/arm/boot/dts/rk3128.dtsi +++ b/arch/arm/boot/dts/rk3128.dtsi @@ -476,6 +476,7 @@ interrupts = ; clocks = <&cru PCLK_GPIO0>; gpio-controller; + rockchip,gpio-controller = <0>; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; @@ -487,6 +488,7 @@ interrupts = ; clocks = <&cru PCLK_GPIO1>; gpio-controller; + rockchip,gpio-controller = <1>; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; @@ -498,6 +500,7 @@ interrupts = ; clocks = <&cru PCLK_GPIO2>; gpio-controller; + rockchip,gpio-controller = <2>; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; @@ -509,6 +512,7 @@ interrupts = ; clocks = <&cru PCLK_GPIO3>; gpio-controller; + rockchip,gpio-controller = <3>; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi index 44b54af0b..583ba942c 100644 --- a/arch/arm/boot/dts/rk3188.dtsi +++ b/arch/arm/boot/dts/rk3188.dtsi @@ -231,6 +231,7 @@ clocks = <&cru PCLK_GPIO0>; gpio-controller; + rockchip,gpio-controller = <0>; #gpio-cells = <2>; interrupt-controller; @@ -244,6 +245,7 @@ clocks = <&cru PCLK_GPIO1>; gpio-controller; + rockchip,gpio-controller = <1>; #gpio-cells = <2>; interrupt-controller; @@ -257,6 +259,7 @@ clocks = <&cru PCLK_GPIO2>; gpio-controller; + rockchip,gpio-controller = <2>; #gpio-cells = <2>; interrupt-controller; @@ -270,6 +273,7 @@ clocks = <&cru PCLK_GPIO3>; gpio-controller; + rockchip,gpio-controller = <3>; #gpio-cells = <2>; interrupt-controller; diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi index ffc16d6b9..e03203bc1 100644 --- a/arch/arm/boot/dts/rk322x.dtsi +++ b/arch/arm/boot/dts/rk322x.dtsi @@ -955,6 +955,7 @@ clocks = <&cru PCLK_GPIO0>; gpio-controller; + rockchip,gpio-controller = <0>; #gpio-cells = <2>; interrupt-controller; @@ -968,6 +969,7 @@ clocks = <&cru PCLK_GPIO1>; gpio-controller; + rockchip,gpio-controller = <1>; #gpio-cells = <2>; interrupt-controller; @@ -981,6 +983,7 @@ clocks = <&cru PCLK_GPIO2>; gpio-controller; + rockchip,gpio-controller = <2>; #gpio-cells = <2>; interrupt-controller; @@ -994,6 +997,7 @@ clocks = <&cru PCLK_GPIO3>; gpio-controller; + rockchip,gpio-controller = <3>; #gpio-cells = <2>; interrupt-controller; diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index 2ca76b69a..937fec4b8 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -1431,6 +1431,7 @@ clocks = <&cru PCLK_GPIO0>; gpio-controller; + rockchip,gpio-controller = <0>; #gpio-cells = <2>; interrupt-controller; @@ -1444,6 +1445,7 @@ clocks = <&cru PCLK_GPIO1>; gpio-controller; + rockchip,gpio-controller = <1>; #gpio-cells = <2>; interrupt-controller; @@ -1457,6 +1459,7 @@ clocks = <&cru PCLK_GPIO2>; gpio-controller; + rockchip,gpio-controller = <2>; #gpio-cells = <2>; interrupt-controller; @@ -1470,6 +1473,7 @@ clocks = <&cru PCLK_GPIO3>; gpio-controller; + rockchip,gpio-controller = <3>; #gpio-cells = <2>; interrupt-controller; @@ -1483,6 +1487,7 @@ clocks = <&cru PCLK_GPIO4>; gpio-controller; + rockchip,gpio-controller = <4>; #gpio-cells = <2>; interrupt-controller; @@ -1496,6 +1501,7 @@ clocks = <&cru PCLK_GPIO5>; gpio-controller; + rockchip,gpio-controller = <5>; #gpio-cells = <2>; interrupt-controller; @@ -1509,6 +1515,7 @@ clocks = <&cru PCLK_GPIO6>; gpio-controller; + rockchip,gpio-controller = <6>; #gpio-cells = <2>; interrupt-controller; @@ -1522,6 +1529,7 @@ clocks = <&cru PCLK_GPIO7>; gpio-controller; + rockchip,gpio-controller = <7>; #gpio-cells = <2>; interrupt-controller; @@ -1535,6 +1543,7 @@ clocks = <&cru PCLK_GPIO8>; gpio-controller; + rockchip,gpio-controller = <8>; #gpio-cells = <2>; interrupt-controller; diff --git a/arch/arm/boot/dts/rv1108.dtsi b/arch/arm/boot/dts/rv1108.dtsi index abf3006f0..0dca27d09 100644 --- a/arch/arm/boot/dts/rv1108.dtsi +++ b/arch/arm/boot/dts/rv1108.dtsi @@ -602,6 +602,7 @@ clocks = <&cru PCLK_GPIO0_PMU>; gpio-controller; + rockchip,gpio-controller = <0>; #gpio-cells = <2>; interrupt-controller; @@ -615,6 +616,7 @@ clocks = <&cru PCLK_GPIO1>; gpio-controller; + rockchip,gpio-controller = <1>; #gpio-cells = <2>; interrupt-controller; @@ -628,6 +630,7 @@ clocks = <&cru PCLK_GPIO2>; gpio-controller; + rockchip,gpio-controller = <2>; #gpio-cells = <2>; interrupt-controller; @@ -641,6 +644,7 @@ clocks = <&cru PCLK_GPIO3>; gpio-controller; + rockchip,gpio-controller = <3>; #gpio-cells = <2>; interrupt-controller; diff --git a/arch/arm/boot/dts/rv1126.dtsi b/arch/arm/boot/dts/rv1126.dtsi index 1f07d0a4f..51e8e1741 100644 --- a/arch/arm/boot/dts/rv1126.dtsi +++ b/arch/arm/boot/dts/rv1126.dtsi @@ -433,6 +433,7 @@ interrupts = ; clocks = <&pmucru PCLK_GPIO0>, <&pmucru DBCLK_GPIO0>; gpio-controller; + rockchip,gpio-controller = <0>; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; @@ -444,6 +445,7 @@ interrupts = ; clocks = <&cru PCLK_GPIO1>, <&cru DBCLK_GPIO1>; gpio-controller; + rockchip,gpio-controller = <1>; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; @@ -455,6 +457,7 @@ interrupts = ; clocks = <&cru PCLK_GPIO2>, <&cru DBCLK_GPIO2>; gpio-controller; + rockchip,gpio-controller = <2>; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; @@ -466,6 +469,7 @@ interrupts = ; clocks = <&cru PCLK_GPIO3>, <&cru DBCLK_GPIO3>; gpio-controller; + rockchip,gpio-controller = <3>; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; @@ -477,6 +481,7 @@ interrupts = ; clocks = <&cru PCLK_GPIO4>, <&cru DBCLK_GPIO4>; gpio-controller; + rockchip,gpio-controller = <4>; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; From patchwork Thu Feb 23 19:47:34 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Jonker X-Patchwork-Id: 657307 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 48E53C677F1 for ; Thu, 23 Feb 2023 19:48:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229592AbjBWTsF (ORCPT ); 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[81.204.249.205]) by smtp.gmail.com with ESMTPSA id l17-20020a50c111000000b004af7191fe35sm638322edf.22.2023.02.23.11.47.41 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 23 Feb 2023 11:47:44 -0800 (PST) Message-ID: <3efde582-a2b5-f025-2082-a6d35dd782a0@gmail.com> Date: Thu, 23 Feb 2023 20:47:34 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.6.0 From: Johan Jonker Subject: [PATCH v4 5/7] arm64: dts: rockchip: add rockchip,gpio-controller property to gpio nodes To: linus.walleij@linaro.org, brgl@bgdev.pl Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, heiko@sntech.de, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org References: <3eeaa940-9d40-5e33-bc36-c9b0449ded9f@gmail.com> Content-Language: en-US In-Reply-To: <3eeaa940-9d40-5e33-bc36-c9b0449ded9f@gmail.com> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add a rockchip,gpio-controller property to Rockchip gpio nodes to be independent from aliases and probe order for our bank id. Signed-off-by: Johan Jonker --- arch/arm64/boot/dts/rockchip/px30.dtsi | 4 ++++ arch/arm64/boot/dts/rockchip/rk3308.dtsi | 5 +++++ arch/arm64/boot/dts/rockchip/rk3328.dtsi | 4 ++++ arch/arm64/boot/dts/rockchip/rk3368.dtsi | 4 ++++ arch/arm64/boot/dts/rockchip/rk3399.dtsi | 5 +++++ arch/arm64/boot/dts/rockchip/rk356x.dtsi | 5 +++++ arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 5 +++++ 7 files changed, 32 insertions(+) -- 2.20.1 diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi b/arch/arm64/boot/dts/rockchip/px30.dtsi index 4f6959eb5..64f63e462 100644 --- a/arch/arm64/boot/dts/rockchip/px30.dtsi +++ b/arch/arm64/boot/dts/rockchip/px30.dtsi @@ -1387,6 +1387,7 @@ interrupts = ; clocks = <&pmucru PCLK_GPIO0_PMU>; gpio-controller; + rockchip,gpio-controller = <0>; #gpio-cells = <2>; interrupt-controller; @@ -1399,6 +1400,7 @@ interrupts = ; clocks = <&cru PCLK_GPIO1>; gpio-controller; + rockchip,gpio-controller = <1>; #gpio-cells = <2>; interrupt-controller; @@ -1411,6 +1413,7 @@ interrupts = ; clocks = <&cru PCLK_GPIO2>; gpio-controller; + rockchip,gpio-controller = <2>; #gpio-cells = <2>; interrupt-controller; @@ -1423,6 +1426,7 @@ interrupts = ; clocks = <&cru PCLK_GPIO3>; gpio-controller; + rockchip,gpio-controller = <3>; #gpio-cells = <2>; interrupt-controller; diff --git a/arch/arm64/boot/dts/rockchip/rk3308.dtsi b/arch/arm64/boot/dts/rockchip/rk3308.dtsi index dd228a256..e8d15ee53 100644 --- a/arch/arm64/boot/dts/rockchip/rk3308.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3308.dtsi @@ -798,6 +798,7 @@ interrupts = ; clocks = <&cru PCLK_GPIO0>; gpio-controller; + rockchip,gpio-controller = <0>; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; @@ -809,6 +810,7 @@ interrupts = ; clocks = <&cru PCLK_GPIO1>; gpio-controller; + rockchip,gpio-controller = <1>; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; @@ -820,6 +822,7 @@ interrupts = ; clocks = <&cru PCLK_GPIO2>; gpio-controller; + rockchip,gpio-controller = <2>; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; @@ -831,6 +834,7 @@ interrupts = ; clocks = <&cru PCLK_GPIO3>; gpio-controller; + rockchip,gpio-controller = <3>; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; @@ -842,6 +846,7 @@ interrupts = ; clocks = <&cru PCLK_GPIO4>; gpio-controller; + rockchip,gpio-controller = <4>; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi index 6d7a7bf72..0a068499c 100644 --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi @@ -1051,6 +1051,7 @@ clocks = <&cru PCLK_GPIO0>; gpio-controller; + rockchip,gpio-controller = <0>; #gpio-cells = <2>; interrupt-controller; @@ -1064,6 +1065,7 @@ clocks = <&cru PCLK_GPIO1>; gpio-controller; + rockchip,gpio-controller = <1>; #gpio-cells = <2>; interrupt-controller; @@ -1077,6 +1079,7 @@ clocks = <&cru PCLK_GPIO2>; gpio-controller; + rockchip,gpio-controller = <2>; #gpio-cells = <2>; interrupt-controller; @@ -1090,6 +1093,7 @@ clocks = <&cru PCLK_GPIO3>; gpio-controller; + rockchip,gpio-controller = <3>; #gpio-cells = <2>; interrupt-controller; diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi index a4c5aaf1f..b89536940 100644 --- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi @@ -984,6 +984,7 @@ interrupts = ; gpio-controller; + rockchip,gpio-controller = <0>; #gpio-cells = <0x2>; interrupt-controller; @@ -997,6 +998,7 @@ interrupts = ; gpio-controller; + rockchip,gpio-controller = <1>; #gpio-cells = <0x2>; interrupt-controller; @@ -1010,6 +1012,7 @@ interrupts = ; gpio-controller; + rockchip,gpio-controller = <2>; #gpio-cells = <0x2>; interrupt-controller; @@ -1023,6 +1026,7 @@ interrupts = ; gpio-controller; + rockchip,gpio-controller = <3>; #gpio-cells = <0x2>; interrupt-controller; diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi index 1881b4b71..19b052e20 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi @@ -2091,6 +2091,7 @@ interrupts = ; gpio-controller; + rockchip,gpio-controller = <0>; #gpio-cells = <0x2>; interrupt-controller; @@ -2104,6 +2105,7 @@ interrupts = ; gpio-controller; + rockchip,gpio-controller = <1>; #gpio-cells = <0x2>; interrupt-controller; @@ -2117,6 +2119,7 @@ interrupts = ; gpio-controller; + rockchip,gpio-controller = <2>; #gpio-cells = <0x2>; interrupt-controller; @@ -2130,6 +2133,7 @@ interrupts = ; gpio-controller; + rockchip,gpio-controller = <3>; #gpio-cells = <0x2>; interrupt-controller; @@ -2143,6 +2147,7 @@ interrupts = ; gpio-controller; + rockchip,gpio-controller = <4>; #gpio-cells = <0x2>; interrupt-controller; diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi index eed0059a6..db4925fbf 100644 --- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi @@ -1808,6 +1808,7 @@ interrupts = ; clocks = <&pmucru PCLK_GPIO0>, <&pmucru DBCLK_GPIO0>; gpio-controller; + rockchip,gpio-controller = <0>; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; @@ -1819,6 +1820,7 @@ interrupts = ; clocks = <&cru PCLK_GPIO1>, <&cru DBCLK_GPIO1>; gpio-controller; + rockchip,gpio-controller = <1>; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; @@ -1830,6 +1832,7 @@ interrupts = ; clocks = <&cru PCLK_GPIO2>, <&cru DBCLK_GPIO2>; gpio-controller; + rockchip,gpio-controller = <2>; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; @@ -1841,6 +1844,7 @@ interrupts = ; clocks = <&cru PCLK_GPIO3>, <&cru DBCLK_GPIO3>; gpio-controller; + rockchip,gpio-controller = <3>; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; @@ -1852,6 +1856,7 @@ interrupts = ; clocks = <&cru PCLK_GPIO4>, <&cru DBCLK_GPIO4>; gpio-controller; + rockchip,gpio-controller = <4>; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi index 005cde61b..057f8be0d 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi @@ -1645,6 +1645,7 @@ clocks = <&cru PCLK_GPIO0>, <&cru DBCLK_GPIO0>; gpio-controller; gpio-ranges = <&pinctrl 0 0 32>; + rockchip,gpio-controller = <0>; interrupt-controller; #gpio-cells = <2>; #interrupt-cells = <2>; @@ -1657,6 +1658,7 @@ clocks = <&cru PCLK_GPIO1>, <&cru DBCLK_GPIO1>; gpio-controller; gpio-ranges = <&pinctrl 0 32 32>; + rockchip,gpio-controller = <1>; interrupt-controller; #gpio-cells = <2>; #interrupt-cells = <2>; @@ -1669,6 +1671,7 @@ clocks = <&cru PCLK_GPIO2>, <&cru DBCLK_GPIO2>; gpio-controller; gpio-ranges = <&pinctrl 0 64 32>; + rockchip,gpio-controller = <2>; interrupt-controller; #gpio-cells = <2>; #interrupt-cells = <2>; @@ -1681,6 +1684,7 @@ clocks = <&cru PCLK_GPIO3>, <&cru DBCLK_GPIO3>; gpio-controller; gpio-ranges = <&pinctrl 0 96 32>; + rockchip,gpio-controller = <3>; interrupt-controller; #gpio-cells = <2>; #interrupt-cells = <2>; @@ -1693,6 +1697,7 @@ clocks = <&cru PCLK_GPIO4>, <&cru DBCLK_GPIO4>; gpio-controller; gpio-ranges = <&pinctrl 0 128 32>; + rockchip,gpio-controller = <4>; interrupt-controller; #gpio-cells = <2>; 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[81.204.249.205]) by smtp.gmail.com with ESMTPSA id q20-20020a170906771400b008e57b5e0ce9sm2634435ejm.108.2023.02.23.11.49.01 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 23 Feb 2023 11:49:02 -0800 (PST) Message-ID: <7425b6bc-8cfd-4db0-9545-89e2951d2a26@gmail.com> Date: Thu, 23 Feb 2023 20:48:55 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.6.0 From: Johan Jonker Subject: [PATCH v4 6/7] ARM: dts: rockchip: replace compatible gpio nodes To: linus.walleij@linaro.org, brgl@bgdev.pl Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, heiko@sntech.de, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org References: <3eeaa940-9d40-5e33-bc36-c9b0449ded9f@gmail.com> Content-Language: en-US In-Reply-To: <3eeaa940-9d40-5e33-bc36-c9b0449ded9f@gmail.com> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Currently all Rockchip gpio nodes have the same compatible. Compatible strings should be SoC related. Signed-off-by: Johan Jonker --- arch/arm/boot/dts/rk3036.dtsi | 6 +++--- arch/arm/boot/dts/rk3066a.dtsi | 12 ++++++------ arch/arm/boot/dts/rk3128.dtsi | 8 ++++---- arch/arm/boot/dts/rk3188.dtsi | 6 +++--- arch/arm/boot/dts/rk322x.dtsi | 8 ++++---- arch/arm/boot/dts/rk3288.dtsi | 18 +++++++++--------- arch/arm/boot/dts/rv1108.dtsi | 8 ++++---- arch/arm/boot/dts/rv1126.dtsi | 10 +++++----- 8 files changed, 38 insertions(+), 38 deletions(-) -- 2.20.1 diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi index ef748dc5d..fc71801bd 100644 --- a/arch/arm/boot/dts/rk3036.dtsi +++ b/arch/arm/boot/dts/rk3036.dtsi @@ -576,7 +576,7 @@ ranges; gpio0: gpio@2007c000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3036-gpio-bank", "rockchip,gpio-bank"; reg = <0x2007c000 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO0>; @@ -590,7 +590,7 @@ }; gpio1: gpio@20080000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3036-gpio-bank", "rockchip,gpio-bank"; reg = <0x20080000 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO1>; @@ -604,7 +604,7 @@ }; gpio2: gpio@20084000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3036-gpio-bank", "rockchip,gpio-bank"; reg = <0x20084000 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO2>; diff --git a/arch/arm/boot/dts/rk3066a.dtsi b/arch/arm/boot/dts/rk3066a.dtsi index cc20b4214..92f48a9eb 100644 --- a/arch/arm/boot/dts/rk3066a.dtsi +++ b/arch/arm/boot/dts/rk3066a.dtsi @@ -274,7 +274,7 @@ ranges; gpio0: gpio@20034000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3066a-gpio-bank", "rockchip,gpio-bank"; reg = <0x20034000 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO0>; @@ -288,7 +288,7 @@ }; gpio1: gpio@2003c000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3066a-gpio-bank", "rockchip,gpio-bank"; reg = <0x2003c000 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO1>; @@ -302,7 +302,7 @@ }; gpio2: gpio@2003e000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3066a-gpio-bank", "rockchip,gpio-bank"; reg = <0x2003e000 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO2>; @@ -316,7 +316,7 @@ }; gpio3: gpio@20080000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3066a-gpio-bank", "rockchip,gpio-bank"; reg = <0x20080000 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO3>; @@ -330,7 +330,7 @@ }; gpio4: gpio@20084000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3066a-gpio-bank", "rockchip,gpio-bank"; reg = <0x20084000 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO4>; @@ -344,7 +344,7 @@ }; gpio6: gpio@2000a000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3066a-gpio-bank", "rockchip,gpio-bank"; reg = <0x2000a000 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO6>; diff --git a/arch/arm/boot/dts/rk3128.dtsi b/arch/arm/boot/dts/rk3128.dtsi index 01c8a6b33..78e43a0b5 100644 --- a/arch/arm/boot/dts/rk3128.dtsi +++ b/arch/arm/boot/dts/rk3128.dtsi @@ -471,7 +471,7 @@ ranges; gpio0: gpio@2007c000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3128-gpio-bank", "rockchip,gpio-bank"; reg = <0x2007c000 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO0>; @@ -483,7 +483,7 @@ }; gpio1: gpio@20080000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3128-gpio-bank", "rockchip,gpio-bank"; reg = <0x20080000 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO1>; @@ -495,7 +495,7 @@ }; gpio2: gpio@20084000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3128-gpio-bank", "rockchip,gpio-bank"; reg = <0x20084000 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO2>; @@ -507,7 +507,7 @@ }; gpio3: gpio@20088000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3128-gpio-bank", "rockchip,gpio-bank"; reg = <0x20088000 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO3>; diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi index 583ba942c..b414eb7ac 100644 --- a/arch/arm/boot/dts/rk3188.dtsi +++ b/arch/arm/boot/dts/rk3188.dtsi @@ -239,7 +239,7 @@ }; gpio1: gpio@2003c000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3188-gpio-bank", "rockchip,gpio-bank"; reg = <0x2003c000 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO1>; @@ -253,7 +253,7 @@ }; gpio2: gpio@2003e000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3188-gpio-bank", "rockchip,gpio-bank"; reg = <0x2003e000 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO2>; @@ -267,7 +267,7 @@ }; gpio3: gpio@20080000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3188-gpio-bank", "rockchip,gpio-bank"; reg = <0x20080000 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO3>; diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi index e03203bc1..a1d76e53c 100644 --- a/arch/arm/boot/dts/rk322x.dtsi +++ b/arch/arm/boot/dts/rk322x.dtsi @@ -949,7 +949,7 @@ ranges; gpio0: gpio@11110000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3228-gpio-bank", "rockchip,gpio-bank"; reg = <0x11110000 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO0>; @@ -963,7 +963,7 @@ }; gpio1: gpio@11120000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3228-gpio-bank", "rockchip,gpio-bank"; reg = <0x11120000 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO1>; @@ -977,7 +977,7 @@ }; gpio2: gpio@11130000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3228-gpio-bank", "rockchip,gpio-bank"; reg = <0x11130000 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO2>; @@ -991,7 +991,7 @@ }; gpio3: gpio@11140000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3228-gpio-bank", "rockchip,gpio-bank"; reg = <0x11140000 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO3>; diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index 937fec4b8..8faf7445b 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -1425,7 +1425,7 @@ ranges; gpio0: gpio@ff750000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3288-gpio-bank", "rockchip,gpio-bank"; reg = <0x0 0xff750000 0x0 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO0>; @@ -1439,7 +1439,7 @@ }; gpio1: gpio@ff780000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3288-gpio-bank", "rockchip,gpio-bank"; reg = <0x0 0xff780000 0x0 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO1>; @@ -1453,7 +1453,7 @@ }; gpio2: gpio@ff790000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3288-gpio-bank", "rockchip,gpio-bank"; reg = <0x0 0xff790000 0x0 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO2>; @@ -1467,7 +1467,7 @@ }; gpio3: gpio@ff7a0000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3288-gpio-bank", "rockchip,gpio-bank"; reg = <0x0 0xff7a0000 0x0 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO3>; @@ -1481,7 +1481,7 @@ }; gpio4: gpio@ff7b0000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3288-gpio-bank", "rockchip,gpio-bank"; reg = <0x0 0xff7b0000 0x0 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO4>; @@ -1495,7 +1495,7 @@ }; gpio5: gpio@ff7c0000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3288-gpio-bank", "rockchip,gpio-bank"; reg = <0x0 0xff7c0000 0x0 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO5>; @@ -1509,7 +1509,7 @@ }; gpio6: gpio@ff7d0000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3288-gpio-bank", "rockchip,gpio-bank"; reg = <0x0 0xff7d0000 0x0 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO6>; @@ -1523,7 +1523,7 @@ }; gpio7: gpio@ff7e0000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3288-gpio-bank", "rockchip,gpio-bank"; reg = <0x0 0xff7e0000 0x0 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO7>; @@ -1537,7 +1537,7 @@ }; gpio8: gpio@ff7f0000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3288-gpio-bank", "rockchip,gpio-bank"; reg = <0x0 0xff7f0000 0x0 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO8>; diff --git a/arch/arm/boot/dts/rv1108.dtsi b/arch/arm/boot/dts/rv1108.dtsi index 0dca27d09..3db2dbf1b 100644 --- a/arch/arm/boot/dts/rv1108.dtsi +++ b/arch/arm/boot/dts/rv1108.dtsi @@ -596,7 +596,7 @@ ranges; gpio0: gpio@20030000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rv1108-gpio-bank", "rockchip,gpio-bank"; reg = <0x20030000 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO0_PMU>; @@ -610,7 +610,7 @@ }; gpio1: gpio@10310000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rv1108-gpio-bank", "rockchip,gpio-bank"; reg = <0x10310000 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO1>; @@ -624,7 +624,7 @@ }; gpio2: gpio@10320000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rv1108-gpio-bank", "rockchip,gpio-bank"; reg = <0x10320000 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO2>; @@ -638,7 +638,7 @@ }; gpio3: gpio@10330000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rv1108-gpio-bank", "rockchip,gpio-bank"; reg = <0x10330000 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO3>; diff --git a/arch/arm/boot/dts/rv1126.dtsi b/arch/arm/boot/dts/rv1126.dtsi index 51e8e1741..0b2d2af87 100644 --- a/arch/arm/boot/dts/rv1126.dtsi +++ b/arch/arm/boot/dts/rv1126.dtsi @@ -428,7 +428,7 @@ ranges; gpio0: gpio@ff460000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rv1126-gpio-bank", "rockchip,gpio-bank"; reg = <0xff460000 0x100>; interrupts = ; clocks = <&pmucru PCLK_GPIO0>, <&pmucru DBCLK_GPIO0>; @@ -440,7 +440,7 @@ }; gpio1: gpio@ff620000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rv1126-gpio-bank", "rockchip,gpio-bank"; reg = <0xff620000 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO1>, <&cru DBCLK_GPIO1>; @@ -452,7 +452,7 @@ }; gpio2: gpio@ff630000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rv1126-gpio-bank", "rockchip,gpio-bank"; reg = <0xff630000 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO2>, <&cru DBCLK_GPIO2>; @@ -464,7 +464,7 @@ }; gpio3: gpio@ff640000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rv1126-gpio-bank", "rockchip,gpio-bank"; reg = <0xff640000 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO3>, <&cru DBCLK_GPIO3>; @@ -476,7 +476,7 @@ }; gpio4: gpio@ff650000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rv1126-gpio-bank", "rockchip,gpio-bank"; reg = <0xff650000 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO4>, <&cru DBCLK_GPIO4>; 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[81.204.249.205]) by smtp.gmail.com with ESMTPSA id z12-20020a1709064e0c00b008c405ebc32esm7002322eju.28.2023.02.23.11.49.23 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 23 Feb 2023 11:49:24 -0800 (PST) Message-ID: Date: Thu, 23 Feb 2023 20:49:23 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.6.0 From: Johan Jonker Subject: [PATCH v4 7/7] arm64: dts: rockchip: replace compatible gpio nodes To: linus.walleij@linaro.org, brgl@bgdev.pl Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, heiko@sntech.de, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org References: <3eeaa940-9d40-5e33-bc36-c9b0449ded9f@gmail.com> Content-Language: en-US In-Reply-To: <3eeaa940-9d40-5e33-bc36-c9b0449ded9f@gmail.com> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Currently all Rockchip gpio nodes have the same compatible. Compatible strings should be SoC related. Signed-off-by: Johan Jonker --- arch/arm64/boot/dts/rockchip/px30.dtsi | 8 ++++---- arch/arm64/boot/dts/rockchip/rk3308.dtsi | 10 +++++----- arch/arm64/boot/dts/rockchip/rk3328.dtsi | 8 ++++---- arch/arm64/boot/dts/rockchip/rk3368.dtsi | 8 ++++---- arch/arm64/boot/dts/rockchip/rk3399.dtsi | 10 +++++----- arch/arm64/boot/dts/rockchip/rk356x.dtsi | 10 +++++----- arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 10 +++++----- 7 files changed, 32 insertions(+), 32 deletions(-) -- 2.20.1 diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi b/arch/arm64/boot/dts/rockchip/px30.dtsi index 64f63e462..a129b3e07 100644 --- a/arch/arm64/boot/dts/rockchip/px30.dtsi +++ b/arch/arm64/boot/dts/rockchip/px30.dtsi @@ -1382,7 +1382,7 @@ ranges; gpio0: gpio@ff040000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,px30-gpio-bank", "rockchip,gpio-bank"; reg = <0x0 0xff040000 0x0 0x100>; interrupts = ; clocks = <&pmucru PCLK_GPIO0_PMU>; @@ -1395,7 +1395,7 @@ }; gpio1: gpio@ff250000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,px30-gpio-bank", "rockchip,gpio-bank"; reg = <0x0 0xff250000 0x0 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO1>; @@ -1408,7 +1408,7 @@ }; gpio2: gpio@ff260000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,px30-gpio-bank", "rockchip,gpio-bank"; reg = <0x0 0xff260000 0x0 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO2>; @@ -1421,7 +1421,7 @@ }; gpio3: gpio@ff270000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,px30-gpio-bank", "rockchip,gpio-bank"; reg = <0x0 0xff270000 0x0 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO3>; diff --git a/arch/arm64/boot/dts/rockchip/rk3308.dtsi b/arch/arm64/boot/dts/rockchip/rk3308.dtsi index e8d15ee53..c5344fa5c 100644 --- a/arch/arm64/boot/dts/rockchip/rk3308.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3308.dtsi @@ -793,7 +793,7 @@ ranges; gpio0: gpio@ff220000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3308-gpio-bank", "rockchip,gpio-bank"; reg = <0x0 0xff220000 0x0 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO0>; @@ -805,7 +805,7 @@ }; gpio1: gpio@ff230000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3308-gpio-bank", "rockchip,gpio-bank"; reg = <0x0 0xff230000 0x0 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO1>; @@ -817,7 +817,7 @@ }; gpio2: gpio@ff240000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3308-gpio-bank", "rockchip,gpio-bank"; reg = <0x0 0xff240000 0x0 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO2>; @@ -829,7 +829,7 @@ }; gpio3: gpio@ff250000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3308-gpio-bank", "rockchip,gpio-bank"; reg = <0x0 0xff250000 0x0 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO3>; @@ -841,7 +841,7 @@ }; gpio4: gpio@ff260000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3308-gpio-bank", "rockchip,gpio-bank"; reg = <0x0 0xff260000 0x0 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO4>; diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi index 0a068499c..b9185cffb 100644 --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi @@ -1045,7 +1045,7 @@ ranges; gpio0: gpio@ff210000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3328-gpio-bank", "rockchip,gpio-bank"; reg = <0x0 0xff210000 0x0 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO0>; @@ -1059,7 +1059,7 @@ }; gpio1: gpio@ff220000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3328-gpio-bank", "rockchip,gpio-bank"; reg = <0x0 0xff220000 0x0 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO1>; @@ -1073,7 +1073,7 @@ }; gpio2: gpio@ff230000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3328-gpio-bank", "rockchip,gpio-bank"; reg = <0x0 0xff230000 0x0 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO2>; @@ -1087,7 +1087,7 @@ }; gpio3: gpio@ff240000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3328-gpio-bank", "rockchip,gpio-bank"; reg = <0x0 0xff240000 0x0 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO3>; diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi index b89536940..729e1eed5 100644 --- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi @@ -978,7 +978,7 @@ ranges; gpio0: gpio@ff750000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3368-gpio-bank", "rockchip,gpio-bank"; reg = <0x0 0xff750000 0x0 0x100>; clocks = <&cru PCLK_GPIO0>; interrupts = ; @@ -992,7 +992,7 @@ }; gpio1: gpio@ff780000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3368-gpio-bank", "rockchip,gpio-bank"; reg = <0x0 0xff780000 0x0 0x100>; clocks = <&cru PCLK_GPIO1>; interrupts = ; @@ -1006,7 +1006,7 @@ }; gpio2: gpio@ff790000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3368-gpio-bank", "rockchip,gpio-bank"; reg = <0x0 0xff790000 0x0 0x100>; clocks = <&cru PCLK_GPIO2>; interrupts = ; @@ -1020,7 +1020,7 @@ }; gpio3: gpio@ff7a0000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3368-gpio-bank", "rockchip,gpio-bank"; reg = <0x0 0xff7a0000 0x0 0x100>; clocks = <&cru PCLK_GPIO3>; interrupts = ; diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi index 19b052e20..b88a4fe25 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi @@ -2085,7 +2085,7 @@ ranges; gpio0: gpio@ff720000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3399-gpio-bank", "rockchip,gpio-bank"; reg = <0x0 0xff720000 0x0 0x100>; clocks = <&pmucru PCLK_GPIO0_PMU>; interrupts = ; @@ -2099,7 +2099,7 @@ }; gpio1: gpio@ff730000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3399-gpio-bank", "rockchip,gpio-bank"; reg = <0x0 0xff730000 0x0 0x100>; clocks = <&pmucru PCLK_GPIO1_PMU>; interrupts = ; @@ -2113,7 +2113,7 @@ }; gpio2: gpio@ff780000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3399-gpio-bank", "rockchip,gpio-bank"; reg = <0x0 0xff780000 0x0 0x100>; clocks = <&cru PCLK_GPIO2>; interrupts = ; @@ -2127,7 +2127,7 @@ }; gpio3: gpio@ff788000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3399-gpio-bank", "rockchip,gpio-bank"; reg = <0x0 0xff788000 0x0 0x100>; clocks = <&cru PCLK_GPIO3>; interrupts = ; @@ -2141,7 +2141,7 @@ }; gpio4: gpio@ff790000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3399-gpio-bank", "rockchip,gpio-bank"; reg = <0x0 0xff790000 0x0 0x100>; clocks = <&cru PCLK_GPIO4>; interrupts = ; diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi index db4925fbf..e25894958 100644 --- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi @@ -1803,7 +1803,7 @@ ranges; gpio0: gpio@fdd60000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3568-gpio-bank", "rockchip,gpio-bank"; reg = <0x0 0xfdd60000 0x0 0x100>; interrupts = ; clocks = <&pmucru PCLK_GPIO0>, <&pmucru DBCLK_GPIO0>; @@ -1815,7 +1815,7 @@ }; gpio1: gpio@fe740000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3568-gpio-bank", "rockchip,gpio-bank"; reg = <0x0 0xfe740000 0x0 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO1>, <&cru DBCLK_GPIO1>; @@ -1827,7 +1827,7 @@ }; gpio2: gpio@fe750000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3568-gpio-bank", "rockchip,gpio-bank"; reg = <0x0 0xfe750000 0x0 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO2>, <&cru DBCLK_GPIO2>; @@ -1839,7 +1839,7 @@ }; gpio3: gpio@fe760000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3568-gpio-bank", "rockchip,gpio-bank"; reg = <0x0 0xfe760000 0x0 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO3>, <&cru DBCLK_GPIO3>; @@ -1851,7 +1851,7 @@ }; gpio4: gpio@fe770000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3568-gpio-bank", "rockchip,gpio-bank"; reg = <0x0 0xfe770000 0x0 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO4>, <&cru DBCLK_GPIO4>; diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi index 057f8be0d..be28b2978 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi @@ -1639,7 +1639,7 @@ #size-cells = <2>; gpio0: gpio@fd8a0000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3588-gpio-bank", "rockchip,gpio-bank"; reg = <0x0 0xfd8a0000 0x0 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO0>, <&cru DBCLK_GPIO0>; @@ -1652,7 +1652,7 @@ }; gpio1: gpio@fec20000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3588-gpio-bank", "rockchip,gpio-bank"; reg = <0x0 0xfec20000 0x0 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO1>, <&cru DBCLK_GPIO1>; @@ -1665,7 +1665,7 @@ }; gpio2: gpio@fec30000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3588-gpio-bank", "rockchip,gpio-bank"; reg = <0x0 0xfec30000 0x0 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO2>, <&cru DBCLK_GPIO2>; @@ -1678,7 +1678,7 @@ }; gpio3: gpio@fec40000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3588-gpio-bank", "rockchip,gpio-bank"; reg = <0x0 0xfec40000 0x0 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO3>, <&cru DBCLK_GPIO3>; @@ -1691,7 +1691,7 @@ }; gpio4: gpio@fec50000 { - compatible = "rockchip,gpio-bank"; + compatible = "rockchip,rk3588-gpio-bank", "rockchip,gpio-bank"; reg = <0x0 0xfec50000 0x0 0x100>; interrupts = ; clocks = <&cru PCLK_GPIO4>, <&cru DBCLK_GPIO4>;