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[95.127.39.43]) by smtp.gmail.com with ESMTPSA id m13-20020a056000008d00b002c54c92e125sm531885wrx.46.2023.03.02.14.41.08 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 02 Mar 2023 14:41:10 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Bernhard Beschow Cc: John Snow , David Woodhouse , BALATON Zoltan , =?utf-8?q?Herv=C3=A9_Poussineau?= , qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , qemu-block@nongnu.org Subject: [PATCH v3 01/18] hw/ide/piix: Expose output IRQ as properties for late object population Date: Thu, 2 Mar 2023 23:40:41 +0100 Message-Id: <20230302224058.43315-2-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230302224058.43315-1-philmd@linaro.org> References: <20230302224058.43315-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42d; envelope-from=philmd@linaro.org; helo=mail-wr1-x42d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Signed-off-by: Philippe Mathieu-Daudé --- hw/ide/piix.c | 14 ++++++++++++-- include/hw/ide/piix.h | 4 ++++ 2 files changed, 16 insertions(+), 2 deletions(-) diff --git a/hw/ide/piix.c b/hw/ide/piix.c index 41d60921e3..a36dac8469 100644 --- a/hw/ide/piix.c +++ b/hw/ide/piix.c @@ -121,6 +121,13 @@ static void piix_ide_reset(DeviceState *dev) pci_set_byte(pci_conf + 0x20, 0x01); /* BMIBA: 20-23h */ } +static void piix_ide_initfn(Object *obj) +{ + PCIIDEState *dev = PCI_IDE(obj); + + qdev_init_gpio_out_named(DEVICE(obj), dev->isa_irq, "ide-irq", 2); +} + static bool pci_piix_init_bus(PCIIDEState *d, unsigned i, Error **errp) { static const struct { @@ -133,6 +140,7 @@ static bool pci_piix_init_bus(PCIIDEState *d, unsigned i, Error **errp) }; int ret; + qemu_irq irq_out = d->isa_irq[i] ? : isa_get_irq(NULL, port_info[i].isairq); ide_bus_init(&d->bus[i], sizeof(d->bus[i]), DEVICE(d), i, 2); ret = ide_init_ioport(&d->bus[i], NULL, port_info[i].iobase, port_info[i].iobase2); @@ -141,7 +149,7 @@ static bool pci_piix_init_bus(PCIIDEState *d, unsigned i, Error **errp) object_get_typename(OBJECT(d)), i); return false; } - ide_bus_init_output_irq(&d->bus[i], isa_get_irq(NULL, port_info[i].isairq)); + ide_bus_init_output_irq(&d->bus[i], irq_out); bmdma_init(&d->bus[i], &d->bmdma[i], d); d->bmdma[i].bus = &d->bus[i]; @@ -162,7 +170,7 @@ static void pci_piix_ide_realize(PCIDevice *dev, Error **errp) vmstate_register(VMSTATE_IF(dev), 0, &vmstate_ide_pci, d); - for (unsigned i = 0; i < 2; i++) { + for (unsigned i = 0; i < ARRAY_SIZE(d->isa_irq); i++) { if (!pci_piix_init_bus(d, i, errp)) { return; } @@ -199,6 +207,7 @@ static void piix3_ide_class_init(ObjectClass *klass, void *data) static const TypeInfo piix3_ide_info = { .name = TYPE_PIIX3_IDE, .parent = TYPE_PCI_IDE, + .instance_init = piix_ide_initfn, .class_init = piix3_ide_class_init, }; @@ -221,6 +230,7 @@ static void piix4_ide_class_init(ObjectClass *klass, void *data) static const TypeInfo piix4_ide_info = { .name = TYPE_PIIX4_IDE, .parent = TYPE_PCI_IDE, + .instance_init = piix_ide_initfn, .class_init = piix4_ide_class_init, }; diff --git a/include/hw/ide/piix.h b/include/hw/ide/piix.h index ef3ef3d62d..533d24d408 100644 --- a/include/hw/ide/piix.h +++ b/include/hw/ide/piix.h @@ -1,6 +1,10 @@ #ifndef HW_IDE_PIIX_H #define HW_IDE_PIIX_H +/* + * QEMU interface: + * + named GPIO outputs "ide-irq": asserted by each IDE channel + */ #define TYPE_PIIX3_IDE "piix3-ide" #define TYPE_PIIX4_IDE "piix4-ide" From patchwork Thu Mar 2 22:40:42 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 658155 Delivered-To: patch@linaro.org Received: by 2002:adf:a3c6:0:0:0:0:0 with SMTP id m6csp144950wrb; Thu, 2 Mar 2023 14:42:12 -0800 (PST) X-Google-Smtp-Source: AK7set9Hp3xyGUb6F0IQN2v/w+lUOZ4d1GUhyL8O2rlc64SiaznZfoo6cQU0tRxk1B9N0GhWySbZ X-Received: by 2002:a05:6214:1249:b0:56e:bfda:a14f with SMTP id r9-20020a056214124900b0056ebfdaa14fmr23849947qvv.9.1677796931847; Thu, 02 Mar 2023 14:42:11 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1677796931; cv=none; d=google.com; s=arc-20160816; b=TxkmGPJSMnAFrn7E8ztA7Sv9Q+t3KK5hfEToe+YmVXDT/WA/mfNKgg4lO4RD20qj4L EwRmk54qzriJ94/L2ZkZSnJJkFtEX3Kyd5VyYhsgUIVa9ULHthpiwH/mb7UYJXlZZ98h pezK6/KoP3451p8PkV6LsJ5OOo+tPpknntWgZIAnD+o0ardXIgPyORhzeowJoGW21VKC avRXdEUfSZ9c/69kBQntDr1Va7YgKzI+d47aSr8/oP99vJoVcN4F4HahXUn1UkcG4nke D9D5TTjuwwvqJZtwXnge7BWUST+M676N4e85mXt/LPD2SA2qsapwCcRBbAJ4wknn4Ikv 2PoA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=uGLX24+M0yUzTdArc9wULeHBvztrfWJqtGM1+N7rTy8=; b=UJiFzQNAovgpgDghCgb1DQDNMjzJaS2uiLLXkzZyS7xQdLDPkaJvITgyEiVWX/z/8w gfQOVwp4TNhuugaAI13HwAKtdzIP8k1MeejIQrVh1t6WhbHaZui27m/sCCFRfPr/yXnz HWCq/WanscvvXnGKq11i+KurzGQ4DrIM4Ya87Kqobos022K9wunPiuKgd5j0LIpyOQDB 7V9eajbhimoqBZAOQ2vFNAgh3v7xqi1nRdu2oX9LzERYzyWGoosNYddVjQ3v6V8dnOOx ZQ69Qc6Sdc6ao6l7IY7xXtwmvYQUl32CAnSQnJ8dp19AvdQs+BcfnDKET30dV0NX8e0Y E99g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=lkXMb2pm; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[95.127.39.43]) by smtp.gmail.com with ESMTPSA id z5-20020a5d4c85000000b002c71703876bsm504884wrs.14.2023.03.02.14.41.15 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 02 Mar 2023 14:41:17 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Bernhard Beschow Cc: John Snow , David Woodhouse , BALATON Zoltan , =?utf-8?q?Herv=C3=A9_Poussineau?= , qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , qemu-block@nongnu.org Subject: [PATCH v3 02/18] hw/ide/piix: Allow using PIIX3-IDE as standalone PCI function Date: Thu, 2 Mar 2023 23:40:42 +0100 Message-Id: <20230302224058.43315-3-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230302224058.43315-1-philmd@linaro.org> References: <20230302224058.43315-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::431; envelope-from=philmd@linaro.org; helo=mail-wr1-x431.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org In order to allow Frankenstein uses such plugging a PIIX3 IDE function on a ICH9 chipset (which already exposes AHCI ports...) as: $ qemu-system-x86_64 -M q35 -device piix3-ide add a kludge to automatically wires the IDE IRQs on an ISA bus exposed by a PCI-to-ISA bridge (usually function #0). Restrict this kludge to the PIIX3. Reported-by: Bernhard Beschow Signed-off-by: Philippe Mathieu-Daudé --- TODO: describe why this configuration is broken (multiple output IRQs wired to the same input IRQ can lead to various IRQ level changed in the iothread, thus missed by the vCPUs). --- hw/ide/piix.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/hw/ide/piix.c b/hw/ide/piix.c index a36dac8469..7cb96ef67f 100644 --- a/hw/ide/piix.c +++ b/hw/ide/piix.c @@ -170,6 +170,18 @@ static void pci_piix_ide_realize(PCIDevice *dev, Error **errp) vmstate_register(VMSTATE_IF(dev), 0, &vmstate_ide_pci, d); + if (!d->isa_irq[0] && !d->isa_irq[1] + && DEVICE_GET_CLASS(d)->user_creatable) { + /* kludge specific to TYPE_PIIX3_IDE */ + Object *isabus = object_resolve_path_type("", TYPE_ISA_BUS, NULL); + + if (!isabus) { + error_setg(errp, "Unable to find a single ISA bus"); + return; + } + d->isa_irq[0] = isa_bus_get_irq(ISA_BUS(isabus), 14); + d->isa_irq[1] = isa_bus_get_irq(ISA_BUS(isabus), 15); + } for (unsigned i = 0; i < ARRAY_SIZE(d->isa_irq); i++) { if (!pci_piix_init_bus(d, i, errp)) { return; @@ -202,6 +214,13 @@ static void piix3_ide_class_init(ObjectClass *klass, void *data) k->class_id = PCI_CLASS_STORAGE_IDE; set_bit(DEVICE_CATEGORY_STORAGE, dc->categories); dc->hotpluggable = false; + /* + * This function is part of a Super I/O chip and shouldn't be user + * creatable. However QEMU accepts impossible hardware setups such + * plugging a PIIX IDE function on a ICH ISA bridge. + * Keep this Frankenstein (ab)use working. + */ + dc->user_creatable = true; } static const TypeInfo piix3_ide_info = { @@ -225,6 +244,8 @@ static void piix4_ide_class_init(ObjectClass *klass, void *data) k->class_id = PCI_CLASS_STORAGE_IDE; set_bit(DEVICE_CATEGORY_STORAGE, dc->categories); dc->hotpluggable = false; + /* Reason: Part of a Super I/O chip */ + dc->user_creatable = false; } static const TypeInfo piix4_ide_info = { From patchwork Thu Mar 2 22:40:43 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 658156 Delivered-To: patch@linaro.org Received: by 2002:adf:a3c6:0:0:0:0:0 with SMTP id m6csp144985wrb; Thu, 2 Mar 2023 14:42:19 -0800 (PST) X-Google-Smtp-Source: AK7set+C8YotUdFTbR/KAVp+W2jLFAGAHEDb+rTDqVlBZL4Ti/EuXI1XEJP6f+NOKuHT4VEL9sSX X-Received: by 2002:a05:6214:301e:b0:56e:a658:84e4 with SMTP id ke30-20020a056214301e00b0056ea65884e4mr19761055qvb.36.1677796938910; Thu, 02 Mar 2023 14:42:18 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1677796938; cv=none; d=google.com; s=arc-20160816; b=vO3VeaHqXDkWxDn8j1znPUPqmqHH/RsZc75USXepi/tpekfFSpCl7XMnEQuouEN8P/ TVLj8jV8fBbFw5c8kOqM1tPTqvZiYl9xaNXssIWR/9oNncWLPiupI5TTuoevBd6t0utV NUDeKZp9P2C2L69DdHYUyVc7EB4Au21VEwCIsG/IC+j7O0eilh2T/vHEuIN2mtYubeuK RKPjg+mijiN7iMwqshrxwfhFcezodOnj+Pi6v/NLoOAB9DbTQhCJz24uu2wZXlOq9+g4 9m1kDuclfx6BlNe32matwMx/3A6p4CeHvizZBpuy1d6MIQqAz2VRr/9cqvuTOS7/FQOd 06KQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=IBU+8jdhjCYbSlld/hmcA7nJYY2utc4DYNvGGjyLRLg=; b=UFyzGHDV1668CvDmKqIOTclYhVivfX95Bn3Uc0KaEEJizMXmsFvQZoVInPsTegs48W UpcHPMJmccy6EK57bmHZyvm+buvAuoh+vB7xuu3UFJ1CmeizA0Troou4qtCb4aRhpr7R 26E5ghFn/pyBGSYfp7pWyOkJcjeg0cpb2lEQXw7HyDd4q7V13ah5RErYWxWmwws+WMG+ GIZHvT/3+2eX404IpWniid2tiRKhl/wvnIySQFKdNUXM47lb4Nt9FVH1hNzOhJPY9aJQ iaaGGDZAhFGPtGc9ErkJwqmiCzn9GMMWwJ+h+sYi7tWJ1dfyUJHb4xXwHo0IKRR4gGel Nh4g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="n0/7lUwE"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[95.127.39.43]) by smtp.gmail.com with ESMTPSA id o14-20020a5d408e000000b002bfd524255esm497315wrp.43.2023.03.02.14.41.22 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 02 Mar 2023 14:41:25 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Bernhard Beschow Cc: John Snow , David Woodhouse , BALATON Zoltan , =?utf-8?q?Herv=C3=A9_Poussineau?= , qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , "Michael S. Tsirkin" , Marcel Apfelbaum , Paolo Bonzini , Richard Henderson , Eduardo Habkost Subject: [PATCH v3 03/18] hw/i386/pc_piix: Wire PIIX3 IDE ouput IRQs to ISA bus IRQs 14/15 Date: Thu, 2 Mar 2023 23:40:43 +0100 Message-Id: <20230302224058.43315-4-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230302224058.43315-1-philmd@linaro.org> References: <20230302224058.43315-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42b; envelope-from=philmd@linaro.org; helo=mail-wr1-x42b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Since pc_init1() has access to the ISABus*, retrieve the ISA IRQs with isa_bus_get_irq(). Signed-off-by: Philippe Mathieu-Daudé --- hw/i386/pc_piix.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index 126b6c11df..1e90b9ff0d 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -277,7 +277,13 @@ static void pc_init1(MachineState *machine, if (pcmc->pci_enabled) { PCIDevice *dev; - dev = pci_create_simple(pci_bus, piix3_devfn + 1, TYPE_PIIX3_IDE); + dev = pci_new_multifunction(piix3_devfn + 1, false, TYPE_PIIX3_IDE); + qdev_connect_gpio_out_named(DEVICE(dev), "ide-irq", 0, + isa_bus_get_irq(isa_bus, 14)); + qdev_connect_gpio_out_named(DEVICE(dev), "ide-irq", 1, + isa_bus_get_irq(isa_bus, 15)); + pci_realize_and_unref(dev, pci_bus, &error_fatal); + pci_ide_create_devs(dev); idebus[0] = qdev_get_child_bus(&dev->qdev, "ide.0"); idebus[1] = qdev_get_child_bus(&dev->qdev, "ide.1"); From patchwork Thu Mar 2 22:40:44 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 658157 Delivered-To: patch@linaro.org Received: by 2002:adf:a3c6:0:0:0:0:0 with SMTP id m6csp144991wrb; Thu, 2 Mar 2023 14:42:19 -0800 (PST) X-Google-Smtp-Source: AK7set+o9bz7eRklydwMspe8n35J8hZMA4d6UWsIVCx8ItF3cVbVua5PoqzvNhrjp6zavWV+Ld88 X-Received: by 2002:ad4:5cec:0:b0:56e:a819:f902 with SMTP id iv12-20020ad45cec000000b0056ea819f902mr23136168qvb.2.1677796939429; Thu, 02 Mar 2023 14:42:19 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1677796939; cv=none; d=google.com; s=arc-20160816; b=LmE+xj2786Z2TUOkhFKzWBl50M0jTWFxA60DXojTB5wy2zdPwmYZKMQCDMrGVFQCfn h6cQNX84fv81Z6bilJFaGlzj1NuXTfqHNd4moA0Q2ktFc3YMeVL1OZneLrHQm0m7cEy6 uJoMzWiNGkHbpF5pauyGYT/ROS2QDtBcFOB9wkfG06kDf0JqMBgyuNRGs7SJc6vs7pP9 ++ec+RDzj0cSd1lwBT3Qr3KUju4g2HJWIYqUloKvx6pcUh0mTZqyvtHBmX+JRzHOX5T7 zCsr0LaGX6xAERa9/ij/d8BA81r0dechGPdzSNUkJVOnOGsheIwX3+OILFZe13YxUSF7 Md1Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=+sfyAsKb/ybApqIFl07T9s+7iUFCDW80zwk8fRCVEAE=; b=wwTjJ1SnPZQH6DpOouPzqj0H7ALS2PsWxkO9aAY5TxznsZxhPnx/jpF4aQNUC01C2X r1JF23TxA5A0z0sZDB45XuhbCOoYAo8etY0mIwnMgBX2xG/1EC6REOrEQoLhayyLE1zE UHxpXt47kifmMPr2MZHx+IF4clIADZmKMOmfsixSQTtIstKdRmj9xx5TDrFGxUVIlG+y jNxrLD1ntaN51hnfRQTQDrYohaQUg+KZCZfesUcwv3F15SPdRbYOqK+lgVj1wn6Gea8l 66iSzElCByTAHfDz8fR8oM7OQS3rquK9IVaLNSeEa1hEIREBxMsaEfuk6+YeZcx4H+Qo m53Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=xu1rjB7Y; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[95.127.39.43]) by smtp.gmail.com with ESMTPSA id x17-20020adfdcd1000000b002c5804b6afasm497341wrm.67.2023.03.02.14.41.30 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 02 Mar 2023 14:41:32 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Bernhard Beschow Cc: John Snow , David Woodhouse , BALATON Zoltan , =?utf-8?q?Herv=C3=A9_Poussineau?= , qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aurelien Jarno Subject: [PATCH v3 04/18] hw/isa/piix4: Wire PIIX4 IDE ouput IRQs to ISA bus IRQs 14/15 Date: Thu, 2 Mar 2023 23:40:44 +0100 Message-Id: <20230302224058.43315-5-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230302224058.43315-1-philmd@linaro.org> References: <20230302224058.43315-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32e; envelope-from=philmd@linaro.org; helo=mail-wm1-x32e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org piix4_realize() initialized an array of 16 ISA IRQs in PIIX4State::isa[], use it to wire the IDE output IRQs. Signed-off-by: Philippe Mathieu-Daudé --- hw/isa/piix4.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c index e0b149f8eb..702b458a3e 100644 --- a/hw/isa/piix4.c +++ b/hw/isa/piix4.c @@ -229,6 +229,8 @@ static void piix4_realize(PCIDevice *dev, Error **errp) /* IDE */ qdev_prop_set_int32(DEVICE(&s->ide), "addr", dev->devfn + 1); + qdev_connect_gpio_out_named(DEVICE(&s->ide), "ide-irq", 0, s->isa[14]); + qdev_connect_gpio_out_named(DEVICE(&s->ide), "ide-irq", 1, s->isa[15]); if (!qdev_realize(DEVICE(&s->ide), BUS(pci_bus), errp)) { return; } From patchwork Thu Mar 2 22:40:45 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 658165 Delivered-To: patch@linaro.org Received: by 2002:adf:a3c6:0:0:0:0:0 with SMTP id m6csp145249wrb; Thu, 2 Mar 2023 14:43:08 -0800 (PST) X-Google-Smtp-Source: AK7set8l4T3HEH4tUohNQw+L+FpYl1U3Q8O/Y2GBLlN4IAZs0d020ngHH3NT4hlbvbbUvUJRiKjy X-Received: by 2002:a05:622a:5cf:b0:3bf:d5e4:308c with SMTP id d15-20020a05622a05cf00b003bfd5e4308cmr20773937qtb.46.1677796988246; Thu, 02 Mar 2023 14:43:08 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1677796988; cv=none; d=google.com; s=arc-20160816; b=QgzBrimoEq7rwe/KKQkD7cTsEDesJyc7aRyFOOkJNNLZBdByI/j6WjbtK4cLXm2BN8 jJEYcIi5w/6CCO2GA1AV7pNdh4028ytbpDT+zdRNogXJyRbvTWb4CFp8J5s043ldwJ/k 5/54dERrRF59QeIOmGg8WNC8HegXYt1P2p17fTWqL2LIUt0RVu7lZbaBfGxA+2x343/Q yg7+Wniph8UO4tfKWrfEHC4zYACI/fpEMbFuj+3Doc6o/6xjYXyQ5Ce/XfbFz2+wVRtP wBeg8qBzy13cSy1YSQpu1t4q33R37kJGp8FGKVdiLjeAC7BaBNEq/Ygd96dU19Yu6853 Gu8w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=vZWv5g94w5/z2ukq0a5DPi6E7jJ1PV3zxu20I2knB1k=; b=Ctno9Jfrcbr+dGj6Gdc0WXs0I8TPAzt6TnRHgXW4gP1R1weUj/MCKQcET9gH2VWyob m0BVPL3tTL9en6GPZwywUFszGo3+PD+gg+yyXpcpgmCIYPaIpSwh6MDfAL0RqYmbLgw3 Dh32RJtwUMShuz8j3QArnbFtTGEGK3hTPMuNSLIiM7qIlvWa/0AOmur3trBL3gQU03f4 vlRX38hPcqi+XdKGjBqTbJ7QffFcInkN6AQM41T6H+GZUWQo8sqYWIZSsZpSP+6LidtI Bg+6ZKx4bkNldTVQNDDw4lJh5uSYTwQIEVSrIuRyi23GHbEJ8F6yGcDq+Qz1C4GYdGO5 zkgQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=a0ZDSzlU; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[95.127.39.43]) by smtp.gmail.com with ESMTPSA id j14-20020a5d564e000000b002cde25fba30sm523767wrw.1.2023.03.02.14.41.37 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 02 Mar 2023 14:41:39 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Bernhard Beschow Cc: John Snow , David Woodhouse , BALATON Zoltan , =?utf-8?q?Herv=C3=A9_Poussineau?= , qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Richard Henderson , qemu-block@nongnu.org Subject: [PATCH v3 05/18] hw/ide: Rename ISA specific ide_init_ioport -> ide_bus_init_ioport_isa Date: Thu, 2 Mar 2023 23:40:45 +0100 Message-Id: <20230302224058.43315-6-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230302224058.43315-1-philmd@linaro.org> References: <20230302224058.43315-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::429; envelope-from=philmd@linaro.org; helo=mail-wr1-x429.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Rename ide_init_ioport() as ide_bus_init_ioport_isa() to make explicit it expects an ISA device. Move the declaration to "hw/ide/isa.h" where it belongs. Message-Id: <20230215161641.32663-13-philmd@linaro.org> Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- hw/ide/ioport.c | 4 +++- hw/ide/isa.c | 2 +- hw/ide/piix.c | 5 +++-- include/hw/ide/internal.h | 1 - include/hw/ide/isa.h | 3 +++ 5 files changed, 10 insertions(+), 5 deletions(-) diff --git a/hw/ide/ioport.c b/hw/ide/ioport.c index e2ecc6230c..d869f8018a 100644 --- a/hw/ide/ioport.c +++ b/hw/ide/ioport.c @@ -25,6 +25,7 @@ #include "qemu/osdep.h" #include "hw/isa/isa.h" +#include "hw/ide/isa.h" #include "hw/ide/internal.h" #include "trace.h" @@ -40,7 +41,8 @@ static const MemoryRegionPortio ide_portio2_list[] = { PORTIO_END_OF_LIST(), }; -int ide_init_ioport(IDEBus *bus, ISADevice *dev, int iobase, int iobase2) +int ide_bus_init_ioport_isa(IDEBus *bus, ISADevice *dev, + int iobase, int iobase2) { int ret; diff --git a/hw/ide/isa.c b/hw/ide/isa.c index 95053e026f..6eed16bf87 100644 --- a/hw/ide/isa.c +++ b/hw/ide/isa.c @@ -71,7 +71,7 @@ static void isa_ide_realizefn(DeviceState *dev, Error **errp) ISAIDEState *s = ISA_IDE(dev); ide_bus_init(&s->bus, sizeof(s->bus), dev, 0, 2); - ide_init_ioport(&s->bus, isadev, s->iobase, s->iobase2); + ide_bus_init_ioport_isa(&s->bus, isadev, s->iobase, s->iobase2); ide_bus_init_output_irq(&s->bus, isa_get_irq(isadev, s->irqnum)); vmstate_register(VMSTATE_IF(dev), 0, &vmstate_ide_isa, s); ide_bus_register_restart_cb(&s->bus); diff --git a/hw/ide/piix.c b/hw/ide/piix.c index 7cb96ef67f..cb527553e2 100644 --- a/hw/ide/piix.c +++ b/hw/ide/piix.c @@ -33,6 +33,7 @@ #include "hw/pci/pci.h" #include "hw/ide/piix.h" #include "hw/ide/pci.h" +#include "hw/ide/isa.h" #include "trace.h" static uint64_t bmdma_read(void *opaque, hwaddr addr, unsigned size) @@ -142,8 +143,8 @@ static bool pci_piix_init_bus(PCIIDEState *d, unsigned i, Error **errp) qemu_irq irq_out = d->isa_irq[i] ? : isa_get_irq(NULL, port_info[i].isairq); ide_bus_init(&d->bus[i], sizeof(d->bus[i]), DEVICE(d), i, 2); - ret = ide_init_ioport(&d->bus[i], NULL, port_info[i].iobase, - port_info[i].iobase2); + ret = ide_bus_init_ioport_isa(&d->bus[i], NULL, port_info[i].iobase, + port_info[i].iobase2); if (ret) { error_setg_errno(errp, -ret, "Failed to realize %s port %u", object_get_typename(OBJECT(d)), i); diff --git a/include/hw/ide/internal.h b/include/hw/ide/internal.h index d9f1f77dd5..d3b7fdc504 100644 --- a/include/hw/ide/internal.h +++ b/include/hw/ide/internal.h @@ -618,7 +618,6 @@ int ide_init_drive(IDEState *s, BlockBackend *blk, IDEDriveKind kind, int chs_trans, Error **errp); void ide_exit(IDEState *s); void ide_bus_init_output_irq(IDEBus *bus, qemu_irq irq_out); -int ide_init_ioport(IDEBus *bus, ISADevice *isa, int iobase, int iobase2); void ide_bus_set_irq(IDEBus *bus); void ide_bus_register_restart_cb(IDEBus *bus); diff --git a/include/hw/ide/isa.h b/include/hw/ide/isa.h index 1cd0ff1fa6..7f7a850265 100644 --- a/include/hw/ide/isa.h +++ b/include/hw/ide/isa.h @@ -10,11 +10,14 @@ #define HW_IDE_ISA_H #include "qom/object.h" +#include "hw/ide/internal.h" #define TYPE_ISA_IDE "isa-ide" OBJECT_DECLARE_SIMPLE_TYPE(ISAIDEState, ISA_IDE) ISADevice *isa_ide_init(ISABus *bus, int iobase, int iobase2, int irqnum, DriveInfo *hd0, DriveInfo *hd1); +int ide_bus_init_ioport_isa(IDEBus *bus, ISADevice *isa, + int iobase, int iobase2); #endif From patchwork Thu Mar 2 22:40:46 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 658160 Delivered-To: patch@linaro.org Received: by 2002:adf:a3c6:0:0:0:0:0 with SMTP id m6csp145082wrb; Thu, 2 Mar 2023 14:42:36 -0800 (PST) X-Google-Smtp-Source: AK7set8a0b9HQlBq1iRbcGeskhpXpJKdE2yyFCXpmAXDgXUnNkAPivdwYDNkF9YpS5VsjhdCs9W0 X-Received: by 2002:ac8:5a05:0:b0:3a8:1677:bc39 with SMTP id n5-20020ac85a05000000b003a81677bc39mr21632836qta.52.1677796956728; Thu, 02 Mar 2023 14:42:36 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1677796956; cv=none; d=google.com; s=arc-20160816; b=pTU9R7G9ruaCIJBkYv66i9Zwx8CmJdbb+TBBu8jozPaas9vCRs0brjie6f692U6hMR fdWI+W863zoHuUGqL1/dCM8PIf3jqC7ezkCMih1AYmB+D8snQHdsEGD2SRbasdCeEwwl unc6WIvTNkYicdB3Vm0jqyT4jYVko0YY5fiyH1vEKPuG/a8jJhffUlPWKwp2lKCx2LQm PtcKSmOhIB4RbauQM4tsMwSQzQfjoGanfgpGxyaSrB629Ndho+ipgupbFuxz+Myf31Mh rIwPvYBCtcvOzKdTHz+In2UkxHe4poIa0EXeZQbqPtdfcZ5T21If8cEVugNbxfyTNHhH vyXA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=DSE7g2BGvjGKtD0MrBQHAr8f/88wxlLX0Z9UtPjGoiE=; b=yf6JohvWRDnmKrEOUGL8WbMXS6oa+p1KwXqfNs1lllOvbWMSF50f+M7Ubr5VtWt6bI MRqtnwnqEnuoPxZKRYW03bjvoaIj/adBttBr+ND2eNdkHinlOMvfSRujOgfVDv9Zj/eQ 0Nmq2WxlR7ouMeLN2rBg7uLY06pnytUEh9igTslMo/v0Z+WZ4ZLwUaBawMS/cWBgBoap 7HS27MwXyxXHoZnHcj5bHhH2i+CSKfHH+2N0DjsWmqwewjUv5m+M4L/Q0ifUzFRdY4tO cqSfT2ekdXwTbsId7+ouCT9z0pJy7D2PjcT/pz7WrJp9HYpp2gpNn2k+g2LGapHHPLWL lKAg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=x8OyNtl4; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[95.127.39.43]) by smtp.gmail.com with ESMTPSA id h12-20020a05600c314c00b003dfee43863fsm4595726wmo.26.2023.03.02.14.41.45 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 02 Mar 2023 14:41:46 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Bernhard Beschow Cc: John Snow , David Woodhouse , BALATON Zoltan , =?utf-8?q?Herv=C3=A9_Poussineau?= , qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , qemu-block@nongnu.org Subject: [PATCH v3 06/18] hw/ide/piix: Ensure IDE output IRQs are wired at realization Date: Thu, 2 Mar 2023 23:40:46 +0100 Message-Id: <20230302224058.43315-7-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230302224058.43315-1-philmd@linaro.org> References: <20230302224058.43315-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::333; envelope-from=philmd@linaro.org; helo=mail-wm1-x333.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Ensure both IDE output IRQ lines are wired. We can remove the last use of isa_get_irq(NULL). Signed-off-by: Philippe Mathieu-Daudé --- hw/ide/piix.c | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/hw/ide/piix.c b/hw/ide/piix.c index cb527553e2..91424e5249 100644 --- a/hw/ide/piix.c +++ b/hw/ide/piix.c @@ -134,14 +134,17 @@ static bool pci_piix_init_bus(PCIIDEState *d, unsigned i, Error **errp) static const struct { int iobase; int iobase2; - int isairq; } port_info[] = { - {0x1f0, 0x3f6, 14}, - {0x170, 0x376, 15}, + {0x1f0, 0x3f6}, + {0x170, 0x376}, }; int ret; - qemu_irq irq_out = d->isa_irq[i] ? : isa_get_irq(NULL, port_info[i].isairq); + if (!d->isa_irq[i]) { + error_setg(errp, "output IDE IRQ %u not connected", i); + return false; + } + ide_bus_init(&d->bus[i], sizeof(d->bus[i]), DEVICE(d), i, 2); ret = ide_bus_init_ioport_isa(&d->bus[i], NULL, port_info[i].iobase, port_info[i].iobase2); @@ -150,7 +153,7 @@ static bool pci_piix_init_bus(PCIIDEState *d, unsigned i, Error **errp) object_get_typename(OBJECT(d)), i); return false; } - ide_bus_init_output_irq(&d->bus[i], irq_out); + ide_bus_init_output_irq(&d->bus[i], d->isa_irq[i]); bmdma_init(&d->bus[i], &d->bmdma[i], d); d->bmdma[i].bus = &d->bus[i]; From patchwork Thu Mar 2 22:40:47 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 658166 Delivered-To: patch@linaro.org Received: by 2002:adf:a3c6:0:0:0:0:0 with SMTP id m6csp145434wrb; Thu, 2 Mar 2023 14:43:56 -0800 (PST) X-Google-Smtp-Source: AK7set/9OPvXS2PAgb5TTEftMce61p6QY42/hB8NXKdu/YtE551KtFbUY+cg0qr+Rml2fYXhh2GE X-Received: by 2002:a05:622a:1356:b0:3af:b6bd:aba7 with SMTP id w22-20020a05622a135600b003afb6bdaba7mr21255366qtk.43.1677797036179; Thu, 02 Mar 2023 14:43:56 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1677797036; cv=none; d=google.com; s=arc-20160816; b=usMaeCE4rnZQfFpMwYQdqY7gwJpHIj4xD4QEPCxD3iTof5cRSULsHcSOP4heLmZwj3 snC7Iu7MoE0qjP2x08vVZodgWd1Ev2VhxT53rRK1ICKLEdhDUy4ix15r1vzWmYy7meZh TWcWC8WcMwzAMaNw6thezEyboIx65INvHtdXBFpcsPN+DWvXtD16RxO+5a8BVbVw2KNt z/d0aXkZV2tE3qhWPMpJImbphOfJ8So8zo9jY+CC/6r2UvLQ+2t9eVEwc/k/zXuze8IF ldKT3pnK44J1x/Q/u4/QQBehJuur0U5CA0VfuPaMMDMAcNoqd7ij8wVAWs3OU8W9H0LW NbdQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=WBH0OC00WXelyQU0Dru5HltuKOYgUwSjsFr5h9b93CI=; b=cyI4ezcjdojf5FXlaA+2CNCEdHmATxGNIc8QQHd3pQLRZYal2jSuGZ7vwp2epOpeSU scbDVKaX2ZKVUjg9Z3ppyEhKiC957G1cTEOyf1DEjzVAw1VmlsKicG2i9v5EXgZO6/JT iM0/VUKvRdfmcDrxObCf55sGnDoUFDiQ9eAkXDZG0rr1eqmfJlKtio8Ovjms4iD6k7rs +5kZU4BIsuoIUQ//Suup3+3QBivzbJ369FHmrPjdpeQo6CPmkhn1RZcDCl3TONMTQnVk LG2d9OEoYTlMjoEXPtifU0LrXVL1bbbKPbOK7gGRfCkv4yzSRjI5sjCXoCcMtzErODAE KXhg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=rZvVoTx7; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[95.127.39.43]) by smtp.gmail.com with ESMTPSA id he11-20020a05600c540b00b003daf7721bb3sm4397190wmb.12.2023.03.02.14.41.52 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 02 Mar 2023 14:41:53 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Bernhard Beschow Cc: John Snow , David Woodhouse , BALATON Zoltan , =?utf-8?q?Herv=C3=A9_Poussineau?= , qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v3 07/18] hw/isa: Deprecate isa_get_irq() in favor of isa_bus_get_irq() Date: Thu, 2 Mar 2023 23:40:47 +0100 Message-Id: <20230302224058.43315-8-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230302224058.43315-1-philmd@linaro.org> References: <20230302224058.43315-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32a; envelope-from=philmd@linaro.org; helo=mail-wm1-x32a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Last commit removed the last use of isa_get_irq(NULL). Add an assertion to ensure we won't use that hack again. Deprecate in favor of the BUS API: isa_bus_get_irq(). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Mark Cave-Ayland --- hw/isa/isa-bus.c | 6 +++--- include/hw/isa/isa.h | 3 ++- 2 files changed, 5 insertions(+), 4 deletions(-) diff --git a/hw/isa/isa-bus.c b/hw/isa/isa-bus.c index a289eccfb1..081bac18ee 100644 --- a/hw/isa/isa-bus.c +++ b/hw/isa/isa-bus.c @@ -85,10 +85,10 @@ qemu_irq isa_bus_get_irq(ISABus *bus, unsigned irqnum) * This function is only for special cases such as the 'ferr', and * temporary use for normal devices until they are converted to qdev. */ -qemu_irq isa_get_irq(ISADevice *dev, unsigned isairq) +qemu_irq isa_get_irq(ISADevice *dev, unsigned irqnum) { - assert(!dev || ISA_BUS(qdev_get_parent_bus(DEVICE(dev))) == isabus); - return isa_bus_get_irq(isabus, isairq); + assert(dev); + return isa_bus_get_irq(ISA_BUS(qdev_get_parent_bus(DEVICE(dev))), irqnum); } void isa_connect_gpio_out(ISADevice *isadev, int gpioirq, unsigned isairq) diff --git a/include/hw/isa/isa.h b/include/hw/isa/isa.h index 40d6224a4e..75fb620782 100644 --- a/include/hw/isa/isa.h +++ b/include/hw/isa/isa.h @@ -87,7 +87,8 @@ ISADevice *isa_create_simple(ISABus *bus, const char *name); ISADevice *isa_vga_init(ISABus *bus); -qemu_irq isa_get_irq(ISADevice *dev, unsigned isairq); +/* isa_get_irq() is deprecated, please use isa_bus_get_irq() instead. */ +qemu_irq isa_get_irq(ISADevice *dev, unsigned irqnum); void isa_connect_gpio_out(ISADevice *isadev, int gpioirq, unsigned isairq); MemoryRegion *isa_address_space(ISADevice *dev); MemoryRegion *isa_address_space_io(ISADevice *dev); From patchwork Thu Mar 2 22:40:48 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 658159 Delivered-To: patch@linaro.org Received: by 2002:adf:a3c6:0:0:0:0:0 with SMTP id m6csp145039wrb; Thu, 2 Mar 2023 14:42:27 -0800 (PST) X-Google-Smtp-Source: AK7set9OASmMaGv8SSRn+1gcqwj3oABw1HeFRqqift/TK0NpwKygyO3si/GI+lq4J9x/+fEWmxg3 X-Received: by 2002:ac8:5b0f:0:b0:3bf:ca3d:673c with SMTP id m15-20020ac85b0f000000b003bfca3d673cmr18726259qtw.2.1677796947505; Thu, 02 Mar 2023 14:42:27 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1677796947; cv=none; d=google.com; s=arc-20160816; b=pqxgf8hag5TQu0lqzWNwoQew10KTzvHHfP8wZhb0dZk5QEvjB9MYMoPXt75WjN/syM ZTFghey2kZIxPX4qFCyHn6ywgijGFnhjJtHqPeq5m84ntzmWaFwYx4KGac+dJZJsa+PO 5CgwHujmVOiLMZn4m9WV1mCl7GdRBTWfUXd5DX5e0wkTh9IaKD1Zyhon0397dSFkituV 45ZwAn9vohj2QdP+yVDxzevC72Yj4Cn2CIWS6ILS6fgLV0OhUTXoI1bVKQyrG82jpvS/ b+OunLVq9WWaJwds0ufg5npRu4i362cPcD7NwXwsEqSkh/46djuV/RHHcJkDmYNxF+Ny 4MYA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=3AoU626teyyuqy/kOKhaATOA10AmPEd2CLo0HeKY7iM=; b=w8QHtStyLHIJ/OtAH4x2c53G2hDbIx2Ffxbv9X4j93/vPX8ukN0U5lCSrKCyclZbLy GIRyhKuNA9AclCEFBDx3g0JHh+K84my+RtTFaYybQ3zCZSbbW5sAOzjD1cTcJE/Zt2z7 tTnUZfuw1HqgBFvV26ENEecvDAAmIHJcgV4S46PLIXTQ40wn2z8LV7rcb2tskrAlEtgR JJwlVUj/HIXdKF06SpUsIl5fu4RQFj3ckAoXILGI5LhiV/pg3etC9+rM2z5xeoey2PUX Xgxha/g9oU4043TCAD4r19qW+eIrnppKbYm3sqjpxP4SgZmYUf/0QmTRAZfQ71ACF2pz xUcw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=AvtpbScb; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[95.127.39.43]) by smtp.gmail.com with ESMTPSA id g12-20020a05600c310c00b003dc49e0132asm4955231wmo.1.2023.03.02.14.41.59 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 02 Mar 2023 14:42:01 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Bernhard Beschow Cc: John Snow , David Woodhouse , BALATON Zoltan , =?utf-8?q?Herv=C3=A9_Poussineau?= , qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Mark Cave-Ayland , Richard Henderson , qemu-block@nongnu.org Subject: [PATCH v3 08/18] hw/ide: Introduce generic ide_init_ioport() Date: Thu, 2 Mar 2023 23:40:48 +0100 Message-Id: <20230302224058.43315-9-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230302224058.43315-1-philmd@linaro.org> References: <20230302224058.43315-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::334; envelope-from=philmd@linaro.org; helo=mail-wm1-x334.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Add ide_init_ioport() which is not restricted to the ISA bus. (Next commit will use it for a PCI device). Inspired-by: Mark Cave-Ayland Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- hw/ide/ioport.c | 12 ++++++++++-- include/hw/ide/internal.h | 2 ++ 2 files changed, 12 insertions(+), 2 deletions(-) diff --git a/hw/ide/ioport.c b/hw/ide/ioport.c index d869f8018a..ed7957dbae 100644 --- a/hw/ide/ioport.c +++ b/hw/ide/ioport.c @@ -46,8 +46,6 @@ int ide_bus_init_ioport_isa(IDEBus *bus, ISADevice *dev, { int ret; - /* ??? Assume only ISA and PCI configurations, and that the PCI-ISA - bridge has been setup properly to always register with ISA. */ ret = isa_register_portio_list(dev, &bus->portio_list, iobase, ide_portio_list, bus, "ide"); @@ -58,3 +56,13 @@ int ide_bus_init_ioport_isa(IDEBus *bus, ISADevice *dev, return ret; } + +void ide_bus_init_ioport(IDEBus *bus, Object *owner, MemoryRegion *io, + int iobase, int iobase2) +{ + portio_list_init(&bus->portio_list, owner, ide_portio_list, bus, "ide"); + portio_list_add(&bus->portio_list, io, iobase); + + portio_list_init(&bus->portio2_list, owner, ide_portio2_list, bus, "ide"); + portio_list_add(&bus->portio_list, io, iobase2); +} diff --git a/include/hw/ide/internal.h b/include/hw/ide/internal.h index d3b7fdc504..6967ca13e0 100644 --- a/include/hw/ide/internal.h +++ b/include/hw/ide/internal.h @@ -617,6 +617,8 @@ int ide_init_drive(IDEState *s, BlockBackend *blk, IDEDriveKind kind, uint32_t cylinders, uint32_t heads, uint32_t secs, int chs_trans, Error **errp); void ide_exit(IDEState *s); +void ide_bus_init_ioport(IDEBus *bus, Object *owner, MemoryRegion *io, + int iobase, int iobase2); void ide_bus_init_output_irq(IDEBus *bus, qemu_irq irq_out); void ide_bus_set_irq(IDEBus *bus); void ide_bus_register_restart_cb(IDEBus *bus); From patchwork Thu Mar 2 22:40:49 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 658161 Delivered-To: patch@linaro.org Received: by 2002:adf:a3c6:0:0:0:0:0 with SMTP id m6csp145102wrb; Thu, 2 Mar 2023 14:42:42 -0800 (PST) X-Google-Smtp-Source: AK7set+jAV8ICFM4yTUWC6VTMgnLJt5vkvEcXeuqDV+dL+rUmiRLmKr0p9GcF22TDKNLk4oG1gZ5 X-Received: by 2002:a05:622a:1801:b0:3bf:cd42:7724 with SMTP id t1-20020a05622a180100b003bfcd427724mr20812344qtc.11.1677796962648; Thu, 02 Mar 2023 14:42:42 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1677796962; cv=none; d=google.com; s=arc-20160816; b=wm3CdPTRuj02LdCTCMmJPdCFw6u+QIdThMNsbtYgKTkMZtpvtvbOXBCLnNaesbHew5 rnzngYKdywaOnE3Eo3q0TvnT6yvLHHEC1JDzvz/DadpLwDGN/a+DkmeYuBqahtO5lpl1 Z6+RvTh0cSzyGpHoI0rjF1eUxLUQd0PQU2+0qWYhq7T4Ki8Vru1k0FtMn+92Jmw2HR2+ v/2FTCfzp64XSOWgHskdusuf/IbyPCeJ75s7U1eNaEd6kaPMmXX75DIhieuT2T399udn jFGEtbpKDcxU9oSesrcdVzmhJBFbtkK0LRn0p10ydVUTuskd8cCvJ5IqJ49/BHgTOzmw eGXA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=H5itDKkjjwbFDWZM5dfCKNestHYP2geb5DKzbrDRTD4=; b=sqGLXQJVYxoNnXpk26BexzrjP1+YOs1/o7uekzSXR8HuA4faIWBmpszsxoonx0KFi1 Qr0Vt68goeSX154mssDLoc78Io/uEDHSL2KiSt28V6ZY+baOEABL9/Rzdk0V6EADAenW Px1poJqEIpDY5jsFhXDT3o+vAIztWv4rZjPtk7bBuWMUou3c5GLbR+SKnB6tOZyPn61j sZ0B8RWzLpbhEMGCCovvi3HdU8TYsKmytb9qsDAhn5ONE4jRlGIMPAYy7hwOxnBMikxF IO6E40hYMg03Dd4eQVhV+t2A+LlNZF2axkAAofM5vgi0B0yiRpeHpLB/13Q2QTMTgi34 1TPA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=PAVWdoTh; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[95.127.39.43]) by smtp.gmail.com with ESMTPSA id q10-20020a5d658a000000b002c70851fdd8sm475179wru.75.2023.03.02.14.42.07 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 02 Mar 2023 14:42:08 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Bernhard Beschow Cc: John Snow , David Woodhouse , BALATON Zoltan , =?utf-8?q?Herv=C3=A9_Poussineau?= , qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , qemu-block@nongnu.org Subject: [PATCH v3 09/18] hw/ide/piix: Use generic ide_bus_init_ioport() Date: Thu, 2 Mar 2023 23:40:49 +0100 Message-Id: <20230302224058.43315-10-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230302224058.43315-1-philmd@linaro.org> References: <20230302224058.43315-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::431; envelope-from=philmd@linaro.org; helo=mail-wr1-x431.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org TYPE_PIIX3_IDE is a PCI function inheriting from QOM TYPE_PCI_DEVICE. To be able to call the ISA specific ide_init_ioport_isa(), we call this function passing a NULL ISADevice argument. Remove this hack by calling the recently added generic ide_init_ioport(), which doesn't expect any ISADevice. Inspired-by: Bernhard Beschow Signed-off-by: Philippe Mathieu-Daudé --- hw/ide/piix.c | 11 +++-------- 1 file changed, 3 insertions(+), 8 deletions(-) diff --git a/hw/ide/piix.c b/hw/ide/piix.c index 91424e5249..2136895401 100644 --- a/hw/ide/piix.c +++ b/hw/ide/piix.c @@ -138,7 +138,6 @@ static bool pci_piix_init_bus(PCIIDEState *d, unsigned i, Error **errp) {0x1f0, 0x3f6}, {0x170, 0x376}, }; - int ret; if (!d->isa_irq[i]) { error_setg(errp, "output IDE IRQ %u not connected", i); @@ -146,13 +145,9 @@ static bool pci_piix_init_bus(PCIIDEState *d, unsigned i, Error **errp) } ide_bus_init(&d->bus[i], sizeof(d->bus[i]), DEVICE(d), i, 2); - ret = ide_bus_init_ioport_isa(&d->bus[i], NULL, port_info[i].iobase, - port_info[i].iobase2); - if (ret) { - error_setg_errno(errp, -ret, "Failed to realize %s port %u", - object_get_typename(OBJECT(d)), i); - return false; - } + ide_bus_init_ioport(&d->bus[i], OBJECT(d), + pci_address_space_io(PCI_DEVICE(d)), + port_info[i].iobase, port_info[i].iobase2); ide_bus_init_output_irq(&d->bus[i], d->isa_irq[i]); bmdma_init(&d->bus[i], &d->bmdma[i], d); From patchwork Thu Mar 2 22:40:50 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 658167 Delivered-To: patch@linaro.org Received: by 2002:adf:a3c6:0:0:0:0:0 with SMTP id m6csp145446wrb; Thu, 2 Mar 2023 14:44:01 -0800 (PST) X-Google-Smtp-Source: AK7set+nV5SyBBsoTrsItMFWlFwyk36dR/tHUE0a3papcPbssxxkxH2SuT39VwFmcEzfF4l0IBxO X-Received: by 2002:ac8:5805:0:b0:3bf:a932:5bce with SMTP id g5-20020ac85805000000b003bfa9325bcemr5783697qtg.2.1677797041203; Thu, 02 Mar 2023 14:44:01 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1677797041; cv=none; d=google.com; s=arc-20160816; b=fv4ONLj0SbSt1CQZQDwf9eP+6WCaHPQD3C5Gfcwq51lAoYJfaT6jhMRdyB6t0iDQdT qbd0rcQV33dBhtYQQnMpByX1VzKXKnEHgd2mhAn48A/yN45pINRzoOCN00I28wFU0IPX 47pB9c0KBunctX1kkp6P3BL8cm2x3ARxvUjeICauphtCn7bMjGoF+1P6sRWUdUslq68o g4p4U85GIEJvZdUYbfpKUZQ83zR5KN3jQetGzqE7gDFo6zzwhiFebV2jkT7eczJW3del oOnymEd/pLFccKpmdqSNmGfy17mA9N+B0rUDbfNsFATLZbtI3KarTu5RvYPx2O9RvkOM 8UMA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=uZKWKOH8CoWlg9l+QWicKQtR++JaD+yXwzgRvDSnsXc=; b=DwU1RT3Jan9dzvQfqsV1Tdq8pGq31Q4nmQt/U2KqeXpaZ4mE1F5NWBNcvmBeQAOqZj EeyM4wI+dEcuKn1snymVfgLEEdjxUYpsC7t/PYLd7bZjno8/Xrj6RzE35XKuZC72aJVt crjE5I0FwBHjL4e0ZQxLjm7wKCKMieLzhLOdA87myPIXUnrccDz3nYUjnrpNUPW3lF0x QdTy+KlQS5Y8rxy2aG1QdVi6MjDRXOjkxZyIYOAisCk5JtYjMpsz4t0gfTw2R3KCxqCg V5xCHrhDxsa1N7cMQkhdsbt4yfdNbrQDcWmVKjRWI2l+7dTHleg7+/h4JRU1sCNAYlWq gOQg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=E2opBkC2; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[95.127.39.43]) by smtp.gmail.com with ESMTPSA id j2-20020a5d6042000000b002c70d269b4esm464219wrt.91.2023.03.02.14.42.14 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 02 Mar 2023 14:42:15 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Bernhard Beschow Cc: John Snow , David Woodhouse , BALATON Zoltan , =?utf-8?q?Herv=C3=A9_Poussineau?= , qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v3 10/18] hw/isa: Ensure isa_register_portio_list() do not get NULL ISA device Date: Thu, 2 Mar 2023 23:40:50 +0100 Message-Id: <20230302224058.43315-11-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230302224058.43315-1-philmd@linaro.org> References: <20230302224058.43315-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::432; envelope-from=philmd@linaro.org; helo=mail-wr1-x432.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Previous commit removed the single call to isa_register_portio_list() with dev=NULL. To be sure we won't reintroduce such weird (ab)use, assert dev is non-NULL. We can now calls isa_address_space_io() to get the device I/O region. Note we can then remove the NULL check in isa_init_ioport() because it is only called in 2 places (and is static to this file): - isa_register_ioport() which first calls isa_address_space_io(), itself asserting dev is not NULL. - isa_register_portio_list() which also asserts dev is not NULL since the previous commit. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Mark Cave-Ayland --- hw/isa/isa-bus.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/hw/isa/isa-bus.c b/hw/isa/isa-bus.c index 081bac18ee..9c8224afa5 100644 --- a/hw/isa/isa-bus.c +++ b/hw/isa/isa-bus.c @@ -113,7 +113,7 @@ IsaDma *isa_bus_get_dma(ISABus *bus, int nchan) static inline void isa_init_ioport(ISADevice *dev, uint16_t ioport) { - if (dev && (dev->ioport_id == 0 || ioport < dev->ioport_id)) { + if (dev->ioport_id == 0 || ioport < dev->ioport_id) { dev->ioport_id = ioport; } } @@ -129,6 +129,7 @@ int isa_register_portio_list(ISADevice *dev, const MemoryRegionPortio *pio_start, void *opaque, const char *name) { + assert(dev); assert(piolist && !piolist->owner); if (!isabus) { From patchwork Thu Mar 2 22:40:51 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 658172 Delivered-To: patch@linaro.org Received: by 2002:adf:a3c6:0:0:0:0:0 with SMTP id m6csp145654wrb; Thu, 2 Mar 2023 14:44:49 -0800 (PST) X-Google-Smtp-Source: AK7set+98xpfMnpsmWA0hX5rJxsFC48tBq+5SOwy5CGEJ3sE377VW1vuhJGycJv54eS7Y9E+g15a X-Received: by 2002:a05:622a:182:b0:3b8:6ae9:b100 with SMTP id s2-20020a05622a018200b003b86ae9b100mr23940436qtw.7.1677797089105; Thu, 02 Mar 2023 14:44:49 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1677797089; cv=none; d=google.com; s=arc-20160816; b=Mf5GeEvTL6L2Bg5+2/Ubef4F8qHyf6Iy4wo4b1veDUac3Ow3/Gnx9ZWuUtr6/YcwBn qEpTpazvdvqNMBbhwc6jiqeWNrXT3QU0SCVoshMp11oUBJjIgmc/OeauzGYEkQotVCxD drgHH3l6/i3Yio/hPR5Cl2/X2Gqpv0EBu4ra5WcpGoJ21cYy1tuwy1maFCJP5OyNctqO IjeA5Fqs1YnaLE8dfvwMO7hnD10ti/psvEduvGBnek9HVbUYgqgCGCRYi3DzbMGpYwnb zEvQmKFsbeyr25ZIr75iwVYx/vbHeFJVK2L2Njwdzyh46XngdXi4lizGYTvP0amQnnfo JgOA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=8TfkteHyoZIi6Uoo7SJxMZBpIZcoshRx7ee998udL3k=; b=r5rkPgFoy9EETetxDiW2LOlhIUVpvm21eUCJABxYNBc2IVJ9hN4LQKwPYUt4bUW6H3 xHiq88AceB9PQP4coOqIr2rUA5sProYjIU85borK4cEc0rEkYU5LftA0sFDG0eB6li/P FcrTH4kbXJa8/dCaMOCLHpOXS/iWFQiebrFKpzHc7SXg1YOHqxkCRHSutBkYxgSz+IbA 30V1ObtYHinX7f7vACdIfv6cPJIclTK5tok8zOVZOizIy/B4bkPrv6/lrnQ2WgGQRvFP 8LUSKwGFPV0w7bw5k+sLXhM2Q09t7sI4GWALq+LDWU9x8F/ew8tegRkMQox/VOi8F7hH 5AyA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=tsalF1xj; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[95.127.39.43]) by smtp.gmail.com with ESMTPSA id k4-20020adfd844000000b002c57384dfe0sm463992wrl.113.2023.03.02.14.42.21 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 02 Mar 2023 14:42:23 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Bernhard Beschow Cc: John Snow , David Woodhouse , BALATON Zoltan , =?utf-8?q?Herv=C3=A9_Poussineau?= , qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v3 11/18] hw/isa: Simplify isa_address_space[_io]() Date: Thu, 2 Mar 2023 23:40:51 +0100 Message-Id: <20230302224058.43315-12-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230302224058.43315-1-philmd@linaro.org> References: <20230302224058.43315-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42a; envelope-from=philmd@linaro.org; helo=mail-wr1-x42a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org We don't have any caller passing a NULL device argument, so we can simplify, avoiding to access the global 'isabus'. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Mark Cave-Ayland --- hw/isa/isa-bus.c | 14 ++++---------- 1 file changed, 4 insertions(+), 10 deletions(-) diff --git a/hw/isa/isa-bus.c b/hw/isa/isa-bus.c index 9c8224afa5..3036341d3b 100644 --- a/hw/isa/isa-bus.c +++ b/hw/isa/isa-bus.c @@ -252,20 +252,14 @@ static char *isabus_get_fw_dev_path(DeviceState *dev) MemoryRegion *isa_address_space(ISADevice *dev) { - if (dev) { - return isa_bus_from_device(dev)->address_space; - } - - return isabus->address_space; + assert(dev); + return isa_bus_from_device(dev)->address_space; } MemoryRegion *isa_address_space_io(ISADevice *dev) { - if (dev) { - return isa_bus_from_device(dev)->address_space_io; - } - - return isabus->address_space_io; + assert(dev); + return isa_bus_from_device(dev)->address_space_io; } type_init(isabus_register_types) From patchwork Thu Mar 2 22:40:52 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 658162 Delivered-To: patch@linaro.org Received: by 2002:adf:a3c6:0:0:0:0:0 with SMTP id m6csp145123wrb; Thu, 2 Mar 2023 14:42:47 -0800 (PST) X-Google-Smtp-Source: AK7set/4uXcPqdVq6N2GWsP68bhytaf9YTpF5MUluvk8Ae7cFTS6pJYKEG11jQKw7UQS4LQG0ag3 X-Received: by 2002:a05:6214:1249:b0:56e:bfda:a14f with SMTP id r9-20020a056214124900b0056ebfdaa14fmr23852677qvv.9.1677796967283; Thu, 02 Mar 2023 14:42:47 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1677796967; cv=none; d=google.com; s=arc-20160816; b=G9aHKhEwGB4wpTIyxvsAMPYphRqKSOwu+4ACUQaXXh0OZWDLg4jGAg4h2aS7Sl6V7X hUqa6WkvI3X6qVFWkIS6lnwFEdYlxu7t9RGUWKL+5WZcvcNm5fNul29UfbDrrq8Qc7N+ oTiqUPofsWGSV/G89oX63taAuO9rJIkiiKgPilK94t56LE7Z+DAMMsCeFMJfSIwgQgHL UoHFiFQOnFH39qh7/DMA6bAycXfudd6nCPSN9tdNe8vIbD71DS6VxkDGZGC7Mhh0K5V3 GtSs4HXpWEItZpsJmrlzkOhuRsF8D9+xsORdFGHktI65pLkcHRipafBPNenVq/DvS1Zp fmBg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=8Q+kjUrDqzW8TbJSLEkGuQbfUY5rqxaKrpCoB8EhM+g=; b=as+W86uEKGd/JWrWlGpaerYlvTRyHgkxaDEJ9G0IwJIMdvQCOO8CTGRwrUG0mQw/i1 yT+dX1uib+G6pWOY+7F7ufU5+Y+m5d1iR20MSEyR2W++QuTwSroQOTkkbzqLfm7+UjL1 MkyEakGJdUGvlIsxx3kbPWMzyx9KpeEsO8+G8VWBe6+vSj71Wk0I5P3v4Vpau19l1MuY /gYTAE31MmVEnPm2HQ7lUoGI6/RG42mqdLBGAL3BUoeAkCcudBr3AhEhOtZZZmlG41sy QGjybeQRbWUULoNHe0Yyon17XCDn82CdSI4o9AIEz6rj6LCMad8NgkEp0LpavWrfAf54 slrQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=CFRn4QrC; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[95.127.39.43]) by smtp.gmail.com with ESMTPSA id f9-20020adfdb49000000b002c59c6abc10sm477084wrj.115.2023.03.02.14.42.28 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 02 Mar 2023 14:42:30 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Bernhard Beschow Cc: John Snow , David Woodhouse , BALATON Zoltan , =?utf-8?q?Herv=C3=A9_Poussineau?= , qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v3 12/18] hw/isa: Reduce 'isabus' singleton scope to isa_bus_new() Date: Thu, 2 Mar 2023 23:40:52 +0100 Message-Id: <20230302224058.43315-13-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230302224058.43315-1-philmd@linaro.org> References: <20230302224058.43315-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42a; envelope-from=philmd@linaro.org; helo=mail-wr1-x42a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Previous commit ensured when entering isa_register_portio_list(), 'dev' is not NULL. Being a TYPE_ISA_DEVICE, the device must sit on a ISA bus. This means isa_bus_new() as already been called and 'isabus' can not be NULL. Simplify by removing the 'isabus' NULL check in isa_register_portio_list(). 'isabus' is now only used in isa_bus_new(). Reduce its scope by only declaring it the function using it (this will allows us to create multiple ISA buses later). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Mark Cave-Ayland --- hw/isa/isa-bus.c | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/hw/isa/isa-bus.c b/hw/isa/isa-bus.c index 3036341d3b..8e3ca3785e 100644 --- a/hw/isa/isa-bus.c +++ b/hw/isa/isa-bus.c @@ -25,8 +25,6 @@ #include "sysemu/sysemu.h" #include "hw/isa/isa.h" -static ISABus *isabus; - static char *isabus_get_fw_dev_path(DeviceState *dev); static void isa_bus_class_init(ObjectClass *klass, void *data) @@ -52,6 +50,8 @@ static const TypeInfo isa_bus_info = { ISABus *isa_bus_new(DeviceState *dev, MemoryRegion* address_space, MemoryRegion *address_space_io, Error **errp) { + static ISABus *isabus; + if (isabus) { error_setg(errp, "Can't create a second ISA bus"); return NULL; @@ -132,10 +132,6 @@ int isa_register_portio_list(ISADevice *dev, assert(dev); assert(piolist && !piolist->owner); - if (!isabus) { - return -ENODEV; - } - /* START is how we should treat DEV, regardless of the actual contents of the portio array. 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[95.127.39.43]) by smtp.gmail.com with ESMTPSA id e17-20020a5d4e91000000b002c559626a50sm532985wru.13.2023.03.02.14.42.35 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 02 Mar 2023 14:42:37 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Bernhard Beschow Cc: John Snow , David Woodhouse , BALATON Zoltan , =?utf-8?q?Herv=C3=A9_Poussineau?= , qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Richard Henderson , Gerd Hoffmann , Paolo Bonzini , Peter Xu , David Hildenbrand Subject: [PATCH v3 13/18] exec/ioport: Factor portio_list_register_flush_coalesced() out Date: Thu, 2 Mar 2023 23:40:53 +0100 Message-Id: <20230302224058.43315-14-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230302224058.43315-1-philmd@linaro.org> References: <20230302224058.43315-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::436; envelope-from=philmd@linaro.org; helo=mail-wr1-x436.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org We always follow the same pattern when registering coalesced portio: - portio_list_init() - portio_list_set_flush_coalesced() - portio_list_add() Factor these 3 operations in a single helper named portio_list_register_flush_coalesced(). Drop portio_list_set_flush_coalesced() which is now inlined. Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20230207234615.77300-2-philmd@linaro.org> --- hw/display/qxl.c | 7 +++---- hw/display/vga.c | 5 ++--- include/exec/ioport.h | 5 ++++- softmmu/ioport.c | 27 ++++++++++++++++++++++----- 4 files changed, 31 insertions(+), 13 deletions(-) diff --git a/hw/display/qxl.c b/hw/display/qxl.c index ec712d3ca2..2ecaa0643f 100644 --- a/hw/display/qxl.c +++ b/hw/display/qxl.c @@ -2224,10 +2224,9 @@ static void qxl_realize_primary(PCIDevice *dev, Error **errp) } vga_init(vga, OBJECT(dev), pci_address_space(dev), pci_address_space_io(dev), false); - portio_list_init(&qxl->vga_port_list, OBJECT(dev), qxl_vga_portio_list, - vga, "vga"); - portio_list_set_flush_coalesced(&qxl->vga_port_list); - portio_list_add(&qxl->vga_port_list, pci_address_space_io(dev), 0x3b0); + portio_list_register_flush_coalesced(&qxl->vga_port_list, OBJECT(dev), + qxl_vga_portio_list, vga, "vga", + pci_address_space_io(dev), 0x3b0); qxl->have_vga = true; vga->con = graphic_console_init(DEVICE(dev), 0, &qxl_ops, qxl); diff --git a/hw/display/vga.c b/hw/display/vga.c index 7a5fdff649..98d644922e 100644 --- a/hw/display/vga.c +++ b/hw/display/vga.c @@ -2309,9 +2309,8 @@ void vga_init(VGACommonState *s, Object *obj, MemoryRegion *address_space, 1); memory_region_set_coalescing(vga_io_memory); if (init_vga_ports) { - portio_list_init(&s->vga_port_list, obj, vga_ports, s, "vga"); - portio_list_set_flush_coalesced(&s->vga_port_list); - portio_list_add(&s->vga_port_list, address_space_io, 0x3b0); + portio_list_register_flush_coalesced(&s->vga_port_list, obj, vga_ports, + s, "vga", address_space_io, 0x3b0); } if (vbe_ports) { portio_list_init(&s->vbe_port_list, obj, vbe_ports, s, "vbe"); diff --git a/include/exec/ioport.h b/include/exec/ioport.h index e34f668998..eb9882a3ee 100644 --- a/include/exec/ioport.h +++ b/include/exec/ioport.h @@ -65,7 +65,10 @@ typedef struct PortioList { void portio_list_init(PortioList *piolist, Object *owner, const struct MemoryRegionPortio *callbacks, void *opaque, const char *name); -void portio_list_set_flush_coalesced(PortioList *piolist); +void portio_list_register_flush_coalesced(PortioList *piolist, Object *owner, + const MemoryRegionPortio *callbacks, + void *opaque, const char *name, + MemoryRegion *mr, uint32_t offset); void portio_list_destroy(PortioList *piolist); void portio_list_add(PortioList *piolist, struct MemoryRegion *address_space, diff --git a/softmmu/ioport.c b/softmmu/ioport.c index cb8adb0b93..be0c920c5c 100644 --- a/softmmu/ioport.c +++ b/softmmu/ioport.c @@ -124,6 +124,7 @@ void portio_list_init(PortioList *piolist, ++n; } + assert(owner); piolist->ports = callbacks; piolist->nr = 0; piolist->regions = g_new0(MemoryRegion *, n); @@ -134,11 +135,6 @@ void portio_list_init(PortioList *piolist, piolist->flush_coalesced_mmio = false; } -void portio_list_set_flush_coalesced(PortioList *piolist) -{ - piolist->flush_coalesced_mmio = true; -} - void portio_list_destroy(PortioList *piolist) { MemoryRegionPortioList *mrpio; @@ -297,3 +293,24 @@ void portio_list_del(PortioList *piolist) memory_region_del_subregion(piolist->address_space, &mrpio->mr); } } + +static void do_portio_list_register(PortioList *piolist, Object *owner, + const MemoryRegionPortio *callbacks, + void *opaque, const char *name, + MemoryRegion *mr, uint32_t offset, + bool flush_coalesced_mmio) +{ + assert(piolist && !piolist->owner); + portio_list_init(piolist, owner, callbacks, opaque, name); + piolist->flush_coalesced_mmio = flush_coalesced_mmio; + portio_list_add(piolist, mr, offset); +} + +void portio_list_register_flush_coalesced(PortioList *piolist, Object *owner, + const MemoryRegionPortio *callbacks, + void *opaque, const char *name, + MemoryRegion *mr, uint32_t offset) +{ + do_portio_list_register(piolist, owner, callbacks, + opaque, name, mr, offset, true); +} From patchwork Thu Mar 2 22:40:54 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 658163 Delivered-To: patch@linaro.org Received: by 2002:adf:a3c6:0:0:0:0:0 with SMTP id m6csp145174wrb; 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[95.127.39.43]) by smtp.gmail.com with ESMTPSA id p20-20020a05600c205400b003e8dcc67bdesm3967320wmg.30.2023.03.02.14.42.43 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 02 Mar 2023 14:42:45 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Bernhard Beschow Cc: John Snow , David Woodhouse , BALATON Zoltan , =?utf-8?q?Herv=C3=A9_Poussineau?= , qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Richard Henderson , Gerd Hoffmann , "Michael S. Tsirkin" , Paolo Bonzini , Peter Xu , David Hildenbrand , qemu-block@nongnu.org Subject: [PATCH v3 14/18] exec/ioport: Factor portio_list_register() out Date: Thu, 2 Mar 2023 23:40:54 +0100 Message-Id: <20230302224058.43315-15-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230302224058.43315-1-philmd@linaro.org> References: <20230302224058.43315-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::332; envelope-from=philmd@linaro.org; helo=mail-wm1-x332.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org We always follow the same pattern when registering non-coalesced portio: - portio_list_init() - portio_list_add() Factor these 2 operations in a single helper named portio_list_register(). Since both calls become local to ioport.c, reduce their scope by declaring them static. Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20230207234615.77300-3-philmd@linaro.org> Reviewed-by: Mark Cave-Ayland --- hw/audio/adlib.c | 4 ++-- hw/display/vga.c | 4 ++-- hw/dma/i82374.c | 7 +++---- hw/ide/ioport.c | 9 ++++----- hw/isa/isa-bus.c | 5 ++--- hw/watchdog/wdt_ib700.c | 4 ++-- include/exec/ioport.h | 10 ++++------ softmmu/ioport.c | 21 ++++++++++++++------- 8 files changed, 33 insertions(+), 31 deletions(-) diff --git a/hw/audio/adlib.c b/hw/audio/adlib.c index 5f979b1487..cc03c99306 100644 --- a/hw/audio/adlib.c +++ b/hw/audio/adlib.c @@ -291,8 +291,8 @@ static void adlib_realizefn (DeviceState *dev, Error **errp) adlib_portio_list[0].offset = s->port; adlib_portio_list[1].offset = s->port + 8; - portio_list_init (&s->port_list, OBJECT(s), adlib_portio_list, s, "adlib"); - portio_list_add (&s->port_list, isa_address_space_io(&s->parent_obj), 0); + portio_list_register(&s->port_list, OBJECT(s), adlib_portio_list, s, + "adlib", isa_address_space_io(&s->parent_obj), 0); } static Property adlib_properties[] = { diff --git a/hw/display/vga.c b/hw/display/vga.c index 98d644922e..aa899fddc3 100644 --- a/hw/display/vga.c +++ b/hw/display/vga.c @@ -2313,7 +2313,7 @@ void vga_init(VGACommonState *s, Object *obj, MemoryRegion *address_space, s, "vga", address_space_io, 0x3b0); } if (vbe_ports) { - portio_list_init(&s->vbe_port_list, obj, vbe_ports, s, "vbe"); - portio_list_add(&s->vbe_port_list, address_space_io, 0x1ce); + portio_list_register(&s->vbe_port_list, obj, vbe_ports, s, + "vbe", address_space_io, 0x1ce); } } diff --git a/hw/dma/i82374.c b/hw/dma/i82374.c index 63734c22c9..aeca0e8323 100644 --- a/hw/dma/i82374.c +++ b/hw/dma/i82374.c @@ -131,10 +131,9 @@ static void i82374_realize(DeviceState *dev, Error **errp) } i8257_dma_init(isa_bus, true); - portio_list_init(&s->port_list, OBJECT(s), i82374_portio_list, s, - "i82374"); - portio_list_add(&s->port_list, isa_address_space_io(&s->parent_obj), - s->iobase); + portio_list_register(&s->port_list, OBJECT(s), i82374_portio_list, s, + "i82374", isa_address_space_io(&s->parent_obj), + s->iobase); memset(s->commands, 0, sizeof(s->commands)); } diff --git a/hw/ide/ioport.c b/hw/ide/ioport.c index ed7957dbae..7a6f29955f 100644 --- a/hw/ide/ioport.c +++ b/hw/ide/ioport.c @@ -60,9 +60,8 @@ int ide_bus_init_ioport_isa(IDEBus *bus, ISADevice *dev, void ide_bus_init_ioport(IDEBus *bus, Object *owner, MemoryRegion *io, int iobase, int iobase2) { - portio_list_init(&bus->portio_list, owner, ide_portio_list, bus, "ide"); - portio_list_add(&bus->portio_list, io, iobase); - - portio_list_init(&bus->portio2_list, owner, ide_portio2_list, bus, "ide"); - portio_list_add(&bus->portio_list, io, iobase2); + portio_list_register(&bus->portio_list, owner, ide_portio_list, + bus, "ide", io, iobase); + portio_list_register(&bus->portio2_list, owner, ide_portio2_list, + bus, "ide", io, iobase2); } diff --git a/hw/isa/isa-bus.c b/hw/isa/isa-bus.c index 8e3ca3785e..087293108e 100644 --- a/hw/isa/isa-bus.c +++ b/hw/isa/isa-bus.c @@ -130,15 +130,14 @@ int isa_register_portio_list(ISADevice *dev, void *opaque, const char *name) { assert(dev); - assert(piolist && !piolist->owner); /* START is how we should treat DEV, regardless of the actual contents of the portio array. This is how the old code actually handled e.g. the FDC device. */ isa_init_ioport(dev, start); - portio_list_init(piolist, OBJECT(dev), pio_start, opaque, name); - portio_list_add(piolist, isa_address_space_io(dev), start); + portio_list_register(piolist, OBJECT(dev), pio_start, opaque, name, + isa_address_space_io(dev), start); return 0; } diff --git a/hw/watchdog/wdt_ib700.c b/hw/watchdog/wdt_ib700.c index b116c3a3aa..ac4f0be7d8 100644 --- a/hw/watchdog/wdt_ib700.c +++ b/hw/watchdog/wdt_ib700.c @@ -115,8 +115,8 @@ static void wdt_ib700_realize(DeviceState *dev, Error **errp) s->timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, ib700_timer_expired, s); - portio_list_init(&s->port_list, OBJECT(s), wdt_portio_list, s, "ib700"); - portio_list_add(&s->port_list, isa_address_space_io(&s->parent_obj), 0); + portio_list_register(&s->port_list, OBJECT(s), wdt_portio_list, s, + "ib700", isa_address_space_io(&s->parent_obj), 0); } static void wdt_ib700_reset(DeviceState *dev) diff --git a/include/exec/ioport.h b/include/exec/ioport.h index eb9882a3ee..ca44f269ea 100644 --- a/include/exec/ioport.h +++ b/include/exec/ioport.h @@ -62,17 +62,15 @@ typedef struct PortioList { bool flush_coalesced_mmio; } PortioList; -void portio_list_init(PortioList *piolist, Object *owner, - const struct MemoryRegionPortio *callbacks, - void *opaque, const char *name); +void portio_list_register(PortioList *piolist, Object *owner, + const MemoryRegionPortio *callbacks, + void *opaque, const char *name, + MemoryRegion *mr, uint32_t offset); void portio_list_register_flush_coalesced(PortioList *piolist, Object *owner, const MemoryRegionPortio *callbacks, void *opaque, const char *name, MemoryRegion *mr, uint32_t offset); void portio_list_destroy(PortioList *piolist); -void portio_list_add(PortioList *piolist, - struct MemoryRegion *address_space, - uint32_t addr); void portio_list_del(PortioList *piolist); #endif /* IOPORT_H */ diff --git a/softmmu/ioport.c b/softmmu/ioport.c index be0c920c5c..42d43f8b27 100644 --- a/softmmu/ioport.c +++ b/softmmu/ioport.c @@ -113,10 +113,9 @@ uint32_t cpu_inl(uint32_t addr) return val; } -void portio_list_init(PortioList *piolist, - Object *owner, - const MemoryRegionPortio *callbacks, - void *opaque, const char *name) +static void portio_list_init(PortioList *piolist, Object *owner, + const MemoryRegionPortio *callbacks, + void *opaque, const char *name) { unsigned n = 0; @@ -246,9 +245,8 @@ static void portio_list_add_1(PortioList *piolist, ++piolist->nr; } -void portio_list_add(PortioList *piolist, - MemoryRegion *address_space, - uint32_t start) +static void portio_list_add(PortioList *piolist, MemoryRegion *address_space, + uint32_t start) { const MemoryRegionPortio *pio, *pio_start = piolist->ports; unsigned int off_low, off_high, off_last, count; @@ -314,3 +312,12 @@ void portio_list_register_flush_coalesced(PortioList *piolist, Object *owner, do_portio_list_register(piolist, owner, callbacks, opaque, name, mr, offset, true); } + +void portio_list_register(PortioList *piolist, Object *owner, + const MemoryRegionPortio *callbacks, + void *opaque, const char *name, + MemoryRegion *mr, uint32_t offset) +{ + do_portio_list_register(piolist, owner, callbacks, + opaque, name, mr, offset, false); +} From patchwork Thu Mar 2 22:40:55 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 658168 Delivered-To: patch@linaro.org Received: by 2002:adf:a3c6:0:0:0:0:0 with SMTP id m6csp145492wrb; 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[95.127.39.43]) by smtp.gmail.com with ESMTPSA id k8-20020a5d66c8000000b002c573a6216fsm500468wrw.37.2023.03.02.14.42.51 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 02 Mar 2023 14:42:53 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Bernhard Beschow Cc: John Snow , David Woodhouse , BALATON Zoltan , =?utf-8?q?Herv=C3=A9_Poussineau?= , qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aurelien Jarno , "Michael S. Tsirkin" , Marcel Apfelbaum Subject: [PATCH v3 15/18] hw/southbridge/piix: Use OBJECT_DECLARE_SIMPLE_TYPE() macro Date: Thu, 2 Mar 2023 23:40:55 +0100 Message-Id: <20230302224058.43315-16-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230302224058.43315-1-philmd@linaro.org> References: <20230302224058.43315-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32e; envelope-from=philmd@linaro.org; helo=mail-wm1-x32e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Manually convert to OBJECT_DECLARE_SIMPLE_TYPE() macro, similarly to automatic conversion from commit 8063396bf3 ("Use OBJECT_DECLARE_SIMPLE_TYPE when possible"). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Mark Cave-Ayland --- include/hw/southbridge/piix.h | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/include/hw/southbridge/piix.h b/include/hw/southbridge/piix.h index 0bf48e936d..a58bf13a41 100644 --- a/include/hw/southbridge/piix.h +++ b/include/hw/southbridge/piix.h @@ -29,7 +29,7 @@ #define PIIX_NUM_PIC_IRQS 16 /* i8259 * 2 */ #define PIIX_NUM_PIRQS 4ULL /* PIRQ[A-D] */ -struct PIIXState { +struct PIIX3State { PCIDevice dev; /* @@ -57,14 +57,12 @@ struct PIIXState { /* IO memory region for Reset Control Register (PIIX_RCR_IOPORT) */ MemoryRegion rcr_mem; }; -typedef struct PIIXState PIIX3State; #define TYPE_PIIX3_PCI_DEVICE "pci-piix3" -DECLARE_INSTANCE_CHECKER(PIIX3State, PIIX3_PCI_DEVICE, - TYPE_PIIX3_PCI_DEVICE) - #define TYPE_PIIX3_DEVICE "PIIX3" #define TYPE_PIIX3_XEN_DEVICE "PIIX3-xen" #define TYPE_PIIX4_PCI_DEVICE "piix4-isa" +OBJECT_DECLARE_SIMPLE_TYPE(PIIX3State, PIIX3_PCI_DEVICE) + #endif From patchwork Thu Mar 2 22:40:56 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 658169 Delivered-To: patch@linaro.org Received: by 2002:adf:a3c6:0:0:0:0:0 with SMTP id m6csp145532wrb; Thu, 2 Mar 2023 14:44:22 -0800 (PST) X-Google-Smtp-Source: AK7set/b5LrFa7QtJpM0QjDdIp0NPdIo6hOLDCCxUjBd8/HiZ2YjCFreGl2GE4IiN8p7AjdD2hUu X-Received: by 2002:ac8:5893:0:b0:3bf:d8b6:4ca1 with SMTP id t19-20020ac85893000000b003bfd8b64ca1mr19260017qta.28.1677797062444; Thu, 02 Mar 2023 14:44:22 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1677797062; cv=none; d=google.com; s=arc-20160816; b=UbiyeYERWCRbPPEk3GcdJTKTXUxkt9lQ514YrS3AbmLnICOmMrXwT4ydMz3McC69fN xkg2HHVy3B0O7GVHzvnQDVgyZbtaPXLTHtBw1Oo03Zqc7MKojgPc1HBc8CpNXjh1yt3P vd40Lul59HrHlBi/LssIDg0C5DrAK6B3D03g4G1uUAsU1BaAAR6ZftmvMJag4TN1Ixsq TEQFexzvEtLqMLneSHQPhUgHq4ynvDz9e2YXpUmiSZDJfkiU68idemqoCK4hJGMpKe6t mOtqw57264KrEvgPsFqmalcvtYFfzwWY9iJL1DCy5iq6fV8+OoZiCPBE0gvelzKQHTBu R2GQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=df58h/AdXCUfIsw29990QJNsnEG6zfozV6HUit6iE6U=; b=YpHS4qOLIX1pGBPYcIyn3QoShvetq26fhUThXjVSJ0G6g3uXIxLsgBsopH95UW1Zfy O74VH+BGHV1/PbOcp4DT/ezn+J8VEdlekfxe8QPIYQEz0HgQkex6q1A56ZJ+QGoxz/Xr oLd+QNpsXaa8UX4MpWmXlSjc85aoSP0U5Jq1sVNvq+srq9H6RsVjjAdv34h7kozFzVpC 6qdXCdFEZKXxgfpkfATEEbdgFMBD+JM+MZO2+UmvLCKB9z1nmS3ZPpuruVwSDRBxf3Z/ 56VLFCyJonH+D24PthuWSR4mGbd+XPwifWVTB3pqEBf+KboHgQiEoaswMzHfI765VFiB iZIg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=h4Knyj0Z; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[95.127.39.43]) by smtp.gmail.com with ESMTPSA id p21-20020a05600c431500b003daf672a616sm719382wme.22.2023.03.02.14.42.58 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 02 Mar 2023 14:42:59 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Bernhard Beschow Cc: John Snow , David Woodhouse , BALATON Zoltan , =?utf-8?q?Herv=C3=A9_Poussineau?= , qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , "Michael S. Tsirkin" , Marcel Apfelbaum Subject: [PATCH v3 16/18] hw/isa/piix: Batch register QOM types using DEFINE_TYPES() macro Date: Thu, 2 Mar 2023 23:40:56 +0100 Message-Id: <20230302224058.43315-17-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230302224058.43315-1-philmd@linaro.org> References: <20230302224058.43315-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::330; envelope-from=philmd@linaro.org; helo=mail-wm1-x330.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org See rationale in commit 38b5d79b2e ("qom: add helper macro DEFINE_TYPES()"). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Mark Cave-Ayland --- hw/isa/piix3.c | 53 +++++++++++++++++++++----------------------------- 1 file changed, 22 insertions(+), 31 deletions(-) diff --git a/hw/isa/piix3.c b/hw/isa/piix3.c index a9cb39bf21..0ee94a2313 100644 --- a/hw/isa/piix3.c +++ b/hw/isa/piix3.c @@ -346,19 +346,6 @@ static void pci_piix3_class_init(ObjectClass *klass, void *data) adevc->build_dev_aml = build_pci_isa_aml; } -static const TypeInfo piix3_pci_type_info = { - .name = TYPE_PIIX3_PCI_DEVICE, - .parent = TYPE_PCI_DEVICE, - .instance_size = sizeof(PIIX3State), - .abstract = true, - .class_init = pci_piix3_class_init, - .interfaces = (InterfaceInfo[]) { - { INTERFACE_CONVENTIONAL_PCI_DEVICE }, - { TYPE_ACPI_DEV_AML_IF }, - { }, - }, -}; - static void piix3_realize(PCIDevice *dev, Error **errp) { ERRP_GUARD(); @@ -382,12 +369,6 @@ static void piix3_class_init(ObjectClass *klass, void *data) k->realize = piix3_realize; } -static const TypeInfo piix3_info = { - .name = TYPE_PIIX3_DEVICE, - .parent = TYPE_PIIX3_PCI_DEVICE, - .class_init = piix3_class_init, -}; - static void piix3_xen_realize(PCIDevice *dev, Error **errp) { ERRP_GUARD(); @@ -416,17 +397,27 @@ static void piix3_xen_class_init(ObjectClass *klass, void *data) k->realize = piix3_xen_realize; } -static const TypeInfo piix3_xen_info = { - .name = TYPE_PIIX3_XEN_DEVICE, - .parent = TYPE_PIIX3_PCI_DEVICE, - .class_init = piix3_xen_class_init, +static const TypeInfo piix_isa_types[] = { + { + .name = TYPE_PIIX3_PCI_DEVICE, + .parent = TYPE_PCI_DEVICE, + .instance_size = sizeof(PIIX3State), + .class_init = pci_piix3_class_init, + .abstract = true, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { TYPE_ACPI_DEV_AML_IF }, + { }, + }, + }, { + .name = TYPE_PIIX3_DEVICE, + .parent = TYPE_PIIX3_PCI_DEVICE, + .class_init = piix3_class_init, + }, { + .name = TYPE_PIIX3_XEN_DEVICE, + .parent = TYPE_PIIX3_PCI_DEVICE, + .class_init = piix3_xen_class_init, + } }; -static void piix3_register_types(void) -{ - type_register_static(&piix3_pci_type_info); - type_register_static(&piix3_info); - type_register_static(&piix3_xen_info); -} - -type_init(piix3_register_types) +DEFINE_TYPES(piix_isa_types) From patchwork Thu Mar 2 22:40:57 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 658173 Delivered-To: patch@linaro.org Received: by 2002:adf:a3c6:0:0:0:0:0 with SMTP id m6csp145740wrb; Thu, 2 Mar 2023 14:45:05 -0800 (PST) X-Google-Smtp-Source: AK7set/CDQZFuS7ocGHLgYsT+ZtH2LxnYwcnHyWHmg6wk81Daxtn/bR5MPZ6+DfrbrEST3vN6M5x X-Received: by 2002:a05:6214:3016:b0:56e:b124:156e with SMTP id ke22-20020a056214301600b0056eb124156emr20385079qvb.10.1677797105423; Thu, 02 Mar 2023 14:45:05 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1677797105; cv=none; d=google.com; s=arc-20160816; b=T9ftp0+QVYxZ6W5e0svbb2PfGEMaetL3RAoiy+k9AJM/RRwJ2dfbEpRr5/7Hhy/feA z5l21L03JgzhSBlVWDP4m/oejyxMt3oHuSkctnAlaIFtVG+1kzoMHISIEgZx0PYbORYJ Ti1u+UmHjG77MxGPSJQcvftMJtXB+y5swerO27hVRrcsmIkHFZt/HOKYVZGAdHy3XxoG dEtxMWlTT5KdyrEeRTIcN6aznYuYX0ASC3L+mauvaXPcLo/9nAl929ZhjGnq8u3sB+Z4 kf79YGJ8euR7ZIBhRHYyF5P4l5OJ/BuANcS/1fZb4hLS+c2yJTHqXDI5oA2cDp5aWdeN rc8g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=lCQQownvKCVofCZuEa1Oy69oYC3998RQioNT+3DKDLE=; b=Qo1I4hXXQCqYoVhmuloSE3dBUtjQTgoLW4N0StmB9ef4qRDOhjcNOeHHJAXks0XSk7 tze0VLaPsCPQFmKxH9e2Ns3OxpH2rHag0vM401iIq41+0oCcVxw55LXsgfzqo+zcZG5b OafMHcKhy5kHfc9puqq1O+axfA8w/90G75BCsoF1ZU0NfAbAUsDMrHjGl0iEsN3bDwHU BQgMjulYrviZRirW/OkQ7BEmUITT0GkG5l/b/rTNFjX1F/oTsbM/H/P96LKXcd4D6Gnq zG2Pyg1u7oJkhmR1hmA4QHUYLqWWb1UjUvaiRw17cDeutuSu3f731UDiWNu8MmRvMztR SJ7w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=X230GNs6; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[95.127.39.43]) by smtp.gmail.com with ESMTPSA id h9-20020a5d5049000000b002c54d8b89efsm511156wrt.26.2023.03.02.14.43.06 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 02 Mar 2023 14:43:08 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Bernhard Beschow Cc: John Snow , David Woodhouse , BALATON Zoltan , =?utf-8?q?Herv=C3=A9_Poussineau?= , qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Paolo Bonzini , Richard Henderson , Eduardo Habkost , "Michael S. Tsirkin" , Marcel Apfelbaum , Aurelien Jarno Subject: [PATCH v3 17/18] hw/isa/piix: Unify QOM type name of PIIX ISA function Date: Thu, 2 Mar 2023 23:40:57 +0100 Message-Id: <20230302224058.43315-18-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230302224058.43315-1-philmd@linaro.org> References: <20230302224058.43315-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32e; envelope-from=philmd@linaro.org; helo=mail-wm1-x32e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Mechanical change doing: $ sed -i -e 's/PIIX4_PCI_DEVICE/PIIX4_ISA/g' $(git grep -l PIIX4_PCI_DEVICE) $ sed -i -e 's/PIIX3_XEN_DEVICE/PIIX3_ISA_XEN/g' $(git grep -l PIIX3_XEN_DEVICE) $ sed -i -e 's/PIIX3_DEVICE/PIIX3_ISA/g' $(git grep -l PIIX3_DEVICE) $ sed -i -e 's/PIIX3_PCI_DEVICE/PIIX_ISA/g' $(git grep -l PIIX3_PCI_DEVICE) Signed-off-by: Philippe Mathieu-Daudé --- hw/i386/pc_piix.c | 5 ++--- hw/isa/piix3.c | 20 ++++++++++---------- hw/isa/piix4.c | 10 +++++----- hw/mips/malta.c | 2 +- include/hw/southbridge/piix.h | 10 +++++----- 5 files changed, 23 insertions(+), 24 deletions(-) diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index 1e90b9ff0d..c887b27009 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -221,8 +221,7 @@ static void pc_init1(MachineState *machine, if (pcmc->pci_enabled) { PIIX3State *piix3; PCIDevice *pci_dev; - const char *type = xen_enabled() ? TYPE_PIIX3_XEN_DEVICE - : TYPE_PIIX3_DEVICE; + const char *type = xen_enabled() ? TYPE_PIIX3_ISA_XEN : TYPE_PIIX3_ISA; pci_bus = i440fx_init(pci_type, i440fx_host, @@ -236,7 +235,7 @@ static void pc_init1(MachineState *machine, pcms->bus = pci_bus; pci_dev = pci_create_simple_multifunction(pci_bus, -1, true, type); - piix3 = PIIX3_PCI_DEVICE(pci_dev); + piix3 = PIIX3_ISA(pci_dev); piix3->pic = x86ms->gsi; piix3_devfn = piix3->dev.devfn; isa_bus = ISA_BUS(qdev_get_child_bus(DEVICE(piix3), "isa.0")); diff --git a/hw/isa/piix3.c b/hw/isa/piix3.c index 0ee94a2313..38e0c269ae 100644 --- a/hw/isa/piix3.c +++ b/hw/isa/piix3.c @@ -112,7 +112,7 @@ static void piix3_write_config(PCIDevice *dev, { pci_default_write_config(dev, address, val, len); if (ranges_overlap(address, len, PIIX_PIRQCA, 4)) { - PIIX3State *piix3 = PIIX3_PCI_DEVICE(dev); + PIIX3State *piix3 = PIIX3_ISA(dev); int pic_irq; pci_bus_fire_intx_routing_notifier(pci_get_bus(&piix3->dev)); @@ -145,7 +145,7 @@ static void piix3_write_config_xen(PCIDevice *dev, static void piix3_reset(DeviceState *dev) { - PIIX3State *d = PIIX3_PCI_DEVICE(dev); + PIIX3State *d = PIIX3_ISA(dev); uint8_t *pci_conf = d->dev.config; pci_conf[0x04] = 0x07; /* master, memory and I/O */ @@ -286,7 +286,7 @@ static const MemoryRegionOps rcr_ops = { static void pci_piix3_realize(PCIDevice *dev, Error **errp) { - PIIX3State *d = PIIX3_PCI_DEVICE(dev); + PIIX3State *d = PIIX3_ISA(dev); ISABus *isa_bus; isa_bus = isa_bus_new(DEVICE(d), pci_address_space(dev), @@ -349,7 +349,7 @@ static void pci_piix3_class_init(ObjectClass *klass, void *data) static void piix3_realize(PCIDevice *dev, Error **errp) { ERRP_GUARD(); - PIIX3State *piix3 = PIIX3_PCI_DEVICE(dev); + PIIX3State *piix3 = PIIX3_ISA(dev); PCIBus *pci_bus = pci_get_bus(dev); pci_piix3_realize(dev, errp); @@ -372,7 +372,7 @@ static void piix3_class_init(ObjectClass *klass, void *data) static void piix3_xen_realize(PCIDevice *dev, Error **errp) { ERRP_GUARD(); - PIIX3State *piix3 = PIIX3_PCI_DEVICE(dev); + PIIX3State *piix3 = PIIX3_ISA(dev); PCIBus *pci_bus = pci_get_bus(dev); pci_piix3_realize(dev, errp); @@ -399,7 +399,7 @@ static void piix3_xen_class_init(ObjectClass *klass, void *data) static const TypeInfo piix_isa_types[] = { { - .name = TYPE_PIIX3_PCI_DEVICE, + .name = TYPE_PIIX_ISA, .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PIIX3State), .class_init = pci_piix3_class_init, @@ -410,12 +410,12 @@ static const TypeInfo piix_isa_types[] = { { }, }, }, { - .name = TYPE_PIIX3_DEVICE, - .parent = TYPE_PIIX3_PCI_DEVICE, + .name = TYPE_PIIX3_ISA, + .parent = TYPE_PIIX_ISA, .class_init = piix3_class_init, }, { - .name = TYPE_PIIX3_XEN_DEVICE, - .parent = TYPE_PIIX3_PCI_DEVICE, + .name = TYPE_PIIX3_ISA_XEN, + .parent = TYPE_PIIX_ISA, .class_init = piix3_xen_class_init, } }; diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c index 702b458a3e..90e19a4c37 100644 --- a/hw/isa/piix4.c +++ b/hw/isa/piix4.c @@ -56,7 +56,7 @@ struct PIIX4State { uint8_t rcr; }; -OBJECT_DECLARE_SIMPLE_TYPE(PIIX4State, PIIX4_PCI_DEVICE) +OBJECT_DECLARE_SIMPLE_TYPE(PIIX4State, PIIX4_ISA) static void piix4_set_irq(void *opaque, int irq_num, int level) { @@ -81,7 +81,7 @@ static void piix4_set_irq(void *opaque, int irq_num, int level) static void piix4_isa_reset(DeviceState *dev) { - PIIX4State *d = PIIX4_PCI_DEVICE(dev); + PIIX4State *d = PIIX4_ISA(dev); uint8_t *pci_conf = d->dev.config; pci_conf[0x04] = 0x07; // master, memory and I/O @@ -186,7 +186,7 @@ static const MemoryRegionOps piix4_rcr_ops = { static void piix4_realize(PCIDevice *dev, Error **errp) { - PIIX4State *s = PIIX4_PCI_DEVICE(dev); + PIIX4State *s = PIIX4_ISA(dev); PCIBus *pci_bus = pci_get_bus(dev); ISABus *isa_bus; qemu_irq *i8259_out_irq; @@ -253,7 +253,7 @@ static void piix4_realize(PCIDevice *dev, Error **errp) static void piix4_init(Object *obj) { - PIIX4State *s = PIIX4_PCI_DEVICE(obj); + PIIX4State *s = PIIX4_ISA(obj); object_initialize_child(obj, "rtc", &s->rtc, TYPE_MC146818_RTC); object_initialize_child(obj, "ide", &s->ide, TYPE_PIIX4_IDE); @@ -285,7 +285,7 @@ static void piix4_class_init(ObjectClass *klass, void *data) } static const TypeInfo piix4_info = { - .name = TYPE_PIIX4_PCI_DEVICE, + .name = TYPE_PIIX4_ISA, .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PIIX4State), .instance_init = piix4_init, diff --git a/hw/mips/malta.c b/hw/mips/malta.c index ec172b111a..5aefeba581 100644 --- a/hw/mips/malta.c +++ b/hw/mips/malta.c @@ -1255,7 +1255,7 @@ void mips_malta_init(MachineState *machine) /* Southbridge */ piix4 = pci_create_simple_multifunction(pci_bus, PIIX4_PCI_DEVFN, true, - TYPE_PIIX4_PCI_DEVICE); + TYPE_PIIX4_ISA); isa_bus = ISA_BUS(qdev_get_child_bus(DEVICE(piix4), "isa.0")); dev = DEVICE(object_resolve_path_component(OBJECT(piix4), "ide")); diff --git a/include/hw/southbridge/piix.h b/include/hw/southbridge/piix.h index a58bf13a41..71a82ef266 100644 --- a/include/hw/southbridge/piix.h +++ b/include/hw/southbridge/piix.h @@ -58,11 +58,11 @@ struct PIIX3State { MemoryRegion rcr_mem; }; -#define TYPE_PIIX3_PCI_DEVICE "pci-piix3" -#define TYPE_PIIX3_DEVICE "PIIX3" -#define TYPE_PIIX3_XEN_DEVICE "PIIX3-xen" -#define TYPE_PIIX4_PCI_DEVICE "piix4-isa" +#define TYPE_PIIX_ISA "pci-piix3" +#define TYPE_PIIX3_ISA "PIIX3" +#define TYPE_PIIX3_ISA_XEN "PIIX3-xen" +#define TYPE_PIIX4_ISA "piix4-isa" -OBJECT_DECLARE_SIMPLE_TYPE(PIIX3State, PIIX3_PCI_DEVICE) +OBJECT_DECLARE_SIMPLE_TYPE(PIIX3State, PIIX3_ISA) #endif From patchwork Thu Mar 2 22:40:58 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 658170 Delivered-To: patch@linaro.org Received: by 2002:adf:a3c6:0:0:0:0:0 with SMTP id m6csp145543wrb; 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[95.127.39.43]) by smtp.gmail.com with ESMTPSA id e15-20020a5d594f000000b002c56046a3b5sm481652wri.53.2023.03.02.14.43.13 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 02 Mar 2023 14:43:15 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Bernhard Beschow Cc: John Snow , David Woodhouse , BALATON Zoltan , =?utf-8?q?Herv=C3=A9_Poussineau?= , qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , "Michael S. Tsirkin" , Marcel Apfelbaum , Aurelien Jarno , Paolo Bonzini , =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Eduardo Habkost Subject: [PATCH v3 18/18] hw/isa/piix: Unify PIIX-ISA QOM type names using qdev aliases Date: Thu, 2 Mar 2023 23:40:58 +0100 Message-Id: <20230302224058.43315-19-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230302224058.43315-1-philmd@linaro.org> References: <20230302224058.43315-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::430; envelope-from=philmd@linaro.org; helo=mail-wr1-x430.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Unify PIIX ISA (PCI function #0) as: pci-piix3 -> piix-isa (abstract base class) PIIX3 -> piix3-isa (PIIX3 implementation) PIIX3-xen -> piix3-isa-xen (PIIX3 implementation with Xen extensions) piix4-isa -> piix4-isa (PIIX4 implementation) Alias previous names in the QDevAlias table. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/southbridge/piix.h | 6 +++--- softmmu/qdev-monitor.c | 3 +++ 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/include/hw/southbridge/piix.h b/include/hw/southbridge/piix.h index 71a82ef266..cce65e8f44 100644 --- a/include/hw/southbridge/piix.h +++ b/include/hw/southbridge/piix.h @@ -58,9 +58,9 @@ struct PIIX3State { MemoryRegion rcr_mem; }; -#define TYPE_PIIX_ISA "pci-piix3" -#define TYPE_PIIX3_ISA "PIIX3" -#define TYPE_PIIX3_ISA_XEN "PIIX3-xen" +#define TYPE_PIIX_ISA "piix-isa" +#define TYPE_PIIX3_ISA "piix3-isa" +#define TYPE_PIIX3_ISA_XEN "piix3-isa-xen" #define TYPE_PIIX4_ISA "piix4-isa" OBJECT_DECLARE_SIMPLE_TYPE(PIIX3State, PIIX3_ISA) diff --git a/softmmu/qdev-monitor.c b/softmmu/qdev-monitor.c index b8d2c4dadd..820e7f52ad 100644 --- a/softmmu/qdev-monitor.c +++ b/softmmu/qdev-monitor.c @@ -72,6 +72,9 @@ static const QDevAlias qdev_alias_table[] = { { "ES1370", "es1370" }, /* -soundhw name */ { "ich9-ahci", "ahci" }, { "lsi53c895a", "lsi" }, + { "piix-isa", "pci-piix3" }, + { "piix3-isa", "PIIX3" }, + { "piix3-isa-xen", "PIIX3-xen" }, { "virtio-9p-device", "virtio-9p", QEMU_ARCH_VIRTIO_MMIO }, { "virtio-9p-ccw", "virtio-9p", QEMU_ARCH_VIRTIO_CCW }, { "virtio-9p-pci", "virtio-9p", QEMU_ARCH_VIRTIO_PCI },