From patchwork Fri May 10 03:27:03 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 163813 Delivered-To: patch@linaro.org Received: by 2002:a05:6e02:142:0:0:0:0 with SMTP id j2csp1819536ilr; Thu, 9 May 2019 20:27:45 -0700 (PDT) X-Google-Smtp-Source: APXvYqzOapS+eo3QKAzTDHqeymZHw98DF+8gT30D07sUfQaY7PwBnZnNmGK4/+Ft/5eNrHoku+Y2 X-Received: by 2002:adf:dc04:: with SMTP id t4mr1039768wri.126.1557458865421; Thu, 09 May 2019 20:27:45 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1557458865; cv=none; d=google.com; s=arc-20160816; b=iR6s+z54EcPR+GlciIC3cnhtlGo9BUhcraRtFIk/rVzBvm1yNuW3XPUUf5T76JyD7q Zp9CylUxVNupahM9ktguS9avDIRyV+O3kqiV56xp1lrEzkIbqY2sZtzxLF+bE7hGDwOT ULdj8fwBPu8nE9bU/3U9YenXxbdrn4AzWxp69bb7fe1cYcmQLRp4woDV3K7+0DNIFD7u QpsHOWld5yk4JhpfMrZbrh6dGFIXjqa8OWohA0CIWbmhFdgfeLocTPkBKVuRp806Qjc6 DyGCfpZd9+nyhqNFKST9j1x2wOoVmNZtG4maGepGo1e/42osAZu2tG2EXz2zdNg8nTaI I/qA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=iKTmI9ncTuLaMcNrrSxuBO2p/7mhBstesEY49w5c0ms=; b=SUTqyC0o0hY55ARgvg2c11cqAgT8jkv870w7ZXMUOHJ5wMDsa4f3T1swv7li5m42BE gQ9PvCwoVp/yGTvqeQ2F8nvxqMnliZSE1u6e07xwyjqK0HRjnnQGhYQxtjky5cCLx5gy O5EwwNeSbdcif8L1Yi6E4Q8Q4VbPqUGMo9xaP7bPP/FoxOmbqOgV/SO9UKGuQQoedE36 IesyvylYJ9+QmH4CDjCzWiU1RTiufjn6fXG/MJgyfzF26vfEzPgwm9cAgDrrGuHp009j Me2b3AIFAX8J2R4tLBCHZCxGGHXG45wsMTZayNaRa8cu3+sbE3IhkZfXlFLRHHa4TFjJ UFag== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=BY1M4BJp; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[97.113.13.231]) by smtp.gmail.com with ESMTPSA id t26sm6259695pgk.62.2019.05.09.20.27.13 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 09 May 2019 20:27:13 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Thu, 9 May 2019 20:27:03 -0700 Message-Id: <20190510032710.23910-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190510032710.23910-1-richard.henderson@linaro.org> References: <20190510032710.23910-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::542 Subject: [Qemu-devel] [PATCH v2 1/8] linux-user: Disallow setting newsp for fork X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Or really, just clone devolving into fork. This should not ever happen in practice. We do want to reserve calling cpu_clone_regs for the case in which we are actually performing a clone. Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- linux-user/syscall.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) -- 2.17.1 diff --git a/linux-user/syscall.c b/linux-user/syscall.c index 96cd4bf86d..f7d0754c8d 100644 --- a/linux-user/syscall.c +++ b/linux-user/syscall.c @@ -5553,10 +5553,14 @@ static int do_fork(CPUArchState *env, unsigned int flags, abi_ulong newsp, pthread_mutex_destroy(&info.mutex); pthread_mutex_unlock(&clone_lock); } else { - /* if no CLONE_VM, we consider it is a fork */ + /* If no CLONE_VM, we consider it is a fork. */ if (flags & CLONE_INVALID_FORK_FLAGS) { return -TARGET_EINVAL; } + /* As a fork, setting a new sp does not make sense. */ + if (newsp) { + return -TARGET_EINVAL; + } /* We can't support custom termination signals */ if ((flags & CSIGNAL) != TARGET_SIGCHLD) { @@ -5571,7 +5575,6 @@ static int do_fork(CPUArchState *env, unsigned int flags, abi_ulong newsp, ret = fork(); if (ret == 0) { /* Child Process. */ - cpu_clone_regs(env, newsp); fork_end(1); /* There is a race condition here. The parent process could theoretically read the TID in the child process before the child From patchwork Fri May 10 03:27:04 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 163819 Delivered-To: patch@linaro.org Received: by 2002:a05:6e02:142:0:0:0:0 with SMTP id j2csp1823395ilr; Thu, 9 May 2019 20:32:47 -0700 (PDT) X-Google-Smtp-Source: APXvYqy/OT+fB0fINJ1p0vhvVptnzsbpEUaNW6ob5MWlf4bANt0AcSeJjJ1hBn48SeLu68/nlmD+ X-Received: by 2002:a1c:4083:: with SMTP id n125mr1643287wma.54.1557459167860; Thu, 09 May 2019 20:32:47 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1557459167; cv=none; d=google.com; s=arc-20160816; b=Z31/KnVQpyAgKemq6jNbSy2S3Nu48U0j5FAZ4YbjZPoHgwM5X9JJKCloXVxfcNUTNq 1RCFwcIb+D15lrRAk+lRW7evpxlrobc6UDD6gAfscWlRK+55aypk51r5jAWAKFNC9GGi tZRGena4Oh3Mz4lCD+8BVhL0eHjA6VMbr+RLEmlss+OgTAY1uSmnN8FKlAIky3Q5Yk1w Qc7yqyI2uvxhsFYeIcewcMT/44PZ/VHJjHGkZwaoqiKKd/qVjX5fyCObc0EY5wmNdTlq gqCGnYhDwDypN2xnxJ9Q/gkxkKb1aROYjtASMORlpMGhWG7Vm6qv9N8A9mDOnrjOgQsn lgTg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=XUS5O0Wsp1uZAHY7PV259DmtfHHmlKN4309ndxqVouY=; b=xe2MM4kL2ftRQLOjBcj050QB57bc36JkQQbRv126/yXCCPfXj/RFyim4Cc30Je1sO6 ft2MUfng5cg0vcu6p4rCxLSVQxRa7nZpSigJ9VCpro0X+raKg8oPXln2hnyn7+yMVvi1 VOomQ3X/8TqA2os5FviRCUCuIXwAklhCrwd7LJf2mNpb6i+W1zmaLmc34R+C2XIvC6NF kcTm53cCu3gA5iTrQR7wqCzK7emPjuELLWqz1JwCvfAJ0tPogEhw4QV1baTiA3dBZ9ww aXktKLjEpm2032hq2Grdt/WvKA2WcxFA6Qw46nDczjxQunMbj+Ro3EarlWVPuR3qRese xqKQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=Gz4GjQPt; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[97.113.13.231]) by smtp.gmail.com with ESMTPSA id t26sm6259695pgk.62.2019.05.09.20.27.14 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 09 May 2019 20:27:14 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Thu, 9 May 2019 20:27:04 -0700 Message-Id: <20190510032710.23910-3-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190510032710.23910-1-richard.henderson@linaro.org> References: <20190510032710.23910-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::442 Subject: [Qemu-devel] [PATCH v2 2/8] linux-user: Pass the parent env to cpu_clone_regs X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Implementing clone for sparc requires that we make modifications to both the parent and child cpu state. In all other cases, the new argument can be ignored. Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- linux-user/aarch64/target_cpu.h | 3 ++- linux-user/alpha/target_cpu.h | 3 ++- linux-user/arm/target_cpu.h | 3 ++- linux-user/cris/target_cpu.h | 3 ++- linux-user/hppa/target_cpu.h | 3 ++- linux-user/i386/target_cpu.h | 3 ++- linux-user/m68k/target_cpu.h | 3 ++- linux-user/microblaze/target_cpu.h | 3 ++- linux-user/mips/target_cpu.h | 3 ++- linux-user/nios2/target_cpu.h | 3 ++- linux-user/openrisc/target_cpu.h | 4 +++- linux-user/ppc/target_cpu.h | 3 ++- linux-user/riscv/target_cpu.h | 3 ++- linux-user/s390x/target_cpu.h | 3 ++- linux-user/sh4/target_cpu.h | 3 ++- linux-user/sparc/target_cpu.h | 3 ++- linux-user/tilegx/target_cpu.h | 3 ++- linux-user/xtensa/target_cpu.h | 3 ++- linux-user/syscall.c | 2 +- 19 files changed, 38 insertions(+), 19 deletions(-) -- 2.17.1 diff --git a/linux-user/aarch64/target_cpu.h b/linux-user/aarch64/target_cpu.h index a021c95fa4..130177115e 100644 --- a/linux-user/aarch64/target_cpu.h +++ b/linux-user/aarch64/target_cpu.h @@ -19,7 +19,8 @@ #ifndef AARCH64_TARGET_CPU_H #define AARCH64_TARGET_CPU_H -static inline void cpu_clone_regs(CPUARMState *env, target_ulong newsp) +static inline void cpu_clone_regs(CPUARMState *env, CPUARMState *old_env, + target_ulong newsp) { if (newsp) { env->xregs[31] = newsp; diff --git a/linux-user/alpha/target_cpu.h b/linux-user/alpha/target_cpu.h index ac4d255ae7..750ffb50d7 100644 --- a/linux-user/alpha/target_cpu.h +++ b/linux-user/alpha/target_cpu.h @@ -19,7 +19,8 @@ #ifndef ALPHA_TARGET_CPU_H #define ALPHA_TARGET_CPU_H -static inline void cpu_clone_regs(CPUAlphaState *env, target_ulong newsp) +static inline void cpu_clone_regs(CPUAlphaState *env, CPUAlphaState *old_env, + target_ulong newsp) { if (newsp) { env->ir[IR_SP] = newsp; diff --git a/linux-user/arm/target_cpu.h b/linux-user/arm/target_cpu.h index 8a3764919a..5538b6cb29 100644 --- a/linux-user/arm/target_cpu.h +++ b/linux-user/arm/target_cpu.h @@ -23,7 +23,8 @@ See validate_guest_space in linux-user/elfload.c. */ #define MAX_RESERVED_VA 0xffff0000ul -static inline void cpu_clone_regs(CPUARMState *env, target_ulong newsp) +static inline void cpu_clone_regs(CPUARMState *env, CPUARMState *old_env, + target_ulong newsp) { if (newsp) { env->regs[13] = newsp; diff --git a/linux-user/cris/target_cpu.h b/linux-user/cris/target_cpu.h index 2309343979..baf842b400 100644 --- a/linux-user/cris/target_cpu.h +++ b/linux-user/cris/target_cpu.h @@ -20,7 +20,8 @@ #ifndef CRIS_TARGET_CPU_H #define CRIS_TARGET_CPU_H -static inline void cpu_clone_regs(CPUCRISState *env, target_ulong newsp) +static inline void cpu_clone_regs(CPUCRISState *env, CPUCRISState *old_env, + target_ulong newsp) { if (newsp) { env->regs[14] = newsp; diff --git a/linux-user/hppa/target_cpu.h b/linux-user/hppa/target_cpu.h index 1c539bdbd6..7cd8d168a7 100644 --- a/linux-user/hppa/target_cpu.h +++ b/linux-user/hppa/target_cpu.h @@ -19,7 +19,8 @@ #ifndef HPPA_TARGET_CPU_H #define HPPA_TARGET_CPU_H -static inline void cpu_clone_regs(CPUHPPAState *env, target_ulong newsp) +static inline void cpu_clone_regs(CPUHPPAState *env, CPUHPPAState *old_env, + target_ulong newsp) { if (newsp) { env->gr[30] = newsp; diff --git a/linux-user/i386/target_cpu.h b/linux-user/i386/target_cpu.h index ece04d0966..8fbe36670f 100644 --- a/linux-user/i386/target_cpu.h +++ b/linux-user/i386/target_cpu.h @@ -20,7 +20,8 @@ #ifndef I386_TARGET_CPU_H #define I386_TARGET_CPU_H -static inline void cpu_clone_regs(CPUX86State *env, target_ulong newsp) +static inline void cpu_clone_regs(CPUX86State *env, CPUX86State *old_env, + target_ulong newsp) { if (newsp) { env->regs[R_ESP] = newsp; diff --git a/linux-user/m68k/target_cpu.h b/linux-user/m68k/target_cpu.h index 7a26f3c3fc..00b3535fae 100644 --- a/linux-user/m68k/target_cpu.h +++ b/linux-user/m68k/target_cpu.h @@ -21,7 +21,8 @@ #ifndef M68K_TARGET_CPU_H #define M68K_TARGET_CPU_H -static inline void cpu_clone_regs(CPUM68KState *env, target_ulong newsp) +static inline void cpu_clone_regs(CPUM68KState *env, CPUM68KState *old_env, + target_ulong newsp) { if (newsp) { env->aregs[7] = newsp; diff --git a/linux-user/microblaze/target_cpu.h b/linux-user/microblaze/target_cpu.h index 73e139938c..3394e98918 100644 --- a/linux-user/microblaze/target_cpu.h +++ b/linux-user/microblaze/target_cpu.h @@ -19,7 +19,8 @@ #ifndef MICROBLAZE_TARGET_CPU_H #define MICROBLAZE_TARGET_CPU_H -static inline void cpu_clone_regs(CPUMBState *env, target_ulong newsp) +static inline void cpu_clone_regs(CPUMBState *env, CPUMBState *old_env, + target_ulong newsp) { if (newsp) { env->regs[R_SP] = newsp; diff --git a/linux-user/mips/target_cpu.h b/linux-user/mips/target_cpu.h index 02cf5eeff7..109348a5c9 100644 --- a/linux-user/mips/target_cpu.h +++ b/linux-user/mips/target_cpu.h @@ -19,7 +19,8 @@ #ifndef MIPS_TARGET_CPU_H #define MIPS_TARGET_CPU_H -static inline void cpu_clone_regs(CPUMIPSState *env, target_ulong newsp) +static inline void cpu_clone_regs(CPUMIPSState *env, CPUMIPSState *old_env, + target_ulong newsp) { if (newsp) { env->active_tc.gpr[29] = newsp; diff --git a/linux-user/nios2/target_cpu.h b/linux-user/nios2/target_cpu.h index 14f63338fa..09d2db74dc 100644 --- a/linux-user/nios2/target_cpu.h +++ b/linux-user/nios2/target_cpu.h @@ -20,7 +20,8 @@ #ifndef TARGET_CPU_H #define TARGET_CPU_H -static inline void cpu_clone_regs(CPUNios2State *env, target_ulong newsp) +static inline void cpu_clone_regs(CPUNios2State *env, CPUNios2State *old_env, + target_ulong newsp) { if (newsp) { env->regs[R_SP] = newsp; diff --git a/linux-user/openrisc/target_cpu.h b/linux-user/openrisc/target_cpu.h index 32ff135089..361b192735 100644 --- a/linux-user/openrisc/target_cpu.h +++ b/linux-user/openrisc/target_cpu.h @@ -20,7 +20,9 @@ #ifndef OPENRISC_TARGET_CPU_H #define OPENRISC_TARGET_CPU_H -static inline void cpu_clone_regs(CPUOpenRISCState *env, target_ulong newsp) +static inline void cpu_clone_regs(CPUOpenRISCState *env, + CPUOpenRISCState *old_env, + target_ulong newsp) { if (newsp) { cpu_set_gpr(env, 1, newsp); diff --git a/linux-user/ppc/target_cpu.h b/linux-user/ppc/target_cpu.h index c4641834e7..f42e266047 100644 --- a/linux-user/ppc/target_cpu.h +++ b/linux-user/ppc/target_cpu.h @@ -19,7 +19,8 @@ #ifndef PPC_TARGET_CPU_H #define PPC_TARGET_CPU_H -static inline void cpu_clone_regs(CPUPPCState *env, target_ulong newsp) +static inline void cpu_clone_regs(CPUPPCState *env, CPUPPCState *old_env, + target_ulong newsp) { if (newsp) { env->gpr[1] = newsp; diff --git a/linux-user/riscv/target_cpu.h b/linux-user/riscv/target_cpu.h index 7e090f376a..b112832d95 100644 --- a/linux-user/riscv/target_cpu.h +++ b/linux-user/riscv/target_cpu.h @@ -1,7 +1,8 @@ #ifndef TARGET_CPU_H #define TARGET_CPU_H -static inline void cpu_clone_regs(CPURISCVState *env, target_ulong newsp) +static inline void cpu_clone_regs(CPURISCVState *env, CPURISCVState *old_env, + target_ulong newsp) { if (newsp) { env->gpr[xSP] = newsp; diff --git a/linux-user/s390x/target_cpu.h b/linux-user/s390x/target_cpu.h index aa181ceaee..31d9d9d75f 100644 --- a/linux-user/s390x/target_cpu.h +++ b/linux-user/s390x/target_cpu.h @@ -19,7 +19,8 @@ #ifndef S390X_TARGET_CPU_H #define S390X_TARGET_CPU_H -static inline void cpu_clone_regs(CPUS390XState *env, target_ulong newsp) +static inline void cpu_clone_regs(CPUS390XState *env, CPUS390XState *old_env, + target_ulong newsp) { if (newsp) { env->regs[15] = newsp; diff --git a/linux-user/sh4/target_cpu.h b/linux-user/sh4/target_cpu.h index b0be9a2c1b..ca0d1bb0bb 100644 --- a/linux-user/sh4/target_cpu.h +++ b/linux-user/sh4/target_cpu.h @@ -19,7 +19,8 @@ #ifndef SH4_TARGET_CPU_H #define SH4_TARGET_CPU_H -static inline void cpu_clone_regs(CPUSH4State *env, target_ulong newsp) +static inline void cpu_clone_regs(CPUSH4State *env, CPUSH4State *old_env, + target_ulong newsp) { if (newsp) { env->gregs[15] = newsp; diff --git a/linux-user/sparc/target_cpu.h b/linux-user/sparc/target_cpu.h index 1ffc0ae9f2..a92748cae3 100644 --- a/linux-user/sparc/target_cpu.h +++ b/linux-user/sparc/target_cpu.h @@ -20,7 +20,8 @@ #ifndef SPARC_TARGET_CPU_H #define SPARC_TARGET_CPU_H -static inline void cpu_clone_regs(CPUSPARCState *env, target_ulong newsp) +static inline void cpu_clone_regs(CPUSPARCState *env, CPUSPARCState *old_env, + target_ulong newsp) { if (newsp) { env->regwptr[22] = newsp; diff --git a/linux-user/tilegx/target_cpu.h b/linux-user/tilegx/target_cpu.h index d1aa5824f2..35100a3d43 100644 --- a/linux-user/tilegx/target_cpu.h +++ b/linux-user/tilegx/target_cpu.h @@ -19,7 +19,8 @@ #ifndef TILEGX_TARGET_CPU_H #define TILEGX_TARGET_CPU_H -static inline void cpu_clone_regs(CPUTLGState *env, target_ulong newsp) +static inline void cpu_clone_regs(CPUTLGState *env, CPUTLGState *old_env, + target_ulong newsp) { if (newsp) { env->regs[TILEGX_R_SP] = newsp; diff --git a/linux-user/xtensa/target_cpu.h b/linux-user/xtensa/target_cpu.h index e31efe3ea0..0e9681e9f9 100644 --- a/linux-user/xtensa/target_cpu.h +++ b/linux-user/xtensa/target_cpu.h @@ -4,7 +4,8 @@ #ifndef XTENSA_TARGET_CPU_H #define XTENSA_TARGET_CPU_H -static inline void cpu_clone_regs(CPUXtensaState *env, target_ulong newsp) +static inline void cpu_clone_regs(CPUXtensaState *env, CPUXtensaState *old_env, + target_ulong newsp) { if (newsp) { env->regs[1] = newsp; diff --git a/linux-user/syscall.c b/linux-user/syscall.c index f7d0754c8d..80d7f3788e 100644 --- a/linux-user/syscall.c +++ b/linux-user/syscall.c @@ -5493,7 +5493,7 @@ static int do_fork(CPUArchState *env, unsigned int flags, abi_ulong newsp, /* we create a new CPU instance. */ new_env = cpu_copy(env); /* Init regs that differ from the parent. */ - cpu_clone_regs(new_env, newsp); + cpu_clone_regs(new_env, env, newsp); new_cpu = ENV_GET_CPU(new_env); new_cpu->opaque = ts; ts->bprm = parent_ts->bprm; From patchwork Fri May 10 03:27:05 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 163814 Delivered-To: patch@linaro.org Received: by 2002:a05:6e02:142:0:0:0:0 with SMTP id j2csp1819588ilr; Thu, 9 May 2019 20:27:49 -0700 (PDT) X-Google-Smtp-Source: APXvYqzQjd1v8H2ufAMQUZ29gTtOBThti4spLSMh5T+n7P8wAeHW810KoebhrbOgF/mFj1izzW4/ X-Received: by 2002:a7b:c04c:: with SMTP id u12mr4910619wmc.59.1557458869502; Thu, 09 May 2019 20:27:49 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1557458869; cv=none; d=google.com; s=arc-20160816; b=f7QwVLJR/1Ve6v878GEf2YfZIkUpwlmVcw8MNnFM+Yg2xK/gypk+X3/U496nOnSaQt Te1uebx9kpHf4oevAVS0FP4SFmDPs04I6QjtrQRhp5nyooW9WVrczDwEGdpriI/TV1D6 VXac0EgfYZtEDx/8zQZ+KKg97hYLPwkmDdOEfQjgSMfen2Oa0GCRM3b2fcqsH6g0N3pB OZYNWrYLvrySyHQAKADAwX0RZ9fWYz08qX7SnnqdnUZL0UbuHnWYhw/XBi4uzf19kA/J wSoJPg2FaAQQ6K7ThZFoDjK5YalKvrpZ/Ay183UQqsKyhHhacO8DBVT3Fy+qUuE/W/8t 2eTg== ARC-Message-Signature: i=1; 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[97.113.13.231]) by smtp.gmail.com with ESMTPSA id t26sm6259695pgk.62.2019.05.09.20.27.15 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 09 May 2019 20:27:16 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Thu, 9 May 2019 20:27:05 -0700 Message-Id: <20190510032710.23910-4-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190510032710.23910-1-richard.henderson@linaro.org> References: <20190510032710.23910-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::644 Subject: [Qemu-devel] [PATCH v2 3/8] target/sparc: Define an enumeration for accessing env->regwptr X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Richard Henderson --- target/sparc/cpu.h | 33 +++++++++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) -- 2.17.1 diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h index 85b9665ccc..08f7d1a3c6 100644 --- a/target/sparc/cpu.h +++ b/target/sparc/cpu.h @@ -31,6 +31,39 @@ /*#define EXCP_INTERRUPT 0x100*/ +/* Windowed register indexes. */ +enum { + WREG_O0, + WREG_O1, + WREG_O2, + WREG_O3, + WREG_O4, + WREG_O5, + WREG_O6, + WREG_O7, + + WREG_L0, + WREG_L1, + WREG_L2, + WREG_L3, + WREG_L4, + WREG_L5, + WREG_L6, + WREG_L7, + + WREG_I0, + WREG_I1, + WREG_I2, + WREG_I3, + WREG_I4, + WREG_I5, + WREG_I6, + WREG_I7, + + WREG_SP = WREG_O6, + WREG_FP = WREG_I6, +}; + /* trap definitions */ #ifndef TARGET_SPARC64 #define TT_TFAULT 0x01 From patchwork Fri May 10 03:27:06 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 163818 Delivered-To: patch@linaro.org Received: by 2002:a05:6e02:142:0:0:0:0 with SMTP id j2csp1823362ilr; Thu, 9 May 2019 20:32:45 -0700 (PDT) X-Google-Smtp-Source: APXvYqxh9dCdslIad5dp+O3P9Nvy98EiHZRgc2+OP2Lll+q4cfewQKqBv44hHVeCkIWeQv/yw1dW X-Received: by 2002:a05:6000:1d0:: with SMTP id t16mr5953476wrx.239.1557459165052; Thu, 09 May 2019 20:32:45 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1557459165; cv=none; d=google.com; s=arc-20160816; b=e4L4otu/rxMy2bFV98eWz69xw8WELxBJ7RRk4xw75YnCVsEySkJGm679AMGS5mvQ8t zeLhvqsiqE8T6VwemoZlvNzgKj4AQexqdjjSyQzt/sqtsE1iiBroNSGqwc+KF9obkKOB ay4/3lywt42EFv8xqiDjM7lyYT4alIOOhaHNFwkaktj0Dfe1h4u38HCtDyiSjbuEIbOG hGo7usp4amMK321SFqjM9hsG8cQMdWKOSWlFiIHGBiavTwUisoNikXyKrMRdeUAF0Rac 5ALvwgUKPx1nwKP60YYkxcCN5B+gh5C+ZHiCcmqU4R1dTa9PnNj3OMU6vPXAvUeKLtho fQhA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=k6JHJxPH4SUjOY+2AFOQmSeRVHdVtcQpQvqTv9tIMgY=; b=NErSQdRlHVC9BEP/KozaqxEQA62KujEwTCLN9vcHoRFiuEKScRCQLzLqJnRKt9RHdu ZdQqby5AV96IWUc202MSF6sVdlxc91OG6yDfYLIrvtUzDqrDTfcCS3iTpIajI/dRb1xa BtZpiNx/WACpEDOYPsSo0Yk/7ghjaFzFG446WMSfAurQaPt319QMicieDHRtFoKopGvu n1OzGdaXYrxiCa08SGnrS1rN4JSG4TYh7vVfKEnAkYCr3U7JoRlmXxF8891As+6VdUWs L9kK0tPhyKBpjOd0zzlAf567bLB3bpaPy6kuzTk7xWcu6wcXAmtwX7CX8Jw0510Q8wpY 8XJw== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=qy0i2Erq; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[97.113.13.231]) by smtp.gmail.com with ESMTPSA id t26sm6259695pgk.62.2019.05.09.20.27.17 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 09 May 2019 20:27:17 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Thu, 9 May 2019 20:27:06 -0700 Message-Id: <20190510032710.23910-5-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190510032710.23910-1-richard.henderson@linaro.org> References: <20190510032710.23910-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::544 Subject: [Qemu-devel] [PATCH v2 4/8] linux-user/sparc: Use WREG constants in sparc/target_cpu.h X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" This fixes a naming bug wherein we used "UREG_FP" to access the stack pointer. OTOH, the "UREG_FP" constant was also defined incorrectly such that it *did* reference the stack pointer. Signed-off-by: Richard Henderson --- linux-user/sparc/target_cpu.h | 10 ++-------- 1 file changed, 2 insertions(+), 8 deletions(-) -- 2.17.1 diff --git a/linux-user/sparc/target_cpu.h b/linux-user/sparc/target_cpu.h index a92748cae3..567351d564 100644 --- a/linux-user/sparc/target_cpu.h +++ b/linux-user/sparc/target_cpu.h @@ -42,15 +42,9 @@ static inline void cpu_set_tls(CPUSPARCState *env, target_ulong newtls) env->gregs[7] = newtls; } -#ifndef UREG_I6 -#define UREG_I6 6 -#endif -#ifndef UREG_FP -#define UREG_FP UREG_I6 -#endif - static inline abi_ulong get_sp_from_cpustate(CPUSPARCState *state) { - return state->regwptr[UREG_FP]; + return state->regwptr[WREG_SP]; } + #endif From patchwork Fri May 10 03:27:07 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 163817 Delivered-To: patch@linaro.org Received: by 2002:a05:6e02:142:0:0:0:0 with SMTP id j2csp1821662ilr; Thu, 9 May 2019 20:30:41 -0700 (PDT) X-Google-Smtp-Source: APXvYqw/k+S116pIZ3an2cwthNLsipSyKKvlIER0nEoHu1JxxU1iicHE4ACWlfT+jsfYB7dblfs8 X-Received: by 2002:a05:600c:388:: with SMTP id w8mr5223366wmd.3.1557459041236; Thu, 09 May 2019 20:30:41 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1557459041; cv=none; d=google.com; s=arc-20160816; b=Xo/FihicaTFK00YU38FQeL8Gk3segtbdkcBx9Kkidv/EQXJStAaFd9xRGTNQP9HQe8 sDPHhu4B+AtlybhqaWJtGfS6vrkzKncPOLhwwF7fJyuPm8E5hQVZYoCXSpVieA3a7LxI 6vt4yiMqJ+3hmB5Ev9biVfY2iIkq20X5HHv4PpJb/BlNAewrBMIfqJR1G3U786lJ9fET VLrKDe7vJiqLU257itERiz7U/ZXPRhtQz1zd9B8iuOZ9VR3T3bv627dm9ZCWyesZR9a8 u0fPBiqJNWfoPhTuyfJhirI7qw00wZt4OeNps+23kodllN0JbIF5hWW8gdybu4/RnAdb /xpA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=Ad7p0XpmVmGXkoTgniD57oGcto4g8MS55uU7nmfGDcA=; b=FJ8LW6ibFMl+KNkxqqs2qk7/kKGDRbVF/1SUhE10pCO/ei7PnN4JpIlgrJ4/QxDcBI q5TR3FHGoqs/rkr+ANttUU7Hz/3arfc9XTTUCcX6uzlge1xAHDkyxsWJ8aNGush5rHHy DfbVIL4suzJxD2w6csgdXCGvvG6Qkzynu2P9HwpIuNrt4m3bvhI2XoApxyYvOoD4vN/R cd/lqbWrxi498E7Rb2VZgSXOoK1NbxiVxFq4tWczW5wK54sD/Edo0glMOsyR7qbSqZPo NXNLj/1y5eWj3E2Mf0Nls/7fXgEwBsYpnO2N1JGOJVXb9RRkel0HClxFBcKEU/WppaHG n9Kw== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=q0hnwXp9; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[97.113.13.231]) by smtp.gmail.com with ESMTPSA id t26sm6259695pgk.62.2019.05.09.20.27.18 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 09 May 2019 20:27:18 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Thu, 9 May 2019 20:27:07 -0700 Message-Id: <20190510032710.23910-6-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190510032710.23910-1-richard.henderson@linaro.org> References: <20190510032710.23910-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::543 Subject: [Qemu-devel] [PATCH v2 5/8] linux-user/sparc: Use WREG constants in sparc/signal.c X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Remove the incorrectly defined UREG constants. Maddeningly, in some cases we used the correct constant getting the env register wrong, and in other cases we used the incorrect constant getting the env register right. In the case of getcontext/setcontext, we are aided by the fact that the "other" constant, e.g. SPARC_MC_O0, is correct. So we can easily guess that the WREG_* constant on the other side should also be O0. Signed-off-by: Richard Henderson --- linux-user/sparc/signal.c | 96 +++++++++++++-------------------------- 1 file changed, 32 insertions(+), 64 deletions(-) -- 2.17.1 diff --git a/linux-user/sparc/signal.c b/linux-user/sparc/signal.c index ead169fbaa..243f237528 100644 --- a/linux-user/sparc/signal.c +++ b/linux-user/sparc/signal.c @@ -104,20 +104,6 @@ struct target_rt_signal_frame { qemu_siginfo_fpu_t fpu_state; }; -#define UREG_O0 16 -#define UREG_O6 22 -#define UREG_I0 0 -#define UREG_I1 1 -#define UREG_I2 2 -#define UREG_I3 3 -#define UREG_I4 4 -#define UREG_I5 5 -#define UREG_I6 6 -#define UREG_I7 7 -#define UREG_L0 8 -#define UREG_FP UREG_I6 -#define UREG_SP UREG_O6 - static inline abi_ulong get_sigframe(struct target_sigaction *sa, CPUSPARCState *env, unsigned long framesize) @@ -159,30 +145,12 @@ setup___siginfo(__siginfo_t *si, CPUSPARCState *env, abi_ulong mask) __put_user(env->gregs[i], &si->si_regs.u_regs[i]); } for (i=0; i < 8; i++) { - __put_user(env->regwptr[UREG_I0 + i], &si->si_regs.u_regs[i+8]); + __put_user(env->regwptr[WREG_O0 + i], &si->si_regs.u_regs[i+8]); } __put_user(mask, &si->si_mask); return err; } -#if 0 -static int -setup_sigcontext(struct target_sigcontext *sc, /*struct _fpstate *fpstate,*/ - CPUSPARCState *env, unsigned long mask) -{ - int err = 0; - - __put_user(mask, &sc->sigc_mask); - __put_user(env->regwptr[UREG_SP], &sc->sigc_sp); - __put_user(env->pc, &sc->sigc_pc); - __put_user(env->npc, &sc->sigc_npc); - __put_user(env->psr, &sc->sigc_psr); - __put_user(env->gregs[1], &sc->sigc_g1); - __put_user(env->regwptr[UREG_O0], &sc->sigc_o0); - - return err; -} -#endif #define NF_ALIGNEDSZ (((sizeof(struct target_signal_frame) + 7) & (~7))) void setup_frame(int sig, struct target_sigaction *ka, @@ -221,20 +189,20 @@ void setup_frame(int sig, struct target_sigaction *ka, } for (i = 0; i < 8; i++) { - __put_user(env->regwptr[i + UREG_L0], &sf->ss.locals[i]); + __put_user(env->regwptr[i + WREG_L0], &sf->ss.locals[i]); } for (i = 0; i < 8; i++) { - __put_user(env->regwptr[i + UREG_I0], &sf->ss.ins[i]); + __put_user(env->regwptr[i + WREG_I0], &sf->ss.ins[i]); } if (err) goto sigsegv; /* 3. signal handler back-trampoline and parameters */ - env->regwptr[UREG_FP] = sf_addr; - env->regwptr[UREG_I0] = sig; - env->regwptr[UREG_I1] = sf_addr + + env->regwptr[WREG_FP] = sf_addr; + env->regwptr[WREG_I0] = sig; + env->regwptr[WREG_I1] = sf_addr + offsetof(struct target_signal_frame, info); - env->regwptr[UREG_I2] = sf_addr + + env->regwptr[WREG_I2] = sf_addr + offsetof(struct target_signal_frame, info); /* 4. signal handler */ @@ -242,11 +210,11 @@ void setup_frame(int sig, struct target_sigaction *ka, env->npc = (env->pc + 4); /* 5. return to kernel instructions */ if (ka->ka_restorer) { - env->regwptr[UREG_I7] = ka->ka_restorer; + env->regwptr[WREG_I7] = ka->ka_restorer; } else { uint32_t val32; - env->regwptr[UREG_I7] = sf_addr + + env->regwptr[WREG_I7] = sf_addr + offsetof(struct target_signal_frame, insns) - 2 * 4; /* mov __NR_sigreturn, %g1 */ @@ -284,7 +252,7 @@ long do_sigreturn(CPUSPARCState *env) sigset_t host_set; int i; - sf_addr = env->regwptr[UREG_FP]; + sf_addr = env->regwptr[WREG_SP]; trace_user_do_sigreturn(env, sf_addr); if (!lock_user_struct(VERIFY_READ, sf, sf_addr, 1)) { goto segv_and_exit; @@ -316,7 +284,7 @@ long do_sigreturn(CPUSPARCState *env) __get_user(env->gregs[i], &sf->info.si_regs.u_regs[i]); } for (i=0; i < 8; i++) { - __get_user(env->regwptr[i + UREG_I0], &sf->info.si_regs.u_regs[i+8]); + __get_user(env->regwptr[i + WREG_O0], &sf->info.si_regs.u_regs[i+8]); } /* FIXME: implement FPU save/restore: @@ -433,7 +401,7 @@ void sparc64_set_context(CPUSPARCState *env) abi_ulong fp, i7, w_addr; unsigned int i; - ucp_addr = env->regwptr[UREG_I0]; + ucp_addr = env->regwptr[WREG_O0]; if (!lock_user_struct(VERIFY_READ, ucp, ucp_addr, 1)) { goto do_sigsegv; } @@ -443,7 +411,7 @@ void sparc64_set_context(CPUSPARCState *env) if ((pc | npc) & 3) { goto do_sigsegv; } - if (env->regwptr[UREG_I1]) { + if (env->regwptr[WREG_O1]) { target_sigset_t target_set; sigset_t set; @@ -474,19 +442,19 @@ void sparc64_set_context(CPUSPARCState *env) __get_user(env->gregs[5], (&(*grp)[SPARC_MC_G5])); __get_user(env->gregs[6], (&(*grp)[SPARC_MC_G6])); __get_user(env->gregs[7], (&(*grp)[SPARC_MC_G7])); - __get_user(env->regwptr[UREG_I0], (&(*grp)[SPARC_MC_O0])); - __get_user(env->regwptr[UREG_I1], (&(*grp)[SPARC_MC_O1])); - __get_user(env->regwptr[UREG_I2], (&(*grp)[SPARC_MC_O2])); - __get_user(env->regwptr[UREG_I3], (&(*grp)[SPARC_MC_O3])); - __get_user(env->regwptr[UREG_I4], (&(*grp)[SPARC_MC_O4])); - __get_user(env->regwptr[UREG_I5], (&(*grp)[SPARC_MC_O5])); - __get_user(env->regwptr[UREG_I6], (&(*grp)[SPARC_MC_O6])); - __get_user(env->regwptr[UREG_I7], (&(*grp)[SPARC_MC_O7])); + __get_user(env->regwptr[WREG_O0], (&(*grp)[SPARC_MC_O0])); + __get_user(env->regwptr[WREG_O1], (&(*grp)[SPARC_MC_O1])); + __get_user(env->regwptr[WREG_O2], (&(*grp)[SPARC_MC_O2])); + __get_user(env->regwptr[WREG_O3], (&(*grp)[SPARC_MC_O3])); + __get_user(env->regwptr[WREG_O4], (&(*grp)[SPARC_MC_O4])); + __get_user(env->regwptr[WREG_O5], (&(*grp)[SPARC_MC_O5])); + __get_user(env->regwptr[WREG_O6], (&(*grp)[SPARC_MC_O6])); + __get_user(env->regwptr[WREG_O7], (&(*grp)[SPARC_MC_O7])); __get_user(fp, &(ucp->tuc_mcontext.mc_fp)); __get_user(i7, &(ucp->tuc_mcontext.mc_i7)); - w_addr = TARGET_STACK_BIAS+env->regwptr[UREG_I6]; + w_addr = TARGET_STACK_BIAS + env->regwptr[WREG_FP]; if (put_user(fp, w_addr + offsetof(struct target_reg_window, ins[6]), abi_ulong) != 0) { goto do_sigsegv; @@ -534,7 +502,7 @@ void sparc64_get_context(CPUSPARCState *env) target_sigset_t target_set; sigset_t set; - ucp_addr = env->regwptr[UREG_I0]; + ucp_addr = env->regwptr[WREG_O0]; if (!lock_user_struct(VERIFY_WRITE, ucp, ucp_addr, 0)) { goto do_sigsegv; } @@ -580,16 +548,16 @@ void sparc64_get_context(CPUSPARCState *env) __put_user(env->gregs[5], &((*grp)[SPARC_MC_G5])); __put_user(env->gregs[6], &((*grp)[SPARC_MC_G6])); __put_user(env->gregs[7], &((*grp)[SPARC_MC_G7])); - __put_user(env->regwptr[UREG_I0], &((*grp)[SPARC_MC_O0])); - __put_user(env->regwptr[UREG_I1], &((*grp)[SPARC_MC_O1])); - __put_user(env->regwptr[UREG_I2], &((*grp)[SPARC_MC_O2])); - __put_user(env->regwptr[UREG_I3], &((*grp)[SPARC_MC_O3])); - __put_user(env->regwptr[UREG_I4], &((*grp)[SPARC_MC_O4])); - __put_user(env->regwptr[UREG_I5], &((*grp)[SPARC_MC_O5])); - __put_user(env->regwptr[UREG_I6], &((*grp)[SPARC_MC_O6])); - __put_user(env->regwptr[UREG_I7], &((*grp)[SPARC_MC_O7])); + __put_user(env->regwptr[WREG_O0], &((*grp)[SPARC_MC_O0])); + __put_user(env->regwptr[WREG_O1], &((*grp)[SPARC_MC_O1])); + __put_user(env->regwptr[WREG_O2], &((*grp)[SPARC_MC_O2])); + __put_user(env->regwptr[WREG_O3], &((*grp)[SPARC_MC_O3])); + __put_user(env->regwptr[WREG_O4], &((*grp)[SPARC_MC_O4])); + __put_user(env->regwptr[WREG_O5], &((*grp)[SPARC_MC_O5])); + __put_user(env->regwptr[WREG_O6], &((*grp)[SPARC_MC_O6])); + __put_user(env->regwptr[WREG_O7], &((*grp)[SPARC_MC_O7])); - w_addr = TARGET_STACK_BIAS+env->regwptr[UREG_I6]; + w_addr = TARGET_STACK_BIAS + env->regwptr[WREG_FP]; fp = i7 = 0; if (get_user(fp, w_addr + offsetof(struct target_reg_window, ins[6]), abi_ulong) != 0) { From patchwork Fri May 10 03:27:08 2019 Content-Type: text/plain; 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[97.113.13.231]) by smtp.gmail.com with ESMTPSA id t26sm6259695pgk.62.2019.05.09.20.27.19 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 09 May 2019 20:27:19 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Thu, 9 May 2019 20:27:08 -0700 Message-Id: <20190510032710.23910-7-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190510032710.23910-1-richard.henderson@linaro.org> References: <20190510032710.23910-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::641 Subject: [Qemu-devel] [PATCH v2 6/8] linux-user/sparc: Fix cpu_clone_regs X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" We failed to set the secondary return value in %o1 we failed to advance the PC past the syscall, we failed to adjust regwptr into the new structure, we stored the stack pointer into the wrong register. Signed-off-by: Richard Henderson --- linux-user/sparc/target_cpu.h | 28 ++++++++++++++++++++++------ 1 file changed, 22 insertions(+), 6 deletions(-) -- 2.17.1 diff --git a/linux-user/sparc/target_cpu.h b/linux-user/sparc/target_cpu.h index 567351d564..bbcb3a92ed 100644 --- a/linux-user/sparc/target_cpu.h +++ b/linux-user/sparc/target_cpu.h @@ -23,18 +23,34 @@ static inline void cpu_clone_regs(CPUSPARCState *env, CPUSPARCState *old_env, target_ulong newsp) { - if (newsp) { - env->regwptr[22] = newsp; - } - /* syscall return for clone child: 0, and clear CF since - * this counts as a success return value. + /* + * After cpu_copy, env->regwptr is pointing into old_env. + * Update the new cpu to use its own register window. */ - env->regwptr[0] = 0; + env->regwptr = env->regbase + (env->cwp * 16); + + /* Set a new stack, if requested. */ + if (newsp) { + env->regwptr[WREG_SP] = newsp; + } + + /* + * Syscall return for clone child: %o0 = 0 and clear CF since + * this counts as a success return value. %o1 = 1 to indicate + * this is the child. Advance the PC past the syscall. + */ + env->regwptr[WREG_O0] = 0; #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32) env->xcc &= ~PSR_CARRY; #else env->psr &= ~PSR_CARRY; #endif + env->regwptr[WREG_O1] = 1; + env->pc = env->npc; + env->npc = env->npc + 4; + + /* Set the second return value for the parent: %o1 = 0. */ + old_env->regwptr[WREG_O1] = 0; } static inline void cpu_set_tls(CPUSPARCState *env, target_ulong newtls) From patchwork Fri May 10 03:27:09 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 163820 Delivered-To: patch@linaro.org Received: by 2002:a05:6e02:142:0:0:0:0 with SMTP id j2csp1824673ilr; Thu, 9 May 2019 20:34:33 -0700 (PDT) X-Google-Smtp-Source: APXvYqzBrMc4rfjpnL/i8/5dnikhDN6E7AV4bNsHPlHulMeoNiUhIrAEM77qs2wKmc66Py/GcJJq X-Received: by 2002:a5d:674f:: with SMTP id l15mr5440788wrw.41.1557459273108; Thu, 09 May 2019 20:34:33 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1557459273; cv=none; d=google.com; s=arc-20160816; b=ZeCrJWL07yxGpm4gqbHUyVX3kMyEAFYTGCBAE0GP+9RPNDOIQbxY0SqvlWzzGpjhQz 5Od9kkjnHNww4nvNVMQz4ZOOus3IROukLETfQsk8VyXAEtVNTZtVujKjbd8s2RKMymzo lWtvscM8Cod9LV3SN2knTZ71zWDGnUGPindBrmOSqJO8a3ZLDjRRM7FpMTIDo00qx64o FXzSkJL1gWlh1j3Rst0HcH4XoyrPx01W2RbajkxyqrPtf9F7frwW0VpdW1xC632KYkwI umqkCcBxLY1woaU/IlfNkg/xuN+Zz4aynMeuGU+qxtCs3IhP+CaETkj3a9hd9PkXQBxw 8tuQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=rcqQ5gZYdNhdYCOJ+I4S1mR1Qz6k+Xi4o1Wh52SYzeo=; b=rXRc9mp98ey9rsU95ZIAH87RCoOq0iBVTf9HCS4QuByOu8ZzqV0/NCRHGbYMrw5MOy ACxFlRCCycqTzzynTTpOlX0SkcSQA+Gpr1Yn9uBwW9pWt0pGHkuQGCD0pPk4dfxBHNEh BfzLut4EvwwrMqtI/dyWnnNnEv3g1LQT2FVaX1xGFKEHyEwmDJZCtpQKlIUSJkMSM9MQ hQAF41N0qLAhhLjsbMspU5YJKyp8wRegDIwCvZbYVa1SG2/napmLR6j8eSyykq+rPg8F i0TAHArU7CF+j1MDkc2Gr5bijsg7kOL4LUGlapmynwh7g3E7pPa+QknFFhtjySNdQExi r0qQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=ej0UQFe4; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[97.113.13.231]) by smtp.gmail.com with ESMTPSA id t26sm6259695pgk.62.2019.05.09.20.27.20 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 09 May 2019 20:27:21 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Thu, 9 May 2019 20:27:09 -0700 Message-Id: <20190510032710.23910-8-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190510032710.23910-1-richard.henderson@linaro.org> References: <20190510032710.23910-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::441 Subject: [Qemu-devel] [PATCH v2 7/8] linux-user/sparc: Flush register windows before clone X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" As seen as the very first instruction of sys_clone in the kernel. Ideally this would be done in or before cpu_copy, and not with a separate explicit test vs the syscall number, but this is a more minimal solution. Signed-off-by: Richard Henderson --- linux-user/sparc/cpu_loop.c | 3 +++ 1 file changed, 3 insertions(+) -- 2.17.1 diff --git a/linux-user/sparc/cpu_loop.c b/linux-user/sparc/cpu_loop.c index 9e357229c0..ff04f67847 100644 --- a/linux-user/sparc/cpu_loop.c +++ b/linux-user/sparc/cpu_loop.c @@ -169,6 +169,9 @@ void cpu_loop (CPUSPARCState *env) case 0x110: case 0x16d: #endif + if (env->gregs[1] == TARGET_NR_clone) { + flush_windows(env); + } ret = do_syscall (env, env->gregs[1], env->regwptr[0], env->regwptr[1], env->regwptr[2], env->regwptr[3], From patchwork Fri May 10 03:27:10 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 163821 Delivered-To: patch@linaro.org Received: by 2002:a05:6e02:142:0:0:0:0 with SMTP id j2csp1825662ilr; Thu, 9 May 2019 20:35:44 -0700 (PDT) X-Google-Smtp-Source: APXvYqzKTloJreWlUdS8d3KQ8GwFFB2/BzBmzADmNy6KK+/o+KyVX8od6TM1Ww3P4ySJuASiJdWU X-Received: by 2002:a7b:cb58:: with SMTP id v24mr4907220wmj.121.1557459344355; Thu, 09 May 2019 20:35:44 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1557459344; cv=none; d=google.com; s=arc-20160816; b=fQAqF9tvwds9XUzzadp6YwsdffTK1HnfNUm8jBiWDFND1WGdY1HKEBv7k4puNzmsoe VcMMWh6+UXf4+i+LSgDxKApSCreITwAs+2GdG3Fyvj3dJQjLZY5lwNjy50h3kjM7hR3G dlaXmLqdBOSqbSzDgJpfIVPntlOavJ/iOh7FjmnB8wxYSv5Vo+fln+sMOMJ6xsUf9E/q yuaYfZhXc6oIUOds/ShGNh9emx/n8olFgDk6iwuDY0zNxdSHfBNb/Od3AkhWl66fr5jE MjFGdeASuRSa6gIKrZRF0HAE0me+f8amMJHn4UBL/rCDfHgWm844ECOWCEYk88wBQTfZ DBGA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=OghAJHs3fOQNasKs983B96RGcVieroO+wnBU19gV5SI=; b=bJ5ZxcnHny4zFs2p3VhDDm2ZoVfiTD0TfS5SpYJkzAaFnN1ZxB1QXO674iZteRbrxw tDW2n8/qhJ6oDk2PBpvq0BlcHfUX/DJ3UN64PJWL1l9s8IOvGO38szxAuH9JqOK/QK4x WCTgRh0un18pF77cPEgPVXN8nBP7XMb/z1g0Dwsfru8Fp+Xp48dGSMTeQ8XtfDG7LGf1 PHQmouoeSWL5jyO1pk2emSO8bBo2RbQMxFuud7mEj3hqnx9U6OQ1zpfos47RLyhZoDL2 xc6bQlbzPVyobhHibcJe5/guQkIXK4RwfvDMgb4nHsO+ErT/sfHF5xtNNX+TVD/RhNpm 07AA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=PnYmgQL0; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[97.113.13.231]) by smtp.gmail.com with ESMTPSA id t26sm6259695pgk.62.2019.05.09.20.27.21 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 09 May 2019 20:27:22 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Thu, 9 May 2019 20:27:10 -0700 Message-Id: <20190510032710.23910-9-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190510032710.23910-1-richard.henderson@linaro.org> References: <20190510032710.23910-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::443 Subject: [Qemu-devel] [PATCH v2 8/8] scripts/qemu-binfmt-conf: Update for sparc64 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Also note that we were missing the qemu_target_list entry for plain sparc; fix that at the same time. Signed-off-by: Richard Henderson --- scripts/qemu-binfmt-conf.sh | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) -- 2.17.1 diff --git a/scripts/qemu-binfmt-conf.sh b/scripts/qemu-binfmt-conf.sh index b5a16742a1..9f1580a91c 100755 --- a/scripts/qemu-binfmt-conf.sh +++ b/scripts/qemu-binfmt-conf.sh @@ -1,8 +1,8 @@ #!/bin/sh # Enable automatic program execution by the kernel. -qemu_target_list="i386 i486 alpha arm armeb sparc32plus ppc ppc64 ppc64le m68k \ -mips mipsel mipsn32 mipsn32el mips64 mips64el \ +qemu_target_list="i386 i486 alpha arm armeb sparc sparc32plus sparc64 \ +ppc ppc64 ppc64le m68k mips mipsel mipsn32 mipsn32el mips64 mips64el \ sh4 sh4eb s390x aarch64 aarch64_be hppa riscv32 riscv64 xtensa xtensaeb \ microblaze microblazeel or1k x86_64" @@ -38,6 +38,10 @@ sparc32plus_magic='\x7fELF\x01\x02\x01\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x sparc32plus_mask='\xff\xff\xff\xff\xff\xff\xff\x00\xff\xff\xff\xff\xff\xff\xff\xff\xff\xfe\xff\xff' sparc32plus_family=sparc +sparc64_magic='\x7fELF\x02\x02\x01\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x02\x00\x2b' +sparc64_mask='\xff\xff\xff\xff\xff\xff\xff\x00\xff\xff\xff\xff\xff\xff\xff\xff\xff\xfe\xff\xff' +sparc64_family=sparc + ppc_magic='\x7fELF\x01\x02\x01\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x02\x00\x14' ppc_mask='\xff\xff\xff\xff\xff\xff\xff\x00\xff\xff\xff\xff\xff\xff\xff\xff\xff\xfe\xff\xff' ppc_family=ppc