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Miller" , Jens Wiklander , , , , , Subject: [PATCH v3 2/9] crypto: ccp: Add a header for multiple drivers to use `__psp_pa` Date: Fri, 3 Mar 2023 10:50:40 -0600 Message-ID: <20230303165050.2918-3-mario.limonciello@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230303165050.2918-1-mario.limonciello@amd.com> References: <20230303165050.2918-1-mario.limonciello@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1NAM11FT091:EE_|MN2PR12MB4110:EE_ X-MS-Office365-Filtering-Correlation-Id: 5971ef95-42d5-4bf9-181d-08db1c077cec X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: dErXDvke7aRINFhpkHQ8Z9iEaM/vN4prg64c9d8taqJMiBT56LA8p5dgExOUYt5CLxMdcNfRcB6bkM1hlA6IFL0HqJYNMjtiFYPv+ox9Ua5dPEL4OjPmcFc8Zwewhro8uE4z1Vamgrzi3zT57UIuiHjLG6wHrMO/KfMeWzBa7YZMsswplkOrqFXJNEuZILltbpHGTS2vYsFqjl5mMUgZxFdSyC6M3hcwNNv+kfHjzlB62H00VCnEEfwbi+v22KzfyMOypLTX0/seyuA8JNHe4GDSBubG4/4ROGzoXczykVBr7pcrMm17bcJyuML2ubMDo8r6nGXxRRPP4eXJhzTlmBpCM79Rh7noTRI/yFM0NCJABwLZNJ4It6YIJ+7Do/cAzn0gR11huEbhy4OR7SjyKgWchZ4DRzvBoN502fZhjyrunC2Us0Y6jQpvHWhG86C8HN1H6Dovhfe9SX+IiQYlGtS6ClBeoJdU4jUngpmLFuTU8BJufvgI+K7SaRN4xrNAYDD2ZlPm8YgCgjH1QUsQjs89NA6rQ25muoGTtkVs6b4XfOreJlfwSS7wD6udaX6fkVTpT8v2Dv7hmpLRurzq7ejFKLQ41aTBNfXKepsaVRxbOTJoNAadPqEqjFtcjGIwJ8F1QwdyWisfoxRka/7SNVOSfWRvpBNsaP4bH6U9UbLEVQkpphrlbhuXB/fnL04dTlDE4CBUvVfQN8PD32KSl4GNRz8G2Ii5LXvYJJP7HynPCe1jiRw1JvTggKmgHqtfhnxFXidkTAMy4wusqT32pQ== X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230025)(4636009)(346002)(39860400002)(376002)(136003)(396003)(451199018)(40470700004)(36840700001)(46966006)(336012)(36860700001)(8936002)(7696005)(1076003)(26005)(2616005)(6666004)(16526019)(186003)(41300700001)(478600001)(54906003)(83380400001)(110136005)(316002)(921005)(4326008)(356005)(8676002)(40480700001)(47076005)(40460700003)(70586007)(426003)(70206006)(81166007)(82310400005)(86362001)(7416002)(2906002)(5660300002)(82740400003)(44832011)(36756003)(81973001)(36900700001); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 Mar 2023 16:51:08.7847 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 5971ef95-42d5-4bf9-181d-08db1c077cec X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT091.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB4110 Precedence: bulk List-ID: X-Mailing-List: linux-i2c@vger.kernel.org The TEE subdriver for CCP, the amdtee driver and the i2c-designware-amdpsp drivers all include `psp-sev.h` even though they don't use SEV functionality. Move the definition of `__psp_pa` into a common header to be included by all of these drivers. Reviewed-by: Jan Dabros Acked-by: Jarkko Nikula # For the drivers/i2c/busses/i2c-designware-amdpsp.c Acked-by: Sumit Garg # For TEE subsystem bits Signed-off-by: Mario Limonciello Acked-by: Sean Christopherson # KVM --- v1->v2: * Add tags --- arch/x86/kvm/svm/sev.c | 1 + drivers/crypto/ccp/sev-dev.c | 1 + drivers/crypto/ccp/tee-dev.c | 2 +- drivers/i2c/busses/i2c-designware-amdpsp.c | 2 +- drivers/tee/amdtee/call.c | 2 +- drivers/tee/amdtee/shm_pool.c | 2 +- include/linux/psp-sev.h | 8 -------- include/linux/psp.h | 14 ++++++++++++++ 8 files changed, 20 insertions(+), 12 deletions(-) create mode 100644 include/linux/psp.h diff --git a/arch/x86/kvm/svm/sev.c b/arch/x86/kvm/svm/sev.c index c25aeb550cd9..ec18a756b7c9 100644 --- a/arch/x86/kvm/svm/sev.c +++ b/arch/x86/kvm/svm/sev.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include #include diff --git a/drivers/crypto/ccp/sev-dev.c b/drivers/crypto/ccp/sev-dev.c index e2f25926eb51..28945ca7c856 100644 --- a/drivers/crypto/ccp/sev-dev.c +++ b/drivers/crypto/ccp/sev-dev.c @@ -24,6 +24,7 @@ #include #include #include +#include #include #include diff --git a/drivers/crypto/ccp/tee-dev.c b/drivers/crypto/ccp/tee-dev.c index 5c9d47f3be37..f24fc953718a 100644 --- a/drivers/crypto/ccp/tee-dev.c +++ b/drivers/crypto/ccp/tee-dev.c @@ -13,7 +13,7 @@ #include #include #include -#include +#include #include #include "psp-dev.h" diff --git a/drivers/i2c/busses/i2c-designware-amdpsp.c b/drivers/i2c/busses/i2c-designware-amdpsp.c index 8f36167bce62..80f28a1bbbef 100644 --- a/drivers/i2c/busses/i2c-designware-amdpsp.c +++ b/drivers/i2c/busses/i2c-designware-amdpsp.c @@ -4,7 +4,7 @@ #include #include #include -#include +#include #include #include diff --git a/drivers/tee/amdtee/call.c b/drivers/tee/amdtee/call.c index cec6e70f0ac9..e8cd9aaa3467 100644 --- a/drivers/tee/amdtee/call.c +++ b/drivers/tee/amdtee/call.c @@ -8,7 +8,7 @@ #include #include #include -#include +#include #include "amdtee_if.h" #include "amdtee_private.h" diff --git a/drivers/tee/amdtee/shm_pool.c b/drivers/tee/amdtee/shm_pool.c index f87f96a291c9..f0303126f199 100644 --- a/drivers/tee/amdtee/shm_pool.c +++ b/drivers/tee/amdtee/shm_pool.c @@ -5,7 +5,7 @@ #include #include -#include +#include #include "amdtee_private.h" static int pool_op_alloc(struct tee_shm_pool *pool, struct tee_shm *shm, diff --git a/include/linux/psp-sev.h b/include/linux/psp-sev.h index 1595088c428b..7fd17e82bab4 100644 --- a/include/linux/psp-sev.h +++ b/include/linux/psp-sev.h @@ -14,14 +14,6 @@ #include -#ifdef CONFIG_X86 -#include - -#define __psp_pa(x) __sme_pa(x) -#else -#define __psp_pa(x) __pa(x) -#endif - #define SEV_FW_BLOB_MAX_SIZE 0x4000 /* 16KB */ /** diff --git a/include/linux/psp.h b/include/linux/psp.h new file mode 100644 index 000000000000..202162487ec3 --- /dev/null +++ b/include/linux/psp.h @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef __PSP_H +#define __PSP_H + +#ifdef CONFIG_X86 +#include + +#define __psp_pa(x) __sme_pa(x) +#else +#define __psp_pa(x) __pa(x) +#endif + +#endif /* __PSP_H */ From patchwork Fri Mar 3 16:50:41 2023 Content-Type: text/plain; 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Miller" , , , Subject: [PATCH v3 3/9] crypto: ccp: Move some PSP mailbox bit definitions into common header Date: Fri, 3 Mar 2023 10:50:41 -0600 Message-ID: <20230303165050.2918-4-mario.limonciello@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230303165050.2918-1-mario.limonciello@amd.com> References: <20230303165050.2918-1-mario.limonciello@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1NAM11FT054:EE_|CO6PR12MB5491:EE_ X-MS-Office365-Filtering-Correlation-Id: 9a7907b1-0920-4917-c843-08db1c077e0b X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: qRUYT6FH2KC7DKCZv0nzyNXmjuYskV9nM5VIiE59eNxlBDFBWQF1oxZYe3aabmCTf1uJpVNmQCFI7sfz2NzhmXX5Dx4z0B4hJlk4YliACVolHOrnOUN/E6JN7skuHQjLzb/ekbjScwt9Eo8om3ocvDdZIytEfAsBLUj/YdUlxzqxDgcTEs34ZkyL8c7z98mbeacjCj+iR7Qv9nE37wZmqtZPte4xP0TEYaSHTX3kqLbsPQn7vcvg8abC2Iemo9/UTa0ddwq4I1n56gwpN+E2rKCS4rC7wBf6DZxX5bjg2pU8NkMdegjKaJBYW4hb4SAKLPp/qyULPmVlPKiMWSiWH9oaHJb5XwBfMPPlizPQJyqhOavIchxoFB7Asmr5dDl1I1q8Vr6E1xONRbQ6a7g+vIkmdxBR5q+AvFYLerkFRte0mBjaBhYpUsVyinF7sA0C4VYo1dS3pU/skFK4O8MLd+v3/305SmqYXiSqTNlfeYgi04xBlP8RPphjPn0SNh5VfHXytOxCeAgI2gFcUDnnz4il050XBd2tL7puqIGYgEnzoU7/rLnU1gYqoyoCuXh/tsP9tFKI3KdgdWwWAU02QgJb3UmvtU6cOWZeAysZLL1evnvIicZwt2nBO4oz8fS4HpxiSff5aHiLwBKzF4QW3ZanvdUkNYEdQugkR97BFripP8DKZ7QNImxhHDDw2hne/ehRPoXz8LsuJ9nbIbXExZwgU+DibGTlNRVmL9yW0fnkOWw3x7RnqwO//I69QQPs X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230025)(4636009)(376002)(136003)(396003)(39860400002)(346002)(451199018)(40470700004)(36840700001)(46966006)(83380400001)(426003)(36860700001)(47076005)(36756003)(40460700003)(6666004)(82740400003)(8936002)(7416002)(5660300002)(81166007)(478600001)(2906002)(921005)(356005)(40480700001)(86362001)(82310400005)(2616005)(16526019)(186003)(336012)(26005)(1076003)(4326008)(70586007)(8676002)(70206006)(7696005)(44832011)(15650500001)(316002)(54906003)(110136005)(41300700001)(36900700001); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 Mar 2023 16:51:10.6544 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 9a7907b1-0920-4917-c843-08db1c077e0b X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT054.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CO6PR12MB5491 Precedence: bulk List-ID: X-Mailing-List: linux-i2c@vger.kernel.org Some of the bits and fields used for mailboxes communicating with the PSP are common across all mailbox implementations (SEV, TEE, etc). Move these bits into the common `linux/psp.h` so they don't need to be re-defined for each implementation. Acked-by: Rijo Thomas Signed-off-by: Mario Limonciello --- v2->v3: * Pick up tags v1->v2: * Update comment to indicate it's PSP response not PSP ready --- drivers/crypto/ccp/psp-dev.h | 3 --- drivers/crypto/ccp/sev-dev.c | 15 +++++++-------- drivers/crypto/ccp/sev-dev.h | 2 +- drivers/crypto/ccp/tee-dev.c | 15 ++++++++------- drivers/i2c/busses/i2c-designware-amdpsp.c | 16 +++++----------- include/linux/psp.h | 12 ++++++++++++ 6 files changed, 33 insertions(+), 30 deletions(-) diff --git a/drivers/crypto/ccp/psp-dev.h b/drivers/crypto/ccp/psp-dev.h index 06e1f317216d..55f54bb2b3fb 100644 --- a/drivers/crypto/ccp/psp-dev.h +++ b/drivers/crypto/ccp/psp-dev.h @@ -17,9 +17,6 @@ #include "sp-dev.h" -#define PSP_CMDRESP_RESP BIT(31) -#define PSP_CMDRESP_ERR_MASK 0xffff - #define MAX_PSP_NAME_LEN 16 extern struct psp_device *psp_master; diff --git a/drivers/crypto/ccp/sev-dev.c b/drivers/crypto/ccp/sev-dev.c index 28945ca7c856..6440d35dfa4e 100644 --- a/drivers/crypto/ccp/sev-dev.c +++ b/drivers/crypto/ccp/sev-dev.c @@ -7,6 +7,7 @@ * Author: Brijesh Singh */ +#include #include #include #include @@ -103,7 +104,7 @@ static void sev_irq_handler(int irq, void *data, unsigned int status) /* Check if it is SEV command completion: */ reg = ioread32(sev->io_regs + sev->vdata->cmdresp_reg); - if (reg & PSP_CMDRESP_RESP) { + if (FIELD_GET(PSP_CMDRESP_RESP, reg)) { sev->int_rcvd = 1; wake_up(&sev->int_queue); } @@ -347,9 +348,7 @@ static int __sev_do_cmd_locked(int cmd, void *data, int *psp_ret) sev->int_rcvd = 0; - reg = cmd; - reg <<= SEV_CMDRESP_CMD_SHIFT; - reg |= SEV_CMDRESP_IOC; + reg = FIELD_PREP(SEV_CMDRESP_CMD, cmd) | SEV_CMDRESP_IOC; iowrite32(reg, sev->io_regs + sev->vdata->cmdresp_reg); /* wait for command completion */ @@ -367,11 +366,11 @@ static int __sev_do_cmd_locked(int cmd, void *data, int *psp_ret) psp_timeout = psp_cmd_timeout; if (psp_ret) - *psp_ret = reg & PSP_CMDRESP_ERR_MASK; + *psp_ret = FIELD_GET(PSP_CMDRESP_STS, reg); - if (reg & PSP_CMDRESP_ERR_MASK) { - dev_dbg(sev->dev, "sev command %#x failed (%#010x)\n", - cmd, reg & PSP_CMDRESP_ERR_MASK); + if (FIELD_GET(PSP_CMDRESP_STS, reg)) { + dev_dbg(sev->dev, "sev command %#x failed (%#010lx)\n", + cmd, FIELD_GET(PSP_CMDRESP_STS, reg)); ret = -EIO; } else { ret = sev_write_init_ex_file_if_required(cmd); diff --git a/drivers/crypto/ccp/sev-dev.h b/drivers/crypto/ccp/sev-dev.h index 666c21eb81ab..778c95155e74 100644 --- a/drivers/crypto/ccp/sev-dev.h +++ b/drivers/crypto/ccp/sev-dev.h @@ -25,8 +25,8 @@ #include #include +#define SEV_CMDRESP_CMD GENMASK(26, 16) #define SEV_CMD_COMPLETE BIT(1) -#define SEV_CMDRESP_CMD_SHIFT 16 #define SEV_CMDRESP_IOC BIT(0) struct sev_misc_dev { diff --git a/drivers/crypto/ccp/tee-dev.c b/drivers/crypto/ccp/tee-dev.c index f24fc953718a..5560bf8329a1 100644 --- a/drivers/crypto/ccp/tee-dev.c +++ b/drivers/crypto/ccp/tee-dev.c @@ -8,6 +8,7 @@ * Copyright (C) 2019,2021 Advanced Micro Devices, Inc. */ +#include #include #include #include @@ -69,7 +70,7 @@ static int tee_wait_cmd_poll(struct psp_tee_device *tee, unsigned int timeout, while (--nloop) { *reg = ioread32(tee->io_regs + tee->vdata->cmdresp_reg); - if (*reg & PSP_CMDRESP_RESP) + if (FIELD_GET(PSP_CMDRESP_RESP, *reg)) return 0; usleep_range(10000, 10100); @@ -149,9 +150,9 @@ static int tee_init_ring(struct psp_tee_device *tee) goto free_buf; } - if (reg & PSP_CMDRESP_ERR_MASK) { - dev_err(tee->dev, "tee: ring init command failed (%#010x)\n", - reg & PSP_CMDRESP_ERR_MASK); + if (FIELD_GET(PSP_CMDRESP_STS, reg)) { + dev_err(tee->dev, "tee: ring init command failed (%#010lx)\n", + FIELD_GET(PSP_CMDRESP_STS, reg)); tee_free_ring(tee); ret = -EIO; } @@ -179,9 +180,9 @@ static void tee_destroy_ring(struct psp_tee_device *tee) ret = tee_wait_cmd_poll(tee, TEE_DEFAULT_TIMEOUT, ®); if (ret) { dev_err(tee->dev, "tee: ring destroy command timed out\n"); - } else if (reg & PSP_CMDRESP_ERR_MASK) { - dev_err(tee->dev, "tee: ring destroy command failed (%#010x)\n", - reg & PSP_CMDRESP_ERR_MASK); + } else if (FIELD_GET(PSP_CMDRESP_STS, reg)) { + dev_err(tee->dev, "tee: ring destroy command failed (%#010lx)\n", + FIELD_GET(PSP_CMDRESP_STS, reg)); } free_ring: diff --git a/drivers/i2c/busses/i2c-designware-amdpsp.c b/drivers/i2c/busses/i2c-designware-amdpsp.c index 80f28a1bbbef..652e6b64bd5f 100644 --- a/drivers/i2c/busses/i2c-designware-amdpsp.c +++ b/drivers/i2c/busses/i2c-designware-amdpsp.c @@ -25,12 +25,6 @@ #define PSP_I2C_REQ_STS_BUS_BUSY 0x1 #define PSP_I2C_REQ_STS_INV_PARAM 0x3 -#define PSP_MBOX_FIELDS_STS GENMASK(15, 0) -#define PSP_MBOX_FIELDS_CMD GENMASK(23, 16) -#define PSP_MBOX_FIELDS_RESERVED GENMASK(29, 24) -#define PSP_MBOX_FIELDS_RECOVERY BIT(30) -#define PSP_MBOX_FIELDS_READY BIT(31) - struct psp_req_buffer_hdr { u32 total_size; u32 status; @@ -99,15 +93,15 @@ static int psp_check_mbox_recovery(struct psp_mbox __iomem *mbox) tmp = readl(&mbox->cmd_fields); - return FIELD_GET(PSP_MBOX_FIELDS_RECOVERY, tmp); + return FIELD_GET(PSP_CMDRESP_RECOVERY, tmp); } static int psp_wait_cmd(struct psp_mbox __iomem *mbox) { u32 tmp, expected; - /* Expect mbox_cmd to be cleared and ready bit to be set by PSP */ - expected = FIELD_PREP(PSP_MBOX_FIELDS_READY, 1); + /* Expect mbox_cmd to be cleared and the response bit to be set by PSP */ + expected = FIELD_PREP(PSP_CMDRESP_RESP, 1); /* * Check for readiness of PSP mailbox in a tight loop in order to @@ -124,7 +118,7 @@ static u32 psp_check_mbox_sts(struct psp_mbox __iomem *mbox) cmd_reg = readl(&mbox->cmd_fields); - return FIELD_GET(PSP_MBOX_FIELDS_STS, cmd_reg); + return FIELD_GET(PSP_CMDRESP_STS, cmd_reg); } static int psp_send_cmd(struct psp_i2c_req *req) @@ -148,7 +142,7 @@ static int psp_send_cmd(struct psp_i2c_req *req) writeq(req_addr, &mbox->i2c_req_addr); /* Write command register to trigger processing */ - cmd_reg = FIELD_PREP(PSP_MBOX_FIELDS_CMD, PSP_I2C_REQ_BUS_CMD); + cmd_reg = FIELD_PREP(PSP_CMDRESP_CMD, PSP_I2C_REQ_BUS_CMD); writel(cmd_reg, &mbox->cmd_fields); if (psp_wait_cmd(mbox)) diff --git a/include/linux/psp.h b/include/linux/psp.h index 202162487ec3..d3424790a70e 100644 --- a/include/linux/psp.h +++ b/include/linux/psp.h @@ -11,4 +11,16 @@ #define __psp_pa(x) __pa(x) #endif +/* + * Fields and bits used by most PSP mailboxes + * + * Note: Some mailboxes (such as SEV) have extra bits or different meanings + * and should include an appropriate local definition in their source file. + */ +#define PSP_CMDRESP_STS GENMASK(15, 0) +#define PSP_CMDRESP_CMD GENMASK(23, 16) +#define PSP_CMDRESP_RESERVED GENMASK(29, 24) +#define PSP_CMDRESP_RECOVERY BIT(30) +#define PSP_CMDRESP_RESP BIT(31) + #endif /* __PSP_H */ From patchwork Fri Mar 3 16:50:44 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mario Limonciello X-Patchwork-Id: 658645 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E7617C7EE37 for ; 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Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by CO1NAM11FT054.mail.protection.outlook.com (10.13.174.70) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.6156.22 via Frontend Transport; Fri, 3 Mar 2023 16:51:15 +0000 Received: from AUS-LX-MLIMONCI.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.34; Fri, 3 Mar 2023 10:51:13 -0600 From: Mario Limonciello To: =?utf-8?b?SmFuIETEhWJyb8Wb?= , Grzegorz Bernacki , , , , Jarkko Nikula , Andy Shevchenko , Mika Westerberg CC: Mario Limonciello , , Subject: [PATCH v3 6/9] i2c: designware: Use PCI PSP driver for communication Date: Fri, 3 Mar 2023 10:50:44 -0600 Message-ID: <20230303165050.2918-7-mario.limonciello@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230303165050.2918-1-mario.limonciello@amd.com> References: <20230303165050.2918-1-mario.limonciello@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1NAM11FT054:EE_|DM4PR12MB6664:EE_ X-MS-Office365-Filtering-Correlation-Id: 899e4b02-6db4-4d8b-e38a-08db1c078120 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 Mar 2023 16:51:15.8259 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 899e4b02-6db4-4d8b-e38a-08db1c078120 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT054.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB6664 Precedence: bulk List-ID: X-Mailing-List: linux-i2c@vger.kernel.org Currently the PSP semaphore communication base address is discovered by using an MSR that is not architecturally guaranteed for future platforms. Also the mailbox that is utilized for communication with the PSP may have other consumers in the kernel, so it's better to make all communication go through a single driver. Signed-off-by: Mario Limonciello --- v1->v2: * Fix Kconfig to use imply * Use IS_REACHABLE --- drivers/i2c/busses/Kconfig | 2 +- drivers/i2c/busses/i2c-designware-amdpsp.c | 142 ++------------------ drivers/i2c/busses/i2c-designware-core.h | 1 - drivers/i2c/busses/i2c-designware-platdrv.c | 1 - include/linux/psp-platform-access.h | 1 + 5 files changed, 11 insertions(+), 136 deletions(-) diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig index 9b8e84f20604..a24534d5877a 100644 --- a/drivers/i2c/busses/Kconfig +++ b/drivers/i2c/busses/Kconfig @@ -566,9 +566,9 @@ config I2C_DESIGNWARE_PLATFORM config I2C_DESIGNWARE_AMDPSP bool "AMD PSP I2C semaphore support" - depends on X86_MSR depends on ACPI depends on I2C_DESIGNWARE_PLATFORM + imply CRYPTO_DEV_SP_PSP help This driver enables managed host access to the selected I2C bus shared between AMD CPU and AMD PSP. diff --git a/drivers/i2c/busses/i2c-designware-amdpsp.c b/drivers/i2c/busses/i2c-designware-amdpsp.c index 652e6b64bd5f..105584abcf8f 100644 --- a/drivers/i2c/busses/i2c-designware-amdpsp.c +++ b/drivers/i2c/busses/i2c-designware-amdpsp.c @@ -1,11 +1,8 @@ // SPDX-License-Identifier: GPL-2.0 -#include -#include #include -#include +#include #include -#include #include #include @@ -13,23 +10,15 @@ #include "i2c-designware-core.h" #define MSR_AMD_PSP_ADDR 0xc00110a2 -#define PSP_MBOX_OFFSET 0x10570 -#define PSP_CMD_TIMEOUT_US (500 * USEC_PER_MSEC) #define PSP_I2C_RESERVATION_TIME_MS 100 -#define PSP_I2C_REQ_BUS_CMD 0x64 #define PSP_I2C_REQ_RETRY_CNT 400 #define PSP_I2C_REQ_RETRY_DELAY_US (25 * USEC_PER_MSEC) #define PSP_I2C_REQ_STS_OK 0x0 #define PSP_I2C_REQ_STS_BUS_BUSY 0x1 #define PSP_I2C_REQ_STS_INV_PARAM 0x3 -struct psp_req_buffer_hdr { - u32 total_size; - u32 status; -}; - enum psp_i2c_req_type { PSP_I2C_REQ_ACQUIRE, PSP_I2C_REQ_RELEASE, @@ -41,119 +30,12 @@ struct psp_i2c_req { enum psp_i2c_req_type type; }; -struct psp_mbox { - u32 cmd_fields; - u64 i2c_req_addr; -} __packed; - static DEFINE_MUTEX(psp_i2c_access_mutex); static unsigned long psp_i2c_sem_acquired; -static void __iomem *mbox_iomem; static u32 psp_i2c_access_count; static bool psp_i2c_mbox_fail; static struct device *psp_i2c_dev; -/* - * Implementation of PSP-x86 i2c-arbitration mailbox introduced for AMD Cezanne - * family of SoCs. - */ - -static int psp_get_mbox_addr(unsigned long *mbox_addr) -{ - unsigned long long psp_mmio; - - if (rdmsrl_safe(MSR_AMD_PSP_ADDR, &psp_mmio)) - return -EIO; - - *mbox_addr = (unsigned long)(psp_mmio + PSP_MBOX_OFFSET); - - return 0; -} - -static int psp_mbox_probe(void) -{ - unsigned long mbox_addr; - int ret; - - ret = psp_get_mbox_addr(&mbox_addr); - if (ret) - return ret; - - mbox_iomem = ioremap(mbox_addr, sizeof(struct psp_mbox)); - if (!mbox_iomem) - return -ENOMEM; - - return 0; -} - -/* Recovery field should be equal 0 to start sending commands */ -static int psp_check_mbox_recovery(struct psp_mbox __iomem *mbox) -{ - u32 tmp; - - tmp = readl(&mbox->cmd_fields); - - return FIELD_GET(PSP_CMDRESP_RECOVERY, tmp); -} - -static int psp_wait_cmd(struct psp_mbox __iomem *mbox) -{ - u32 tmp, expected; - - /* Expect mbox_cmd to be cleared and the response bit to be set by PSP */ - expected = FIELD_PREP(PSP_CMDRESP_RESP, 1); - - /* - * Check for readiness of PSP mailbox in a tight loop in order to - * process further as soon as command was consumed. - */ - return readl_poll_timeout(&mbox->cmd_fields, tmp, (tmp == expected), - 0, PSP_CMD_TIMEOUT_US); -} - -/* Status equal to 0 means that PSP succeed processing command */ -static u32 psp_check_mbox_sts(struct psp_mbox __iomem *mbox) -{ - u32 cmd_reg; - - cmd_reg = readl(&mbox->cmd_fields); - - return FIELD_GET(PSP_CMDRESP_STS, cmd_reg); -} - -static int psp_send_cmd(struct psp_i2c_req *req) -{ - struct psp_mbox __iomem *mbox = mbox_iomem; - phys_addr_t req_addr; - u32 cmd_reg; - - if (psp_check_mbox_recovery(mbox)) - return -EIO; - - if (psp_wait_cmd(mbox)) - return -EBUSY; - - /* - * Fill mailbox with address of command-response buffer, which will be - * used for sending i2c requests as well as reading status returned by - * PSP. Use physical address of buffer, since PSP will map this region. - */ - req_addr = __psp_pa((void *)req); - writeq(req_addr, &mbox->i2c_req_addr); - - /* Write command register to trigger processing */ - cmd_reg = FIELD_PREP(PSP_CMDRESP_CMD, PSP_I2C_REQ_BUS_CMD); - writel(cmd_reg, &mbox->cmd_fields); - - if (psp_wait_cmd(mbox)) - return -ETIMEDOUT; - - if (psp_check_mbox_sts(mbox)) - return -EIO; - - return 0; -} - /* Helper to verify status returned by PSP */ static int check_i2c_req_sts(struct psp_i2c_req *req) { @@ -182,10 +64,10 @@ static int psp_send_check_i2c_req(struct psp_i2c_req *req) * 2. i2c-requests - PSP refuses to grant i2c arbitration to x86 for too * long. * In order to distinguish between these two in error handling code, all - * errors on the first level (returned by psp_send_cmd) are shadowed by + * errors on the first level (returned by psp_send_platform_access_msg) are shadowed by * -EIO. */ - if (psp_send_cmd(req)) + if (psp_send_platform_access_msg(PSP_I2C_REQ_BUS_CMD, (struct psp_request *)req)) return -EIO; return check_i2c_req_sts(req); @@ -202,7 +84,7 @@ static int psp_send_i2c_req(enum psp_i2c_req_type i2c_req_type) if (!req) return -ENOMEM; - req->hdr.total_size = sizeof(*req); + req->hdr.payload_size = sizeof(*req); req->type = i2c_req_type; start = jiffies; @@ -381,7 +263,8 @@ static const struct i2c_lock_operations i2c_dw_psp_lock_ops = { int i2c_dw_amdpsp_probe_lock_support(struct dw_i2c_dev *dev) { - int ret; + if (!IS_REACHABLE(CRYPTO_DEV_CCP_DD)) + return -ENODEV; if (!dev) return -ENODEV; @@ -393,11 +276,10 @@ int i2c_dw_amdpsp_probe_lock_support(struct dw_i2c_dev *dev) if (psp_i2c_dev) return -EEXIST; - psp_i2c_dev = dev->dev; + if (psp_check_platform_access_status()) + return -EPROBE_DEFER; - ret = psp_mbox_probe(); - if (ret) - return ret; + psp_i2c_dev = dev->dev; dev_info(psp_i2c_dev, "I2C bus managed by AMD PSP\n"); @@ -411,9 +293,3 @@ int i2c_dw_amdpsp_probe_lock_support(struct dw_i2c_dev *dev) return 0; } - -/* Unmap area used as a mailbox with PSP */ -void i2c_dw_amdpsp_remove_lock_support(struct dw_i2c_dev *dev) -{ - iounmap(mbox_iomem); -} diff --git a/drivers/i2c/busses/i2c-designware-core.h b/drivers/i2c/busses/i2c-designware-core.h index 050d8c63ad3c..c5d87aae39c6 100644 --- a/drivers/i2c/busses/i2c-designware-core.h +++ b/drivers/i2c/busses/i2c-designware-core.h @@ -383,7 +383,6 @@ int i2c_dw_baytrail_probe_lock_support(struct dw_i2c_dev *dev); #if IS_ENABLED(CONFIG_I2C_DESIGNWARE_AMDPSP) int i2c_dw_amdpsp_probe_lock_support(struct dw_i2c_dev *dev); -void i2c_dw_amdpsp_remove_lock_support(struct dw_i2c_dev *dev); #endif int i2c_dw_validate_speed(struct dw_i2c_dev *dev); diff --git a/drivers/i2c/busses/i2c-designware-platdrv.c b/drivers/i2c/busses/i2c-designware-platdrv.c index 74182db03a88..89ad88c54754 100644 --- a/drivers/i2c/busses/i2c-designware-platdrv.c +++ b/drivers/i2c/busses/i2c-designware-platdrv.c @@ -214,7 +214,6 @@ static const struct i2c_dw_semaphore_callbacks i2c_dw_semaphore_cb_table[] = { #ifdef CONFIG_I2C_DESIGNWARE_AMDPSP { .probe = i2c_dw_amdpsp_probe_lock_support, - .remove = i2c_dw_amdpsp_remove_lock_support, }, #endif {} diff --git a/include/linux/psp-platform-access.h b/include/linux/psp-platform-access.h index 977df5cfd494..f5a03cd11f10 100644 --- a/include/linux/psp-platform-access.h +++ b/include/linux/psp-platform-access.h @@ -7,6 +7,7 @@ enum psp_platform_access_msg { PSP_CMD_NONE = 0x0, + PSP_I2C_REQ_BUS_CMD = 0x64, }; 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DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 Mar 2023 16:51:17.5136 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d4c1d3b4-0cc0-4bd0-66ee-08db1c078222 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT010.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB4189 Precedence: bulk List-ID: X-Mailing-List: linux-i2c@vger.kernel.org Skyrim doesn't use the platform feature mailbox for communication for I2C arbitration, it relies upon ringing a doorbell. Link: https://lore.kernel.org/linux-i2c/20220916131854.687371-3-jsd@semihalf.com/ Signed-off-by: Mario Limonciello --- v2->v3: * Use CPU ID rather than ACPI ID, this will be pushed to a later patch v1->v2: * New patch doorbell; get status field --- drivers/i2c/busses/i2c-designware-amdpsp.c | 28 ++++++++++++++-------- 1 file changed, 18 insertions(+), 10 deletions(-) diff --git a/drivers/i2c/busses/i2c-designware-amdpsp.c b/drivers/i2c/busses/i2c-designware-amdpsp.c index 105584abcf8f..2c671973010d 100644 --- a/drivers/i2c/busses/i2c-designware-amdpsp.c +++ b/drivers/i2c/busses/i2c-designware-amdpsp.c @@ -73,34 +73,43 @@ static int psp_send_check_i2c_req(struct psp_i2c_req *req) return check_i2c_req_sts(req); } -static int psp_send_i2c_req(enum psp_i2c_req_type i2c_req_type) +static int psp_send_i2c_req_amdi0019(enum psp_i2c_req_type i2c_req_type) { struct psp_i2c_req *req; - unsigned long start; int status, ret; /* Allocate command-response buffer */ req = kzalloc(sizeof(*req), GFP_KERNEL); if (!req) return -ENOMEM; - req->hdr.payload_size = sizeof(*req); req->type = i2c_req_type; - - start = jiffies; ret = read_poll_timeout(psp_send_check_i2c_req, status, (status != -EBUSY), PSP_I2C_REQ_RETRY_DELAY_US, PSP_I2C_REQ_RETRY_CNT * PSP_I2C_REQ_RETRY_DELAY_US, 0, req); - if (ret) { + kfree(req); + + if (ret) dev_err(psp_i2c_dev, "Timed out waiting for PSP to %s I2C bus\n", (i2c_req_type == PSP_I2C_REQ_ACQUIRE) ? "release" : "acquire"); - goto cleanup; - } - ret = status; + return ret ? ret : status; +} + +static int psp_send_i2c_req(enum psp_i2c_req_type i2c_req_type) +{ + unsigned long start = jiffies; + int ret; + + /* Use doorbell for Skyrim and mailbox for Cezanne */ + if (boot_cpu_data.x86 == 25 && boot_cpu_data.x86_model == 80) + ret = psp_send_i2c_req_amdi0019(i2c_req_type); + else + ret = psp_ring_platform_doorbell(i2c_req_type); + if (ret) { dev_err(psp_i2c_dev, "PSP communication error\n"); goto cleanup; @@ -115,7 +124,6 @@ static int psp_send_i2c_req(enum psp_i2c_req_type i2c_req_type) psp_i2c_mbox_fail = true; } - kfree(req); return ret; } From patchwork Fri Mar 3 16:50:47 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mario Limonciello X-Patchwork-Id: 659593 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 09C64C7EE2D for ; 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DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 Mar 2023 16:51:19.1314 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d9dc94e3-e239-4442-4471-08db1c078319 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT061.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB4143 Precedence: bulk List-ID: X-Mailing-List: linux-i2c@vger.kernel.org Cezanne and Skyrim have the same PSP hardware but use a different protocol to negotiate I2C arbitration. To disambiguate this going forward introduce a new ACPI ID to represent the protocol that utilizes a doorbell. Signed-off-by: Mario Limonciello --- v2->v3: * Split from earlier patch to standalone --- drivers/i2c/busses/i2c-designware-amdpsp.c | 5 +++-- drivers/i2c/busses/i2c-designware-platdrv.c | 1 + 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/i2c/busses/i2c-designware-amdpsp.c b/drivers/i2c/busses/i2c-designware-amdpsp.c index 2c671973010d..44b8432458b0 100644 --- a/drivers/i2c/busses/i2c-designware-amdpsp.c +++ b/drivers/i2c/busses/i2c-designware-amdpsp.c @@ -101,11 +101,12 @@ static int psp_send_i2c_req_amdi0019(enum psp_i2c_req_type i2c_req_type) static int psp_send_i2c_req(enum psp_i2c_req_type i2c_req_type) { + const char *hid = acpi_device_hid(ACPI_COMPANION(psp_i2c_dev)); unsigned long start = jiffies; int ret; - /* Use doorbell for Skyrim and mailbox for Cezanne */ - if (boot_cpu_data.x86 == 25 && boot_cpu_data.x86_model == 80) + /* Use doorbell for AMDI0020 and mailbox for AMDI0019 */ + if (!strcmp(hid, "AMDI0019")) ret = psp_send_i2c_req_amdi0019(i2c_req_type); else ret = psp_ring_platform_doorbell(i2c_req_type); diff --git a/drivers/i2c/busses/i2c-designware-platdrv.c b/drivers/i2c/busses/i2c-designware-platdrv.c index 89ad88c54754..5ca71bda9ac2 100644 --- a/drivers/i2c/busses/i2c-designware-platdrv.c +++ b/drivers/i2c/busses/i2c-designware-platdrv.c @@ -51,6 +51,7 @@ static const struct acpi_device_id dw_i2c_acpi_match[] = { { "AMD0010", ACCESS_INTR_MASK }, { "AMDI0010", ACCESS_INTR_MASK }, { "AMDI0019", ACCESS_INTR_MASK | ARBITRATION_SEMAPHORE }, + { "AMDI0020", ACCESS_INTR_MASK | ARBITRATION_SEMAPHORE }, { "AMDI0510", 0 }, { "APMC0D0F", 0 }, { "HISI02A1", 0 },