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[90.63.244.31]) by smtp.googlemail.com with ESMTPSA id r23sm2219564wmh.29.2019.05.14.03.12.47 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 14 May 2019 03:12:47 -0700 (PDT) From: Jerome Brunet To: Kevin Hilman Cc: Guillaume La Roque , devicetree@vger.kernel.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, Jerome Brunet Subject: [PATCH 1/3] arm64: dts: meson: g12a: add i2c nodes Date: Tue, 14 May 2019 12:12:35 +0200 Message-Id: <20190514101237.13969-2-jbrunet@baylibre.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190514101237.13969-1-jbrunet@baylibre.com> References: <20190514101237.13969-1-jbrunet@baylibre.com> MIME-Version: 1.0 X-Patchwork-Bot: notify Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Guillaume La Roque Add pinctrl and nodes for i2c support on amlogic g12a Signed-off-by: Guillaume La Roque Signed-off-by: Jerome Brunet --- arch/arm64/boot/dts/amlogic/meson-g12a.dtsi | 268 ++++++++++++++++++++ 1 file changed, 268 insertions(+) -- 2.20.1 diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi index ca01064a771a..e6c0c19b3223 100644 --- a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi @@ -244,6 +244,188 @@ }; }; + + i2c0_sda_c_pins: i2c0-sda-c { + mux { + groups = "i2c0_sda_c"; + function = "i2c0"; + bias-disable; + drive-strength-microamp = <3000>; + + }; + }; + + i2c0_sck_c_pins: i2c0-sck-c { + mux { + groups = "i2c0_sck_c"; + function = "i2c0"; + bias-disable; + drive-strength-microamp = <3000>; + }; + }; + + i2c0_sda_z0_pins: i2c0-sda-z0 { + mux { + groups = "i2c0_sda_z0"; + function = "i2c0"; + bias-disable; + drive-strength-microamp = <3000>; + }; + }; + + i2c0_sck_z1_pins: i2c0-sck-z1 { + mux { + groups = "i2c0_sck_z1"; + function = "i2c0"; + bias-disable; + drive-strength-microamp = <3000>; + }; + }; + + i2c0_sda_z7_pins: i2c0-sda-z7 { + mux { + groups = "i2c0_sda_z7"; + function = "i2c0"; + bias-disable; + drive-strength-microamp = <3000>; + }; + }; + + i2c0_sda_z8_pins: i2c0-sda-z8 { + mux { + groups = "i2c0_sda_z8"; + function = "i2c0"; + bias-disable; + drive-strength-microamp = <3000>; + }; + }; + + i2c1_sda_x_pins: i2c1-sda-x { + mux { + groups = "i2c1_sda_x"; + function = "i2c1"; + bias-disable; + drive-strength-microamp = <3000>; + }; + }; + + i2c1_sck_x_pins: i2c1-sck-x { + mux { + groups = "i2c1_sck_x"; + function = "i2c1"; + bias-disable; + drive-strength-microamp = <3000>; + }; + }; + + i2c1_sda_h2_pins: i2c1-sda-h2 { + mux { + groups = "i2c1_sda_h2"; + function = "i2c1"; + bias-disable; + drive-strength-microamp = <3000>; + }; + }; + + i2c1_sck_h3_pins: i2c1-sck-h3 { + mux { + groups = "i2c1_sck_h3"; + function = "i2c1"; + bias-disable; + drive-strength-microamp = <3000>; + }; + }; + + i2c1_sda_h6_pins: i2c1-sda-h6 { + mux { + groups = "i2c1_sda_h6"; + function = "i2c1"; + bias-disable; + drive-strength-microamp = <3000>; + }; + }; + + i2c1_sck_h7_pins: i2c1-sck-h7 { + mux { + groups = "i2c1_sck_h7"; + function = "i2c1"; + bias-disable; + drive-strength-microamp = <3000>; + }; + }; + + i2c2_sda_x_pins: i2c2-sda-x { + mux { + groups = "i2c2_sda_x"; + function = "i2c2"; + bias-disable; + drive-strength-microamp = <3000>; + }; + }; + + i2c2_sck_x_pins: i2c2-sck-x { + mux { + groups = "i2c2_sck_x"; + function = "i2c2"; + bias-disable; + drive-strength-microamp = <3000>; + }; + }; + + i2c2_sda_z_pins: i2c2-sda-z { + mux { + groups = "i2c2_sda_z"; + function = "i2c2"; + bias-disable; + drive-strength-microamp = <3000>; + }; + }; + + i2c2_sck_z_pins: i2c2-sck-z { + mux { + groups = "i2c2_sck_z"; + function = "i2c2"; + bias-disable; + drive-strength-microamp = <3000>; + }; + }; + + i2c3_sda_h_pins: i2c3-sda-h { + mux { + groups = "i2c3_sda_h"; + function = "i2c3"; + bias-disable; + drive-strength-microamp = <3000>; + }; + }; + + i2c3_sck_h_pins: i2c3-sck-h { + mux { + groups = "i2c3_sck_h"; + function = "i2c3"; + bias-disable; + drive-strength-microamp = <3000>; + }; + }; + + i2c3_sda_a_pins: i2c3-sda-a { + mux { + groups = "i2c3_sda_a"; + function = "i2c3"; + bias-disable; + drive-strength-microamp = <3000>; + }; + }; + + i2c3_sck_a_pins: i2c3-sck-a { + mux { + groups = "i2c3_sck_a"; + function = "i2c3"; + bias-disable; + drive-strength-microamp = <3000>; + }; + }; + pwm_a_pins: pwm-a { mux { groups = "pwm_a"; @@ -589,6 +771,42 @@ gpio-ranges = <&ao_pinctrl 0 0 15>; }; + i2c_ao_sck_pins: i2c_ao_sck_pins { + mux { + groups = "i2c_ao_sck"; + function = "i2c_ao"; + bias-disable; + drive-strength-microamp = <3000>; + }; + }; + + i2c_ao_sda_pins: i2c_ao_sda { + mux { + groups = "i2c_ao_sda"; + function = "i2c_ao"; + bias-disable; + drive-strength-microamp = <3000>; + }; + }; + + i2c_ao_sck_e_pins: i2c_ao_sck_e { + mux { + groups = "i2c_ao_sck_e"; + function = "i2c_ao"; + bias-disable; + drive-strength-microamp = <3000>; + }; + }; + + i2c_ao_sda_e_pins: i2c_ao_sda_e { + mux { + groups = "i2c_ao_sda_e"; + function = "i2c_ao"; + bias-disable; + drive-strength-microamp = <3000>; + }; + }; + uart_ao_a_pins: uart-a-ao { mux { groups = "uart_ao_a_tx", @@ -723,6 +941,16 @@ status = "disabled"; }; + i2c_AO: i2c@5000 { + compatible = "amlogic,meson-axg-i2c"; + status = "disabled"; + reg = <0x0 0x05000 0x0 0x20>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clkc CLKID_I2C>; + }; + pwm_AO_ab: pwm@7000 { compatible = "amlogic,meson-g12a-ao-pwm-ab"; reg = <0x0 0x7000 0x0 0x20>; @@ -826,6 +1054,46 @@ status = "disabled"; }; + i2c3: i2c@1c000 { + compatible = "amlogic,meson-axg-i2c"; + status = "disabled"; + reg = <0x0 0x1c000 0x0 0x20>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clkc CLKID_I2C>; + }; + + i2c2: i2c@1d000 { + compatible = "amlogic,meson-axg-i2c"; + status = "disabled"; + reg = <0x0 0x1d000 0x0 0x20>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clkc CLKID_I2C>; + }; + + i2c1: i2c@1e000 { + compatible = "amlogic,meson-axg-i2c"; + status = "disabled"; + reg = <0x0 0x1e000 0x0 0x20>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clkc CLKID_I2C>; + }; + + i2c0: i2c@1f000 { + compatible = "amlogic,meson-axg-i2c"; + status = "disabled"; + reg = <0x0 0x1f000 0x0 0x20>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clkc CLKID_I2C>; + }; + clk_msr: clock-measure@18000 { compatible = "amlogic,meson-g12a-clk-measure"; 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[90.63.244.31]) by smtp.googlemail.com with ESMTPSA id r23sm2219564wmh.29.2019.05.14.03.12.48 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 14 May 2019 03:12:48 -0700 (PDT) From: Jerome Brunet To: Kevin Hilman Cc: Jerome Brunet , devicetree@vger.kernel.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 2/3] arm64: dts: meson: u200: enable i2c busses Date: Tue, 14 May 2019 12:12:36 +0200 Message-Id: <20190514101237.13969-3-jbrunet@baylibre.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190514101237.13969-1-jbrunet@baylibre.com> References: <20190514101237.13969-1-jbrunet@baylibre.com> MIME-Version: 1.0 X-Patchwork-Bot: notify Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add the 3 i2c busses present on the u200 reference design. Signed-off-by: Jerome Brunet --- .../boot/dts/amlogic/meson-g12a-u200.dts | 21 +++++++++++++++++++ 1 file changed, 21 insertions(+) -- 2.20.1 diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts index 972926121beb..e02534ab7673 100644 --- a/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts +++ b/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts @@ -169,6 +169,27 @@ pinctrl-names = "default"; }; +/* i2c Touch */ +&i2c0 { + status = "okay"; + pinctrl-0 = <&i2c0_sda_z0_pins>, <&i2c0_sck_z1_pins>; + pinctrl-names = "default"; +}; + +/* i2c CM */ +&i2c2 { + status = "okay"; + pinctrl-0 = <&i2c2_sda_z_pins>, <&i2c2_sck_z_pins>; + pinctrl-names = "default"; +}; + +/* i2c Audio */ +&i2c3 { + status = "okay"; + pinctrl-0 = <&i2c3_sda_a_pins>, <&i2c3_sck_a_pins>; + pinctrl-names = "default"; +}; + /* SD card */ &sd_emmc_b { status = "okay"; From patchwork Tue May 14 10:12:37 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jerome Brunet X-Patchwork-Id: 164124 Delivered-To: patch@linaro.org Received: by 2002:a92:9e1a:0:0:0:0:0 with SMTP id q26csp2426622ili; Tue, 14 May 2019 03:13:03 -0700 (PDT) X-Google-Smtp-Source: APXvYqwuX0HNw85IsYctQ82/B6KYEAWYgWvWQm21ToX7/KfEnL8Zr4GGrZFp5QDEzLbDJ4sGCh6k X-Received: by 2002:a63:471d:: with SMTP id u29mr37390142pga.39.1557828783669; Tue, 14 May 2019 03:13:03 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1557828783; cv=none; d=google.com; s=arc-20160816; b=zxSnFpfvYfW/VJm9SFmWQNJuiz/oaY4MqaIGgE0O3VrSOuKDXxATp1yDLBhlRTOfbd TMaHuzsBNVKWxjveB1T0kwa/rQPX47248X+h7bovxKiT84ByMnLTc/pHzAn9LSMDapo3 EpZ/Jl+HlzFl7FZia3rRnsWzuDE4YID+bjPfnHbg1ndCS0uHOuYLt9XsmsAfF66wr41U yD8DWp2aj/FIHoql4chev6xqwzfbrUIThj4yBZ6EAd7PTNiPERH9myv8nkhHENJ7dwx8 v27OsxxzS9/qghUfhdAYkxvNVbzmYsbSvZJP7fZaCAx7WTGqB5ES82dcNYBxEYWlAjMo Huew== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=xHJjEWZUv594HiG0VPz+WE+kbrZmHtfWvyl507EtN/8=; b=GB+4qNGGL39ufiyxqJkv0w3QkS4bBn+cjswE/1FOlGbdLMSUSzd5VXDMSpc+a2jF2Z zPzZx9C3UeObeP6HFeHCs9TAvJhgTXBPcGP5EOjuFrGp5zPXThYYrWcd7HC/9q7WtXyK WbqfyItF697LyKNBLIp0wSXp1gCfSg+h/WF+3iPq9bR2RTuFE/3BkxtHC00M1YeEFVF3 ABz9ynRr64wZaSKsMCrKtPxMwKQISAy9gZtXsEbNGilPOsoUQhu+MAPqKBqoMlYVs9rM pGaaaiCTYZ+4212vinNVAetubHuoU3wwmwPxBxjGwn/Mj4ygfK4iMLRUkBG4jutbjlSJ 8aWQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=pE2Y50PA; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[90.63.244.31]) by smtp.googlemail.com with ESMTPSA id r23sm2219564wmh.29.2019.05.14.03.12.49 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 14 May 2019 03:12:50 -0700 (PDT) From: Jerome Brunet To: Kevin Hilman Cc: Jerome Brunet , devicetree@vger.kernel.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 3/3] arm64: dts: meson: sei510: enable i2c3 Date: Tue, 14 May 2019 12:12:37 +0200 Message-Id: <20190514101237.13969-4-jbrunet@baylibre.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190514101237.13969-1-jbrunet@baylibre.com> References: <20190514101237.13969-1-jbrunet@baylibre.com> MIME-Version: 1.0 X-Patchwork-Bot: notify Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add the i2c bus used for RGB led controller. Signed-off-by: Jerome Brunet --- arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts | 6 ++++++ 1 file changed, 6 insertions(+) -- 2.20.1 diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts index bb45e3577ff5..f420935b76db 100644 --- a/arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts +++ b/arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts @@ -161,6 +161,12 @@ }; }; +&i2c3 { + status = "okay"; + pinctrl-0 = <&i2c3_sda_a_pins>, <&i2c3_sck_a_pins>; + pinctrl-names = "default"; +}; + &saradc { status = "okay"; vref-supply = <&vddio_ao1v8>;