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[83.9.29.16]) by smtp.gmail.com with ESMTPSA id o11-20020a2e730b000000b002991baef49bsm251566ljc.12.2023.03.16.01.51.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Mar 2023 01:51:11 -0700 (PDT) From: Konrad Dybcio Date: Thu, 16 Mar 2023 09:51:07 +0100 Subject: [PATCH v5 01/10] dt-bindings: display/msm: dsi-controller-main: Fix deprecated QCM2290 compatible MIME-Version: 1.0 Message-Id: <20230307-topic-dsi_qcm-v5-1-9d4235b77f4f@linaro.org> References: <20230307-topic-dsi_qcm-v5-0-9d4235b77f4f@linaro.org> In-Reply-To: <20230307-topic-dsi_qcm-v5-0-9d4235b77f4f@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Krishna Manikandan , Bryan O'Donoghue , Andy Gross , Bjorn Andersson Cc: Rob Herring , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Marijn Suijten , Konrad Dybcio X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1678956668; l=1083; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=Eh63V3hQJ0V0iEgOzc+LSRnQ4e7sliZ5heAo7YfywsQ=; b=0aBVkVeI/ZqqJNMp8miJ4K//LS3qrTKMSBxQoa70P28PuSQ+d9x7z6eVXh31sSjvZLUoOUVrG7eo znTwkN6hCC+O6+mSA0aiGA588ugQL8OuLP0emYeXYR9x/WhUM8b3 X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The qcom, prefix was missed previously. Fix it. Fixes: 0c0f65c6dd44 ("dt-bindings: msm: dsi-controller-main: Add compatible strings for every current SoC") Acked-by: Rob Herring Reviewed-by: Marijn Suijten Signed-off-by: Konrad Dybcio --- Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml b/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml index e75a3efe4dac..2494817c1bd6 100644 --- a/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml +++ b/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml @@ -33,7 +33,7 @@ properties: - const: qcom,mdss-dsi-ctrl - items: - enum: - - dsi-ctrl-6g-qcm2290 + - qcom,dsi-ctrl-6g-qcm2290 - const: qcom,mdss-dsi-ctrl deprecated: true From patchwork Thu Mar 16 08:51:09 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 664194 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 86F14C6FD19 for ; Thu, 16 Mar 2023 08:52:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231228AbjCPIwn (ORCPT ); Thu, 16 Mar 2023 04:52:43 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46172 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231200AbjCPIwW (ORCPT ); Thu, 16 Mar 2023 04:52:22 -0400 Received: from mail-lj1-x22a.google.com (mail-lj1-x22a.google.com [IPv6:2a00:1450:4864:20::22a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5A0149FBD3 for ; Thu, 16 Mar 2023 01:51:22 -0700 (PDT) Received: by mail-lj1-x22a.google.com with SMTP id b10so884098ljr.0 for ; Thu, 16 Mar 2023 01:51:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1678956675; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=6mz7dhLEVkKzAk8Lkvywe3WYisGA69PWt7jvCUOITN8=; b=DDPaJtHjcKpwFgphAHT7tW3YyX/ZBZFs4Kfd67iuNJukELpZtr1GakaX95MMe2hU+C MJGmgh1of7xVfJv/Lms4bnw93C/LwMOS9I2SH768wi7fOcwsngjxP/1AePDbgBeATAnc xUyoPUu8BcDvx4DYTZszrlhHsiIFh0XejBvuLq0TkdEYeFTwSt53y3g0f2QLDrtKTrKw 5LQornKEDn/SIK7JKDi9ThjgpZ1r9PRN2rMEFYQynLHr7crxITBT7TLUL6EOkLO7JKns BV4JfqXr0dV96PRYElzqil3YSbwyDdt8gzjyx50rGEwdOfkot6BWZuWD+jwJyCCWPNAT ZCZw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1678956675; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=6mz7dhLEVkKzAk8Lkvywe3WYisGA69PWt7jvCUOITN8=; b=F1mL39PGTfBhIWIzJDVw+5+qTvSlyauMD94wkGnuJtzNbubMNmnND2UXoXhQQAT4gI 464CpDMXsMLnFKvEbwFVKhObdHAfd2CmFgt3KCBtFH1zErlv/prvdhTxfb8ndrxGnFn/ r2Xdk4ALuXnlgfefBZuxXtAlWJpDm+kBEEqjBFeVwkAtKdx7v/C4vUoPnFvCR82K+4Yl R5XdHd1Unt3vWD4Hjj2QZy0LsALl41zBCrsljxbMxWB9+j/g8/KXF/oxUY8ry8k0Bl/o vC9lQoQM+y5b1Z0+4gPGbtYVIzhkw4NAneZ87HyhPOH6UTdxaGRJ3c/VKkrz3OFveWIb RRtQ== X-Gm-Message-State: AO0yUKUOter4Sp20pKEB9KZ62mk1OqHYqtmkI7WBDdJWuMAbHk7k/Glv SsxzxeGWvwvpjwaAVt+9iwn2TQ== X-Google-Smtp-Source: AK7set8vkS0/WTMiuDNm5CkepqrjuOp/Ku/zc1qtlVzt/yUlysd+xxS5s/J7UWC2d8eolWAWI73Iug== X-Received: by 2002:a05:651c:2228:b0:299:67d8:9f7a with SMTP id y40-20020a05651c222800b0029967d89f7amr752102ljq.5.1678956675474; Thu, 16 Mar 2023 01:51:15 -0700 (PDT) Received: from [192.168.1.101] (abyj16.neoplus.adsl.tpnet.pl. [83.9.29.16]) by smtp.gmail.com with ESMTPSA id o11-20020a2e730b000000b002991baef49bsm251566ljc.12.2023.03.16.01.51.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Mar 2023 01:51:15 -0700 (PDT) From: Konrad Dybcio Date: Thu, 16 Mar 2023 09:51:09 +0100 Subject: [PATCH v5 03/10] drm/msm/dsi: Fix DSI index detection when version clash occurs MIME-Version: 1.0 Message-Id: <20230307-topic-dsi_qcm-v5-3-9d4235b77f4f@linaro.org> References: <20230307-topic-dsi_qcm-v5-0-9d4235b77f4f@linaro.org> In-Reply-To: <20230307-topic-dsi_qcm-v5-0-9d4235b77f4f@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Krishna Manikandan , Bryan O'Donoghue , Andy Gross , Bjorn Andersson Cc: Rob Herring , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Marijn Suijten , Konrad Dybcio X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1678956668; l=8216; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=b+otjvnFVNWNHQbPO9HD+5KH7xMK3hiBo7WDBK4sSP4=; b=zcYTSWk9trCd7D8dSdCu9WiEcEvyemZhiibqk3qRm4btFIPGbbejZOnG5Dr/fOBmtZqtARwLme+v cmwIntkeAoYq0GWtjSdwnKc1oX/DsFhNqMjEa8wFIVy+o6n4EpoQ X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Currently, we allow for MAX_DSI entries in io_start to facilitate for MAX_DSI number of DSI hosts at different addresses. The configuration is matched against the DSI CTRL hardware revision read back from the component. We need a way to resolve situations where multiple SoCs with different register maps may use the same version of DSI CTRL. In preparation to do so, make msm_dsi_config a 2d array where each entry represents a set of configurations adequate for a given SoC. This is totally fine to do, as the only differentiating factors between same-version-different-SoCs configurations are the number of DSI hosts (1 or 2, at least as of today) and the set of base registers. The regulator setup is the same, because the DSI hardware is the same, regardless of the SoC it was implemented in. In addition to that, update the matching logic such that it will loop over VARIANTS_MAX variants, making sure they are all taken into account. Reviewed-by: Dmitry Baryshkov Reviewed-by: Marijn Suijten Signed-off-by: Konrad Dybcio --- drivers/gpu/drm/msm/dsi/dsi_cfg.c | 52 ++++++++++++++++++++++++++++---------- drivers/gpu/drm/msm/dsi/dsi_cfg.h | 5 +++- drivers/gpu/drm/msm/dsi/dsi_host.c | 10 ++++---- 3 files changed, 48 insertions(+), 19 deletions(-) diff --git a/drivers/gpu/drm/msm/dsi/dsi_cfg.c b/drivers/gpu/drm/msm/dsi/dsi_cfg.c index 4515f52b407a..6c192963c100 100644 --- a/drivers/gpu/drm/msm/dsi/dsi_cfg.c +++ b/drivers/gpu/drm/msm/dsi/dsi_cfg.c @@ -21,7 +21,9 @@ static const struct msm_dsi_config apq8064_dsi_cfg = { .num_regulators = ARRAY_SIZE(apq8064_dsi_regulators), .bus_clk_names = dsi_v2_bus_clk_names, .num_bus_clks = ARRAY_SIZE(dsi_v2_bus_clk_names), - .io_start = { 0x4700000, 0x5800000 }, + .io_start = { + { 0x4700000, 0x5800000 }, + }, }; static const char * const dsi_6g_bus_clk_names[] = { @@ -40,7 +42,9 @@ static const struct msm_dsi_config msm8974_apq8084_dsi_cfg = { .num_regulators = ARRAY_SIZE(msm8974_apq8084_regulators), .bus_clk_names = dsi_6g_bus_clk_names, .num_bus_clks = ARRAY_SIZE(dsi_6g_bus_clk_names), - .io_start = { 0xfd922800, 0xfd922b00 }, + .io_start = { + { 0xfd922800, 0xfd922b00 }, + }, }; static const char * const dsi_8916_bus_clk_names[] = { @@ -58,7 +62,9 @@ static const struct msm_dsi_config msm8916_dsi_cfg = { .num_regulators = ARRAY_SIZE(msm8916_dsi_regulators), .bus_clk_names = dsi_8916_bus_clk_names, .num_bus_clks = ARRAY_SIZE(dsi_8916_bus_clk_names), - .io_start = { 0x1a98000 }, + .io_start = { + { 0x1a98000 }, + }, }; static const char * const dsi_8976_bus_clk_names[] = { @@ -76,7 +82,9 @@ static const struct msm_dsi_config msm8976_dsi_cfg = { .num_regulators = ARRAY_SIZE(msm8976_dsi_regulators), .bus_clk_names = dsi_8976_bus_clk_names, .num_bus_clks = ARRAY_SIZE(dsi_8976_bus_clk_names), - .io_start = { 0x1a94000, 0x1a96000 }, + .io_start = { + { 0x1a94000, 0x1a96000 }, + }, }; static const struct regulator_bulk_data msm8994_dsi_regulators[] = { @@ -94,7 +102,9 @@ static const struct msm_dsi_config msm8994_dsi_cfg = { .num_regulators = ARRAY_SIZE(msm8994_dsi_regulators), .bus_clk_names = dsi_6g_bus_clk_names, .num_bus_clks = ARRAY_SIZE(dsi_6g_bus_clk_names), - .io_start = { 0xfd998000, 0xfd9a0000 }, + .io_start = { + { 0xfd998000, 0xfd9a0000 }, + }, }; static const char * const dsi_8996_bus_clk_names[] = { @@ -113,7 +123,9 @@ static const struct msm_dsi_config msm8996_dsi_cfg = { .num_regulators = ARRAY_SIZE(msm8996_dsi_regulators), .bus_clk_names = dsi_8996_bus_clk_names, .num_bus_clks = ARRAY_SIZE(dsi_8996_bus_clk_names), - .io_start = { 0x994000, 0x996000 }, + .io_start = { + { 0x994000, 0x996000 }, + }, }; static const char * const dsi_msm8998_bus_clk_names[] = { @@ -131,7 +143,9 @@ static const struct msm_dsi_config msm8998_dsi_cfg = { .num_regulators = ARRAY_SIZE(msm8998_dsi_regulators), .bus_clk_names = dsi_msm8998_bus_clk_names, .num_bus_clks = ARRAY_SIZE(dsi_msm8998_bus_clk_names), - .io_start = { 0xc994000, 0xc996000 }, + .io_start = { + { 0xc994000, 0xc996000 }, + }, }; static const char * const dsi_sdm660_bus_clk_names[] = { @@ -148,7 +162,9 @@ static const struct msm_dsi_config sdm660_dsi_cfg = { .num_regulators = ARRAY_SIZE(sdm660_dsi_regulators), .bus_clk_names = dsi_sdm660_bus_clk_names, .num_bus_clks = ARRAY_SIZE(dsi_sdm660_bus_clk_names), - .io_start = { 0xc994000, 0xc996000 }, + .io_start = { + { 0xc994000, 0xc996000 }, + }, }; static const char * const dsi_sdm845_bus_clk_names[] = { @@ -169,7 +185,9 @@ static const struct msm_dsi_config sdm845_dsi_cfg = { .num_regulators = ARRAY_SIZE(sdm845_dsi_regulators), .bus_clk_names = dsi_sdm845_bus_clk_names, .num_bus_clks = ARRAY_SIZE(dsi_sdm845_bus_clk_names), - .io_start = { 0xae94000, 0xae96000 }, + .io_start = { + { 0xae94000, 0xae96000 }, + }, }; static const struct regulator_bulk_data sm8550_dsi_regulators[] = { @@ -182,7 +200,9 @@ static const struct msm_dsi_config sm8550_dsi_cfg = { .num_regulators = ARRAY_SIZE(sm8550_dsi_regulators), .bus_clk_names = dsi_sdm845_bus_clk_names, .num_bus_clks = ARRAY_SIZE(dsi_sdm845_bus_clk_names), - .io_start = { 0xae94000, 0xae96000 }, + .io_start = { + { 0xae94000, 0xae96000 }, + }, }; static const struct regulator_bulk_data sc7180_dsi_regulators[] = { @@ -195,7 +215,9 @@ static const struct msm_dsi_config sc7180_dsi_cfg = { .num_regulators = ARRAY_SIZE(sc7180_dsi_regulators), .bus_clk_names = dsi_sc7180_bus_clk_names, .num_bus_clks = ARRAY_SIZE(dsi_sc7180_bus_clk_names), - .io_start = { 0xae94000 }, + .io_start = { + { 0xae94000 }, + }, }; static const char * const dsi_sc7280_bus_clk_names[] = { @@ -212,7 +234,9 @@ static const struct msm_dsi_config sc7280_dsi_cfg = { .num_regulators = ARRAY_SIZE(sc7280_dsi_regulators), .bus_clk_names = dsi_sc7280_bus_clk_names, .num_bus_clks = ARRAY_SIZE(dsi_sc7280_bus_clk_names), - .io_start = { 0xae94000, 0xae96000 }, + .io_start = { + { 0xae94000, 0xae96000 }, + }, }; static const char * const dsi_qcm2290_bus_clk_names[] = { @@ -229,7 +253,9 @@ static const struct msm_dsi_config qcm2290_dsi_cfg = { .num_regulators = ARRAY_SIZE(qcm2290_dsi_cfg_regulators), .bus_clk_names = dsi_qcm2290_bus_clk_names, .num_bus_clks = ARRAY_SIZE(dsi_qcm2290_bus_clk_names), - .io_start = { 0x5e94000 }, + .io_start = { + { 0x5e94000 }, + }, }; static const struct msm_dsi_host_cfg_ops msm_dsi_v2_host_ops = { diff --git a/drivers/gpu/drm/msm/dsi/dsi_cfg.h b/drivers/gpu/drm/msm/dsi/dsi_cfg.h index 6b6b16c5fd25..8772a3631ac1 100644 --- a/drivers/gpu/drm/msm/dsi/dsi_cfg.h +++ b/drivers/gpu/drm/msm/dsi/dsi_cfg.h @@ -32,13 +32,16 @@ #define DSI_6G_REG_SHIFT 4 +/* Maximum number of configurations matched against the same hw revision */ +#define VARIANTS_MAX 2 + struct msm_dsi_config { u32 io_offset; const struct regulator_bulk_data *regulator_data; int num_regulators; const char * const *bus_clk_names; const int num_bus_clks; - const resource_size_t io_start[DSI_MAX]; + const resource_size_t io_start[VARIANTS_MAX][DSI_MAX]; }; struct msm_dsi_host_cfg_ops { diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c index 9021f0d65515..9cfb9e91bfea 100644 --- a/drivers/gpu/drm/msm/dsi/dsi_host.c +++ b/drivers/gpu/drm/msm/dsi/dsi_host.c @@ -1862,16 +1862,16 @@ static int dsi_host_get_id(struct msm_dsi_host *msm_host) struct platform_device *pdev = msm_host->pdev; const struct msm_dsi_config *cfg = msm_host->cfg_hnd->cfg; struct resource *res; - int i; + int i, j; res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dsi_ctrl"); if (!res) return -EINVAL; - for (i = 0; i < DSI_MAX; i++) { - if (cfg->io_start[i] == res->start) - return i; - } + for (i = 0; i < VARIANTS_MAX; i++) + for (j = 0; j < DSI_MAX; j++) + if (cfg->io_start[i][j] == res->start) + return j; return -EINVAL; } From patchwork Thu Mar 16 08:51:11 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 664193 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 04298C7618D for ; Thu, 16 Mar 2023 08:52:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231300AbjCPIwq (ORCPT ); Thu, 16 Mar 2023 04:52:46 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46188 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230337AbjCPIwY (ORCPT ); Thu, 16 Mar 2023 04:52:24 -0400 Received: from mail-lj1-x235.google.com (mail-lj1-x235.google.com [IPv6:2a00:1450:4864:20::235]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9C7F0B6D1F for ; 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[83.9.29.16]) by smtp.gmail.com with ESMTPSA id o11-20020a2e730b000000b002991baef49bsm251566ljc.12.2023.03.16.01.51.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Mar 2023 01:51:18 -0700 (PDT) From: Konrad Dybcio Date: Thu, 16 Mar 2023 09:51:11 +0100 Subject: [PATCH v5 05/10] drm/msm/dsi: dsi_cfg: Merge SC7180 config into SDM845 MIME-Version: 1.0 Message-Id: <20230307-topic-dsi_qcm-v5-5-9d4235b77f4f@linaro.org> References: <20230307-topic-dsi_qcm-v5-0-9d4235b77f4f@linaro.org> In-Reply-To: <20230307-topic-dsi_qcm-v5-0-9d4235b77f4f@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Krishna Manikandan , Bryan O'Donoghue , Andy Gross , Bjorn Andersson Cc: Rob Herring , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Marijn Suijten , Konrad Dybcio X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1678956668; l=2206; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=+ePdH/Gl1hrkxIW7hm63Vg7SPtBJUhhLLi5EVaR0ltI=; b=8w//WdCiKTQ1Q2mhPCF/4PAiIaiCmaFTpPkBRC3P/oNR0L6U5mJ93AkvvZdml7I4DSw1vUGThg5m +c0fcqs/A/gr4u5jrlAebphEnTwXQjUTFvQNHhrO7qkuDhYuOU8S X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The configs are identical, other than the number of *maximum* DSI hosts allowed. This isn't an issue, unless somebody deliberately tries to access the inexistent host by adding a dt node for it. Remove the SC7180 struct and point the hw revision match to the SDM845's one. On a note, this could have been done back when 7180 support was introduced. Reviewed-by: Dmitry Baryshkov Reviewed-by: Marijn Suijten Signed-off-by: Konrad Dybcio --- drivers/gpu/drm/msm/dsi/dsi_cfg.c | 15 ++------------- 1 file changed, 2 insertions(+), 13 deletions(-) diff --git a/drivers/gpu/drm/msm/dsi/dsi_cfg.c b/drivers/gpu/drm/msm/dsi/dsi_cfg.c index 039f503233d7..03d98cbcc978 100644 --- a/drivers/gpu/drm/msm/dsi/dsi_cfg.c +++ b/drivers/gpu/drm/msm/dsi/dsi_cfg.c @@ -169,7 +169,7 @@ static const struct msm_dsi_config sdm845_dsi_cfg = { .bus_clk_names = dsi_v2_4_clk_names, .num_bus_clks = ARRAY_SIZE(dsi_v2_4_clk_names), .io_start = { - { 0xae94000, 0xae96000 }, + { 0xae94000, 0xae96000 }, /* SDM845 / SDM670 / SC7180 */ }, }; @@ -188,17 +188,6 @@ static const struct msm_dsi_config sm8550_dsi_cfg = { }, }; -static const struct msm_dsi_config sc7180_dsi_cfg = { - .io_offset = DSI_6G_REG_SHIFT, - .regulator_data = dsi_v2_4_regulators, - .num_regulators = ARRAY_SIZE(dsi_v2_4_regulators), - .bus_clk_names = dsi_v2_4_clk_names, - .num_bus_clks = ARRAY_SIZE(dsi_v2_4_clk_names), - .io_start = { - { 0xae94000 }, - }, -}; - static const struct regulator_bulk_data sc7280_dsi_regulators[] = { { .supply = "vdda", .init_load_uA = 8350 }, /* 1.2 V */ }; @@ -291,7 +280,7 @@ static const struct msm_dsi_cfg_handler dsi_cfg_handlers[] = { {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_4_0, &sdm845_dsi_cfg, &msm_dsi_6g_v2_host_ops}, {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_4_1, - &sc7180_dsi_cfg, &msm_dsi_6g_v2_host_ops}, + &sdm845_dsi_cfg, &msm_dsi_6g_v2_host_ops}, {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_5_0, &sc7280_dsi_cfg, &msm_dsi_6g_v2_host_ops}, {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_6_0, From patchwork Thu Mar 16 08:51:12 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 664192 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4C6A8C7619A for ; Thu, 16 Mar 2023 08:52:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230416AbjCPIwr (ORCPT ); Thu, 16 Mar 2023 04:52:47 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46198 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231213AbjCPIwZ (ORCPT ); Thu, 16 Mar 2023 04:52:25 -0400 Received: from mail-lj1-x22d.google.com (mail-lj1-x22d.google.com [IPv6:2a00:1450:4864:20::22d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3558BB6933 for ; Thu, 16 Mar 2023 01:51:27 -0700 (PDT) Received: by mail-lj1-x22d.google.com with SMTP id g18so857648ljl.3 for ; Thu, 16 Mar 2023 01:51:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1678956680; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=4ybpWSBp4lClKqhK/g5tZCNekBaDds3KID0LOYjNmjg=; b=zouSvFH1v/9SmuQivtr2cUC78XlCmCieUzZwqnfbhZ3jftbLu0iT90FS6zllJ8VdSC 27HwGoOYGSWhRVAz1ZAzhRp9Bxb6WCJX0jWWn4Co8ChAO9EVgfYwQ3eCpYyScpTNzB/p xgKIjAhhZmTy5MVczMdsBx9MhfksaqAPaYk3iDuTBjhyL8mppXKr8GOqgOR1G6SIvjHr rzg1ViFPC6edhwxhDuWlAdR1kvJv/Gueqc6LidyEmStzGEUpMc/9bj8j57ZZJI9TBzzE ULYxsIB0okR1hTQNUAsAN++HTZmf/eQQDQNk+OURE2HYgEHeMmvisFhWR6kaIOca3/yw ORBA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1678956680; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=4ybpWSBp4lClKqhK/g5tZCNekBaDds3KID0LOYjNmjg=; b=IlEdSsR7A3GrTggoqOBE8q6KiBgwf0yMjpucu3N0k6AZp5Iym+dhJf9lvgu+fj579U NjdSVGz8jkOJ2DNM4b3njIFX4PtpBj3NJ7MSFnbJKbaU1da41nyowAlTStLqlS80vOvc CQnOi9MeGv+Dfk+tbe1Q/bcQX0Ef5IsLcSKsIdxEh2ct9zC4PwFNxXBOBXhXfRs0PDo1 AJDfYsDKX456memcDiXW+MoLBNe3A9mxn8C5w7vs4Nnjf/suWa79lBo9to+Y4HvSKOsP w+Hi6s9iiIxrhk7UfTnmwcADmT8auiDYPqnrf1EgYeq3bIMpDdlVworWh70bXoy4oSNC Swxw== X-Gm-Message-State: AO0yUKX/NN2zKfYZG9LK5U+hs2BXxgBEPFDCiIr9BllyJ2l4diDS7cgC snP6Jv8E60Twg2hxVdR5SJslfQ== X-Google-Smtp-Source: AK7set92YKItNUiB2mDFP0GuhQVCTqEiACYYmeQWLkBO9sO5XU+ACgEmmSx1OSxwER09dcaT9BaGFA== X-Received: by 2002:a2e:97da:0:b0:298:7018:e2e7 with SMTP id m26-20020a2e97da000000b002987018e2e7mr1791452ljj.22.1678956680108; Thu, 16 Mar 2023 01:51:20 -0700 (PDT) Received: from [192.168.1.101] (abyj16.neoplus.adsl.tpnet.pl. [83.9.29.16]) by smtp.gmail.com with ESMTPSA id o11-20020a2e730b000000b002991baef49bsm251566ljc.12.2023.03.16.01.51.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Mar 2023 01:51:19 -0700 (PDT) From: Konrad Dybcio Date: Thu, 16 Mar 2023 09:51:12 +0100 Subject: [PATCH v5 06/10] drm/msm/dsi: Switch the QCM2290-specific compatible to index autodetection MIME-Version: 1.0 Message-Id: <20230307-topic-dsi_qcm-v5-6-9d4235b77f4f@linaro.org> References: <20230307-topic-dsi_qcm-v5-0-9d4235b77f4f@linaro.org> In-Reply-To: <20230307-topic-dsi_qcm-v5-0-9d4235b77f4f@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Krishna Manikandan , Bryan O'Donoghue , Andy Gross , Bjorn Andersson Cc: Rob Herring , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Marijn Suijten , Konrad Dybcio X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1678956668; l=3233; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=e/ZDvN1pmXEVddNSmMJ2iSlA9sSO8FBakW2FjAcs2pg=; b=8OFXVaPb/ToMkkmzsNU09aSl0aeWkDVN7OG+mFMgcET+hNQVHVpGr8xWjapYvsUapZkbZfXQuztK PtFBo8ZlBBPuRZWr6Si4F9qWzgVMCkfdWW7i2Y82KiQK58tJvAA8 X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Now that the logic can handle multiple sets of registers, move the QCM2290 to the common logic and mark it deprecated. This allows us to remove a couple of structs, saving some memory. Reviewed-by: Dmitry Baryshkov Reviewed-by: Marijn Suijten Signed-off-by: Konrad Dybcio --- drivers/gpu/drm/msm/dsi/dsi.c | 5 +++-- drivers/gpu/drm/msm/dsi/dsi_cfg.c | 20 ++------------------ drivers/gpu/drm/msm/dsi/dsi_cfg.h | 3 --- 3 files changed, 5 insertions(+), 23 deletions(-) diff --git a/drivers/gpu/drm/msm/dsi/dsi.c b/drivers/gpu/drm/msm/dsi/dsi.c index 31fdee2052be..f761973e4cba 100644 --- a/drivers/gpu/drm/msm/dsi/dsi.c +++ b/drivers/gpu/drm/msm/dsi/dsi.c @@ -4,7 +4,6 @@ */ #include "dsi.h" -#include "dsi_cfg.h" bool msm_dsi_is_cmd_mode(struct msm_dsi *msm_dsi) { @@ -174,7 +173,9 @@ static int dsi_dev_remove(struct platform_device *pdev) static const struct of_device_id dt_match[] = { { .compatible = "qcom,mdss-dsi-ctrl", .data = NULL /* autodetect cfg */ }, - { .compatible = "qcom,dsi-ctrl-6g-qcm2290", .data = &qcm2290_dsi_cfg_handler }, + + /* Deprecated, don't use */ + { .compatible = "qcom,dsi-ctrl-6g-qcm2290", .data = NULL }, {} }; diff --git a/drivers/gpu/drm/msm/dsi/dsi_cfg.c b/drivers/gpu/drm/msm/dsi/dsi_cfg.c index 03d98cbcc978..29ccd755cc2e 100644 --- a/drivers/gpu/drm/msm/dsi/dsi_cfg.c +++ b/drivers/gpu/drm/msm/dsi/dsi_cfg.c @@ -169,7 +169,8 @@ static const struct msm_dsi_config sdm845_dsi_cfg = { .bus_clk_names = dsi_v2_4_clk_names, .num_bus_clks = ARRAY_SIZE(dsi_v2_4_clk_names), .io_start = { - { 0xae94000, 0xae96000 }, /* SDM845 / SDM670 / SC7180 */ + { 0xae94000, 0xae96000 }, /* SDM845 / SDM670 */ + { 0x5e94000 }, /* QCM2290 / SM6115 / SM6125 / SM6375 */ }, }; @@ -203,17 +204,6 @@ static const struct msm_dsi_config sc7280_dsi_cfg = { }, }; -static const struct msm_dsi_config qcm2290_dsi_cfg = { - .io_offset = DSI_6G_REG_SHIFT, - .regulator_data = dsi_v2_4_regulators, - .num_regulators = ARRAY_SIZE(dsi_v2_4_regulators), - .bus_clk_names = dsi_v2_4_clk_names, - .num_bus_clks = ARRAY_SIZE(dsi_v2_4_clk_names), - .io_start = { - { 0x5e94000 }, - }, -}; - static const struct msm_dsi_host_cfg_ops msm_dsi_v2_host_ops = { .link_clk_set_rate = dsi_link_clk_set_rate_v2, .link_clk_enable = dsi_link_clk_enable_v2, @@ -304,9 +294,3 @@ const struct msm_dsi_cfg_handler *msm_dsi_cfg_get(u32 major, u32 minor) return cfg_hnd; } - -/* Non autodetect configs */ -const struct msm_dsi_cfg_handler qcm2290_dsi_cfg_handler = { - .cfg = &qcm2290_dsi_cfg, - .ops = &msm_dsi_6g_v2_host_ops, -}; diff --git a/drivers/gpu/drm/msm/dsi/dsi_cfg.h b/drivers/gpu/drm/msm/dsi/dsi_cfg.h index 8772a3631ac1..91bdaf50bb1a 100644 --- a/drivers/gpu/drm/msm/dsi/dsi_cfg.h +++ b/drivers/gpu/drm/msm/dsi/dsi_cfg.h @@ -65,8 +65,5 @@ struct msm_dsi_cfg_handler { const struct msm_dsi_cfg_handler *msm_dsi_cfg_get(u32 major, u32 minor); -/* Non autodetect configs */ -extern const struct msm_dsi_cfg_handler qcm2290_dsi_cfg_handler; - #endif /* __MSM_DSI_CFG_H__ */ From patchwork Thu Mar 16 08:51:15 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 664191 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 19160C6FD1F for ; Thu, 16 Mar 2023 08:52:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231234AbjCPIw4 (ORCPT ); Thu, 16 Mar 2023 04:52:56 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45832 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231168AbjCPIw2 (ORCPT ); Thu, 16 Mar 2023 04:52:28 -0400 Received: from mail-lj1-x236.google.com (mail-lj1-x236.google.com [IPv6:2a00:1450:4864:20::236]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C6CDDB6D21 for ; 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[83.9.29.16]) by smtp.gmail.com with ESMTPSA id o11-20020a2e730b000000b002991baef49bsm251566ljc.12.2023.03.16.01.51.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Mar 2023 01:51:24 -0700 (PDT) From: Konrad Dybcio Date: Thu, 16 Mar 2023 09:51:15 +0100 Subject: [PATCH v5 09/10] dt-bindings: display/msm: dsi-controller-main: Add SM6115 MIME-Version: 1.0 Message-Id: <20230307-topic-dsi_qcm-v5-9-9d4235b77f4f@linaro.org> References: <20230307-topic-dsi_qcm-v5-0-9d4235b77f4f@linaro.org> In-Reply-To: <20230307-topic-dsi_qcm-v5-0-9d4235b77f4f@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Krishna Manikandan , Bryan O'Donoghue , Andy Gross , Bjorn Andersson Cc: Rob Herring , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Marijn Suijten , Konrad Dybcio X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1678956668; l=2355; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=TH3q3Ed2aw6dX9xtVNq6VpDwcDDpJoS9emOd9LF1Zus=; b=7bputgfOyj/s6G7stHLz2GE2CCEIxcZYAH2PFB9jcjNmqnGD2xL5pDyWBfoKsaOMYa6o9id207J3 BFTZno1ODpsNzWNG2uGZG/bzlWAV/D+XAokYcUu/tD4sFlzKLecO X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add a compatible for the DSI on SM6115. Acked-by: Rob Herring Reviewed-by: Marijn Suijten Signed-off-by: Konrad Dybcio --- .../devicetree/bindings/display/msm/dsi-controller-main.yaml | 2 ++ .../devicetree/bindings/display/msm/qcom,sm6115-mdss.yaml | 10 ++++++++-- 2 files changed, 10 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml b/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml index ecc89011bec4..c8884a84e73d 100644 --- a/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml +++ b/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml @@ -25,6 +25,7 @@ properties: - qcom,sc7280-dsi-ctrl - qcom,sdm660-dsi-ctrl - qcom,sdm845-dsi-ctrl + - qcom,sm6115-dsi-ctrl - qcom,sm8150-dsi-ctrl - qcom,sm8250-dsi-ctrl - qcom,sm8350-dsi-ctrl @@ -350,6 +351,7 @@ allOf: contains: enum: - qcom,sdm845-dsi-ctrl + - qcom,sm6115-dsi-ctrl then: properties: clocks: diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm6115-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm6115-mdss.yaml index 2491cb100b33..b9f83088f370 100644 --- a/Documentation/devicetree/bindings/display/msm/qcom,sm6115-mdss.yaml +++ b/Documentation/devicetree/bindings/display/msm/qcom,sm6115-mdss.yaml @@ -40,7 +40,13 @@ patternProperties: type: object properties: compatible: - const: qcom,dsi-ctrl-6g-qcm2290 + oneOf: + - items: + - const: qcom,sm6115-dsi-ctrl + - const: qcom,mdss-dsi-ctrl + - description: Old binding, please don't use + deprecated: true + const: qcom,dsi-ctrl-6g-qcm2290 "^phy@[0-9a-f]+$": type: object @@ -114,7 +120,7 @@ examples: }; dsi@5e94000 { - compatible = "qcom,dsi-ctrl-6g-qcm2290"; + compatible = "qcom,sm6115-dsi-ctrl", "qcom,mdss-dsi-ctrl"; reg = <0x05e94000 0x400>; reg-names = "dsi_ctrl";