From patchwork Fri Mar 17 15:04:17 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 664785 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 666E1C76196 for ; Fri, 17 Mar 2023 15:04:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231389AbjCQPEd (ORCPT ); Fri, 17 Mar 2023 11:04:33 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49390 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231371AbjCQPEb (ORCPT ); Fri, 17 Mar 2023 11:04:31 -0400 Received: from mail-wr1-x431.google.com (mail-wr1-x431.google.com [IPv6:2a00:1450:4864:20::431]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A095210EA9A for ; Fri, 17 Mar 2023 08:04:27 -0700 (PDT) Received: by mail-wr1-x431.google.com with SMTP id q16so4735802wrw.2 for ; Fri, 17 Mar 2023 08:04:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1679065466; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=mMoATSuSsIt3se9YT3bxIIdIc3bwo/1URpZulmbGFlU=; b=eDv/oaA6inXnYI9ssfRzC0QsP7q2KDBsyVJKwB6PGLcrTRnE6nmbm7F0/oVr6US8Iy CFy8myZ6CY4Dl8sRM7s2n16Gozv3IEAnzbWI2hcpPJjYlIPFBmq8lHiZ9MmvjUe0Ted9 30RXP8MnZv++QFvHy2QfS6KhVPwvTHi4DSzMKPMBGzLhlEBi+5i1D4EvUH9TjLmNfPLN ZzJ7muE1n1z/SE5q/P7md5uTm8QjXG2jEh1qenEDvi2BtQutfXTeovlsGBqFMvdrYdzp N16LuwPKqZqeTZgi2Dy4X1Jx8VoPG/e+LeuRGSgD1ZQmq3Ir4QizZvLSBntLooCeSkvK UASA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679065466; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=mMoATSuSsIt3se9YT3bxIIdIc3bwo/1URpZulmbGFlU=; b=rx9T9JKSne+DBV7GQ5MfaE9eJI+nsJTTNRnZ0N/6CR7d11KJlEN1ugk4007N81lEIz OhakORxSPLl0ELgjKabNAYN0sDp+sBM3+c+MAxozs+sdwCl/0hi7m9SkXvv4oeFquHxp f39qIYpzbcAxTYV7ojMqKMuWKOf8jxgtO9zljQ6GvMoVQOhhoOh26eTDdMv781SwPrZ1 X6qG+lbXBH2cNvB40caA7ceJVUn5JiZRVv3zV25owFiutxM4VkbaOivJBybizOfzGVwa aB6qI3qYeylk//6+amb2vZrAwnb1euBJPmQNzDONKQwRAUnKodOhEJqwXjhzFJx56Kbl FbiA== X-Gm-Message-State: AO0yUKXgbCnv1pYg+hJYQMl15JXLQcvElylHdNtUEqWBafDFlsMTNNsH aXFNxsJuiEgp7RYq5lcVf1+1xA== X-Google-Smtp-Source: AK7set+DzsOiCmoB6ZAfcm9pj6D7addqBi/5cl1MIoLYh/o6kB/SAvcz4DwPuLZ65n78DJzOMyUZ9Q== X-Received: by 2002:a5d:464b:0:b0:2c7:faf:af28 with SMTP id j11-20020a5d464b000000b002c70fafaf28mr7185749wrs.43.1679065465877; Fri, 17 Mar 2023 08:04:25 -0700 (PDT) Received: from arrakeen.starnux.net ([2a01:e0a:982:cbb0:52eb:f6ff:feb3:451a]) by smtp.gmail.com with ESMTPSA id q14-20020a05600000ce00b002be505ab59asm2133773wrx.97.2023.03.17.08.04.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 17 Mar 2023 08:04:25 -0700 (PDT) From: Neil Armstrong Date: Fri, 17 Mar 2023 16:04:17 +0100 Subject: [PATCH v4 01/12] usb: typec: ucsi: add PMIC Glink UCSI driver MIME-Version: 1.0 Message-Id: <20230130-topic-sm8450-upstream-pmic-glink-v4-1-38bf0f5d07bd@linaro.org> References: <20230130-topic-sm8450-upstream-pmic-glink-v4-0-38bf0f5d07bd@linaro.org> In-Reply-To: <20230130-topic-sm8450-upstream-pmic-glink-v4-0-38bf0f5d07bd@linaro.org> To: Heikki Krogerus , Greg Kroah-Hartman , Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Catalin Marinas , Will Deacon Cc: linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Neil Armstrong X-Mailer: b4 0.12.1 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Introduce the UCSI PMIC Glink aux driver that communicates with the aDSP firmware with the UCSI protocol which handles the USB-C Port(s) Power Delivery. The UCSI messaging is necessary on newer Qualcomm SoCs to provide USB role switch and altmode notifications. Signed-off-by: Neil Armstrong --- drivers/usb/typec/ucsi/Kconfig | 10 ++ drivers/usb/typec/ucsi/Makefile | 1 + drivers/usb/typec/ucsi/ucsi_glink.c | 345 ++++++++++++++++++++++++++++++++++++ 3 files changed, 356 insertions(+) diff --git a/drivers/usb/typec/ucsi/Kconfig b/drivers/usb/typec/ucsi/Kconfig index 8f9c4b9f31f7..b3bb0191987e 100644 --- a/drivers/usb/typec/ucsi/Kconfig +++ b/drivers/usb/typec/ucsi/Kconfig @@ -58,4 +58,14 @@ config UCSI_STM32G0 To compile the driver as a module, choose M here: the module will be called ucsi_stm32g0. +config UCSI_PMIC_GLINK + tristate "UCSI Qualcomm PMIC GLINK Interface Driver" + depends on QCOM_PMIC_GLINK + help + This driver enables UCSI support on platforms that expose UCSI + interface as PMIC GLINK device. + + To compile the driver as a module, choose M here: the module will be + called ucsi_glink. + endif diff --git a/drivers/usb/typec/ucsi/Makefile b/drivers/usb/typec/ucsi/Makefile index 480d533d762f..77f09e136956 100644 --- a/drivers/usb/typec/ucsi/Makefile +++ b/drivers/usb/typec/ucsi/Makefile @@ -18,3 +18,4 @@ endif obj-$(CONFIG_UCSI_ACPI) += ucsi_acpi.o obj-$(CONFIG_UCSI_CCG) += ucsi_ccg.o obj-$(CONFIG_UCSI_STM32G0) += ucsi_stm32g0.o +obj-$(CONFIG_UCSI_PMIC_GLINK) += ucsi_glink.o diff --git a/drivers/usb/typec/ucsi/ucsi_glink.c b/drivers/usb/typec/ucsi/ucsi_glink.c new file mode 100644 index 000000000000..b454a5159896 --- /dev/null +++ b/drivers/usb/typec/ucsi/ucsi_glink.c @@ -0,0 +1,345 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2019-2020, The Linux Foundation. All rights reserved. + * Copyright (c) 2023, Linaro Ltd + */ +#include +#include +#include +#include +#include +#include +#include +#include "ucsi.h" + +#define UCSI_BUF_SIZE 48 + +#define MSG_TYPE_REQ_RESP 1 +#define UCSI_BUF_SIZE 48 + +#define UC_NOTIFY_RECEIVER_UCSI 0x0 +#define UC_UCSI_READ_BUF_REQ 0x11 +#define UC_UCSI_WRITE_BUF_REQ 0x12 +#define UC_UCSI_USBC_NOTIFY_IND 0x13 + +struct ucsi_read_buf_req_msg { + struct pmic_glink_hdr hdr; +}; + +struct ucsi_read_buf_resp_msg { + struct pmic_glink_hdr hdr; + u8 buf[UCSI_BUF_SIZE]; + u32 ret_code; +}; + +struct ucsi_write_buf_req_msg { + struct pmic_glink_hdr hdr; + u8 buf[UCSI_BUF_SIZE]; + u32 reserved; +}; + +struct ucsi_write_buf_resp_msg { + struct pmic_glink_hdr hdr; + u32 ret_code; +}; + +struct ucsi_notify_ind_msg { + struct pmic_glink_hdr hdr; + u32 notification; + u32 receiver; + u32 reserved; +}; + +struct pmic_glink_ucsi { + struct device *dev; + + struct pmic_glink_client *client; + + struct ucsi *ucsi; + struct completion read_ack; + struct completion write_ack; + struct completion sync_ack; + bool sync_pending; + struct mutex lock; /* protects concurrent access to PMIC Glink interface */ + + int sync_val; + + struct work_struct notify_work; + struct work_struct register_work; + + u8 read_buf[UCSI_BUF_SIZE]; +}; + +static int pmic_glink_ucsi_read(struct ucsi *__ucsi, unsigned int offset, + void *val, size_t val_len) +{ + struct pmic_glink_ucsi *ucsi = ucsi_get_drvdata(__ucsi); + struct ucsi_read_buf_req_msg req = {}; + unsigned long left; + int ret; + + req.hdr.owner = PMIC_GLINK_OWNER_USBC; + req.hdr.type = MSG_TYPE_REQ_RESP; + req.hdr.opcode = UC_UCSI_READ_BUF_REQ; + + mutex_lock(&ucsi->lock); + memset(ucsi->read_buf, 0, sizeof(ucsi->read_buf)); + reinit_completion(&ucsi->read_ack); + + ret = pmic_glink_send(ucsi->client, &req, sizeof(req)); + if (ret < 0) { + dev_err(ucsi->dev, "failed to send UCSI read request: %d\n", ret); + goto out_unlock; + } + + left = wait_for_completion_timeout(&ucsi->read_ack, 5 * HZ); + if (!left) { + dev_err(ucsi->dev, "timeout waiting for UCSI read response\n"); + ret = -ETIMEDOUT; + goto out_unlock; + } + + memcpy(val, &ucsi->read_buf[offset], val_len); + ret = 0; + +out_unlock: + mutex_unlock(&ucsi->lock); + + return ret; +} + +static int pmic_glink_ucsi_locked_write(struct pmic_glink_ucsi *ucsi, unsigned int offset, + const void *val, size_t val_len) +{ + struct ucsi_write_buf_req_msg req = {}; + unsigned long left; + int ret; + + req.hdr.owner = PMIC_GLINK_OWNER_USBC; + req.hdr.type = MSG_TYPE_REQ_RESP; + req.hdr.opcode = UC_UCSI_WRITE_BUF_REQ; + memcpy(&req.buf[offset], val, val_len); + + reinit_completion(&ucsi->write_ack); + + ret = pmic_glink_send(ucsi->client, &req, sizeof(req)); + if (ret < 0) { + dev_err(ucsi->dev, "failed to send UCSI write request: %d\n", ret); + return ret; + } + + left = wait_for_completion_timeout(&ucsi->write_ack, 5 * HZ); + if (!left) { + dev_err(ucsi->dev, "timeout waiting for UCSI write response\n"); + return -ETIMEDOUT; + } + + return 0; +} + +static int pmic_glink_ucsi_async_write(struct ucsi *__ucsi, unsigned int offset, + const void *val, size_t val_len) +{ + struct pmic_glink_ucsi *ucsi = ucsi_get_drvdata(__ucsi); + int ret; + + mutex_lock(&ucsi->lock); + ret = pmic_glink_ucsi_locked_write(ucsi, offset, val, val_len); + mutex_unlock(&ucsi->lock); + + return ret; +} + +static int pmic_glink_ucsi_sync_write(struct ucsi *__ucsi, unsigned int offset, + const void *val, size_t val_len) +{ + struct pmic_glink_ucsi *ucsi = ucsi_get_drvdata(__ucsi); + unsigned long left; + int ret; + + /* TOFIX: Downstream forces recipient to CON when UCSI_GET_ALTERNATE_MODES command */ + + mutex_lock(&ucsi->lock); + ucsi->sync_val = 0; + reinit_completion(&ucsi->sync_ack); + ucsi->sync_pending = true; + ret = pmic_glink_ucsi_locked_write(ucsi, offset, val, val_len); + mutex_unlock(&ucsi->lock); + + left = wait_for_completion_timeout(&ucsi->sync_ack, 5 * HZ); + if (!left) { + dev_err(ucsi->dev, "timeout waiting for UCSI sync write response\n"); + ret = -ETIMEDOUT; + } else if (ucsi->sync_val) { + dev_err(ucsi->dev, "sync write returned: %d\n", ucsi->sync_val); + } + + ucsi->sync_pending = false; + + return ret; +} + +static const struct ucsi_operations pmic_glink_ucsi_ops = { + .read = pmic_glink_ucsi_read, + .sync_write = pmic_glink_ucsi_sync_write, + .async_write = pmic_glink_ucsi_async_write +}; + +static void pmic_glink_ucsi_read_ack(struct pmic_glink_ucsi *ucsi, const void *data, int len) +{ + const struct ucsi_read_buf_resp_msg *resp = data; + + if (resp->ret_code) + return; + + memcpy(ucsi->read_buf, resp->buf, UCSI_BUF_SIZE); + complete(&ucsi->read_ack); +} + +static void pmic_glink_ucsi_write_ack(struct pmic_glink_ucsi *ucsi, const void *data, int len) +{ + const struct ucsi_write_buf_resp_msg *resp = data; + + if (resp->ret_code) + return; + + ucsi->sync_val = resp->ret_code; + complete(&ucsi->write_ack); +} + +static void pmic_glink_ucsi_notify(struct work_struct *work) +{ + struct pmic_glink_ucsi *ucsi = container_of(work, struct pmic_glink_ucsi, notify_work); + unsigned int con_num; + u32 cci; + int ret; + + ret = pmic_glink_ucsi_read(ucsi->ucsi, UCSI_CCI, &cci, sizeof(cci)); + if (ret) { + dev_err(ucsi->dev, "failed to read CCI on notification\n"); + return; + } + + con_num = UCSI_CCI_CONNECTOR(cci); + if (con_num) + ucsi_connector_change(ucsi->ucsi, con_num); + + if (ucsi->sync_pending && cci & UCSI_CCI_BUSY) { + ucsi->sync_val = -EBUSY; + complete(&ucsi->sync_ack); + } else if (ucsi->sync_pending && + (cci & (UCSI_CCI_ACK_COMPLETE | UCSI_CCI_COMMAND_COMPLETE))) { + complete(&ucsi->sync_ack); + } +} + +static void pmic_glink_ucsi_register(struct work_struct *work) +{ + struct pmic_glink_ucsi *ucsi = container_of(work, struct pmic_glink_ucsi, register_work); + + ucsi_register(ucsi->ucsi); +} + +static void pmic_glink_ucsi_callback(const void *data, size_t len, void *priv) +{ + struct pmic_glink_ucsi *ucsi = priv; + const struct pmic_glink_hdr *hdr = data; + + switch (hdr->opcode) { + case UC_UCSI_READ_BUF_REQ: + pmic_glink_ucsi_read_ack(ucsi, data, len); + break; + case UC_UCSI_WRITE_BUF_REQ: + pmic_glink_ucsi_write_ack(ucsi, data, len); + break; + case UC_UCSI_USBC_NOTIFY_IND: + schedule_work(&ucsi->notify_work); + break; + }; +} + +static void pmic_glink_ucsi_pdr_notify(void *priv, int state) +{ + struct pmic_glink_ucsi *ucsi = priv; + + if (state == SERVREG_SERVICE_STATE_UP) + schedule_work(&ucsi->register_work); + else if (state == SERVREG_SERVICE_STATE_DOWN) + ucsi_unregister(ucsi->ucsi); +} + +static void pmic_glink_ucsi_destroy(void *data) +{ + struct pmic_glink_ucsi *ucsi = data; + + /* Protect to make sure we're not in a middle of a transaction from a glink callback */ + mutex_lock(&ucsi->lock); + ucsi_destroy(ucsi->ucsi); + mutex_unlock(&ucsi->lock); +} + +static int pmic_glink_ucsi_probe(struct auxiliary_device *adev, + const struct auxiliary_device_id *id) +{ + struct pmic_glink_ucsi *ucsi; + struct device *dev = &adev->dev; + int ret; + + ucsi = devm_kzalloc(dev, sizeof(*ucsi), GFP_KERNEL); + if (!ucsi) + return -ENOMEM; + + ucsi->dev = dev; + dev_set_drvdata(dev, ucsi); + + INIT_WORK(&ucsi->notify_work, pmic_glink_ucsi_notify); + INIT_WORK(&ucsi->register_work, pmic_glink_ucsi_register); + init_completion(&ucsi->read_ack); + init_completion(&ucsi->write_ack); + init_completion(&ucsi->sync_ack); + mutex_init(&ucsi->lock); + + ucsi->ucsi = ucsi_create(dev, &pmic_glink_ucsi_ops); + if (IS_ERR(ucsi->ucsi)) + return PTR_ERR(ucsi->ucsi); + + /* Make sure we destroy *after* pmic_glink unregister */ + ret = devm_add_action_or_reset(dev, pmic_glink_ucsi_destroy, ucsi); + if (ret) + return ret; + + ucsi_set_drvdata(ucsi->ucsi, ucsi); + + ucsi->client = devm_pmic_glink_register_client(dev, + PMIC_GLINK_OWNER_USBC, + pmic_glink_ucsi_callback, + pmic_glink_ucsi_pdr_notify, + ucsi); + return PTR_ERR_OR_ZERO(ucsi->client); +} + +static void pmic_glink_ucsi_remove(struct auxiliary_device *adev) +{ + struct pmic_glink_ucsi *ucsi = dev_get_drvdata(&adev->dev); + + /* Unregister first to stop having read & writes */ + ucsi_unregister(ucsi->ucsi); +} + +static const struct auxiliary_device_id pmic_glink_ucsi_id_table[] = { + { .name = "pmic_glink.ucsi", }, + {}, +}; +MODULE_DEVICE_TABLE(auxiliary, pmic_glink_ucsi_id_table); + +static struct auxiliary_driver pmic_glink_ucsi_driver = { + .name = "pmic_glink_ucsi", + .probe = pmic_glink_ucsi_probe, + .remove = pmic_glink_ucsi_remove, + .id_table = pmic_glink_ucsi_id_table, +}; + +module_auxiliary_driver(pmic_glink_ucsi_driver); + +MODULE_DESCRIPTION("Qualcomm PMIC GLINK UCSI driver"); +MODULE_LICENSE("GPL"); From patchwork Fri Mar 17 15:04:18 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 664597 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2831AC761AF for ; Fri, 17 Mar 2023 15:04:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231396AbjCQPEe (ORCPT ); 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Fri, 17 Mar 2023 08:04:26 -0700 (PDT) From: Neil Armstrong Date: Fri, 17 Mar 2023 16:04:18 +0100 Subject: [PATCH v4 02/12] dt-bindings: soc: qcom: qcom,pmic-glink: document SM8450 compatible MIME-Version: 1.0 Message-Id: <20230130-topic-sm8450-upstream-pmic-glink-v4-2-38bf0f5d07bd@linaro.org> References: <20230130-topic-sm8450-upstream-pmic-glink-v4-0-38bf0f5d07bd@linaro.org> In-Reply-To: <20230130-topic-sm8450-upstream-pmic-glink-v4-0-38bf0f5d07bd@linaro.org> To: Heikki Krogerus , Greg Kroah-Hartman , Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Catalin Marinas , Will Deacon Cc: linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Neil Armstrong , Rob Herring X-Mailer: b4 0.12.1 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Document the SM8450 compatible used to describe the pmic glink on this platform. Acked-by: Rob Herring Signed-off-by: Neil Armstrong --- Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml index cf863683c21a..a85bc14de065 100644 --- a/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml @@ -25,6 +25,7 @@ properties: - qcom,sc8180x-pmic-glink - qcom,sc8280xp-pmic-glink - qcom,sm8350-pmic-glink + - qcom,sm8450-pmic-glink - const: qcom,pmic-glink '#address-cells': From patchwork Fri Mar 17 15:04:19 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 664784 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 83D60C7619A for ; Fri, 17 Mar 2023 15:04:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231406AbjCQPEf (ORCPT ); Fri, 17 Mar 2023 11:04:35 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49444 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231382AbjCQPEc (ORCPT ); Fri, 17 Mar 2023 11:04:32 -0400 Received: from mail-wr1-x42f.google.com (mail-wr1-x42f.google.com [IPv6:2a00:1450:4864:20::42f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9C4A910DE4B for ; Fri, 17 Mar 2023 08:04:29 -0700 (PDT) Received: by mail-wr1-x42f.google.com with SMTP id l12so4710785wrm.10 for ; Fri, 17 Mar 2023 08:04:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1679065467; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=ehh+IB7mATn8qRRIIxxLIJvaBEzJ12on/Ve9T/GbUQs=; b=zL6tjSZZwavSiV7nxL7ZYOD2UA1MeMtf6V0z+SSQkFO+5sVFOJqjmkp5pNzsfNxq9z 8DsS12/o/oTlUSo9JgGcaStM6ZMF24ZqeyNRKGgjzSjuyjfZpbV+kw5dJU3VWwAfm491 Q+mk8Dft8YNodNASDf/pYB/dsN5pw7kVbvj/uf4VZIxUXBXuX4wPNmTcwYJ0LhC302i8 4osxPabCp7v5HEwDxM/46ic/BcwVfaNjMPhKmqDsxyHJUag1G8A6pAdY5OtDJkJ7L+Dz V3EHFnsUzyvncvkyhwcidLerAWh2XK7P+ELgP7RD1M9eGmcB/hBJxZPulHPF/bd2Tv8C tKUQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679065467; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ehh+IB7mATn8qRRIIxxLIJvaBEzJ12on/Ve9T/GbUQs=; b=ZS6R/+YlYkGUhaHHE5rDeb0uRlyX/rHPQSIFExT+Ba1PmVKYiHXWwui7sUv9sQbQXz QOj+UU3rlTRrCap+mZUCywIMsK4hn7QtLLmO6i0GWee6iP5gO7q1p4IEoS+pBD+t+Va+ wI7bvi3foh78ZHAjNIHmXnqQp/Q1yYdGVQ1xR4bndpmCRXk0PNRpC8lofDPHMdGTJzM9 DQGL4lKJXEEcwLzCOsv2X8+jgRIeYM2s3B0PvKOiizBN5J8VIvZwPXrmM05dI2UlaBp5 iSY1RvkiyyWuid133yMLrZEkAqi7nHInCwGU7n36MQhnVXOuOses3qvLcGnvDwBDwWCs DyJQ== X-Gm-Message-State: AO0yUKWrvV33wp0RehiA8iQ2ZktKwGWwVGF09UPZSgyQqU9AkreFHLQY a8/q/wRIIn7Ssla+tyyVzSl1GQ== X-Google-Smtp-Source: AK7set/NqW4Kbk9eVF0j0q7FtpPi/wkWEO5WCtNVYF74PINBGAkZzS7igmPg/Hiy70mF7QHxJVt1wQ== X-Received: by 2002:adf:e3c2:0:b0:2d1:46eb:3f97 with SMTP id k2-20020adfe3c2000000b002d146eb3f97mr6063265wrm.68.1679065467674; Fri, 17 Mar 2023 08:04:27 -0700 (PDT) Received: from arrakeen.starnux.net ([2a01:e0a:982:cbb0:52eb:f6ff:feb3:451a]) by smtp.gmail.com with ESMTPSA id q14-20020a05600000ce00b002be505ab59asm2133773wrx.97.2023.03.17.08.04.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 17 Mar 2023 08:04:27 -0700 (PDT) From: Neil Armstrong Date: Fri, 17 Mar 2023 16:04:19 +0100 Subject: [PATCH v4 03/12] dt-bindings: soc: qcom: qcom,pmic-glink: document SM8550 compatible MIME-Version: 1.0 Message-Id: <20230130-topic-sm8450-upstream-pmic-glink-v4-3-38bf0f5d07bd@linaro.org> References: <20230130-topic-sm8450-upstream-pmic-glink-v4-0-38bf0f5d07bd@linaro.org> In-Reply-To: <20230130-topic-sm8450-upstream-pmic-glink-v4-0-38bf0f5d07bd@linaro.org> To: Heikki Krogerus , Greg Kroah-Hartman , Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Catalin Marinas , Will Deacon Cc: linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Neil Armstrong , Rob Herring X-Mailer: b4 0.12.1 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Document the SM8550 compatible used to describe the pmic glink on this platform. Acked-by: Rob Herring Signed-off-by: Neil Armstrong --- Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml index a85bc14de065..6440dc801387 100644 --- a/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml @@ -26,6 +26,7 @@ properties: - qcom,sc8280xp-pmic-glink - qcom,sm8350-pmic-glink - qcom,sm8450-pmic-glink + - qcom,sm8550-pmic-glink - const: qcom,pmic-glink '#address-cells': From patchwork Fri Mar 17 15:04:20 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 664596 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 57FE5C6FD1D for ; Fri, 17 Mar 2023 15:04:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231366AbjCQPEr (ORCPT ); Fri, 17 Mar 2023 11:04:47 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49420 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231387AbjCQPEd (ORCPT ); Fri, 17 Mar 2023 11:04:33 -0400 Received: from mail-wr1-x42a.google.com (mail-wr1-x42a.google.com [IPv6:2a00:1450:4864:20::42a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2A90710DE7E for ; Fri, 17 Mar 2023 08:04:30 -0700 (PDT) Received: by mail-wr1-x42a.google.com with SMTP id p4so4718675wre.11 for ; Fri, 17 Mar 2023 08:04:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1679065468; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=JVCCrg+cX3A/ZZOueoMy5bBjL6UJS6dXroqCT+2ZBjw=; b=gJRXQbqoyvqjgwCKUleES2udxlxGrjCsHZv0KfpRljEh0xynWPF+eMxRjEhLt7FXMn CjL1wbQW07o52UwzyDSx10BSPKLiFuCE9CIEiuMh7bWs3i/i/pzPSsbzp7573b0m2HX+ TuTp42GhLEfolzGuvzdv+H7zrJNM1Ujt037Uk81W3N9YStUy0OBYANuOwxvKAY94xZsi 3RLAMFbFQbDe7kZthl5fdPanEFrZe7ucgRM77X/BU29Y8feTxaS5WSo0YUr7zKPU2tED 6O6/xCeCOJFFEeR1wO/6THBbaMmcoDv828PyyZUKvBQ6INfRwnSMK5g53jpECemZEYYR RLUw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679065468; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=JVCCrg+cX3A/ZZOueoMy5bBjL6UJS6dXroqCT+2ZBjw=; b=Dr7GJweDvNeJMxKKWNBJzV0KQOLKu5NcClNOL0jfatmbVEGWONDPCtDyeeqR83U0Dl QIqeEXs69+TSbO5fjsSyQtYu0pEcOiEu8BRKoHcxEdJiubZv3INW8dGm4XUJGictcBU1 Aou95Xewl2SRxylXKWfCyJ4yyUvfhU6tBP0+pbMj4TfwD2q2PpnEuhCZJ2qEj5An4ATT L3t3Lnk87LJj/zaEcBOY3mvRw5SAtKRMPe39NuQ0o7R92nhhzGwtZHEIL8iJAl8PWkfH bJ6NYpsVJcAR121Ypy2lop1v/LwrFylw/25L8vgo9ou2x1fam8Itpq2Z9p1a8K0Eff1h PjhA== X-Gm-Message-State: AO0yUKXSN8RMxQ6I431UoNpynx3GC7C7aUPzE9LyVY9JAY5I0N0uJqvT 9rSXgAHNvSkapAX5Zxjuf9VbHA== X-Google-Smtp-Source: AK7set9wlW5nBDmjNFvSZz03pq56IeFoP9t4mBgAQEnmSx7EgtxUSg6FiOkkD18wnC46wPwVRn1EFw== X-Received: by 2002:a5d:50cf:0:b0:2d1:14fa:8048 with SMTP id f15-20020a5d50cf000000b002d114fa8048mr6204251wrt.39.1679065468589; Fri, 17 Mar 2023 08:04:28 -0700 (PDT) Received: from arrakeen.starnux.net ([2a01:e0a:982:cbb0:52eb:f6ff:feb3:451a]) by smtp.gmail.com with ESMTPSA id q14-20020a05600000ce00b002be505ab59asm2133773wrx.97.2023.03.17.08.04.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 17 Mar 2023 08:04:28 -0700 (PDT) From: Neil Armstrong Date: Fri, 17 Mar 2023 16:04:20 +0100 Subject: [PATCH v4 04/12] soc: qcom: pmic_glink: register ucsi aux device MIME-Version: 1.0 Message-Id: <20230130-topic-sm8450-upstream-pmic-glink-v4-4-38bf0f5d07bd@linaro.org> References: <20230130-topic-sm8450-upstream-pmic-glink-v4-0-38bf0f5d07bd@linaro.org> In-Reply-To: <20230130-topic-sm8450-upstream-pmic-glink-v4-0-38bf0f5d07bd@linaro.org> To: Heikki Krogerus , Greg Kroah-Hartman , Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Catalin Marinas , Will Deacon Cc: linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Neil Armstrong X-Mailer: b4 0.12.1 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Only register UCSI on know working devices, like on the SM8450 or SM8550 which requires UCSI to get USB mode switch events. Signed-off-by: Neil Armstrong --- drivers/soc/qcom/pmic_glink.c | 65 +++++++++++++++++++++++++++++++++++-------- 1 file changed, 54 insertions(+), 11 deletions(-) diff --git a/drivers/soc/qcom/pmic_glink.c b/drivers/soc/qcom/pmic_glink.c index bb3fb57abcc6..8bf95df0a56a 100644 --- a/drivers/soc/qcom/pmic_glink.c +++ b/drivers/soc/qcom/pmic_glink.c @@ -4,6 +4,7 @@ * Copyright (c) 2022, Linaro Ltd */ #include +#include #include #include #include @@ -11,12 +12,23 @@ #include #include +enum { + PMIC_GLINK_CLIENT_BATT = 0, + PMIC_GLINK_CLIENT_ALTMODE, + PMIC_GLINK_CLIENT_UCSI, +}; + +#define PMIC_GLINK_CLIENT_DEFAULT (BIT(PMIC_GLINK_CLIENT_BATT) | \ + BIT(PMIC_GLINK_CLIENT_ALTMODE)) + struct pmic_glink { struct device *dev; struct pdr_handle *pdr; struct rpmsg_endpoint *ept; + unsigned long client_mask; + struct auxiliary_device altmode_aux; struct auxiliary_device ps_aux; struct auxiliary_device ucsi_aux; @@ -233,6 +245,7 @@ static struct rpmsg_driver pmic_glink_rpmsg_driver = { static int pmic_glink_probe(struct platform_device *pdev) { + const unsigned long *match_data; struct pdr_service *service; struct pmic_glink *pg; int ret; @@ -249,12 +262,27 @@ static int pmic_glink_probe(struct platform_device *pdev) mutex_init(&pg->client_lock); mutex_init(&pg->state_lock); - ret = pmic_glink_add_aux_device(pg, &pg->altmode_aux, "altmode"); - if (ret) - return ret; - ret = pmic_glink_add_aux_device(pg, &pg->ps_aux, "power-supply"); - if (ret) - goto out_release_altmode_aux; + match_data = (unsigned long *)of_device_get_match_data(&pdev->dev); + if (match_data) + pg->client_mask = *match_data; + else + pg->client_mask = PMIC_GLINK_CLIENT_DEFAULT; + + if (pg->client_mask & BIT(PMIC_GLINK_CLIENT_UCSI)) { + ret = pmic_glink_add_aux_device(pg, &pg->ucsi_aux, "ucsi"); + if (ret) + return ret; + } + if (pg->client_mask & BIT(PMIC_GLINK_CLIENT_ALTMODE)) { + ret = pmic_glink_add_aux_device(pg, &pg->altmode_aux, "altmode"); + if (ret) + goto out_release_ucsi_aux; + } + if (pg->client_mask & BIT(PMIC_GLINK_CLIENT_BATT)) { + ret = pmic_glink_add_aux_device(pg, &pg->ps_aux, "power-supply"); + if (ret) + goto out_release_altmode_aux; + } pg->pdr = pdr_handle_alloc(pmic_glink_pdr_callback, pg); if (IS_ERR(pg->pdr)) { @@ -278,9 +306,14 @@ static int pmic_glink_probe(struct platform_device *pdev) out_release_pdr_handle: pdr_handle_release(pg->pdr); out_release_aux_devices: - pmic_glink_del_aux_device(pg, &pg->ps_aux); + if (pg->client_mask & BIT(PMIC_GLINK_CLIENT_BATT)) + pmic_glink_del_aux_device(pg, &pg->ps_aux); out_release_altmode_aux: - pmic_glink_del_aux_device(pg, &pg->altmode_aux); + if (pg->client_mask & BIT(PMIC_GLINK_CLIENT_ALTMODE)) + pmic_glink_del_aux_device(pg, &pg->altmode_aux); +out_release_ucsi_aux: + if (pg->client_mask & BIT(PMIC_GLINK_CLIENT_UCSI)) + pmic_glink_del_aux_device(pg, &pg->ucsi_aux); return ret; } @@ -291,8 +324,12 @@ static int pmic_glink_remove(struct platform_device *pdev) pdr_handle_release(pg->pdr); - pmic_glink_del_aux_device(pg, &pg->ps_aux); - pmic_glink_del_aux_device(pg, &pg->altmode_aux); + if (pg->client_mask & BIT(PMIC_GLINK_CLIENT_BATT)) + pmic_glink_del_aux_device(pg, &pg->ps_aux); + if (pg->client_mask & BIT(PMIC_GLINK_CLIENT_ALTMODE)) + pmic_glink_del_aux_device(pg, &pg->altmode_aux); + if (pg->client_mask & BIT(PMIC_GLINK_CLIENT_UCSI)) + pmic_glink_del_aux_device(pg, &pg->ucsi_aux); mutex_lock(&__pmic_glink_lock); __pmic_glink = NULL; @@ -301,8 +338,14 @@ static int pmic_glink_remove(struct platform_device *pdev) return 0; } +/* Do not handle altmode for now on those platforms */ +static const unsigned long pmic_glink_sm8450_client_mask = BIT(PMIC_GLINK_CLIENT_BATT) | + BIT(PMIC_GLINK_CLIENT_UCSI); + static const struct of_device_id pmic_glink_of_match[] = { - { .compatible = "qcom,pmic-glink", }, + { .compatible = "qcom,sm8450-pmic-glink", .data = &pmic_glink_sm8450_client_mask }, + { .compatible = "qcom,sm8550-pmic-glink", .data = &pmic_glink_sm8450_client_mask }, + { .compatible = "qcom,pmic-glink" }, {} }; MODULE_DEVICE_TABLE(of, pmic_glink_of_match); From patchwork Fri Mar 17 15:04:21 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 664783 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BBBA5C6FD1D for ; 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Fri, 17 Mar 2023 08:04:29 -0700 (PDT) Received: from arrakeen.starnux.net ([2a01:e0a:982:cbb0:52eb:f6ff:feb3:451a]) by smtp.gmail.com with ESMTPSA id q14-20020a05600000ce00b002be505ab59asm2133773wrx.97.2023.03.17.08.04.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 17 Mar 2023 08:04:29 -0700 (PDT) From: Neil Armstrong Date: Fri, 17 Mar 2023 16:04:21 +0100 Subject: [PATCH v4 05/12] dt-bindings: usb: snps,dwc3: document HS & SS OF graph ports MIME-Version: 1.0 Message-Id: <20230130-topic-sm8450-upstream-pmic-glink-v4-5-38bf0f5d07bd@linaro.org> References: <20230130-topic-sm8450-upstream-pmic-glink-v4-0-38bf0f5d07bd@linaro.org> In-Reply-To: <20230130-topic-sm8450-upstream-pmic-glink-v4-0-38bf0f5d07bd@linaro.org> To: Heikki Krogerus , Greg Kroah-Hartman , Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Catalin Marinas , Will Deacon Cc: linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Neil Armstrong , Rob Herring X-Mailer: b4 0.12.1 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Document the optional ports subnode to describe the High-Speed and Super-Speed connections as separate OF graph links. The ports property is an alternative to the already documented single port subnode property. Reviewed-by: Rob Herring Signed-off-by: Neil Armstrong --- Documentation/devicetree/bindings/usb/snps,dwc3.yaml | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/Documentation/devicetree/bindings/usb/snps,dwc3.yaml b/Documentation/devicetree/bindings/usb/snps,dwc3.yaml index 16c7d06c9172..cce74c59bf0e 100644 --- a/Documentation/devicetree/bindings/usb/snps,dwc3.yaml +++ b/Documentation/devicetree/bindings/usb/snps,dwc3.yaml @@ -379,6 +379,22 @@ properties: This port is used with the 'usb-role-switch' property to connect the dwc3 to type C connector. + ports: + $ref: /schemas/graph.yaml#/properties/ports + description: + Those ports should be used with any connector to the data bus of this + controller using the OF graph bindings specified if the "usb-role-switch" + property is used. + + properties: + port@0: + $ref: /schemas/graph.yaml#/properties/port + description: High Speed (HS) data bus. + + port@1: + $ref: /schemas/graph.yaml#/properties/port + description: Super Speed (SS) data bus. + wakeup-source: $ref: /schemas/types.yaml#/definitions/flag description: From patchwork Fri Mar 17 15:04:22 2023 Content-Type: text/plain; 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Fri, 17 Mar 2023 08:04:30 -0700 (PDT) Received: from arrakeen.starnux.net ([2a01:e0a:982:cbb0:52eb:f6ff:feb3:451a]) by smtp.gmail.com with ESMTPSA id q14-20020a05600000ce00b002be505ab59asm2133773wrx.97.2023.03.17.08.04.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 17 Mar 2023 08:04:30 -0700 (PDT) From: Neil Armstrong Date: Fri, 17 Mar 2023 16:04:22 +0100 Subject: [PATCH v4 06/12] arm64: dts: qcom: sm8350: add port subnodes in dwc3 node MIME-Version: 1.0 Message-Id: <20230130-topic-sm8450-upstream-pmic-glink-v4-6-38bf0f5d07bd@linaro.org> References: <20230130-topic-sm8450-upstream-pmic-glink-v4-0-38bf0f5d07bd@linaro.org> In-Reply-To: <20230130-topic-sm8450-upstream-pmic-glink-v4-0-38bf0f5d07bd@linaro.org> To: Heikki Krogerus , Greg Kroah-Hartman , Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Catalin Marinas , Will Deacon Cc: linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Neil Armstrong X-Mailer: b4 0.12.1 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add ports subnodes in dwc3 node to avoid repeating the same description in each board DT. Reviewed-by: Konrad Dybcio Signed-off-by: Neil Armstrong --- arch/arm64/boot/dts/qcom/sm8350.dtsi | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi index 1afc4311796e..6c3a82c63585 100644 --- a/arch/arm64/boot/dts/qcom/sm8350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi @@ -2270,6 +2270,25 @@ usb_1_dwc3: usb@a600000 { snps,dis_enblslpm_quirk; phys = <&usb_1_hsphy>, <&usb_1_ssphy>; phy-names = "usb2-phy", "usb3-phy"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + usb_1_dwc3_hs: endpoint { + }; + }; + + port@1 { + reg = <1>; + + usb_1_dwc3_ss: endpoint { + }; + }; + }; }; }; From patchwork Fri Mar 17 15:04:23 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 664782 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 75309C76196 for ; Fri, 17 Mar 2023 15:05:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231477AbjCQPFD (ORCPT ); Fri, 17 Mar 2023 11:05:03 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49416 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231367AbjCQPEq (ORCPT ); Fri, 17 Mar 2023 11:04:46 -0400 Received: from mail-wr1-x436.google.com (mail-wr1-x436.google.com [IPv6:2a00:1450:4864:20::436]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1E348145B70 for ; Fri, 17 Mar 2023 08:04:32 -0700 (PDT) Received: by mail-wr1-x436.google.com with SMTP id l12so4710974wrm.10 for ; Fri, 17 Mar 2023 08:04:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1679065471; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=6rVvABTU02+Rtyy/Qih7T8rgJ/JIJYUn4nN2d26Tjag=; b=rXPA2nnw9gsiBl04J6SMbdg31k9lyseZv/FGJM+nW6f7JvsFRTH4xG1kES4rt532II jB9GIiye7fW9E/5OflCqoyu9Nq2ZYFbbkAuLJSeGppVivUq816lZhe0Djn/RpVkS8t1r Rvf1+xSq5m3T7i2VY2JxyXUEkpbFnXwvElnOcLmJCvFefEvBFOWERR3Nm8x4Qg44ZS2m 1rId9ms9bSBW3oWL1ErbUZt5nwzA9Ro1jyqQ34lD/yin4I0iCXQYQwd6C18gwHdBEPED dP7e6qoj/VZV/7JVFV1eOSgbIy6Qt5vLVKMxruCAQ1YwRfC6EU3ghrjNmoE4k1CUK3o1 U3pA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679065471; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=6rVvABTU02+Rtyy/Qih7T8rgJ/JIJYUn4nN2d26Tjag=; b=HJNXfjPjhabdGsTuY4xj2KOE8kevkP5eyZsMLWdMXDSfaBHXSE2vTbvl1dKuTUgwFj 0a4X/drRz/0CdtRtQUiXVslmvp00puEYU9Nd5+jjeJ+S9tOWJnwlhGhIg6/IPYJBCKsX i/ACyommpt3hLE2zwIlmKvtNrb/IGhtV+hLTCTZymB2h+AeN7SR8omrG3Ur00oEZosCt 3CNkoqz+eRYsIFSprTF6hOlhXgr97S9HY/HvVDRnvDmEkeTd6Dn8GZzhvLlNPVQ/UtXd EFDB0uixQwl8wgwm8cRcyOrV8yPzbwNVXGPZUxge+9+6xRsdzK2c3WZUbCx/CkBEZy5u hBBA== X-Gm-Message-State: AO0yUKUq2882sKquZ5+hAfo8+bTzvuEwf0d+0Y4uO8mmeqkUgzbvQPa9 gTBBZOG1mJ+4H0qnuGR2ZaCJUg== X-Google-Smtp-Source: AK7set/FOFk3wAIGeEm/ZEv4eZqOeXKF88Z4u+Cr9+TUKD1OFUCu5TtuXBCm2YwBsz+6azua2OgPUw== X-Received: by 2002:a5d:66ca:0:b0:2cf:e3d8:5df9 with SMTP id k10-20020a5d66ca000000b002cfe3d85df9mr7031464wrw.58.1679065471313; Fri, 17 Mar 2023 08:04:31 -0700 (PDT) Received: from arrakeen.starnux.net ([2a01:e0a:982:cbb0:52eb:f6ff:feb3:451a]) by smtp.gmail.com with ESMTPSA id q14-20020a05600000ce00b002be505ab59asm2133773wrx.97.2023.03.17.08.04.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 17 Mar 2023 08:04:31 -0700 (PDT) From: Neil Armstrong Date: Fri, 17 Mar 2023 16:04:23 +0100 Subject: [PATCH v4 07/12] arm64: dts: qcom: sm8450: add port subnodes in dwc3 node MIME-Version: 1.0 Message-Id: <20230130-topic-sm8450-upstream-pmic-glink-v4-7-38bf0f5d07bd@linaro.org> References: <20230130-topic-sm8450-upstream-pmic-glink-v4-0-38bf0f5d07bd@linaro.org> In-Reply-To: <20230130-topic-sm8450-upstream-pmic-glink-v4-0-38bf0f5d07bd@linaro.org> To: Heikki Krogerus , Greg Kroah-Hartman , Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Catalin Marinas , Will Deacon Cc: linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Neil Armstrong X-Mailer: b4 0.12.1 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add ports subnodes in dwc3 node to avoid repeating the same description in each board DT. Reviewed-by: Konrad Dybcio Signed-off-by: Neil Armstrong --- arch/arm64/boot/dts/qcom/sm8450.dtsi | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi index 69695eb83897..d92d49a1ca2c 100644 --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi @@ -4170,6 +4170,25 @@ usb_1_dwc3: usb@a600000 { snps,dis_enblslpm_quirk; phys = <&usb_1_hsphy>, <&usb_1_ssphy>; phy-names = "usb2-phy", "usb3-phy"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + usb_1_dwc3_hs: endpoint { + }; + }; + + port@1 { + reg = <1>; + + usb_1_dwc3_ss: endpoint { + }; + }; + }; }; }; From patchwork Fri Mar 17 15:04:24 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 664593 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6CE29C76196 for ; Fri, 17 Mar 2023 15:05:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231458AbjCQPFG (ORCPT ); Fri, 17 Mar 2023 11:05:06 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50502 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231460AbjCQPEx (ORCPT ); Fri, 17 Mar 2023 11:04:53 -0400 Received: from mail-wr1-x42a.google.com (mail-wr1-x42a.google.com [IPv6:2a00:1450:4864:20::42a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1913531BD1 for ; Fri, 17 Mar 2023 08:04:34 -0700 (PDT) Received: by mail-wr1-x42a.google.com with SMTP id v25so1258005wra.12 for ; Fri, 17 Mar 2023 08:04:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1679065472; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=81l551VcpX1M6mk9/O5MVJii8ShKhy56jAQgidl0DwY=; b=QK8Srk+nXHNfVumQzoJm2XSv8qMrDwjoQnSJCdPoXRC7Zk5Jckw0GncDh2Z+AjxkTM mvFbA+g0SVgRBjYuUzNYklqK5YkvufidELDDFEF9xcAcHUf/qVHfIyoyYnzQwVmfMFkv B1PoVh52r483oEmxeR+ObsVVUNeU9UoFh3Lk5Hku7o5IijxA1w1LAFF445kJ38JOXSy4 biO6pLCfXPLVvaAUByKl/ub8wVjkSGcrbf6d5KRAXyT/rfQfv6SHjWpGU+Nwr0BtBkJR bGH64i8DycpQXoawBmemXMW3p5UD6htLQYdhPpP8PWMs3Q9yTRRb7pVFSv9j93JLibBR k50g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679065472; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=81l551VcpX1M6mk9/O5MVJii8ShKhy56jAQgidl0DwY=; b=PVbJmreeEDVfv7BIpov0sFqMdsggplkJhqHH9oShdbk6WXZpYXAS+6mx1ec02wnWBK ibh600VcZNPsPvE3D7pjYrPzdIkjuXYN2os6YLn9ogkMUjwpSJG9a2+EpvpjAaALGOjL UFBpjooZ7Wavem/GErxhULkPrMqO4L3BFHjet1tfE4mtGPMNy/zmPBNTzVSDPa3ouIKe av342ZGqm5iTYv8Q+Pl/vSIg6VHVPVILb4ohB2juccTgSOiraeuSqkt70IkY3RUw1pQe 2Oel9F+6gStHaEEjxiBuTswdZCm1DGc3TrbSrO2NGzpBT0RXXVdFp4PGlL9CE28lbA3K SfVw== X-Gm-Message-State: AO0yUKXNdvw/3fPkLtEjC5L4NnER6CMcoq76O73T9Qo49E3gtbQuYcye jxJFHSOPy4SrTZ11wzx3KIDJlA== X-Google-Smtp-Source: AK7set9k2B6KLq3og1yxJGCSQGDPvlK4CCN4rLjAbLWbOlacyoKiEkRHsI6+tDFfNBEQEfaaFOAJLg== X-Received: by 2002:adf:d84f:0:b0:2cf:ed87:37c9 with SMTP id k15-20020adfd84f000000b002cfed8737c9mr2779125wrl.11.1679065472241; Fri, 17 Mar 2023 08:04:32 -0700 (PDT) Received: from arrakeen.starnux.net ([2a01:e0a:982:cbb0:52eb:f6ff:feb3:451a]) by smtp.gmail.com with ESMTPSA id q14-20020a05600000ce00b002be505ab59asm2133773wrx.97.2023.03.17.08.04.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 17 Mar 2023 08:04:31 -0700 (PDT) From: Neil Armstrong Date: Fri, 17 Mar 2023 16:04:24 +0100 Subject: [PATCH v4 08/12] arm64: dts: qcom: sm8550: add port subnodes in dwc3 node MIME-Version: 1.0 Message-Id: <20230130-topic-sm8450-upstream-pmic-glink-v4-8-38bf0f5d07bd@linaro.org> References: <20230130-topic-sm8450-upstream-pmic-glink-v4-0-38bf0f5d07bd@linaro.org> In-Reply-To: <20230130-topic-sm8450-upstream-pmic-glink-v4-0-38bf0f5d07bd@linaro.org> To: Heikki Krogerus , Greg Kroah-Hartman , Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Catalin Marinas , Will Deacon Cc: linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Neil Armstrong X-Mailer: b4 0.12.1 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add ports subnodes in dwc3 node to avoid repeating the same description in each board DT. Reviewed-by: Konrad Dybcio Signed-off-by: Neil Armstrong --- arch/arm64/boot/dts/qcom/sm8550.dtsi | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi index 6af4079c9a35..da32f6bc34ab 100644 --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi @@ -2460,6 +2460,25 @@ usb_1_dwc3: usb@a600000 { phys = <&usb_1_hsphy>, <&usb_dp_qmpphy QMP_USB43DP_USB3_PHY>; phy-names = "usb2-phy", "usb3-phy"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + usb_1_dwc3_hs: endpoint { + }; + }; + + port@1 { + reg = <1>; + + usb_1_dwc3_ss: endpoint { + }; + }; + }; }; }; From patchwork Fri Mar 17 15:04:25 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 664780 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1070FC74A5B for ; Fri, 17 Mar 2023 15:06:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230259AbjCQPGw (ORCPT ); Fri, 17 Mar 2023 11:06:52 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49560 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231428AbjCQPEq (ORCPT ); Fri, 17 Mar 2023 11:04:46 -0400 Received: from mail-wr1-x433.google.com (mail-wr1-x433.google.com [IPv6:2a00:1450:4864:20::433]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BA19D145B7F for ; Fri, 17 Mar 2023 08:04:33 -0700 (PDT) Received: by mail-wr1-x433.google.com with SMTP id i9so4727964wrp.3 for ; Fri, 17 Mar 2023 08:04:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1679065473; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=ReaB5rrl626TQ7XHSiG6p5ZQGCluXJKDnds+E5f0Tbc=; b=WXhjrIdAfVHiF8NLxeoCPXbaxeGSHYyJODGYN92G5ELpkBJl/TJxTcpfFC4SvwHodI I+x1StaIafDJDnHYR8fDDBRJGiSPXiBZKWqIvn/x21r5fCkOWlHg3X0vI90agqM1TbEA 1p9tbt8fD3JfhiNaKZyVXCkbWXU+ZqbsI94NtW/f8WRTcU3ZzqSqjgcwV4V/N2x428au gh2X8b6sBiezzOjqlEMdf8Ifu1wHyh8dtZHtw24vXQVwdqU2TUyWh6xbQC7gzq6I+pYu lAWCLk0zpGKaJbUpwPcCqx8eXVyQs837KvOucT0Q9NKLPWEDf/p8CGKGaMnVa6zce6l/ Rqrw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679065473; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ReaB5rrl626TQ7XHSiG6p5ZQGCluXJKDnds+E5f0Tbc=; b=OTMtl3AMlEIGCSTJoaEeIVgMmGyVwV7pdIW3c5oiihM6e4W1gHc7IFuxfv9/1+bTij z1oxLU+b3brwh6IKSHNMZV+fgCZSwSWyRtQ8QMp+LDlkD6qEyoMygr4lhO35eHlDr7vG uajVt5JCxaJ2/OUmORcpEU3AFFc7E+85kKaux+edAfNQOuVT0RWgzv5kUaLdQ4PkpW5g gAA2qsiFuSZn3fQEecdT22tlUrkuMquXeAzqfq4Pjc3+Xcn1vnCgTOxCpvrmxXvmg9Eo e1cPS4gmjy5tL5Cr+M/bjUsTZZk6xJ10tofXMVn3tqs0NpfB0+W2w0OCZQoFyC8Mp/xi 1aBA== X-Gm-Message-State: AO0yUKXU+6mY6gN/76LeFoPY5xse1vXcQELGDKzuk+dFWLgrDR8Wthr8 elwUVZCec6UR+x3O7j5NC5mmNA== X-Google-Smtp-Source: AK7set9YIM4syfd0k/zPwZ/LnKShfYni1ghT7/PXB6wYiPO+QFDsjuZ38afoWeaSCIyBTOXnWQ3i8w== X-Received: by 2002:adf:f30a:0:b0:2cf:f061:4902 with SMTP id i10-20020adff30a000000b002cff0614902mr6996724wro.47.1679065473106; Fri, 17 Mar 2023 08:04:33 -0700 (PDT) Received: from arrakeen.starnux.net ([2a01:e0a:982:cbb0:52eb:f6ff:feb3:451a]) by smtp.gmail.com with ESMTPSA id q14-20020a05600000ce00b002be505ab59asm2133773wrx.97.2023.03.17.08.04.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 17 Mar 2023 08:04:32 -0700 (PDT) From: Neil Armstrong Date: Fri, 17 Mar 2023 16:04:25 +0100 Subject: [PATCH v4 09/12] arm64: dts: qcom: sm8350-hdk: add pmic glink node MIME-Version: 1.0 Message-Id: <20230130-topic-sm8450-upstream-pmic-glink-v4-9-38bf0f5d07bd@linaro.org> References: <20230130-topic-sm8450-upstream-pmic-glink-v4-0-38bf0f5d07bd@linaro.org> In-Reply-To: <20230130-topic-sm8450-upstream-pmic-glink-v4-0-38bf0f5d07bd@linaro.org> To: Heikki Krogerus , Greg Kroah-Hartman , Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Catalin Marinas , Will Deacon Cc: linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Neil Armstrong X-Mailer: b4 0.12.1 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add the pmic glink node linked with the DWC3 USB controller switched to OTG mode and tagged with usb-role-switch. Signed-off-by: Neil Armstrong --- arch/arm64/boot/dts/qcom/sm8350-hdk.dts | 67 ++++++++++++++++++++++++++++++++- 1 file changed, 65 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8350-hdk.dts b/arch/arm64/boot/dts/qcom/sm8350-hdk.dts index 09baf6959c71..01affb16d039 100644 --- a/arch/arm64/boot/dts/qcom/sm8350-hdk.dts +++ b/arch/arm64/boot/dts/qcom/sm8350-hdk.dts @@ -31,6 +31,40 @@ hdmi_con: endpoint { }; }; + pmic-glink { + compatible = "qcom,sm8350-pmic-glink", "qcom,pmic-glink"; + #address-cells = <1>; + #size-cells = <0>; + + connector@0 { + compatible = "usb-c-connector"; + reg = <0>; + power-role = "dual"; + data-role = "dual"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + pmic_glink_hs_in: endpoint { + remote-endpoint = <&usb_1_dwc3_hs>; + }; + }; + + port@1 { + reg = <1>; + + pmic_glink_ss_in: endpoint { + remote-endpoint = <&usb_1_dwc3_ss>; + }; + }; + }; + }; + }; + vph_pwr: vph-pwr-regulator { compatible = "regulator-fixed"; regulator-name = "vph_pwr"; @@ -674,8 +708,37 @@ &usb_1 { }; &usb_1_dwc3 { - /* TODO: Define USB-C connector properly */ - dr_mode = "peripheral"; + dr_mode = "otg"; + usb-role-switch; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + usb_1_dwc3_hs: endpoint { + remote-endpoint = <&pmic_glink_hs_in>; + }; + }; + + port@1 { + reg = <1>; + + usb_1_dwc3_ss: endpoint { + remote-endpoint = <&pmic_glink_ss_in>; + }; + }; + }; +}; + +&usb_1_dwc3_hs { + remote-endpoint = <&pmic_glink_hs_in>; +}; + +&usb_1_dwc3_ss { + remote-endpoint = <&pmic_glink_ss_in>; }; &usb_1_hsphy { From patchwork Fri Mar 17 15:04:26 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 664594 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3FB45C6FD1D for ; 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Fri, 17 Mar 2023 08:04:33 -0700 (PDT) From: Neil Armstrong Date: Fri, 17 Mar 2023 16:04:26 +0100 Subject: [PATCH v4 10/12] arm64: dts: qcom: sm8450-hdk: add pmic glink node MIME-Version: 1.0 Message-Id: <20230130-topic-sm8450-upstream-pmic-glink-v4-10-38bf0f5d07bd@linaro.org> References: <20230130-topic-sm8450-upstream-pmic-glink-v4-0-38bf0f5d07bd@linaro.org> In-Reply-To: <20230130-topic-sm8450-upstream-pmic-glink-v4-0-38bf0f5d07bd@linaro.org> To: Heikki Krogerus , Greg Kroah-Hartman , Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Catalin Marinas , Will Deacon Cc: linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Neil Armstrong X-Mailer: b4 0.12.1 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add the pmic glink node linked with the DWC3 USB controller switched to OTG mode and tagged with usb-role-switch. Reviewed-by: Konrad Dybcio Signed-off-by: Neil Armstrong --- arch/arm64/boot/dts/qcom/sm8450-hdk.dts | 45 ++++++++++++++++++++++++++++++++- 1 file changed, 44 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sm8450-hdk.dts b/arch/arm64/boot/dts/qcom/sm8450-hdk.dts index feef3837e4cd..1755ee3aa04c 100644 --- a/arch/arm64/boot/dts/qcom/sm8450-hdk.dts +++ b/arch/arm64/boot/dts/qcom/sm8450-hdk.dts @@ -87,6 +87,40 @@ lt9611_3v3: lt9611-3v3-regulator { enable-active-high; }; + pmic-glink { + compatible = "qcom,sm8450-pmic-glink", "qcom,pmic-glink"; + #address-cells = <1>; + #size-cells = <0>; + + connector@0 { + compatible = "usb-c-connector"; + reg = <0>; + power-role = "dual"; + data-role = "dual"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + pmic_glink_hs_in: endpoint { + remote-endpoint = <&usb_1_dwc3_hs>; + }; + }; + + port@1 { + reg = <1>; + + pmic_glink_ss_in: endpoint { + remote-endpoint = <&usb_1_dwc3_ss>; + }; + }; + }; + }; + }; + vph_pwr: vph-pwr-regulator { compatible = "regulator-fixed"; regulator-name = "vph_pwr"; @@ -724,7 +758,16 @@ &usb_1 { }; &usb_1_dwc3 { - dr_mode = "peripheral"; + dr_mode = "otg"; + usb-role-switch; +}; + +&usb_1_dwc3_hs { + remote-endpoint = <&pmic_glink_hs_in>; +}; + +&usb_1_dwc3_ss { + remote-endpoint = <&pmic_glink_ss_in>; }; &usb_1_hsphy { From patchwork Fri Mar 17 15:04:27 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 664781 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 72AEFC77B60 for ; Fri, 17 Mar 2023 15:05:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230103AbjCQPFF (ORCPT ); Fri, 17 Mar 2023 11:05:05 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50508 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231464AbjCQPEx (ORCPT ); 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Fri, 17 Mar 2023 08:04:34 -0700 (PDT) From: Neil Armstrong Date: Fri, 17 Mar 2023 16:04:27 +0100 Subject: [PATCH v4 11/12] arm64: dts: qcom: sm8550-mtp: add pmic glink node MIME-Version: 1.0 Message-Id: <20230130-topic-sm8450-upstream-pmic-glink-v4-11-38bf0f5d07bd@linaro.org> References: <20230130-topic-sm8450-upstream-pmic-glink-v4-0-38bf0f5d07bd@linaro.org> In-Reply-To: <20230130-topic-sm8450-upstream-pmic-glink-v4-0-38bf0f5d07bd@linaro.org> To: Heikki Krogerus , Greg Kroah-Hartman , Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Catalin Marinas , Will Deacon Cc: linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Neil Armstrong X-Mailer: b4 0.12.1 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add the pmic glink node linked with the DWC3 USB controller switched to OTG mode and tagged with usb-role-switch. Reviewed-by: Konrad Dybcio Signed-off-by: Neil Armstrong --- arch/arm64/boot/dts/qcom/sm8550-mtp.dts | 45 ++++++++++++++++++++++++++++++++- 1 file changed, 44 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sm8550-mtp.dts b/arch/arm64/boot/dts/qcom/sm8550-mtp.dts index 9d4ddb883a70..e2b9bb6b1e27 100644 --- a/arch/arm64/boot/dts/qcom/sm8550-mtp.dts +++ b/arch/arm64/boot/dts/qcom/sm8550-mtp.dts @@ -27,6 +27,40 @@ chosen { stdout-path = "serial0:115200n8"; }; + pmic-glink { + compatible = "qcom,sm8550-pmic-glink", "qcom,pmic-glink"; + #address-cells = <1>; + #size-cells = <0>; + + connector@0 { + compatible = "usb-c-connector"; + reg = <0>; + power-role = "dual"; + data-role = "dual"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + pmic_glink_hs_in: endpoint { + remote-endpoint = <&usb_1_dwc3_hs>; + }; + }; + + port@1 { + reg = <1>; + + pmic_glink_ss_in: endpoint { + remote-endpoint = <&usb_1_dwc3_ss>; + }; + }; + }; + }; + }; + vph_pwr: vph-pwr-regulator { compatible = "regulator-fixed"; regulator-name = "vph_pwr"; @@ -561,7 +595,16 @@ &usb_1 { }; &usb_1_dwc3 { - dr_mode = "peripheral"; + dr_mode = "otg"; + usb-role-switch; +}; + +&usb_1_dwc3_hs { + remote-endpoint = <&pmic_glink_hs_in>; +}; + +&usb_1_dwc3_ss { + remote-endpoint = <&pmic_glink_ss_in>; }; &usb_1_hsphy { From patchwork Fri Mar 17 15:04:28 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 664592 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 851B5C76196 for ; Fri, 17 Mar 2023 15:06:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229621AbjCQPGx (ORCPT ); Fri, 17 Mar 2023 11:06:53 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50514 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231475AbjCQPEy (ORCPT ); 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Fri, 17 Mar 2023 08:04:35 -0700 (PDT) From: Neil Armstrong Date: Fri, 17 Mar 2023 16:04:28 +0100 Subject: [PATCH v4 12/12] arm64: defconfig: add PMIC GLINK modules MIME-Version: 1.0 Message-Id: <20230130-topic-sm8450-upstream-pmic-glink-v4-12-38bf0f5d07bd@linaro.org> References: <20230130-topic-sm8450-upstream-pmic-glink-v4-0-38bf0f5d07bd@linaro.org> In-Reply-To: <20230130-topic-sm8450-upstream-pmic-glink-v4-0-38bf0f5d07bd@linaro.org> To: Heikki Krogerus , Greg Kroah-Hartman , Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Catalin Marinas , Will Deacon Cc: linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Neil Armstrong X-Mailer: b4 0.12.1 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Enable the PMIC GLINK core, altmode, battery and UCSI aux drivers as module to enable USB Type-C management over the PMIC GLINK protocol on modern Qcom platforms. Reviewed-by: Konrad Dybcio Signed-off-by: Neil Armstrong --- arch/arm64/configs/defconfig | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 3a6d995384d9..d849fa2ca852 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -273,6 +273,10 @@ CONFIG_VIRTIO_BLK=y CONFIG_BLK_DEV_NVME=m CONFIG_QCOM_COINCELL=m CONFIG_QCOM_FASTRPC=m +CONFIG_BATTERY_QCOM_BATTMGR=m +CONFIG_QCOM_PMIC_GLINK=m +CONFIG_TYPEC_UCSI=m +CONFIG_UCSI_PMIC_GLINK=m CONFIG_SRAM=y CONFIG_PCI_ENDPOINT_TEST=m CONFIG_EEPROM_AT24=m