From patchwork Mon Mar 20 09:55:09 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 665419 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 40C35C7618D for ; Mon, 20 Mar 2023 09:55:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229841AbjCTJz1 (ORCPT ); Mon, 20 Mar 2023 05:55:27 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47618 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229788AbjCTJzX (ORCPT ); Mon, 20 Mar 2023 05:55:23 -0400 Received: from mail-lf1-x12f.google.com (mail-lf1-x12f.google.com [IPv6:2a00:1450:4864:20::12f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F13392706 for ; Mon, 20 Mar 2023 02:55:17 -0700 (PDT) Received: by mail-lf1-x12f.google.com with SMTP id h25so2455811lfv.6 for ; Mon, 20 Mar 2023 02:55:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1679306116; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=sWq14yt3BM/27dxCw3WEXlHO0Q3kdzBlpwclk4xm8Qw=; b=AvmgwK5rhJ0aNG1XjY08pQJKKVLHdXA/4v5bKJS7/IdtwJAIMbgJLhAcrcecABl/Wg v+mDTWY2Kbr3UrNZAVREs3kw9LoKSInoux97YMBtE+ZjiMEJDiSz39VMK4LrI2Dfei+u 0qH3wbJ23WHOyCqtNtNq1eJ3I31hv8Tlr8c11N1GpCStIuNuVZoLmRaxF7tPuQ09ye4/ 4q4dlq43UBB+72o9bw/Gtf7hTatbE60UF7ka9EyTkSd4ocOnJs3g0d3DLYIibi2p1v9u 3gh1IBhLsCS+9S6uOvyQ0ciGJYTaQW+o/XxjF7qSMPXaPC15GcWOI9FZzTNGeH1g3/KF Q2Jg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679306116; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=sWq14yt3BM/27dxCw3WEXlHO0Q3kdzBlpwclk4xm8Qw=; b=8R7K159WUry0BFhIq7fBb820C0yRVaTcdaYOKtyvB2tzvXgkLKtaSHpjisLyeALov2 ZBBQbuZf9zrYfiXHWvr0SQG71i4LOPgYIrFqspvqn1ylfY5Sl70XgoVvOcem2611JVoC z3UorA8r/E9i3ZvZQ+zrOyw5ZAdNWC2x4Ac+SbBOeGNMv+qJwRHm0rof4Z0N31HGdypn UonDQkm9YAcrnvAndlont/GXrtZiIOXEXQsnSgb/uCvB2QXy16JG+65JGbBBNiwVRRPE 8Hd7kR41TyVMgbFjEQsJSuRrvLHFqiI6sq6bjThMv3IlAEvn1M710jX9QJqBa9/xlqUT nqRg== X-Gm-Message-State: AO0yUKUTNMILlAvO9G1twmf6AbLL6dGubbvhbE1UEqBKpT839o8nL784 DEM8P6R7/AnQS3PHM/aDoZhMWg== X-Google-Smtp-Source: AK7set92TLDxmZOHLq6UfBl3aLUr2f4lDA7jWOJDuyEbTd0farNw+Y7n2xrNGRzhkkTPa8ppyMXeVg== X-Received: by 2002:ac2:44a6:0:b0:4dd:9b6b:6b5b with SMTP id c6-20020ac244a6000000b004dd9b6b6b5bmr6239022lfm.16.1679306116142; Mon, 20 Mar 2023 02:55:16 -0700 (PDT) Received: from [127.0.1.1] ([85.235.12.219]) by smtp.gmail.com with ESMTPSA id c3-20020ac244a3000000b004e792045b3dsm1640104lfm.106.2023.03.20.02.55.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 20 Mar 2023 02:55:15 -0700 (PDT) From: Linus Walleij Date: Mon, 20 Mar 2023 10:55:09 +0100 Subject: [PATCH 2/9] gpio: siox: Convert to immutable irq_chip MIME-Version: 1.0 Message-Id: <20230316-immutable-chips-2-v1-2-053d6ede831b@linaro.org> References: <20230316-immutable-chips-2-v1-0-053d6ede831b@linaro.org> In-Reply-To: <20230316-immutable-chips-2-v1-0-053d6ede831b@linaro.org> To: linux-gpio@vger.kernel.org, Bartosz Golaszewski , Manivannan Sadhasivam , Thorsten Scherer , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Pengutronix Kernel Team , Maxime Coquelin , Alexandre Torgue , Robert Richter , Nobuhiro Iwamatsu , Ray Jui , Scott Branden , Broadcom internal kernel review list , Shubhrajyoti Datta , Srinivas Neeli , Michal Simek Cc: linux-arm-kernel@lists.infradead.org, linux-unisoc@lists.infradead.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, Linus Walleij , Marc Zyngier X-Mailer: b4 0.12.1 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Convert the driver to immutable irq-chip with a bit of intuition. In this case I had to figure out a way to get to the struct gpio_chip that would work even when the irq_chip is not part of the driver state container. I did this by just doing what most other GPIO drivers do and pass the state struct as data to devm_gpiochip_add_data() and rewrite accordingly. Cc: Marc Zyngier Signed-off-by: Linus Walleij --- drivers/gpio/gpio-siox.c | 75 ++++++++++++++++++++++++------------------------ 1 file changed, 38 insertions(+), 37 deletions(-) diff --git a/drivers/gpio/gpio-siox.c b/drivers/gpio/gpio-siox.c index f8c5e9fc4bac..051bc99bdfb2 100644 --- a/drivers/gpio/gpio-siox.c +++ b/drivers/gpio/gpio-siox.c @@ -10,7 +10,6 @@ struct gpio_siox_ddata { struct gpio_chip gchip; - struct irq_chip ichip; struct mutex lock; u8 setdata[1]; u8 getdata[3]; @@ -97,9 +96,8 @@ static int gpio_siox_get_data(struct siox_device *sdevice, const u8 buf[]) static void gpio_siox_irq_ack(struct irq_data *d) { - struct irq_chip *ic = irq_data_get_irq_chip(d); - struct gpio_siox_ddata *ddata = - container_of(ic, struct gpio_siox_ddata, ichip); + struct gpio_chip *gc = irq_data_get_irq_chip_data(d); + struct gpio_siox_ddata *ddata = gpiochip_get_data(gc); raw_spin_lock(&ddata->irqlock); ddata->irq_status &= ~(1 << d->hwirq); @@ -108,21 +106,21 @@ static void gpio_siox_irq_ack(struct irq_data *d) static void gpio_siox_irq_mask(struct irq_data *d) { - struct irq_chip *ic = irq_data_get_irq_chip(d); - struct gpio_siox_ddata *ddata = - container_of(ic, struct gpio_siox_ddata, ichip); + struct gpio_chip *gc = irq_data_get_irq_chip_data(d); + struct gpio_siox_ddata *ddata = gpiochip_get_data(gc); raw_spin_lock(&ddata->irqlock); ddata->irq_enable &= ~(1 << d->hwirq); raw_spin_unlock(&ddata->irqlock); + gpiochip_disable_irq(gc, irqd_to_hwirq(d)); } static void gpio_siox_irq_unmask(struct irq_data *d) { - struct irq_chip *ic = irq_data_get_irq_chip(d); - struct gpio_siox_ddata *ddata = - container_of(ic, struct gpio_siox_ddata, ichip); + struct gpio_chip *gc = irq_data_get_irq_chip_data(d); + struct gpio_siox_ddata *ddata = gpiochip_get_data(gc); + gpiochip_enable_irq(gc, irqd_to_hwirq(d)); raw_spin_lock(&ddata->irqlock); ddata->irq_enable |= 1 << d->hwirq; raw_spin_unlock(&ddata->irqlock); @@ -130,9 +128,8 @@ static void gpio_siox_irq_unmask(struct irq_data *d) static int gpio_siox_irq_set_type(struct irq_data *d, u32 type) { - struct irq_chip *ic = irq_data_get_irq_chip(d); - struct gpio_siox_ddata *ddata = - container_of(ic, struct gpio_siox_ddata, ichip); + struct gpio_chip *gc = irq_data_get_irq_chip_data(d); + struct gpio_siox_ddata *ddata = gpiochip_get_data(gc); raw_spin_lock(&ddata->irqlock); ddata->irq_type[d->hwirq] = type; @@ -143,8 +140,7 @@ static int gpio_siox_irq_set_type(struct irq_data *d, u32 type) static int gpio_siox_get(struct gpio_chip *chip, unsigned int offset) { - struct gpio_siox_ddata *ddata = - container_of(chip, struct gpio_siox_ddata, gchip); + struct gpio_siox_ddata *ddata = gpiochip_get_data(chip); int ret; mutex_lock(&ddata->lock); @@ -167,8 +163,7 @@ static int gpio_siox_get(struct gpio_chip *chip, unsigned int offset) static void gpio_siox_set(struct gpio_chip *chip, unsigned int offset, int value) { - struct gpio_siox_ddata *ddata = - container_of(chip, struct gpio_siox_ddata, gchip); + struct gpio_siox_ddata *ddata = gpiochip_get_data(chip); u8 mask = 1 << (19 - offset); mutex_lock(&ddata->lock); @@ -208,11 +203,22 @@ static int gpio_siox_get_direction(struct gpio_chip *chip, unsigned int offset) return GPIO_LINE_DIRECTION_OUT; } +static const struct irq_chip gpio_siox_irq_chip = { + .name = "siox-gpio", + .irq_ack = gpio_siox_irq_ack, + .irq_mask = gpio_siox_irq_mask, + .irq_unmask = gpio_siox_irq_unmask, + .irq_set_type = gpio_siox_irq_set_type, + .flags = IRQCHIP_IMMUTABLE, + GPIOCHIP_IRQ_RESOURCE_HELPERS, +}; + static int gpio_siox_probe(struct siox_device *sdevice) { struct gpio_siox_ddata *ddata; struct gpio_irq_chip *girq; struct device *dev = &sdevice->dev; + struct gpio_chip *gc; int ret; ddata = devm_kzalloc(dev, sizeof(*ddata), GFP_KERNEL); @@ -224,30 +230,25 @@ static int gpio_siox_probe(struct siox_device *sdevice) mutex_init(&ddata->lock); raw_spin_lock_init(&ddata->irqlock); - ddata->gchip.base = -1; - ddata->gchip.can_sleep = 1; - ddata->gchip.parent = dev; - ddata->gchip.owner = THIS_MODULE; - ddata->gchip.get = gpio_siox_get; - ddata->gchip.set = gpio_siox_set; - ddata->gchip.direction_input = gpio_siox_direction_input; - ddata->gchip.direction_output = gpio_siox_direction_output; - ddata->gchip.get_direction = gpio_siox_get_direction; - ddata->gchip.ngpio = 20; - - ddata->ichip.name = "siox-gpio"; - ddata->ichip.irq_ack = gpio_siox_irq_ack; - ddata->ichip.irq_mask = gpio_siox_irq_mask; - ddata->ichip.irq_unmask = gpio_siox_irq_unmask; - ddata->ichip.irq_set_type = gpio_siox_irq_set_type; - - girq = &ddata->gchip.irq; - girq->chip = &ddata->ichip; + gc = &ddata->gchip; + gc->base = -1; + gc->can_sleep = 1; + gc->parent = dev; + gc->owner = THIS_MODULE; + gc->get = gpio_siox_get; + gc->set = gpio_siox_set; + gc->direction_input = gpio_siox_direction_input; + gc->direction_output = gpio_siox_direction_output; + gc->get_direction = gpio_siox_get_direction; + gc->ngpio = 20; + + girq = &gc->irq; + gpio_irq_chip_set_chip(girq, &gpio_siox_irq_chip); girq->default_type = IRQ_TYPE_NONE; girq->handler = handle_level_irq; girq->threaded = true; - ret = devm_gpiochip_add_data(dev, &ddata->gchip, NULL); + ret = devm_gpiochip_add_data(dev, gc, ddata); if (ret) dev_err(dev, "Failed to register gpio chip (%d)\n", ret); From patchwork Mon Mar 20 09:55:10 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 665418 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8A53EC7618A for ; Mon, 20 Mar 2023 09:55:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229925AbjCTJz2 (ORCPT ); Mon, 20 Mar 2023 05:55:28 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47652 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229876AbjCTJzY (ORCPT ); Mon, 20 Mar 2023 05:55:24 -0400 Received: from mail-lf1-x133.google.com (mail-lf1-x133.google.com [IPv6:2a00:1450:4864:20::133]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E28C52054F for ; Mon, 20 Mar 2023 02:55:18 -0700 (PDT) Received: by mail-lf1-x133.google.com with SMTP id y15so14112014lfa.7 for ; Mon, 20 Mar 2023 02:55:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1679306117; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=iBy8uglh8gI3CtA/oUcnRDs25I4dMI2aaLdEiGdH3E4=; b=VJSWksEl6WxkHvKzPymzEi6mf3ZUeAsMB9WkGKvRi4yYReG0Nz/6sBKaHTNxqci5JY nqhyqfT+O4UI8OcnALy74NJgtnZkDTgmzaryyCzE18tQHFKDZaX/vCyj9bmzq4MQwEqm 7JspHuKpDSc9if5ybl5cxPLcd/u09a8lpVxbPNjMNhC1EVybYUH2BndXo7a2u+IJ12Tg Q1W984RSdg1rOcpmKqad1UkvNu2z1qqFc0ZJCIlsvJj3EI3CeUk2I4EBv1NfTJt/teZh kfeqyDjdd2/ny+QZeNEIVEdYu9QSsg+sQxIsHwHcN+SGVLdMwzvc1TikYc5i4lF/FyMo KnPw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679306117; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=iBy8uglh8gI3CtA/oUcnRDs25I4dMI2aaLdEiGdH3E4=; b=Te1rmijlTRs9nrx7JE5KQlITqobFOtJZ/JFXoFlT+Fll1jDMi20iKqUp5VaCpR+TD2 kCtSWAQnAaFtBXCFgCaMR4FeDRS5kEC8LXByPc5Vd7Cpl2PKBpzDtTNcBHRT442BcQY5 Tg3h47bQa7OwdLXPmqFpAWqKstTEPydfk9RxkDdc3xnejnb0bBrKdFQInQdbCEKr0UfB bmYZXdMAIXKa3i8pu/FmbXv09y3YmTIlluEecqaHsVkbGPh9lWQSM20iurh6sJvSdgX5 drzVFTY1+s6LRO1E5p8j5Wl9z8wv66xT5wZHJjirV8/C+e92zLFJaFB/+j8loqG1LEyH YVGg== X-Gm-Message-State: AO0yUKXXENwSG+DZhBkWOP9g72+jWsQHKRiTMOLRM5RHNgF6KrLwbjXm hmPoV7L5NMP20OnhJ/IbR03VWg== X-Google-Smtp-Source: AK7set9qOc4rmnFzJJmDKRIXSY9dptpUANbsXnl/EmAKnXz6o60CYgbqOnnyCFdeWMHDggShDpHNzg== X-Received: by 2002:a19:ee14:0:b0:4e9:ccff:daa6 with SMTP id g20-20020a19ee14000000b004e9ccffdaa6mr939758lfb.30.1679306117176; Mon, 20 Mar 2023 02:55:17 -0700 (PDT) Received: from [127.0.1.1] ([85.235.12.219]) by smtp.gmail.com with ESMTPSA id c3-20020ac244a3000000b004e792045b3dsm1640104lfm.106.2023.03.20.02.55.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 20 Mar 2023 02:55:16 -0700 (PDT) From: Linus Walleij Date: Mon, 20 Mar 2023 10:55:10 +0100 Subject: [PATCH 3/9] gpio: stmpe: Convert to immutable irq_chip MIME-Version: 1.0 Message-Id: <20230316-immutable-chips-2-v1-3-053d6ede831b@linaro.org> References: <20230316-immutable-chips-2-v1-0-053d6ede831b@linaro.org> In-Reply-To: <20230316-immutable-chips-2-v1-0-053d6ede831b@linaro.org> To: linux-gpio@vger.kernel.org, Bartosz Golaszewski , Manivannan Sadhasivam , Thorsten Scherer , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Pengutronix Kernel Team , Maxime Coquelin , Alexandre Torgue , Robert Richter , Nobuhiro Iwamatsu , Ray Jui , Scott Branden , Broadcom internal kernel review list , Shubhrajyoti Datta , Srinivas Neeli , Michal Simek Cc: linux-arm-kernel@lists.infradead.org, linux-unisoc@lists.infradead.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, Linus Walleij , Marc Zyngier X-Mailer: b4 0.12.1 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Convert the driver to immutable irq-chip with a bit of intuition. Cc: Marc Zyngier Signed-off-by: Linus Walleij --- drivers/gpio/gpio-stmpe.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/gpio/gpio-stmpe.c b/drivers/gpio/gpio-stmpe.c index 0fa4f0a93378..27cc4da53565 100644 --- a/drivers/gpio/gpio-stmpe.c +++ b/drivers/gpio/gpio-stmpe.c @@ -234,6 +234,7 @@ static void stmpe_gpio_irq_mask(struct irq_data *d) int mask = BIT(offset % 8); stmpe_gpio->regs[REG_IE][regoffset] &= ~mask; + gpiochip_disable_irq(gc, offset); } static void stmpe_gpio_irq_unmask(struct irq_data *d) @@ -244,6 +245,7 @@ static void stmpe_gpio_irq_unmask(struct irq_data *d) int regoffset = offset / 8; int mask = BIT(offset % 8); + gpiochip_enable_irq(gc, offset); stmpe_gpio->regs[REG_IE][regoffset] |= mask; } @@ -357,13 +359,15 @@ static void stmpe_dbg_show(struct seq_file *s, struct gpio_chip *gc) } } -static struct irq_chip stmpe_gpio_irq_chip = { +static const struct irq_chip stmpe_gpio_irq_chip = { .name = "stmpe-gpio", .irq_bus_lock = stmpe_gpio_irq_lock, .irq_bus_sync_unlock = stmpe_gpio_irq_sync_unlock, .irq_mask = stmpe_gpio_irq_mask, .irq_unmask = stmpe_gpio_irq_unmask, .irq_set_type = stmpe_gpio_irq_set_type, + .flags = IRQCHIP_IMMUTABLE, + GPIOCHIP_IRQ_RESOURCE_HELPERS, }; #define MAX_GPIOS 24 @@ -511,7 +515,7 @@ static int stmpe_gpio_probe(struct platform_device *pdev) } girq = &stmpe_gpio->chip.irq; - girq->chip = &stmpe_gpio_irq_chip; + gpio_irq_chip_set_chip(girq, &stmpe_gpio_irq_chip); /* This will let us handle the parent IRQ in the driver */ girq->parent_handler = NULL; girq->num_parents = 0; From patchwork Mon Mar 20 09:55:14 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 665417 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C60E7C7618A for ; Mon, 20 Mar 2023 09:55:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230286AbjCTJzf (ORCPT ); Mon, 20 Mar 2023 05:55:35 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47812 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229694AbjCTJz1 (ORCPT ); Mon, 20 Mar 2023 05:55:27 -0400 Received: from mail-lf1-x12f.google.com (mail-lf1-x12f.google.com [IPv6:2a00:1450:4864:20::12f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9D07D420E for ; Mon, 20 Mar 2023 02:55:22 -0700 (PDT) Received: by mail-lf1-x12f.google.com with SMTP id h25so2456136lfv.6 for ; Mon, 20 Mar 2023 02:55:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1679306121; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=IQ8pDJ544LSAcFuKnZ1WqdUejeWGxtlm1VYmzzGBmgw=; b=lyJ+w0kp8l+cELb9UDJarzOUReNGbayK9wKZjJTyeWN91AK8i7Ojx1/+8902eHM++O 9kF6KgWPr4bGDOvASkQQQ9H3Zmhv4qhTLYtfiLOOSJb+BuYd0RzL6B6g5MCVkqry2pkY TPZ9pMkcsEiWJyhR4BpfK8oE+pVkByFq5vPia5YqQMtmxXWrDekt/7CFGcEI0DfOzoJ4 G3VTorPbaI1mBds+GzA7oerrUJKn7s/A0Oro1yOATwLbZ5MeDgM0Go+6GkqQgitIoYjg wEf1P1C9RBs5vanaRf2Fi7fyRDhAL0LJH2JrY3zV6i5A55/249WVxszwS96+eAqG0Y6F MyAg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679306121; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=IQ8pDJ544LSAcFuKnZ1WqdUejeWGxtlm1VYmzzGBmgw=; b=CCuf14LvlR13RrUEdsYUrfgItyp+cH02QgO8SR4MZsgMnrsdtWiYxQ8JPucd5chHWl U7/axlTV6l6gr6/5yLQuq5P/IW7zaxEsqK1vMyPVY+3kf+o7bAJ5c5JhCbixPoSAdZPI fXT6gKwGT4FXIK/dGQ+2Y3oEmpNilA1Khe0MxIADCfUasrUAOnRhYfSha7BYZFQk0k1x aGcZnyFaKPavmnu1FiUIXNWumvCGNVjXZsMB89V0ZFAvDsRdXC/ZQ6th0szGpAXCeq6I bQRJ02qrwMOZFLKTsB1JJVfgnkoMmXwW2M+U7R89uWE0PkOQAkpqvEgg4DYH8OY1NN2G qcng== X-Gm-Message-State: AO0yUKX5j+2k39uo6Dd4ZJE6tYspu/5JCEvvIssFN2uNyjxm2R/elwpQ lzJr6p2DeEf2wcUYmTpA5So10w== X-Google-Smtp-Source: AK7set8WWtoMKppI+gZFwXPhBIrBDDyJUehoQ6BHpQ5qn6bNbMVaZKAx+l1kC81jShZDQeZAH3pMmA== X-Received: by 2002:ac2:4142:0:b0:4dd:a445:e69d with SMTP id c2-20020ac24142000000b004dda445e69dmr5657173lfi.26.1679306121600; Mon, 20 Mar 2023 02:55:21 -0700 (PDT) Received: from [127.0.1.1] ([85.235.12.219]) by smtp.gmail.com with ESMTPSA id c3-20020ac244a3000000b004e792045b3dsm1640104lfm.106.2023.03.20.02.55.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 20 Mar 2023 02:55:21 -0700 (PDT) From: Linus Walleij Date: Mon, 20 Mar 2023 10:55:14 +0100 Subject: [PATCH 7/9] gpio: xgs-iproc: Convert to immutable irq_chip MIME-Version: 1.0 Message-Id: <20230316-immutable-chips-2-v1-7-053d6ede831b@linaro.org> References: <20230316-immutable-chips-2-v1-0-053d6ede831b@linaro.org> In-Reply-To: <20230316-immutable-chips-2-v1-0-053d6ede831b@linaro.org> To: linux-gpio@vger.kernel.org, Bartosz Golaszewski , Manivannan Sadhasivam , Thorsten Scherer , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Pengutronix Kernel Team , Maxime Coquelin , Alexandre Torgue , Robert Richter , Nobuhiro Iwamatsu , Ray Jui , Scott Branden , Broadcom internal kernel review list , Shubhrajyoti Datta , Srinivas Neeli , Michal Simek Cc: linux-arm-kernel@lists.infradead.org, linux-unisoc@lists.infradead.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, Linus Walleij , Marc Zyngier X-Mailer: b4 0.12.1 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Convert the driver to immutable irq-chip with a bit of intuition. Cc: Marc Zyngier Signed-off-by: Linus Walleij --- drivers/gpio/gpio-xgs-iproc.c | 32 ++++++++++++++++++++++---------- 1 file changed, 22 insertions(+), 10 deletions(-) diff --git a/drivers/gpio/gpio-xgs-iproc.c b/drivers/gpio/gpio-xgs-iproc.c index fd88500399c6..2d23b27d55af 100644 --- a/drivers/gpio/gpio-xgs-iproc.c +++ b/drivers/gpio/gpio-xgs-iproc.c @@ -11,6 +11,7 @@ #include #include #include +#include #include #define IPROC_CCA_INT_F_GPIOINT BIT(0) @@ -27,7 +28,6 @@ #define IPROC_GPIO_CCA_INT_EDGE 0x24 struct iproc_gpio_chip { - struct irq_chip irqchip; struct gpio_chip gc; spinlock_t lock; struct device *dev; @@ -69,6 +69,7 @@ static void iproc_gpio_irq_unmask(struct irq_data *d) u32 irq = d->irq; u32 int_mask, irq_type, event_mask; + gpiochip_enable_irq(gc, pin); spin_lock_irqsave(&chip->lock, flags); irq_type = irq_get_trigger_type(irq); event_mask = readl_relaxed(chip->base + IPROC_GPIO_CCA_INT_EVENT_MASK); @@ -110,6 +111,7 @@ static void iproc_gpio_irq_mask(struct irq_data *d) chip->base + IPROC_GPIO_CCA_INT_LEVEL_MASK); } spin_unlock_irqrestore(&chip->lock, flags); + gpiochip_disable_irq(gc, pin); } static int iproc_gpio_irq_set_type(struct irq_data *d, u32 type) @@ -191,6 +193,24 @@ static irqreturn_t iproc_gpio_irq_handler(int irq, void *data) return int_bits ? IRQ_HANDLED : IRQ_NONE; } +static void iproc_gpio_irq_print_chip(struct irq_data *d, struct seq_file *p) +{ + struct gpio_chip *gc = irq_data_get_irq_chip_data(d); + struct iproc_gpio_chip *chip = to_iproc_gpio(gc); + + seq_printf(p, dev_name(chip->dev)); +} + +static const struct irq_chip iproc_gpio_irq_chip = { + .irq_ack = iproc_gpio_irq_ack, + .irq_mask = iproc_gpio_irq_mask, + .irq_unmask = iproc_gpio_irq_unmask, + .irq_set_type = iproc_gpio_irq_set_type, + .irq_print_chip = iproc_gpio_irq_print_chip, + .flags = IRQCHIP_IMMUTABLE, + GPIOCHIP_IRQ_RESOURCE_HELPERS, +}; + static int iproc_gpio_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; @@ -230,16 +250,8 @@ static int iproc_gpio_probe(struct platform_device *pdev) irq = platform_get_irq(pdev, 0); if (irq > 0) { struct gpio_irq_chip *girq; - struct irq_chip *irqc; u32 val; - irqc = &chip->irqchip; - irqc->name = dev_name(dev); - irqc->irq_ack = iproc_gpio_irq_ack; - irqc->irq_mask = iproc_gpio_irq_mask; - irqc->irq_unmask = iproc_gpio_irq_unmask; - irqc->irq_set_type = iproc_gpio_irq_set_type; - chip->intr = devm_platform_ioremap_resource(pdev, 1); if (IS_ERR(chip->intr)) return PTR_ERR(chip->intr); @@ -261,7 +273,7 @@ static int iproc_gpio_probe(struct platform_device *pdev) } girq = &chip->gc.irq; - girq->chip = irqc; + gpio_irq_chip_set_chip(girq, &iproc_gpio_irq_chip); /* This will let us handle the parent IRQ in the driver */ girq->parent_handler = NULL; girq->num_parents = 0; From patchwork Mon Mar 20 09:55:15 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 665416 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6D333C6FD1D for ; Mon, 20 Mar 2023 09:55:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229799AbjCTJzm (ORCPT ); Mon, 20 Mar 2023 05:55:42 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47764 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230223AbjCTJz3 (ORCPT ); Mon, 20 Mar 2023 05:55:29 -0400 Received: from mail-lf1-x135.google.com (mail-lf1-x135.google.com [IPv6:2a00:1450:4864:20::135]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 017AA5BB5 for ; Mon, 20 Mar 2023 02:55:23 -0700 (PDT) Received: by mail-lf1-x135.google.com with SMTP id x17so14133058lfu.5 for ; Mon, 20 Mar 2023 02:55:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1679306122; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=ONs8hu4DakRq6Eq9QQk6sVabt3pk1jUGku2e96eNaoc=; b=aOazW7qyLg8EFAxpfusMynHT4aR5dT28i5YmCDy2aNE49eIk4P+GQ36cGYKN769CRr 8MkfV47LsZ80x+/3fpq0B+lMRPiab+22V/Z6LIGq14vI7NkNTumNzLDvAegjlBKrKiED CHMcfcXyEZuYYPSJNKR3mketsbGFofKCVw2uSSXwVWr8U1utrhwdZ0QehLWUyi5Dadpd Jbj8c7/XlikkigGSWOIokZzMIs5a/eKH8LEosYiibLs+1z3BAW4j9/9Q+RHg13e3SDFJ /Gb8o/Df2SJUEbvYbCJnKo4RkxaNF1CXYnsJ2MLVe6QcXoHDeRRWRu4g6DOsK4q7iC+V LyaA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679306122; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ONs8hu4DakRq6Eq9QQk6sVabt3pk1jUGku2e96eNaoc=; b=5cn4ZKutDZD5Q6ZPZpuiA/Rm8C2GqppNUp2PK6Ru1ntjgOSHK5+TEiZWERfCGVi78S 8oK+a1YTLhrN9HE3cGwG/QPpLKS/wah6L23IiYEmRa1F1YSxB+31uO38KpIu3HSugtsN M5R3P+UudRQc6q6JUnTqFB+o9gVW6lJzHL92s7fT9dGf3pcGPjksR2sotcmOtymJBHj2 afsJOJcmqcNs70T7C+HagWgSp1x8mfOxnJKPNftwksQspxYIQJE+R+pHP5mctYc2zch2 6LOu0xi+NylfOSh+96vwM4Ahb+SlI5MpDrz1yWy8JsAjU8qk2/EzWYWacWVu+F1oxvGF kQGA== X-Gm-Message-State: AO0yUKUzgreoR8i/iCAUjTDRys5G3c6uJ89eskzkXzZG1/Xw8j1IKKTo HXC+9n44UgoU5fvxkb/aOcLEdg== X-Google-Smtp-Source: AK7set8w6iy03am10n1Sm2MgCdWv1BERnE5+g5WCs7+WojuUv198OHiedcdFMO8QaEfHsO52hTcu8A== X-Received: by 2002:a19:f00d:0:b0:4e9:d53:a5ef with SMTP id p13-20020a19f00d000000b004e90d53a5efmr4588282lfc.1.1679306122703; Mon, 20 Mar 2023 02:55:22 -0700 (PDT) Received: from [127.0.1.1] ([85.235.12.219]) by smtp.gmail.com with ESMTPSA id c3-20020ac244a3000000b004e792045b3dsm1640104lfm.106.2023.03.20.02.55.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 20 Mar 2023 02:55:22 -0700 (PDT) From: Linus Walleij Date: Mon, 20 Mar 2023 10:55:15 +0100 Subject: [PATCH 8/9] gpio: xilinx: Convert to immutable irq_chip MIME-Version: 1.0 Message-Id: <20230316-immutable-chips-2-v1-8-053d6ede831b@linaro.org> References: <20230316-immutable-chips-2-v1-0-053d6ede831b@linaro.org> In-Reply-To: <20230316-immutable-chips-2-v1-0-053d6ede831b@linaro.org> To: linux-gpio@vger.kernel.org, Bartosz Golaszewski , Manivannan Sadhasivam , Thorsten Scherer , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Pengutronix Kernel Team , Maxime Coquelin , Alexandre Torgue , Robert Richter , Nobuhiro Iwamatsu , Ray Jui , Scott Branden , Broadcom internal kernel review list , Shubhrajyoti Datta , Srinivas Neeli , Michal Simek Cc: linux-arm-kernel@lists.infradead.org, linux-unisoc@lists.infradead.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, Linus Walleij , Marc Zyngier X-Mailer: b4 0.12.1 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Convert the driver to immutable irq-chip with a bit of intuition. Cc: Marc Zyngier Signed-off-by: Linus Walleij --- drivers/gpio/gpio-xilinx.c | 23 +++++++++++++++-------- 1 file changed, 15 insertions(+), 8 deletions(-) diff --git a/drivers/gpio/gpio-xilinx.c b/drivers/gpio/gpio-xilinx.c index e248809965ca..1fa66f2a667f 100644 --- a/drivers/gpio/gpio-xilinx.c +++ b/drivers/gpio/gpio-xilinx.c @@ -68,7 +68,6 @@ struct xgpio_instance { DECLARE_BITMAP(dir, 64); spinlock_t gpio_lock; /* For serializing operations */ int irq; - struct irq_chip irqchip; DECLARE_BITMAP(enable, 64); DECLARE_BITMAP(rising_edge, 64); DECLARE_BITMAP(falling_edge, 64); @@ -416,6 +415,8 @@ static void xgpio_irq_mask(struct irq_data *irq_data) xgpio_writereg(chip->regs + XGPIO_IPIER_OFFSET, temp); } spin_unlock_irqrestore(&chip->gpio_lock, flags); + + gpiochip_disable_irq(&chip->gc, irq_offset); } /** @@ -431,6 +432,8 @@ static void xgpio_irq_unmask(struct irq_data *irq_data) u32 old_enable = xgpio_get_value32(chip->enable, bit); u32 mask = BIT(bit / 32), val; + gpiochip_enable_irq(&chip->gc, irq_offset); + spin_lock_irqsave(&chip->gpio_lock, flags); __set_bit(bit, chip->enable); @@ -544,6 +547,16 @@ static void xgpio_irqhandler(struct irq_desc *desc) chained_irq_exit(irqchip, desc); } +static const struct irq_chip xgpio_irq_chip = { + .name = "gpio-xilinx", + .irq_ack = xgpio_irq_ack, + .irq_mask = xgpio_irq_mask, + .irq_unmask = xgpio_irq_unmask, + .irq_set_type = xgpio_set_irq_type, + .flags = IRQCHIP_IMMUTABLE, + GPIOCHIP_IRQ_RESOURCE_HELPERS, +}; + /** * xgpio_probe - Probe method for the GPIO device. * @pdev: pointer to the platform device @@ -653,12 +666,6 @@ static int xgpio_probe(struct platform_device *pdev) if (chip->irq <= 0) goto skip_irq; - chip->irqchip.name = "gpio-xilinx"; - chip->irqchip.irq_ack = xgpio_irq_ack; - chip->irqchip.irq_mask = xgpio_irq_mask; - chip->irqchip.irq_unmask = xgpio_irq_unmask; - chip->irqchip.irq_set_type = xgpio_set_irq_type; - /* Disable per-channel interrupts */ xgpio_writereg(chip->regs + XGPIO_IPIER_OFFSET, 0); /* Clear any existing per-channel interrupts */ @@ -668,7 +675,7 @@ static int xgpio_probe(struct platform_device *pdev) xgpio_writereg(chip->regs + XGPIO_GIER_OFFSET, XGPIO_GIER_IE); girq = &chip->gc.irq; - girq->chip = &chip->irqchip; + gpio_irq_chip_set_chip(girq, &xgpio_irq_chip); girq->parent_handler = xgpio_irqhandler; girq->num_parents = 1; girq->parents = devm_kcalloc(&pdev->dev, 1,