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Tue, 21 May 2019 12:01:07 +0000 (GMT) X-AuditID: cbfec7f4-12dff70000001119-93-5ce3e8846205 Received: from eusync4.samsung.com ( [203.254.199.214]) by eusmgms1.samsung.com (EUCPMTA) with SMTP id EC.22.04146.388E3EC5; Tue, 21 May 2019 13:01:07 +0100 (BST) MIME-version: 1.0 Content-transfer-encoding: 8BIT Content-type: text/plain; charset="UTF-8" Received: from AMDC2765.DIGITAL.local ([106.120.51.73]) by eusync4.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0PRU006F4RY90T20@eusync4.samsung.com>; Tue, 21 May 2019 13:01:07 +0100 (BST) From: Marek Szyprowski To: linux-usb@vger.kernel.org, linux-samsung-soc@vger.kernel.org Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Greg Kroah-Hartman , Marek Szyprowski , Bartlomiej Zolnierkiewicz , Markus Reichl , =?utf-8?b?TcOlbnMgUnVsbGfDpXJk?= , Krzysztof Kozlowski , Peter Chen , Alan Stern , Rob Herring Subject: [PATCH 1/5] dt-bindings: switch Exynos EHCI/OHCI bindings to use array of generic PHYs Date: Tue, 21 May 2019 13:58:45 +0200 Message-id: <20190521115849.9882-2-m.szyprowski@samsung.com> X-Mailer: git-send-email 2.17.1 In-reply-to: <20190521115849.9882-1-m.szyprowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprAKsWRmVeSWpSXmKPExsWy7djPc7otLx7HGEzYLGqxccZ6Vov5R86x WjQvXs9mcf78BnaLy7vmsFnMOL+PyWLRslZmi5dHfjBarD1yl93ix8PpTBZ/7t1htWjde4Td YsLvC2wOvB637tR7bFrVyeaxf+4ado83p0+xe2x8t4PJY/bdH4wefVtWMXp83iQXwBHFZZOS mpNZllqkb5fAldGw9hBTwUyZiknTDrA1MDaIdTFyckgImEgsO/mevYuRi0NIYAWjxMkf3UwQ zmdGieU7/7J2MXKAVS0+nQMRX8YocXnDF0aQbl4BQYkfk++xgNQwC8hLHLmUDRJmFtCU2Lp7 PTuILSTwn1Hi58UsEJtNwFCi620XG4gtIuAgsWTpHTaQmcwC55glFv/sYAJJCAskSux5NR2s iEVAVeLDkuXMELtsJDZdmskMcbW8xOoNB8BsTgFbiflNz5lBBkkINLNLPPzwhA2iyEViyY45 rBC2jERnx0EmqCJGiYfn1rJDOD1A7zTNYISospY4fPwiK8QPfBKTtk1nhnifV6KjTQiixEPi Tvs5VkhQTGCU2LuhgXECo/QspNCYhQiNWUihsYCReRWjeGppcW56arFRXmq5XnFibnFpXrpe cn7uJkZgOjn97/iXHYy7/iQdYhTgYFTi4bV4+DhGiDWxrLgy9xCjBAezkgjv6VOPYoR4UxIr q1KL8uOLSnNSiw8xSnOwKInzVjM8iBYSSE8sSc1OTS1ILYLJMnFwSjUwTj55JueL3rm1l1fM jy0zOTDxgy1fwKQbWxkn+OlsuLAiLfXXyXWLG7n7bVgmtG24wfPS9vZcHefvK28Zimt1cEv/ 2hTxOv3frsC2bab7Ax/J8PB67r87KfnpC4YdQbGhYacXTBM96vxheXmIEcvuvK8P3pwxLi+8 vDZGW3xJ2jvn5fc5+Ty2XFViKc5INNRiLipOBABB0zvzIwMAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrBLMWRmVeSWpSXmKPExsVy+t/xa7rNLx7HGNxfpG+xccZ6Vov5R86x WjQvXs9mcf78BnaLy7vmsFnMOL+PyWLRslZmi5dHfjBarD1yl93ix8PpTBZ/7t1htWjde4Td YsLvC2wOvB637tR7bFrVyeaxf+4ado83p0+xe2x8t4PJY/bdH4wefVtWMXp83iQXwBHFZZOS mpNZllqkb5fAldGw9hBTwUyZiknTDrA1MDaIdTFycEgImEgsPp3TxcjJISSwhFHiaVswiM0r ICjxY/I9FpASZgF5iSOXskHCzALqEpPmLWLuYuQCKm9kkrjQ8ZUJJMEmYCjR9baLDcQWEXCQ WLL0DhtIEbPABWaJzh1/2EESwgKJEi8a5jCD2CwCqhIflixnhlhmI7Hp0kwwWwJo2eoNB8Bs TgFbiflNz5khjrOReDWjg3kCI/8sJPfNQrhvFpL7FjAyr2IUSS0tzk3PLTbUK07MLS7NS9dL zs/dxAiMj23Hfm7ewXhpY/AhRgEORiUe3gf3HscIsSaWFVfmHmKU4GBWEuE9fepRjBBvSmJl VWpRfnxRaU5q8SFGaQ4WJXHeDoGDMUIC6YklqdmpqQWpRTBZJg5OqQZG0QfLON5OeZ1sdsHO JpYnPMSU+3nGrRfHp7B7fY8ImWX5o3bX8vnlHZ8TKnSeL43Zsu9v2BWd4j8PGf6+e/R8isj6 PclVnzQb7n0U6t8SYtW6VW6R58J89znLfp8I3CZ2nSdo/fL1q16evp69ZDnX/Fdfozafqe53 tTtVcLnUYsmfjzvM5s57Uq7EUpyRaKjFXFScCACXzUp1iwIAAA== X-CMS-MailID: 20190521120107eucas1p1a56efaa0e7f2117063e70683276edc10 CMS-TYPE: 201P X-CMS-RootMailID: 20190521120107eucas1p1a56efaa0e7f2117063e70683276edc10 References: <20190521115849.9882-1-m.szyprowski@samsung.com> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Commit 69bec7259853 ("USB: core: let USB device know device node") added support for attaching devicetree node for USB devices. Those nodes are children of their USB host controller. However Exynos EHCI and OHCI driver bindings already define child-nodes for each physical root hub port and assigns respective PHY controller and parameters to them. This leads to the conflict. A workaround for it has been merged as commit 01d4071486fe ("usb: exynos: add workaround for the USB device bindings conflict"), but it disabled support for USB device binding for Exynos EHCI/OHCI controllers. To resolve it properly, lets move PHYs from the sub-nodes to a standard array under the 'phys' property. Suggested-by: Måns Rullgård Signed-off-by: Marek Szyprowski --- .../devicetree/bindings/usb/exynos-usb.txt | 41 +++++++------------ 1 file changed, 14 insertions(+), 27 deletions(-) -- 2.17.1 Reviewed-by: Rob Herring diff --git a/Documentation/devicetree/bindings/usb/exynos-usb.txt b/Documentation/devicetree/bindings/usb/exynos-usb.txt index b7111f43fa59..66c394f9e11f 100644 --- a/Documentation/devicetree/bindings/usb/exynos-usb.txt +++ b/Documentation/devicetree/bindings/usb/exynos-usb.txt @@ -12,13 +12,11 @@ Required properties: - interrupts: interrupt number to the cpu. - clocks: from common clock binding: handle to usb clock. - clock-names: from common clock binding: Shall be "usbhost". - - port: if in the SoC there are EHCI phys, they should be listed here. - One phy per port. Each port should have following entries: - - reg: port number on EHCI controller, e.g - On Exynos5250, port 0 is USB2.0 otg phy - port 1 is HSIC phy0 - port 2 is HSIC phy1 - - phys: from the *Generic PHY* bindings; specifying phy used by port. + - phys: from the *Generic PHY* bindings; array specifying phy(s) used + by the root port. + - phy-names: from the *Generic PHY* bindings; array of the names for + each phy for the root ports, must be a subset of the following: + "host", "hsic0", "hsic1". Optional properties: - samsung,vbus-gpio: if present, specifies the GPIO that @@ -35,12 +33,8 @@ Example: clocks = <&clock 285>; clock-names = "usbhost"; - #address-cells = <1>; - #size-cells = <0>; - port@0 { - reg = <0>; - phys = <&usb2phy 1>; - }; + phys = <&usb2phy 1>; + phy-names = "host"; }; OHCI @@ -52,13 +46,11 @@ Required properties: - interrupts: interrupt number to the cpu. - clocks: from common clock binding: handle to usb clock. - clock-names: from common clock binding: Shall be "usbhost". - - port: if in the SoC there are OHCI phys, they should be listed here. - One phy per port. Each port should have following entries: - - reg: port number on OHCI controller, e.g - On Exynos5250, port 0 is USB2.0 otg phy - port 1 is HSIC phy0 - port 2 is HSIC phy1 - - phys: from the *Generic PHY* bindings, specifying phy used by port. + - phys: from the *Generic PHY* bindings; array specifying phy(s) used + by the root port. + - phy-names: from the *Generic PHY* bindings; array of the names for + each phy for the root ports, must be a subset of the following: + "host", "hsic0", "hsic1". Example: usb@12120000 { @@ -69,13 +61,8 @@ Example: clocks = <&clock 285>; clock-names = "usbhost"; - #address-cells = <1>; - #size-cells = <0>; - port@0 { - reg = <0>; - phys = <&usb2phy 1>; - }; - + phys = <&usb2phy 1>; + phy-names = "host"; }; DWC3 From patchwork Tue May 21 11:58:47 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Marek Szyprowski X-Patchwork-Id: 164713 Delivered-To: patch@linaro.org Received: by 2002:a92:9e1a:0:0:0:0:0 with SMTP id q26csp1510763ili; Tue, 21 May 2019 05:02:53 -0700 (PDT) X-Google-Smtp-Source: APXvYqzxM7ERPBfNXtaDikPGq3vI3tyybqIoMHDLAPgi9FTRUVux31V3zOzaY6WvLFCEvrOO81ww X-Received: by 2002:a62:1cd5:: with SMTP id c204mr47966843pfc.205.1558440173459; Tue, 21 May 2019 05:02:53 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1558440173; cv=none; d=google.com; s=arc-20160816; b=osu3Thoos5/MYPwKfNBhloL2EWeCQ2bLXqNtZQhI0aWfif0SgIspEo1lV9K1+WNyEv bg075dmYU9GdGYNzUQw5QjdiPURT+PY36FYIQQOd7vL+6Dac1xLfbPdcAM2osK09t/Mg k6VG5T/pYAm0da0KG5LtL6HTcd0MbDGWev7uF2MydM3HafZP1yT6ZZX4AwIXpL/6uwWZ BXUvwH66L0dsiWnPgtKYK0yL43HDZ/fMduunf9BPcA6uZYrk82+rfRnqQFShqHiFxQii jM4DplJkHPovJTMEmq6XuZbbqSBIS4cpVXygGuKg1q2/leOqoAsqZG3MI6AidQqg8n3Q s//A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:cms-type:in-reply-to :message-id:date:subject:cc:to:from:content-transfer-encoding :mime-version:dkim-signature:dkim-filter; bh=LICT6p63z28m+QBvow/NtYuLWxdakRY3i+TlswUz6bc=; b=xGJUC41W+Plk/pCu3Bh/63/3Owg1xII3YNAQq02rhv7Q2zIBUMxrWD5DBiAJCua4uo VlidNOW36TRVM+GYFBZwkNh4K1yldAeSBkNbr/JvO329NjRV7+pztyb1e/WlyLFHRZka yhJxLye6cz01V6Wr4M9t2RAVv12uncEJmpQ6+b5lw/Y4OYN4UAxkfHbWZNltj51nL0PC UHMpGrpe6fRjk1mxNO/cUORIC2+1ccYiDakOCQvjMGdb+CylOKnwYa3ldp6e85fIkP1e RqPDfPsMnRfI8opljnPpLcEEZcYZHSJ80gismLFXJ4pvmK1dGWS8mEggaImXNWuoOdvF 7UDQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@samsung.com header.s=mail20170921 header.b=G9NVtCSb; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=samsung.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Tue, 21 May 2019 12:02:49 +0000 (GMT) X-AuditID: cbfec7f2-3615e9c0000010ca-b0-5ce3e8ea7c4c Received: from eusync4.samsung.com ( [203.254.199.214]) by eusmgms1.samsung.com (EUCPMTA) with SMTP id 54.62.04146.9E8E3EC5; Tue, 21 May 2019 13:02:49 +0100 (BST) MIME-version: 1.0 Content-transfer-encoding: 8BIT Content-type: text/plain; charset="UTF-8" Received: from AMDC2765.DIGITAL.local ([106.120.51.73]) by eusync4.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0PRU006F4RY90T20@eusync4.samsung.com>; Tue, 21 May 2019 13:02:49 +0100 (BST) From: Marek Szyprowski To: linux-usb@vger.kernel.org, linux-samsung-soc@vger.kernel.org Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Greg Kroah-Hartman , Marek Szyprowski , Bartlomiej Zolnierkiewicz , Markus Reichl , =?utf-8?b?TcOlbnMgUnVsbGfDpXJk?= , Krzysztof Kozlowski , Peter Chen , Alan Stern , Rob Herring Subject: [PATCH 3/5] usb: exynos: add support for getting PHYs from the standard dt array Date: Tue, 21 May 2019 13:58:47 +0200 Message-id: <20190521115849.9882-4-m.szyprowski@samsung.com> X-Mailer: git-send-email 2.17.1 In-reply-to: <20190521115849.9882-1-m.szyprowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprIKsWRmVeSWpSXmKPExsWy7djP87qvXjyOMXi1gcdi44z1rBbzj5xj tWhevJ7N4vz5DewWl3fNYbOYcX4fk8WiZa3MFi+P/GC0WHvkLrvFj4fTmSz+3LvDatG69wi7 xYTfF9gceD1u3an32LSqk81j/9w17B5vTp9i99j4bgeTx+y7Pxg9+rasYvT4vEkugCOKyyYl NSezLLVI3y6BK2PHiTVMBY0iFRNO32RtYDwk0MXIySEhYCJxdu1yxi5GLg4hgRWMEh83dTNB OJ8ZJS5PW88MU3Wo9wYzRGIZo8S3U13sIAleAUGJH5PvsXQxcnAwC8hLHLmUDRJmFtCU2Lp7 PViJkMB/RomnUyJAbDYBQ4mut11sILaIgIPEkqV32EBmMgucY5ZY/LODCSQhLBAtsefeZbBm FgFViS0tLxghdtlIrF98B+ogeYnVGw6A2ZwCthLzm56DHSch8JtNon/2MTaIIheJ0wu/s0PY MhKdHQeZIIqaGSUenlvLDuH0AP3ZNIMRospa4vDxi6wQP/BJTNo2nRnkNQkBXomONiGIEg+J xomPWCBBMYFR4tbijUwTGKVnIYXGLERozEIKjQWMzKsYxVNLi3PTU4sN81LL9YoTc4tL89L1 kvNzNzECE8rpf8c/7WD8einpEKMAB6MSD6/Fw8cxQqyJZcWVuYcYJTiYlUR4T596FCPEm5JY WZValB9fVJqTWnyIUZqDRUmct5rhQbSQQHpiSWp2ampBahFMlomDU6qBkS1jR7XURwfP13+n XLp7evMKuTsX676IGnyUlxK30PeMy6gQ9zD6cTSwc6b3zDNvjv7SvWpVPvGLpoOk5b8piW8v S1hMfloZqMC+XufUc48jX+2X+x/Uyw+53uBfIBbSv1HT5em0pTYdillGB59J/jpg7n9H8vnl w52dJaX9O7Q5TypJPld0VWIpzkg01GIuKk4EAFki0cUkAwAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrFLMWRmVeSWpSXmKPExsVy+t/xa7ovXzyOMfi/T8pi44z1rBbzj5xj tWhevJ7N4vz5DewWl3fNYbOYcX4fk8WiZa3MFi+P/GC0WHvkLrvFj4fTmSz+3LvDatG69wi7 xYTfF9gceD1u3an32LSqk81j/9w17B5vTp9i99j4bgeTx+y7Pxg9+rasYvT4vEkugCOKyyYl NSezLLVI3y6BK2PHiTVMBY0iFRNO32RtYDwk0MXIySEhYCJxqPcGcxcjF4eQwBJGiQk/XrGC JHgFBCV+TL7H0sXIwcEsIC9x5FI2SJhZQF1i0rxFUPWNTBKzWhYygyTYBAwlut52sYHYIgIO EkuW3mEDKWIWuMAs0bnjDztIQlggWmLPvctgNouAqsSWlheMEMtsJNYvvsMMcZG8xOoNB8Bs TgFbiflNz8FsIaCaVzM6mCcw8s9Cct8shPtmIblvASPzKkaR1NLi3PTcYkO94sTc4tK8dL3k /NxNjMAY2Xbs5+YdjJc2Bh9iFOBgVOLhfXDvcYwQa2JZcWXuIUYJDmYlEd7Tpx7FCPGmJFZW pRblxxeV5qQWH2KU5mBREuftEDgYIySQnliSmp2aWpBaBJNl4uCUamA0LliY8Nwz6Hq0KFfx zbizc1lM1r7x5uUVcT9fEm+072tYrEW797Jn+1SmeU1Sr73jZSfhy1yqzcn6vNdZ9+O8Izpt qQlCQt69+msOyq4SmfFs8yv5oJcWi5/zhCfdfeRrevOPgcvLk9W/LMTig7NjVDZH/6z7ksHM GKDTFfOVo4LTxJWbVYmlOCPRUIu5qDgRABVdqLqNAgAA X-CMS-MailID: 20190521120249eucas1p2e4a8fec922fa78783d7d3fed785f3e3b CMS-TYPE: 201P X-CMS-RootMailID: 20190521120249eucas1p2e4a8fec922fa78783d7d3fed785f3e3b References: <20190521115849.9882-1-m.szyprowski@samsung.com> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add the code for getting generic PHYs from standard device tree array from the main controller device node. This is a first step in resolving the conflict between Exynos EHCI/OHCI sub-nodes and generic USB device bindings. Later the sub-nodes currently used for assigning PHYs to root ports of the controller will be removed making a place for the generic USB device bindings nodes. Suggested-by: Måns Rullgård Signed-off-by: Marek Szyprowski --- drivers/usb/host/ehci-exynos.c | 14 +++++++++++++- drivers/usb/host/ohci-exynos.c | 14 +++++++++++++- 2 files changed, 26 insertions(+), 2 deletions(-) -- 2.17.1 diff --git a/drivers/usb/host/ehci-exynos.c b/drivers/usb/host/ehci-exynos.c index 3a29a1a8519c..2a551a807ec0 100644 --- a/drivers/usb/host/ehci-exynos.c +++ b/drivers/usb/host/ehci-exynos.c @@ -50,10 +50,22 @@ static int exynos_ehci_get_phy(struct device *dev, { struct device_node *child; struct phy *phy; - int phy_number; + int phy_number, num_phys; int ret; /* Get PHYs for the controller */ + num_phys = of_count_phandle_with_args(dev->of_node, "phys", + "#phy-cells"); + for (phy_number = 0; phy_number < num_phys; phy_number++) { + phy = devm_of_phy_get_by_index(dev, dev->of_node, phy_number); + if (IS_ERR(phy)) + return PTR_ERR(phy); + exynos_ehci->phy[phy_number] = phy; + } + if (num_phys) + return 0; + + /* Get PHYs using legacy bindings */ for_each_available_child_of_node(dev->of_node, child) { ret = of_property_read_u32(child, "reg", &phy_number); if (ret) { diff --git a/drivers/usb/host/ohci-exynos.c b/drivers/usb/host/ohci-exynos.c index 905c6317e0c3..195ea5fa021e 100644 --- a/drivers/usb/host/ohci-exynos.c +++ b/drivers/usb/host/ohci-exynos.c @@ -39,10 +39,22 @@ static int exynos_ohci_get_phy(struct device *dev, { struct device_node *child; struct phy *phy; - int phy_number; + int phy_number, num_phys; int ret; /* Get PHYs for the controller */ + num_phys = of_count_phandle_with_args(dev->of_node, "phys", + "#phy-cells"); + for (phy_number = 0; phy_number < num_phys; phy_number++) { + phy = devm_of_phy_get_by_index(dev, dev->of_node, phy_number); + if (IS_ERR(phy)) + return PTR_ERR(phy); + exynos_ohci->phy[phy_number] = phy; + } + if (num_phys) + return 0; + + /* Get PHYs using legacy bindings */ for_each_available_child_of_node(dev->of_node, child) { ret = of_property_read_u32(child, "reg", &phy_number); if (ret) {