From patchwork Mon Mar 27 16:32:46 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mohammad Rafi Shaik X-Patchwork-Id: 668256 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CFE3EC6FD1D for ; Mon, 27 Mar 2023 16:33:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232463AbjC0Qdx (ORCPT ); Mon, 27 Mar 2023 12:33:53 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47834 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232378AbjC0Qdv (ORCPT ); Mon, 27 Mar 2023 12:33:51 -0400 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 43E4030D1; Mon, 27 Mar 2023 09:33:33 -0700 (PDT) Received: from pps.filterd (m0279869.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 32RAKxCM024573; Mon, 27 Mar 2023 16:33:24 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=qcppdkim1; bh=P/RHdd0zO2Y7gxRNDJvyNpuJbZtjW9OmgevcB7seTrU=; b=Ir6KCEM4M0LnkswcB1urH/Iw/MJdsr0YEx+iJJwrv1lJ8oq9nhnnLsg1B4rCJQXGxHFx KXOHZPH25NjczgT03lv/WKMe1ZLPJDvZSh9naJpPh3LVEV3w2m61+Ia+cVF2z4Hi4RsK d8R/Ty9rJxPlryZ88ehTEeXXRIKg0LIW87Tm2eroPZZYG1f5jD835tJihvFJJCFV/uWP hzjNfdYsL9z1aHnznyAi0K4w22PbeRP2/OZhkSLX85Q7xrcRojs7WMMSFBHGbFFRpFR+ gAyhsZiOpwtNZ71PGcSX58F04dtxm3Sggmwq1m+jEOAMaWwXanqvT+tkh3151zx5XekX XQ== Received: from nalasppmta02.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3pk7h8s88y-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 27 Mar 2023 16:33:23 +0000 Received: from nalasex01b.na.qualcomm.com (nalasex01b.na.qualcomm.com [10.47.209.197]) by NALASPPMTA02.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 32RGXM32011520 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 27 Mar 2023 16:33:22 GMT Received: from hu-mohs-hyd.qualcomm.com (10.80.80.8) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.41; Mon, 27 Mar 2023 09:33:17 -0700 From: Mohammad Rafi Shaik To: , , , , , , , , , , , , , , CC: Mohammad Rafi Shaik Subject: [PATCH v1 1/4] arm64: dts: qcom: sc7280: Modify lpasscc node name Date: Mon, 27 Mar 2023 22:02:46 +0530 Message-ID: <20230327163249.1081824-2-quic_mohs@quicinc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230327163249.1081824-1-quic_mohs@quicinc.com> References: <20230327163249.1081824-1-quic_mohs@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: H14O45EEygrxMMVw_zT8cC6MayzMVyf0 X-Proofpoint-ORIG-GUID: H14O45EEygrxMMVw_zT8cC6MayzMVyf0 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-03-24_11,2023-03-27_02,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 spamscore=0 bulkscore=0 impostorscore=0 malwarescore=0 adultscore=0 lowpriorityscore=0 clxscore=1015 mlxlogscore=869 phishscore=0 priorityscore=1501 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2303200000 definitions=main-2303270133 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Modify lpasscc clock controller node name to generic name, that is from lpasscc to clock-controller. Signed-off-by: Mohammad Rafi Shaik Reviewed-by: Stephen Boyd --- arch/arm64/boot/dts/qcom/sc7280.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi index bdcb74925313..3914f262aa12 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -2230,7 +2230,7 @@ tcsr_2: syscon@1fc0000 { reg = <0 0x01fc0000 0 0x30000>; }; - lpasscc: lpasscc@3000000 { + lpasscc: clock-controller@3000000 { compatible = "qcom,sc7280-lpasscc"; reg = <0 0x03000000 0 0x40>, <0 0x03c04000 0 0x4>; From patchwork Mon Mar 27 16:32:47 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mohammad Rafi Shaik X-Patchwork-Id: 667516 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 834C8C77B6E for ; Mon, 27 Mar 2023 16:33:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232480AbjC0Qdy (ORCPT ); Mon, 27 Mar 2023 12:33:54 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47856 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229697AbjC0Qdw (ORCPT ); Mon, 27 Mar 2023 12:33:52 -0400 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E918F12F; Mon, 27 Mar 2023 09:33:35 -0700 (PDT) Received: from pps.filterd (m0279863.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 32RD052L005981; Mon, 27 Mar 2023 16:33:29 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=qcppdkim1; bh=PcMKdIBG2DYTNOElioIq9LXZxGMZd/qkiH5UTSqdpXc=; b=D+HBBSVl+HSb3UaLlsdkEiczXl0LvPgROg89m4nAO8M9uA/PiLIspo1PQdTxZAGqDWGp dbQaiV3wbQaNtSOmdwuWSdH/5G+hG+VdawO16jGFxt/bUovhGrPF6Q2n19uDgKsZs0M2 VdmZxpW188276aA29ElJRyooHCQpacZJoxL06ukawvND6phho39yD5fsIvxwXCRm3/Md yPFDdKqjfery34Q+ftZNkbw7nBgF6eTAucSoJwNdfp73VPk1z6MGPJMazT6sIp+Sqp6I IDaI3UEKMVFRXy082zmhvCYyuSYeHa+TNKxuVAaa+zqP0Mrj75UZfcYHiONxtDwZFmij AQ== Received: from nalasppmta02.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3pkbmyrm9h-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 27 Mar 2023 16:33:28 +0000 Received: from nalasex01b.na.qualcomm.com (nalasex01b.na.qualcomm.com [10.47.209.197]) by NALASPPMTA02.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 32RGXSs7011541 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 27 Mar 2023 16:33:28 GMT Received: from hu-mohs-hyd.qualcomm.com (10.80.80.8) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.41; Mon, 27 Mar 2023 09:33:22 -0700 From: Mohammad Rafi Shaik To: , , , , , , , , , , , , , , CC: Mohammad Rafi Shaik Subject: [PATCH v1 2/4] dt-bindings: clock: qcom,sc7280-lpasscc: Remove qdsp6ss register region Date: Mon, 27 Mar 2023 22:02:47 +0530 Message-ID: <20230327163249.1081824-3-quic_mohs@quicinc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230327163249.1081824-1-quic_mohs@quicinc.com> References: <20230327163249.1081824-1-quic_mohs@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: Dj0XzyoYDc-JkjGH47jQP4lsVq8855Ja X-Proofpoint-GUID: Dj0XzyoYDc-JkjGH47jQP4lsVq8855Ja X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-03-24_11,2023-03-27_02,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 spamscore=0 adultscore=0 bulkscore=0 mlxlogscore=999 mlxscore=0 suspectscore=0 phishscore=0 malwarescore=0 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2303200000 definitions=main-2303270133 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The qdsp6ss memory region 0x3000000 is being shared by ADSP remoteproc device and lpasscc clock device, hence causing memory conflict and as the qdsp6ss clocks are being enabled in remoteproc driver, remove the qdsp6ss register from lpasscc. Changing the base address of lpasscc based on the first register memory. Signed-off-by: Mohammad Rafi Shaik --- .../devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml b/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml index 6151fdebbff8..9c72b8eca450 100644 --- a/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml @@ -33,12 +33,10 @@ properties: reg: items: - - description: LPASS qdsp6ss register - description: LPASS top-cc register reg-names: items: - - const: qdsp6ss - const: top_cc required: @@ -54,10 +52,10 @@ examples: - | #include #include - clock-controller@3000000 { + clock-controller@3c04000 { compatible = "qcom,sc7280-lpasscc"; - reg = <0x03000000 0x40>, <0x03c04000 0x4>; - reg-names = "qdsp6ss", "top_cc"; + reg = <0x03c04000 0x4>; + reg-names = "top_cc"; clocks = <&gcc GCC_CFG_NOC_LPASS_CLK>; clock-names = "iface"; #clock-cells = <1>; From patchwork Mon Mar 27 16:32:48 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mohammad Rafi Shaik X-Patchwork-Id: 668255 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 97DC2C761A6 for ; Mon, 27 Mar 2023 16:34:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230218AbjC0QeB (ORCPT ); Mon, 27 Mar 2023 12:34:01 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48264 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230212AbjC0Qd7 (ORCPT ); Mon, 27 Mar 2023 12:33:59 -0400 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3B6941FEF; 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Mon, 27 Mar 2023 16:33:34 +0000 Received: from nalasex01b.na.qualcomm.com (nalasex01b.na.qualcomm.com [10.47.209.197]) by NALASPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 32RGXXpS008631 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 27 Mar 2023 16:33:33 GMT Received: from hu-mohs-hyd.qualcomm.com (10.80.80.8) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.41; Mon, 27 Mar 2023 09:33:27 -0700 From: Mohammad Rafi Shaik To: , , , , , , , , , , , , , , CC: Mohammad Rafi Shaik Subject: [PATCH v1 3/4] arm64: dts: qcom: sc7280: Remove qdsp6ss regmap region Date: Mon, 27 Mar 2023 22:02:48 +0530 Message-ID: <20230327163249.1081824-4-quic_mohs@quicinc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230327163249.1081824-1-quic_mohs@quicinc.com> References: <20230327163249.1081824-1-quic_mohs@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: AaeLMJL_oIWO-kuQA8rRR16p1nHNW0Yl X-Proofpoint-ORIG-GUID: AaeLMJL_oIWO-kuQA8rRR16p1nHNW0Yl X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-03-24_11,2023-03-27_02,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 mlxlogscore=812 spamscore=0 clxscore=1015 impostorscore=0 phishscore=0 malwarescore=0 adultscore=1 bulkscore=0 suspectscore=0 priorityscore=1501 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2303200000 definitions=main-2303270133 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The qdsp6ss memory region is being shared by ADSP remoteproc device and lpasscc clock device, hence causing memory conflict and as the qdsp6ss clocks are being enabled in remoteproc driver, remove the register memory region from lpasscc device tree node. Change the base address of lpasscc with top_cc register address. Signed-off-by: Mohammad Rafi Shaik --- arch/arm64/boot/dts/qcom/sc7280.dtsi | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi index 3914f262aa12..625ac36790a0 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -2230,11 +2230,10 @@ tcsr_2: syscon@1fc0000 { reg = <0 0x01fc0000 0 0x30000>; }; - lpasscc: clock-controller@3000000 { + lpasscc: clock-controller@3c04000 { compatible = "qcom,sc7280-lpasscc"; - reg = <0 0x03000000 0 0x40>, - <0 0x03c04000 0 0x4>; - reg-names = "qdsp6ss", "top_cc"; + reg = <0 0x03c04000 0 0x4>; + reg-names = "top_cc"; clocks = <&gcc GCC_CFG_NOC_LPASS_CLK>; clock-names = "iface"; #clock-cells = <1>; From patchwork Mon Mar 27 16:32:49 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mohammad Rafi Shaik X-Patchwork-Id: 667515 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 02120C76195 for ; Mon, 27 Mar 2023 16:34:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232618AbjC0QeJ (ORCPT ); Mon, 27 Mar 2023 12:34:09 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48326 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232521AbjC0QeA (ORCPT ); Mon, 27 Mar 2023 12:34:00 -0400 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2993126AC; Mon, 27 Mar 2023 09:33:46 -0700 (PDT) Received: from pps.filterd (m0279872.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 32REefc8015630; Mon, 27 Mar 2023 16:33:39 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=qcppdkim1; bh=7S1232h/XwYZf89QBN7zUWlxPDxwqmmgYZt9Ya4kwYg=; b=WMeG9rKh8yB8fvQCHAySGFeI5ueEcRKPgWfw8mk7QAAVIaFf6RSUFElu4puxWtfcL9n9 Pn21sl+5wAeDq3v4NbgcTBmUQlR3N2mKCfQQLMSaNTRaQLHAvjYEyQAOykuOAojcIWCL PTz8VhRehpj7r5sUhGnnGg2qbU8ZtPInu03xQTzWZXKvRrlNHwyT6JHvDY9+ciy6WxK/ E7ZbePeH3V8n1tCklMDdFUZe1+cflUxHaksIr/i23ci7+01+HmSTh+m1GAxRF1edpevZ oYKgIq4/4eM0ZYnPSwB+5DoxIzMXlHdj5RYgUclvn8cY2BZHVli6bL64WUEBIJOhXHYC Gg== Received: from nalasppmta01.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3phsqqn2cf-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 27 Mar 2023 16:33:39 +0000 Received: from nalasex01b.na.qualcomm.com (nalasex01b.na.qualcomm.com [10.47.209.197]) by NALASPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 32RGXcUP024417 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 27 Mar 2023 16:33:38 GMT Received: from hu-mohs-hyd.qualcomm.com (10.80.80.8) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.41; Mon, 27 Mar 2023 09:33:33 -0700 From: Mohammad Rafi Shaik To: , , , , , , , , , , , , , , CC: Mohammad Rafi Shaik Subject: [PATCH v1 4/4] clk: qcom: lpasscc-sc7280: Remove qdsp6ss clock registration Date: Mon, 27 Mar 2023 22:02:49 +0530 Message-ID: <20230327163249.1081824-5-quic_mohs@quicinc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230327163249.1081824-1-quic_mohs@quicinc.com> References: <20230327163249.1081824-1-quic_mohs@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: ONDpdOYg3H39CXoKa8g2vF3aYFYqxufd X-Proofpoint-ORIG-GUID: ONDpdOYg3H39CXoKa8g2vF3aYFYqxufd X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-03-24_11,2023-03-27_02,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 phishscore=0 mlxlogscore=999 bulkscore=0 adultscore=0 clxscore=1015 mlxscore=0 spamscore=0 priorityscore=1501 malwarescore=0 impostorscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2303200000 definitions=main-2303270133 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The qdsp6ss memory region is being shared by ADSP remoteproc device and lpasscc clock device, hence causing memory conflict. As the qdsp6ss clocks are being enabled in remoteproc driver, remove the qdsp6ss clock registration. Fixes: 4ab43d171181 ("clk: qcom: Add lpass clock controller driver for SC7280") Signed-off-by: Mohammad Rafi Shaik --- drivers/clk/qcom/lpasscc-sc7280.c | 63 +------------------------------ 1 file changed, 1 insertion(+), 62 deletions(-) diff --git a/drivers/clk/qcom/lpasscc-sc7280.c b/drivers/clk/qcom/lpasscc-sc7280.c index 48432010ce24..4719e3fa8b05 100644 --- a/drivers/clk/qcom/lpasscc-sc7280.c +++ b/drivers/clk/qcom/lpasscc-sc7280.c @@ -30,48 +30,6 @@ static struct clk_branch lpass_top_cc_lpi_q6_axim_hs_clk = { }, }; -static struct clk_branch lpass_qdsp6ss_core_clk = { - .halt_reg = 0x20, - /* CLK_OFF would not toggle until LPASS is out of reset */ - .halt_check = BRANCH_HALT_SKIP, - .clkr = { - .enable_reg = 0x20, - .enable_mask = BIT(0), - .hw.init = &(struct clk_init_data){ - .name = "lpass_qdsp6ss_core_clk", - .ops = &clk_branch2_ops, - }, - }, -}; - -static struct clk_branch lpass_qdsp6ss_xo_clk = { - .halt_reg = 0x38, - /* CLK_OFF would not toggle until LPASS is out of reset */ - .halt_check = BRANCH_HALT_SKIP, - .clkr = { - .enable_reg = 0x38, - .enable_mask = BIT(0), - .hw.init = &(struct clk_init_data){ - .name = "lpass_qdsp6ss_xo_clk", - .ops = &clk_branch2_ops, - }, - }, -}; - -static struct clk_branch lpass_qdsp6ss_sleep_clk = { - .halt_reg = 0x3c, - /* CLK_OFF would not toggle until LPASS is out of reset */ - .halt_check = BRANCH_HALT_SKIP, - .clkr = { - .enable_reg = 0x3c, - .enable_mask = BIT(0), - .hw.init = &(struct clk_init_data){ - .name = "lpass_qdsp6ss_sleep_clk", - .ops = &clk_branch2_ops, - }, - }, -}; - static struct regmap_config lpass_regmap_config = { .reg_bits = 32, .reg_stride = 4, @@ -90,18 +48,6 @@ static const struct qcom_cc_desc lpass_cc_top_sc7280_desc = { .num_clks = ARRAY_SIZE(lpass_cc_top_sc7280_clocks), }; -static struct clk_regmap *lpass_qdsp6ss_sc7280_clocks[] = { - [LPASS_QDSP6SS_XO_CLK] = &lpass_qdsp6ss_xo_clk.clkr, - [LPASS_QDSP6SS_SLEEP_CLK] = &lpass_qdsp6ss_sleep_clk.clkr, - [LPASS_QDSP6SS_CORE_CLK] = &lpass_qdsp6ss_core_clk.clkr, -}; - -static const struct qcom_cc_desc lpass_qdsp6ss_sc7280_desc = { - .config = &lpass_regmap_config, - .clks = lpass_qdsp6ss_sc7280_clocks, - .num_clks = ARRAY_SIZE(lpass_qdsp6ss_sc7280_clocks), -}; - static int lpass_cc_sc7280_probe(struct platform_device *pdev) { const struct qcom_cc_desc *desc; @@ -121,17 +67,10 @@ static int lpass_cc_sc7280_probe(struct platform_device *pdev) goto destroy_pm_clk; } - lpass_regmap_config.name = "qdsp6ss"; - desc = &lpass_qdsp6ss_sc7280_desc; - - ret = qcom_cc_probe_by_index(pdev, 0, desc); - if (ret) - goto destroy_pm_clk; - lpass_regmap_config.name = "top_cc"; desc = &lpass_cc_top_sc7280_desc; - ret = qcom_cc_probe_by_index(pdev, 1, desc); + ret = qcom_cc_probe_by_index(pdev, 0, desc); if (ret) goto destroy_pm_clk;