From patchwork Mon May 27 11:27:17 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 165203 Delivered-To: patch@linaro.org Received: by 2002:a92:9e1a:0:0:0:0:0 with SMTP id q26csp7039875ili; Mon, 27 May 2019 04:27:29 -0700 (PDT) X-Google-Smtp-Source: APXvYqzBvA6l04k2DrXcBalzE7RHuZ2z+RFZ2KIMyzvrzpinsTok11ZvK8jwmgyyG9K0EwHp+vng X-Received: by 2002:a62:1846:: with SMTP id 67mr117010642pfy.33.1558956449206; Mon, 27 May 2019 04:27:29 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1558956449; cv=none; d=google.com; s=arc-20160816; b=YbCrtqRWREzYgt8/AmW/+OT7HexZKHzxmKQsPpk0QLS9JxRqARveN/lE0Z8xUTpaeh yoRyRWiklYavRkNisXa/JM51y+1Y0Ci+Lal9p6nj4e6/8mLgiPmM2OftDNy0mUjINkJy EVLpEDZfPu3V+srJUUOOT3nLZ7jLPJ0ycGAgJr4+PlPEpwbUpQlGevO5pFQMep/2l441 h05W4eB8xUBYCgaQBBuXMMOmw4/nNRlerKL+Rs7BfXbQoOEycvSlxwE0a2JAB0TJWghY hICFD30QBvf9ixs9TKXwaww8hd1a4riGxpCuAwsOZm/0UUG2xfyhvViwqkL5Vv42R7TJ NAOQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=e4u6FsMjt7h1mCBbzF7v4CGj5ydrGz7m3OWmqqT2YeQ=; b=lFop/DBlpsQpwU/pN3HwMELg5kcXVMAuV0PT3HcJ5ILemQTD5sXWseDfHKfUQBxegP XWqn0+8nx6Gzg1ua8Mi+NZH4QTvhumc7IQA7R5ul8zc0gE5sK1FPz5HNxfK5zvCkEdJ/ SYTfRAMZpMb4Ccg5leuQ0KugwFCtzcHcRS6ETAQro6+rzKBYDzsGGjYO3jjls2eYGCeN ATqaZkX7UvPxPpvTNZh9Wh+LC2f/pxxNsUCQhfvnIHutTSCdpabNvURyZ9hF9qjfyNwt mGaN/kCcKsqPrz5rdkG/CSI91DTUBuEN9kI7GB8GHOPxszMPWsqLLczAsyualSmaQ/6z 5zJQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=I9mAK54l; spf=pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-gpio-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id go17si17006924plb.357.2019.05.27.04.27.29; Mon, 27 May 2019 04:27:29 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=I9mAK54l; spf=pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-gpio-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726175AbfE0L12 (ORCPT + 5 others); Mon, 27 May 2019 07:27:28 -0400 Received: from mail-wr1-f65.google.com ([209.85.221.65]:45567 "EHLO mail-wr1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726405AbfE0L12 (ORCPT ); Mon, 27 May 2019 07:27:28 -0400 Received: by mail-wr1-f65.google.com with SMTP id b18so16547323wrq.12 for ; Mon, 27 May 2019 04:27:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=e4u6FsMjt7h1mCBbzF7v4CGj5ydrGz7m3OWmqqT2YeQ=; b=I9mAK54lsjfxBtfVgVx+UfCZ5AuAj4rEdu91KUk/42mbkyOYaJRKTY+IcGjZ0wIFAm Bn10OFQ9b3dXWOnNG5ohdDY/Dy5wSjvON2EsYDp4deuNhfh1tghQ2gMuIUWsL6wEUS69 2cqOMV4tgfEbrGN+Znr3aHUr3nmrRGcTvJt+P8IkMQlQUDdD6gFdgyToEtEe3wfARh9J gh1NCsHs2kZ04wnKApvp81FDuCfdSPEUTSfimaCXW0wykCXioIQrVyfhzoXFEfzDXh5V ej+hCnIV3Q2y4FYUxQ9uHHWef7TfQvOWcTHCKhcD7KBPYV+o/1DaxMrxZcuAzSNjpTfg NF6w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=e4u6FsMjt7h1mCBbzF7v4CGj5ydrGz7m3OWmqqT2YeQ=; b=AYe1AgR4QwT75BBZsIi/tyiZ8VlyhcGpEZhPcaLnAQQ20A8TWrSGRwVB1XcizC7fFV 5HPPhJsBKdHy2owZSqnDfD73KJj3VuibiUiVHk3nm1q+1siQLICaZOJD6OeRxqXmlTvP Z5a/FS7VpuTv8qDCZsURcmD9wyaElbhavsLFJxZ76i9iq/rTZHykkk/pB3cQuF5wxywU SkjQul9MojKDuRS3uwssq+xAqeImLPjspgzAQV2QWUdbYRy7kE5kxRE5AYiLkxPwiGUI i+1kXXtvfpU5xcsFg6OXgRb8oaTGboMcvzvujhZcVTgbi6Q6fgtKMBasivqacZ2O8CM/ +tkw== X-Gm-Message-State: APjAAAX79HK8xAiUWkANodOAnuhdC1uy97bUgPiKJuIbuge/kHP2bT6E 0HQITcTN0Xddv4vJ58Larc3ViQ== X-Received: by 2002:adf:ce03:: with SMTP id p3mr6636532wrn.94.1558956446659; Mon, 27 May 2019 04:27:26 -0700 (PDT) Received: from sudo.home ([2a01:cb1d:112:6f00:ccdd:dadc:1517:f416]) by smtp.gmail.com with ESMTPSA id l6sm9677747wmi.24.2019.05.27.04.27.25 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 27 May 2019 04:27:25 -0700 (PDT) From: Ard Biesheuvel To: linux-arm-kernel@lists.infradead.org Cc: linux-acpi@vger.kernel.org, linux-gpio@vger.kernel.org, Ard Biesheuvel , Masahisa Kojima , Linus Walleij , Marc Zyngier , Graeme Gregory , Lorenzo Pieralisi , Mika Westerberg , "Rafael J. Wysocki" , Len Brown Subject: [PATCH v3 1/4] acpi/irq: implement helper to create hierachical domains Date: Mon, 27 May 2019 13:27:17 +0200 Message-Id: <20190527112720.2266-2-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190527112720.2266-1-ard.biesheuvel@linaro.org> References: <20190527112720.2266-1-ard.biesheuvel@linaro.org> MIME-Version: 1.0 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org ACPI permits arbitrary producer->consumer interrupt links to be described in AML, which means a topology such as the following is perfectly legal: Device (EXIU) { Name (_HID, "SCX0008") Name (_UID, Zero) Name (_CRS, ResourceTemplate () { ... }) } Device (GPIO) { Name (_HID, "SCX0007") Name (_UID, Zero) Name (_CRS, ResourceTemplate () { Memory32Fixed (ReadWrite, SYNQUACER_GPIO_BASE, SYNQUACER_GPIO_SIZE) Interrupt (ResourceConsumer, Edge, ActiveHigh, ExclusiveAndWake, 0, "\\_SB.EXIU") { 7, } }) ... } The EXIU in this example is the external interrupt unit as can be found on Socionext SynQuacer based platforms, which converts a block of 32 SPIs from arbitrary polarity/trigger into level-high, with a separate set of config/mask/unmask/clear controls. The existing DT based driver in drivers/irqchip/irq-sni-exiu.c models this as a hierarchical domain stacked on top of the GIC's irqdomain. Since the GIC is modeled as a DT node as well, obtaining a reference to this irqdomain is easily done by going through the parent link. On ACPI systems, however, the GIC is not modeled as an object in the namespace, and so device objects cannot refer to it directly. So in order to obtain the irqdomain reference when driving the EXIU in ACPI mode, we need a helper that implicitly grabs the default domain for unqualified interrupts as the parent of the hierarchy. Signed-off-by: Ard Biesheuvel --- drivers/acpi/irq.c | 20 ++++++++++++++++++++ include/linux/acpi.h | 7 +++++++ 2 files changed, 27 insertions(+) -- 2.20.1 Reviewed-by: Mika Westerberg Reviewed-by: Lorenzo Pieralisi diff --git a/drivers/acpi/irq.c b/drivers/acpi/irq.c index c3b2222e2129..39824a6bbcd5 100644 --- a/drivers/acpi/irq.c +++ b/drivers/acpi/irq.c @@ -295,3 +295,23 @@ void __init acpi_set_irq_model(enum acpi_irq_model_id model, acpi_irq_model = model; acpi_gsi_domain_id = fwnode; } + +/** + * acpi_irq_create_hierarchy - Create a hierarchical IRQ domain with the default + * GSI domain as its parent. + */ +struct irq_domain *acpi_irq_create_hierarchy(unsigned int flags, + unsigned int size, + struct fwnode_handle *fwnode, + const struct irq_domain_ops *ops, + void *host_data) +{ + struct irq_domain *d = irq_find_matching_fwnode(acpi_gsi_domain_id, + DOMAIN_BUS_ANY); + + if (!d) + return NULL; + + return irq_domain_create_hierarchy(d, flags, size, fwnode, ops, + host_data); +} diff --git a/include/linux/acpi.h b/include/linux/acpi.h index 98440df7fe42..70de4bc30cea 100644 --- a/include/linux/acpi.h +++ b/include/linux/acpi.h @@ -23,6 +23,7 @@ #include #include /* for struct resource */ +#include #include #include #include @@ -327,6 +328,12 @@ int acpi_isa_irq_to_gsi (unsigned isa_irq, u32 *gsi); void acpi_set_irq_model(enum acpi_irq_model_id model, struct fwnode_handle *fwnode); +struct irq_domain *acpi_irq_create_hierarchy(unsigned int flags, + unsigned int size, + struct fwnode_handle *fwnode, + const struct irq_domain_ops *ops, + void *host_data); + #ifdef CONFIG_X86_IO_APIC extern int acpi_get_override_irq(u32 gsi, int *trigger, int *polarity); #else From patchwork Mon May 27 11:27:20 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 165206 Delivered-To: patch@linaro.org Received: by 2002:a92:9e1a:0:0:0:0:0 with SMTP id q26csp7039940ili; Mon, 27 May 2019 04:27:33 -0700 (PDT) X-Google-Smtp-Source: APXvYqylRctpMnZcpJatWqkf97/c/HPpC6uOyVjp/N5iNQvvPGMh8pq6APy8eWlSQudTJeySyMe4 X-Received: by 2002:a17:902:7581:: with SMTP id j1mr43877770pll.23.1558956453601; Mon, 27 May 2019 04:27:33 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1558956453; cv=none; d=google.com; s=arc-20160816; b=hm/b0u08Pduvdgs3UUoJUf9dQBwhqk0+pSk3BetSlMJzqZIjeNCNbiO21ZcgZLrlNh yCC9/cE7Wq4syw8WCn82qXevRsTfxsAA5Ade0yY42Qdai/sUzlisxjL2mSuvOWruNaN6 1QX/5zKpR2lqLAa6BwgMmTF1HCT6nqLA+jCkWjZDCTmXIQGDvbBzxDRn0vMBxx0ohA6+ p10pjDJEAEtSTkl6b7dlGcL88sfEuH46yTfI/yckA1CD0UISjoSXlTOTtY30zjuGJcxN beSlK6S1Anw/D4hNHJ+Yu4Hc+tAaVyYb2Nuj+rts9lmXYBfy08kMB1TSrahMlXOGgtXn F0Ag== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=e9zX2z3pSYijNeNpg5u5hKyLCBvOSleyi01zr0ij8D4=; b=p7HOLTetQIQWRx8kKE5tZASQMilFgFGOEObZErnA6SFFrJLF9Np1jeD+uQxZqRqZOd 148qXhci/v4WBdtjffcubhrZHIMVS5r+b+FRQSK6i0IV4xjiUoduRqiwNWhCntt0OJLc JDa79y4DqTxk3Be/HNah09QXGOZhdPN5Zy1xwz4p15k9LI8LqESf1daUXRqYyngYH23i 36XzLyVyrqOlJhZkH2c69nswvUy7owkpjzOoXic/RghCOrXNdlg6AllJBU++y4SXh2zK rH6xp54dX6ihAQ3rQ/ICl1DLRgafHFsHUmMrOlmK2zxpfvoj4dOQicdTsqlvRrWCgYwE TXTA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=o+5ppKL9; spf=pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-gpio-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Wysocki" , Len Brown Subject: [PATCH v3 4/4] gpio: mb86s7x: enable ACPI support Date: Mon, 27 May 2019 13:27:20 +0200 Message-Id: <20190527112720.2266-5-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190527112720.2266-1-ard.biesheuvel@linaro.org> References: <20190527112720.2266-1-ard.biesheuvel@linaro.org> MIME-Version: 1.0 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Make the mb86s7x GPIO block discoverable via ACPI. In addition, add support for ACPI GPIO interrupts routed via platform interrupts, by wiring the two together via the to_irq() gpiochip callback. Reviewed-by: Mika Westerberg Signed-off-by: Ard Biesheuvel --- drivers/gpio/gpio-mb86s7x.c | 51 +++++++++++++++++--- 1 file changed, 44 insertions(+), 7 deletions(-) -- 2.20.1 Reviewed-by: Linus Walleij diff --git a/drivers/gpio/gpio-mb86s7x.c b/drivers/gpio/gpio-mb86s7x.c index 9308081e0a4a..64027f57a8aa 100644 --- a/drivers/gpio/gpio-mb86s7x.c +++ b/drivers/gpio/gpio-mb86s7x.c @@ -14,6 +14,7 @@ * GNU General Public License for more details. */ +#include #include #include #include @@ -27,6 +28,8 @@ #include #include +#include "gpiolib.h" + /* * Only first 8bits of a register correspond to each pin, * so there are 4 registers for 32 pins. @@ -143,6 +146,20 @@ static void mb86s70_gpio_set(struct gpio_chip *gc, unsigned gpio, int value) spin_unlock_irqrestore(&gchip->lock, flags); } +static int mb86s70_gpio_to_irq(struct gpio_chip *gc, unsigned int offset) +{ + int irq, index; + + for (index = 0;; index++) { + irq = platform_get_irq(to_platform_device(gc->parent), index); + if (irq <= 0) + break; + if (irq_get_irq_data(irq)->hwirq == offset) + return irq; + } + return -EINVAL; +} + static int mb86s70_gpio_probe(struct platform_device *pdev) { struct mb86s70_gpio_chip *gchip; @@ -158,13 +175,15 @@ static int mb86s70_gpio_probe(struct platform_device *pdev) if (IS_ERR(gchip->base)) return PTR_ERR(gchip->base); - gchip->clk = devm_clk_get(&pdev->dev, NULL); - if (IS_ERR(gchip->clk)) - return PTR_ERR(gchip->clk); + if (!has_acpi_companion(&pdev->dev)) { + gchip->clk = devm_clk_get(&pdev->dev, NULL); + if (IS_ERR(gchip->clk)) + return PTR_ERR(gchip->clk); - ret = clk_prepare_enable(gchip->clk); - if (ret) - return ret; + ret = clk_prepare_enable(gchip->clk); + if (ret) + return ret; + } spin_lock_init(&gchip->lock); @@ -180,19 +199,28 @@ static int mb86s70_gpio_probe(struct platform_device *pdev) gchip->gc.parent = &pdev->dev; gchip->gc.base = -1; + if (has_acpi_companion(&pdev->dev)) + gchip->gc.to_irq = mb86s70_gpio_to_irq; + ret = gpiochip_add_data(&gchip->gc, gchip); if (ret) { dev_err(&pdev->dev, "couldn't register gpio driver\n"); clk_disable_unprepare(gchip->clk); + return ret; } - return ret; + if (has_acpi_companion(&pdev->dev)) + acpi_gpiochip_request_interrupts(&gchip->gc); + + return 0; } static int mb86s70_gpio_remove(struct platform_device *pdev) { struct mb86s70_gpio_chip *gchip = platform_get_drvdata(pdev); + if (has_acpi_companion(&pdev->dev)) + acpi_gpiochip_free_interrupts(&gchip->gc); gpiochip_remove(&gchip->gc); clk_disable_unprepare(gchip->clk); @@ -205,10 +233,19 @@ static const struct of_device_id mb86s70_gpio_dt_ids[] = { }; MODULE_DEVICE_TABLE(of, mb86s70_gpio_dt_ids); +#ifdef CONFIG_ACPI +static const struct acpi_device_id mb86s70_gpio_acpi_ids[] = { + { "SCX0007" }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(acpi, mb86s70_gpio_acpi_ids); +#endif + static struct platform_driver mb86s70_gpio_driver = { .driver = { .name = "mb86s70-gpio", .of_match_table = mb86s70_gpio_dt_ids, + .acpi_match_table = ACPI_PTR(mb86s70_gpio_acpi_ids), }, .probe = mb86s70_gpio_probe, .remove = mb86s70_gpio_remove,