From patchwork Mon Apr 10 20:00:11 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 672581 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5D657C77B75 for ; Mon, 10 Apr 2023 20:00:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229789AbjDJUAX (ORCPT ); Mon, 10 Apr 2023 16:00:23 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40678 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229804AbjDJUAV (ORCPT ); Mon, 10 Apr 2023 16:00:21 -0400 Received: from mail-lj1-x230.google.com (mail-lj1-x230.google.com [IPv6:2a00:1450:4864:20::230]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 758A01FCE for ; Mon, 10 Apr 2023 13:00:18 -0700 (PDT) Received: by mail-lj1-x230.google.com with SMTP id e20so6108953lji.6 for ; Mon, 10 Apr 2023 13:00:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1681156816; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=TKRal6B5cFjvfNLZnlDYPlfZqeycJ2Ag6YtWR3USaN4=; b=P0iaqi+sXRHVJpVW5FVejsNal4iFABhX3Kbx0GLK9SUxiLP86eIWpa8KyXXf4RRsqz GplydGpC3R2YNJSs7MZbLy4bDn6uZdGf+FAUSLNpdCvm3bditKBymkzH0fT2lU/AB4pM 88jyrJ+EGkhdr2eTpYA2qvic581BXXSk7lNoj0+0S7esKQa0ChBXqMoz0Ab3fhP3O86w IIGhkUvQh9qe2+39e9Dt5Gp59wEsZb7Nx6TwQAOwDNIeKQMS1fvek9+ibCdeQITGjtNp hlJrZy+h/5KHSFKZwQGrEX0/Ec/viyzLCgwBWIlxAb2cef7W2ZHYBYX9yQnYGtbCmSR6 D8qw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1681156816; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=TKRal6B5cFjvfNLZnlDYPlfZqeycJ2Ag6YtWR3USaN4=; b=iKkc15AHXp9i1N8mrXBFauRukHMBh4Z0MyF/nwPjHK28RM6VVYKCdxRd80g/2DBe1E xjngYcZ/Ow+jGIpzFDa5Yu8F7vRkDvs5t2l8NQKQYyy+uecos2hzQ5dTxAWT2j3r89MG NWD6ZZ49XqO9V+T28U5AEK2a5xiazx9+l6atO8zF4EAei7y+pPx6CofW14G2dXjEKESi XXcoe8BmE5DCsc+yAin7Mb8J3SXYynwWOfIWGn2RbxgPIVnKdx4TxbwpxHnzILtAgRgA BNGEUmvfabvvJ3/tywsySATr3Z308YHsRqdodEhQbXYeC7f2srln+JvdimSA7CFDFRFi GMhQ== X-Gm-Message-State: AAQBX9cQb4g7TDc/jXjRJ2FEirLWkuCxA/N6nZnxzNMLtSgvGFIOL2KK SQoU6r3DGCG9xgMFdrpi2XruFw== X-Google-Smtp-Source: AKy350Z6dxIZttINfw9deC1gaWfo9qG334+O8ZJFx4QOD1I5Nh9pg6hyE9Bb754U2Z8a7GVFprId8g== X-Received: by 2002:a2e:7015:0:b0:2a7:8a2e:3891 with SMTP id l21-20020a2e7015000000b002a78a2e3891mr68026ljc.43.1681156816640; Mon, 10 Apr 2023 13:00:16 -0700 (PDT) Received: from umbar.unikie.fi ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id z2-20020a2e8e82000000b002a7729eea3dsm973482ljk.88.2023.04.10.13.00.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 10 Apr 2023 13:00:16 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Georgi Djakov , Rob Herring , Krzysztof Kozlowski Cc: Yassine Oudjana , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, Krzysztof Kozlowski Subject: [PATCH v5 1/4] dt-bindings: interconnect/msm8996-cbf: add defines to be used by CBF Date: Mon, 10 Apr 2023 23:00:11 +0300 Message-Id: <20230410200014.432418-2-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20230410200014.432418-1-dmitry.baryshkov@linaro.org> References: <20230410200014.432418-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org On msm8996 CBF interconnects power and performance CPU clusters. Add corresponding interconnect defines to be used in device trees. Acked-by: Krzysztof Kozlowski Signed-off-by: Dmitry Baryshkov --- include/dt-bindings/interconnect/qcom,msm8996-cbf.h | 12 ++++++++++++ 1 file changed, 12 insertions(+) create mode 100644 include/dt-bindings/interconnect/qcom,msm8996-cbf.h diff --git a/include/dt-bindings/interconnect/qcom,msm8996-cbf.h b/include/dt-bindings/interconnect/qcom,msm8996-cbf.h new file mode 100644 index 000000000000..aac5e69f6bd5 --- /dev/null +++ b/include/dt-bindings/interconnect/qcom,msm8996-cbf.h @@ -0,0 +1,12 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ +/* + * Copyright (C) 2023 Linaro Ltd. All rights reserved. + */ + +#ifndef __DT_BINDINGS_INTERCONNECT_QCOM_MSM8996_CBF_H +#define __DT_BINDINGS_INTERCONNECT_QCOM_MSM8996_CBF_H + +#define MASTER_CBF_M4M 0 +#define SLAVE_CBF_M4M 1 + +#endif From patchwork Mon Apr 10 20:00:12 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 672580 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9CE5DC77B61 for ; Mon, 10 Apr 2023 20:00:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229827AbjDJUAY (ORCPT ); Mon, 10 Apr 2023 16:00:24 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40716 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229814AbjDJUAW (ORCPT ); Mon, 10 Apr 2023 16:00:22 -0400 Received: from mail-lj1-x234.google.com (mail-lj1-x234.google.com [IPv6:2a00:1450:4864:20::234]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5F6401FDD for ; Mon, 10 Apr 2023 13:00:19 -0700 (PDT) Received: by mail-lj1-x234.google.com with SMTP id q15so2680611ljp.5 for ; Mon, 10 Apr 2023 13:00:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1681156817; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=PKmjFE2HtWohin9kxgOPiueeSHMo67vsdwgEdddjDs0=; b=o/iGEuJFDfe+kganhwAuNdt6X+FutLQ0zOaKoGcV5P2PvxtMehmX4gq3h3471uS6XJ khsgM0dhpcNBI/r4B34KlEGcYQENxT79ulXef5luFo6twYlMHe1IdwEW3Pqq1b5s4oOZ VT3Uxwck94OVMVdZZf1iUhFY6UvevX2cEuzngU+vR3WYQ6ZpAIXcBdqjr9RbIMR98+wl pJIy6pVPVBXz71jLUFmtqRLLDYMrRO+NSsUytuCI7VPkVf268kfEbgYkcFdCSsdICQZ1 WQ9IgWedfZVOLlFgIyzf1t120Z6oHCkH8SDo/t1iVrLNxgIiYbtNnxR3pCTyLv8R1447 qifQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1681156817; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=PKmjFE2HtWohin9kxgOPiueeSHMo67vsdwgEdddjDs0=; b=7gKlzJ+Q5YndPEDrPWnDfz7dhY8LrFilZgID20efWTRPMA8AGCGrZ6IHK85v++CVH7 rAGpMZxrFvY4u9/5AbYGUvIdPdzN0A8BGwaObBbPbd2ixj8auZH041Vqghj9m8lp6b3E PE2BNLirNbQDlJCmDI86T11fLwMURSnM997LIVtg3FO5i/HrM12PxtVuWwdJ92G4LiwU gdUgFbfjuKNiOzqnnFag9UGCcfMU7yvxPyJRsIeqWv5ax2FQkTZFZctq1WevMXr7XQuU zjVJJuefa1rkS45EVsVYIggbE/qoOyDywwm1JjnkQDonjskfuwXJy5KzDVzlCj0dkAjM fbiA== X-Gm-Message-State: AAQBX9ej51WSDzCNXKdv5OGXG9N/sjA5mjtzXrcBEkneepBnvwurbuNu +S71xKYETfXbyBCJzBFMkqJaenQNOcbPFXhFiCA= X-Google-Smtp-Source: AKy350aXPgBLGmXGG0T2wx80lrUREkRJcYFdNpPklRDF2gScOTuZIP3gESBeeOlcltkINi4MKLXzIw== X-Received: by 2002:a2e:b0c7:0:b0:2a7:8301:a977 with SMTP id g7-20020a2eb0c7000000b002a78301a977mr662435ljl.49.1681156817362; Mon, 10 Apr 2023 13:00:17 -0700 (PDT) Received: from umbar.unikie.fi ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id z2-20020a2e8e82000000b002a7729eea3dsm973482ljk.88.2023.04.10.13.00.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 10 Apr 2023 13:00:16 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Georgi Djakov , Rob Herring , Krzysztof Kozlowski Cc: Yassine Oudjana , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v5 2/4] interconnect: add clk-based icc provider support Date: Mon, 10 Apr 2023 23:00:12 +0300 Message-Id: <20230410200014.432418-3-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20230410200014.432418-1-dmitry.baryshkov@linaro.org> References: <20230410200014.432418-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org For some devices it is useful to export clocks as interconnect providers, if the clock corresponds to bus bandwidth. For example, on MSM8996 the cluster interconnect clock should be scaled according to the cluster frequencies. Exporting it as an interconnect allows one to properly describe this as the cluster bandwidth requirements. Signed-off-by: Dmitry Baryshkov --- drivers/interconnect/Kconfig | 6 ++ drivers/interconnect/Makefile | 2 + drivers/interconnect/icc-clk.c | 168 +++++++++++++++++++++++++++++++ include/linux/interconnect-clk.h | 22 ++++ 4 files changed, 198 insertions(+) create mode 100644 drivers/interconnect/icc-clk.c create mode 100644 include/linux/interconnect-clk.h diff --git a/drivers/interconnect/Kconfig b/drivers/interconnect/Kconfig index d637a89d4695..5faa8d2aecff 100644 --- a/drivers/interconnect/Kconfig +++ b/drivers/interconnect/Kconfig @@ -15,4 +15,10 @@ source "drivers/interconnect/imx/Kconfig" source "drivers/interconnect/qcom/Kconfig" source "drivers/interconnect/samsung/Kconfig" +config INTERCONNECT_CLK + tristate + depends on COMMON_CLK + help + Support for wrapping clocks into the interconnect nodes. + endif diff --git a/drivers/interconnect/Makefile b/drivers/interconnect/Makefile index 97d393fd638d..5604ce351a9f 100644 --- a/drivers/interconnect/Makefile +++ b/drivers/interconnect/Makefile @@ -7,3 +7,5 @@ obj-$(CONFIG_INTERCONNECT) += icc-core.o obj-$(CONFIG_INTERCONNECT_IMX) += imx/ obj-$(CONFIG_INTERCONNECT_QCOM) += qcom/ obj-$(CONFIG_INTERCONNECT_SAMSUNG) += samsung/ + +obj-$(CONFIG_INTERCONNECT_CLK) += icc-clk.o diff --git a/drivers/interconnect/icc-clk.c b/drivers/interconnect/icc-clk.c new file mode 100644 index 000000000000..0db3b654548b --- /dev/null +++ b/drivers/interconnect/icc-clk.c @@ -0,0 +1,168 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2023, Linaro Ltd. + */ + +#include +#include +#include +#include + +struct icc_clk_node { + struct clk *clk; + bool enabled; +}; + +struct icc_clk_provider { + struct icc_provider provider; + int num_clocks; + struct icc_clk_node clocks[]; +}; + +#define to_icc_clk_provider(_provider) \ + container_of(_provider, struct icc_clk_provider, provider) + +static int icc_clk_set(struct icc_node *src, struct icc_node *dst) +{ + struct icc_clk_node *qn = src->data; + int ret; + + if (!qn || !qn->clk) + return 0; + + if (!src->peak_bw) { + if (qn->enabled) + clk_disable_unprepare(qn->clk); + qn->enabled = false; + + return 0; + } + + if (!qn->enabled) { + ret = clk_prepare_enable(qn->clk); + if (ret) + return ret; + qn->enabled = true; + } + + return clk_set_rate(qn->clk, icc_units_to_bps(src->peak_bw)); +} + +static int icc_clk_get_bw(struct icc_node *node, u32 *avg, u32 *peak) +{ + struct icc_clk_node *qn = node->data; + + if (!qn || !qn->clk) + *peak = INT_MAX; + else + *peak = Bps_to_icc(clk_get_rate(qn->clk)); + + return 0; +} + +/** + * icc_clk_register() - register a new clk-based interconnect provider + * @dev: device supporting this provider + * @first_id: an ID of the first provider's node + * @num_clocks: number of instances of struct icc_clk_data + * @data: data for the provider + * + * Registers and returns a clk-based interconnect provider. It is a simple + * wrapper around COMMON_CLK framework, allowing other devices to vote on the + * clock rate. + * + * Return: 0 on success, or an error code otherwise + */ +struct icc_provider *icc_clk_register(struct device *dev, + unsigned int first_id, + unsigned int num_clocks, + const struct icc_clk_data *data) +{ + struct icc_clk_provider *qp; + struct icc_provider *provider; + struct icc_onecell_data *onecell; + struct icc_node *node; + int ret, i, j; + + onecell = devm_kzalloc(dev, struct_size(onecell, nodes, 2 * num_clocks), GFP_KERNEL); + if (!onecell) + return ERR_PTR(-ENOMEM); + + qp = devm_kzalloc(dev, struct_size(qp, clocks, num_clocks), GFP_KERNEL); + if (!qp) + return ERR_PTR(-ENOMEM); + + qp->num_clocks = num_clocks; + + provider = &qp->provider; + provider->dev = dev; + provider->get_bw = icc_clk_get_bw; + provider->set = icc_clk_set; + provider->aggregate = icc_std_aggregate; + provider->xlate = of_icc_xlate_onecell; + INIT_LIST_HEAD(&provider->nodes); + provider->data = onecell; + + icc_provider_init(provider); + + for (i = 0, j = 0; i < num_clocks; i++) { + qp->clocks[i].clk = data[i].clk; + + node = icc_node_create(first_id + j); + if (IS_ERR(node)) { + ret = PTR_ERR(node); + goto err; + } + + node->name = devm_kasprintf(dev, GFP_KERNEL, "%s_master", data[i].name); + node->data = &qp->clocks[i]; + icc_node_add(node, provider); + /* link to the next node, slave */ + icc_link_create(node, first_id + j + 1); + onecell->nodes[j++] = node; + + node = icc_node_create(first_id + j); + if (IS_ERR(node)) { + ret = PTR_ERR(node); + goto err; + } + + node->name = devm_kasprintf(dev, GFP_KERNEL, "%s_slave", data[i].name); + /* no data for slave node */ + icc_node_add(node, provider); + onecell->nodes[j++] = node; + } + + onecell->num_nodes = j; + + ret = icc_provider_register(provider); + if (ret) + goto err; + + return provider; + +err: + icc_nodes_remove(provider); + + return ERR_PTR(ret); +} + +/** + * icc_clk_unregister() - unregister a previously registered clk interconnect provider + * @provider: provider returned by icc_clk_register() + */ +void icc_clk_unregister(struct icc_provider *provider) +{ + struct icc_clk_provider *qp = container_of(provider, struct icc_clk_provider, provider); + int i; + + icc_provider_deregister(&qp->provider); + icc_nodes_remove(&qp->provider); + + for (i = 0; i < qp->num_clocks; i++) { + struct icc_clk_node *qn = &qp->clocks[i]; + + if (qn->enabled) + clk_disable_unprepare(qn->clk); + } +} diff --git a/include/linux/interconnect-clk.h b/include/linux/interconnect-clk.h new file mode 100644 index 000000000000..0cd80112bea5 --- /dev/null +++ b/include/linux/interconnect-clk.h @@ -0,0 +1,22 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2023, Linaro Ltd. + */ + +#ifndef __LINUX_INTERCONNECT_CLK_H +#define __LINUX_INTERCONNECT_CLK_H + +struct device; + +struct icc_clk_data { + struct clk *clk; + const char *name; +}; + +struct icc_provider *icc_clk_register(struct device *dev, + unsigned int first_id, + unsigned int num_clocks, + const struct icc_clk_data *data); +void icc_clk_unregister(struct icc_provider *provider); + +#endif From patchwork Mon Apr 10 20:00:13 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 672242 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 14A33C77B78 for ; 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Mon, 10 Apr 2023 13:00:17 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Georgi Djakov , Rob Herring , Krzysztof Kozlowski Cc: Yassine Oudjana , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v5 3/4] clk: qcom: cbf-msm8996: scale CBF clock according to the CPUfreq Date: Mon, 10 Apr 2023 23:00:13 +0300 Message-Id: <20230410200014.432418-4-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20230410200014.432418-1-dmitry.baryshkov@linaro.org> References: <20230410200014.432418-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org Turn CBF into the interconnect provider. Scale CBF frequency (bandwidth) according to CPU frequencies. Signed-off-by: Dmitry Baryshkov Reviewed-by: Konrad Dybcio --- drivers/clk/qcom/Kconfig | 1 + drivers/clk/qcom/clk-cbf-8996.c | 59 ++++++++++++++++++++++++++++++++- 2 files changed, 59 insertions(+), 1 deletion(-) diff --git a/drivers/clk/qcom/Kconfig b/drivers/clk/qcom/Kconfig index 449bc8314d21..475f4997d79f 100644 --- a/drivers/clk/qcom/Kconfig +++ b/drivers/clk/qcom/Kconfig @@ -48,6 +48,7 @@ config QCOM_CLK_APCS_MSM8916 config QCOM_CLK_APCC_MSM8996 tristate "MSM8996 CPU Clock Controller" select QCOM_KRYO_L2_ACCESSORS + select INTERCONNECT_CLK if INTERCONNECT depends on ARM64 help Support for the CPU clock controller on msm8996 devices. diff --git a/drivers/clk/qcom/clk-cbf-8996.c b/drivers/clk/qcom/clk-cbf-8996.c index cfd567636f4e..1bb2cd956d68 100644 --- a/drivers/clk/qcom/clk-cbf-8996.c +++ b/drivers/clk/qcom/clk-cbf-8996.c @@ -5,11 +5,15 @@ #include #include #include +#include +#include #include #include #include #include +#include + #include "clk-alpha-pll.h" #include "clk-regmap.h" @@ -223,6 +227,48 @@ static const struct regmap_config cbf_msm8996_regmap_config = { .val_format_endian = REGMAP_ENDIAN_LITTLE, }; +#ifdef CONFIG_INTERCONNECT + +/* Random ID that doesn't clash with main qnoc and OSM */ +#define CBF_MASTER_NODE 2000 + +static int qcom_msm8996_cbf_icc_register(struct platform_device *pdev, struct clk_hw *cbf_hw) +{ + struct device *dev = &pdev->dev; + struct clk *clk = devm_clk_hw_get_clk(dev, cbf_hw, "cbf"); + const struct icc_clk_data data[] = { + { .clk = clk, .name = "cbf", }, + }; + struct icc_provider *provider; + + provider = icc_clk_register(dev, CBF_MASTER_NODE, ARRAY_SIZE(data), data); + if (IS_ERR(provider)) + return PTR_ERR(provider); + + platform_set_drvdata(pdev, provider); + + return 0; +} + +static int qcom_msm8996_cbf_icc_remove(struct platform_device *pdev) +{ + struct icc_provider *provider = platform_get_drvdata(pdev); + + icc_clk_unregister(provider); + + return 0; +} +#else +static int qcom_msm8996_cbf_icc_register(struct platform_device *pdev, struct clk_hw *cbf_hw) +{ + dev_warn(&pdev->dev, "interconnects support is disabled, CBF clock is fixed\n"); + + return 0; +} +#define qcom_msm8996_cbf_icc_remove(pdev) (0) +#define qcom_msm8996_cbf_icc_sync_state(dev) (0) +#endif + static int qcom_msm8996_cbf_probe(struct platform_device *pdev) { void __iomem *base; @@ -281,7 +327,16 @@ static int qcom_msm8996_cbf_probe(struct platform_device *pdev) if (ret) return ret; - return devm_of_clk_add_hw_provider(dev, of_clk_hw_simple_get, &cbf_mux.clkr.hw); + ret = devm_of_clk_add_hw_provider(dev, of_clk_hw_simple_get, &cbf_mux.clkr.hw); + if (ret) + return ret; + + return qcom_msm8996_cbf_icc_register(pdev, &cbf_mux.clkr.hw); +} + +static int qcom_msm8996_cbf_remove(struct platform_device *pdev) +{ + return qcom_msm8996_cbf_icc_remove(pdev); } static const struct of_device_id qcom_msm8996_cbf_match_table[] = { @@ -292,9 +347,11 @@ MODULE_DEVICE_TABLE(of, qcom_msm8996_cbf_match_table); static struct platform_driver qcom_msm8996_cbf_driver = { .probe = qcom_msm8996_cbf_probe, + .remove = qcom_msm8996_cbf_remove, .driver = { .name = "qcom-msm8996-cbf", .of_match_table = qcom_msm8996_cbf_match_table, + .sync_state = icc_sync_state, }, }; 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Mon, 10 Apr 2023 13:00:18 -0700 (PDT) Received: from umbar.unikie.fi ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id z2-20020a2e8e82000000b002a7729eea3dsm973482ljk.88.2023.04.10.13.00.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 10 Apr 2023 13:00:18 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Georgi Djakov , Rob Herring , Krzysztof Kozlowski Cc: Yassine Oudjana , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v5 4/4] arm64: dts: qcom: msm8996: scale CBF clock according to the CPUfreq Date: Mon, 10 Apr 2023 23:00:14 +0300 Message-Id: <20230410200014.432418-5-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20230410200014.432418-1-dmitry.baryshkov@linaro.org> References: <20230410200014.432418-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org Turn CBF into the interconnect provider. Scale CBF frequency (bandwidth) according to CPU frequencies. Reviewed-by: Konrad Dybcio Signed-off-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/msm8996.dtsi | 51 +++++++++++++++++++++++++++ 1 file changed, 51 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index 4661a556772e..7c65e9955365 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -8,6 +8,7 @@ #include #include #include +#include #include #include #include @@ -49,6 +50,7 @@ CPU0: cpu@0 { cpu-idle-states = <&CPU_SLEEP_0>; capacity-dmips-mhz = <1024>; clocks = <&kryocc 0>; + interconnects = <&cbf MASTER_CBF_M4M &cbf SLAVE_CBF_M4M>; operating-points-v2 = <&cluster0_opp>; #cooling-cells = <2>; next-level-cache = <&L2_0>; @@ -66,6 +68,7 @@ CPU1: cpu@1 { cpu-idle-states = <&CPU_SLEEP_0>; capacity-dmips-mhz = <1024>; clocks = <&kryocc 0>; + interconnects = <&cbf MASTER_CBF_M4M &cbf SLAVE_CBF_M4M>; operating-points-v2 = <&cluster0_opp>; #cooling-cells = <2>; next-level-cache = <&L2_0>; @@ -79,6 +82,7 @@ CPU2: cpu@100 { cpu-idle-states = <&CPU_SLEEP_0>; capacity-dmips-mhz = <1024>; clocks = <&kryocc 1>; + interconnects = <&cbf MASTER_CBF_M4M &cbf SLAVE_CBF_M4M>; operating-points-v2 = <&cluster1_opp>; #cooling-cells = <2>; next-level-cache = <&L2_1>; @@ -96,6 +100,7 @@ CPU3: cpu@101 { cpu-idle-states = <&CPU_SLEEP_0>; capacity-dmips-mhz = <1024>; clocks = <&kryocc 1>; + interconnects = <&cbf MASTER_CBF_M4M &cbf SLAVE_CBF_M4M>; operating-points-v2 = <&cluster1_opp>; #cooling-cells = <2>; next-level-cache = <&L2_1>; @@ -147,91 +152,109 @@ opp-307200000 { opp-hz = /bits/ 64 <307200000>; opp-supported-hw = <0xf>; clock-latency-ns = <200000>; + opp-peak-kBps = <307200>; }; opp-422400000 { opp-hz = /bits/ 64 <422400000>; opp-supported-hw = <0xf>; clock-latency-ns = <200000>; + opp-peak-kBps = <307200>; }; opp-480000000 { opp-hz = /bits/ 64 <480000000>; opp-supported-hw = <0xf>; clock-latency-ns = <200000>; + opp-peak-kBps = <307200>; }; opp-556800000 { opp-hz = /bits/ 64 <556800000>; opp-supported-hw = <0xf>; clock-latency-ns = <200000>; + opp-peak-kBps = <307200>; }; opp-652800000 { opp-hz = /bits/ 64 <652800000>; opp-supported-hw = <0xf>; clock-latency-ns = <200000>; + opp-peak-kBps = <384000>; }; opp-729600000 { opp-hz = /bits/ 64 <729600000>; opp-supported-hw = <0xf>; clock-latency-ns = <200000>; + opp-peak-kBps = <460800>; }; opp-844800000 { opp-hz = /bits/ 64 <844800000>; opp-supported-hw = <0xf>; clock-latency-ns = <200000>; + opp-peak-kBps = <537600>; }; opp-960000000 { opp-hz = /bits/ 64 <960000000>; opp-supported-hw = <0xf>; clock-latency-ns = <200000>; + opp-peak-kBps = <672000>; }; opp-1036800000 { opp-hz = /bits/ 64 <1036800000>; opp-supported-hw = <0xf>; clock-latency-ns = <200000>; + opp-peak-kBps = <672000>; }; opp-1113600000 { opp-hz = /bits/ 64 <1113600000>; opp-supported-hw = <0xf>; clock-latency-ns = <200000>; + opp-peak-kBps = <825600>; }; opp-1190400000 { opp-hz = /bits/ 64 <1190400000>; opp-supported-hw = <0xf>; clock-latency-ns = <200000>; + opp-peak-kBps = <825600>; }; opp-1228800000 { opp-hz = /bits/ 64 <1228800000>; opp-supported-hw = <0xf>; clock-latency-ns = <200000>; + opp-peak-kBps = <902400>; }; opp-1324800000 { opp-hz = /bits/ 64 <1324800000>; opp-supported-hw = <0xd>; clock-latency-ns = <200000>; + opp-peak-kBps = <1056000>; }; opp-1363200000 { opp-hz = /bits/ 64 <1363200000>; opp-supported-hw = <0x2>; clock-latency-ns = <200000>; + opp-peak-kBps = <1132800>; }; opp-1401600000 { opp-hz = /bits/ 64 <1401600000>; opp-supported-hw = <0xd>; clock-latency-ns = <200000>; + opp-peak-kBps = <1132800>; }; opp-1478400000 { opp-hz = /bits/ 64 <1478400000>; opp-supported-hw = <0x9>; clock-latency-ns = <200000>; + opp-peak-kBps = <1190400>; }; opp-1497600000 { opp-hz = /bits/ 64 <1497600000>; opp-supported-hw = <0x04>; clock-latency-ns = <200000>; + opp-peak-kBps = <1305600>; }; opp-1593600000 { opp-hz = /bits/ 64 <1593600000>; opp-supported-hw = <0x9>; clock-latency-ns = <200000>; + opp-peak-kBps = <1382400>; }; }; @@ -245,136 +268,163 @@ opp-307200000 { opp-hz = /bits/ 64 <307200000>; opp-supported-hw = <0xf>; clock-latency-ns = <200000>; + opp-peak-kBps = <307200>; }; opp-403200000 { opp-hz = /bits/ 64 <403200000>; opp-supported-hw = <0xf>; clock-latency-ns = <200000>; + opp-peak-kBps = <307200>; }; opp-480000000 { opp-hz = /bits/ 64 <480000000>; opp-supported-hw = <0xf>; clock-latency-ns = <200000>; + opp-peak-kBps = <307200>; }; opp-556800000 { opp-hz = /bits/ 64 <556800000>; opp-supported-hw = <0xf>; clock-latency-ns = <200000>; + opp-peak-kBps = <307200>; }; opp-652800000 { opp-hz = /bits/ 64 <652800000>; opp-supported-hw = <0xf>; clock-latency-ns = <200000>; + opp-peak-kBps = <307200>; }; opp-729600000 { opp-hz = /bits/ 64 <729600000>; opp-supported-hw = <0xf>; clock-latency-ns = <200000>; + opp-peak-kBps = <307200>; }; opp-806400000 { opp-hz = /bits/ 64 <806400000>; opp-supported-hw = <0xf>; clock-latency-ns = <200000>; + opp-peak-kBps = <384000>; }; opp-883200000 { opp-hz = /bits/ 64 <883200000>; opp-supported-hw = <0xf>; clock-latency-ns = <200000>; + opp-peak-kBps = <460800>; }; opp-940800000 { opp-hz = /bits/ 64 <940800000>; opp-supported-hw = <0xf>; clock-latency-ns = <200000>; + opp-peak-kBps = <537600>; }; opp-1036800000 { opp-hz = /bits/ 64 <1036800000>; opp-supported-hw = <0xf>; clock-latency-ns = <200000>; + opp-peak-kBps = <595200>; }; opp-1113600000 { opp-hz = /bits/ 64 <1113600000>; opp-supported-hw = <0xf>; clock-latency-ns = <200000>; + opp-peak-kBps = <672000>; }; opp-1190400000 { opp-hz = /bits/ 64 <1190400000>; opp-supported-hw = <0xf>; clock-latency-ns = <200000>; + opp-peak-kBps = <672000>; }; opp-1248000000 { opp-hz = /bits/ 64 <1248000000>; opp-supported-hw = <0xf>; clock-latency-ns = <200000>; + opp-peak-kBps = <748800>; }; opp-1324800000 { opp-hz = /bits/ 64 <1324800000>; opp-supported-hw = <0xf>; clock-latency-ns = <200000>; + opp-peak-kBps = <825600>; }; opp-1401600000 { opp-hz = /bits/ 64 <1401600000>; opp-supported-hw = <0xf>; clock-latency-ns = <200000>; + opp-peak-kBps = <902400>; }; opp-1478400000 { opp-hz = /bits/ 64 <1478400000>; opp-supported-hw = <0xf>; clock-latency-ns = <200000>; + opp-peak-kBps = <979200>; }; opp-1555200000 { opp-hz = /bits/ 64 <1555200000>; opp-supported-hw = <0xf>; clock-latency-ns = <200000>; + opp-peak-kBps = <1056000>; }; opp-1632000000 { opp-hz = /bits/ 64 <1632000000>; opp-supported-hw = <0xf>; clock-latency-ns = <200000>; + opp-peak-kBps = <1190400>; }; opp-1708800000 { opp-hz = /bits/ 64 <1708800000>; opp-supported-hw = <0xf>; clock-latency-ns = <200000>; + opp-peak-kBps = <1228800>; }; opp-1785600000 { opp-hz = /bits/ 64 <1785600000>; opp-supported-hw = <0xf>; clock-latency-ns = <200000>; + opp-peak-kBps = <1305600>; }; opp-1804800000 { opp-hz = /bits/ 64 <1804800000>; opp-supported-hw = <0xe>; clock-latency-ns = <200000>; + opp-peak-kBps = <1305600>; }; opp-1824000000 { opp-hz = /bits/ 64 <1824000000>; opp-supported-hw = <0x1>; clock-latency-ns = <200000>; + opp-peak-kBps = <1382400>; }; opp-1900800000 { opp-hz = /bits/ 64 <1900800000>; opp-supported-hw = <0x4>; clock-latency-ns = <200000>; + opp-peak-kBps = <1305600>; }; opp-1920000000 { opp-hz = /bits/ 64 <1920000000>; opp-supported-hw = <0x1>; clock-latency-ns = <200000>; + opp-peak-kBps = <1459200>; }; opp-1996800000 { opp-hz = /bits/ 64 <1996800000>; opp-supported-hw = <0x1>; clock-latency-ns = <200000>; + opp-peak-kBps = <1593600>; }; opp-2073600000 { opp-hz = /bits/ 64 <2073600000>; opp-supported-hw = <0x1>; clock-latency-ns = <200000>; + opp-peak-kBps = <1593600>; }; opp-2150400000 { opp-hz = /bits/ 64 <2150400000>; opp-supported-hw = <0x1>; clock-latency-ns = <200000>; + opp-peak-kBps = <1593600>; }; }; @@ -3550,6 +3600,7 @@ cbf: clock-controller@9a11000 { reg = <0x09a11000 0x10000>; clocks = <&rpmcc RPM_SMD_XO_A_CLK_SRC>, <&apcs_glb>; #clock-cells = <0>; + #interconnect-cells = <1>; }; intc: interrupt-controller@9bc0000 {