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[31.182.201.26]) by smtp.gmail.com with ESMTPSA id 15-20020a2eb2cf000000b002a76e2dedbcsm828684ljz.139.2023.04.14.07.02.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 14 Apr 2023 07:02:42 -0700 (PDT) From: =?utf-8?q?Pawe=C5=82_Anikiel?= To: alsa-devel@alsa-project.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, lgirdwood@gmail.com, broonie@kernel.org Cc: perex@perex.cz, tiwai@suse.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, dinguyen@kernel.org, lars@metafoo.de, nuno.sa@analog.com, upstream@semihalf.com, =?utf-8?q?Pawe=C5=82_Anikiel?= Subject: [PATCH 1/9] ASoC: Add Chameleon v3 audio Date: Fri, 14 Apr 2023 16:01:55 +0200 Message-ID: <20230414140203.707729-2-pan@semihalf.com> X-Mailer: git-send-email 2.40.0.634.g4ca3ef3211-goog In-Reply-To: <20230414140203.707729-1-pan@semihalf.com> References: <20230414140203.707729-1-pan@semihalf.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add machine and platform drivers for ASoC audio on Chameleon v3. The board has two audio sources: HDMI audio from the it68051 chip (RX only), and analog audio from the ssm2603 chip (RX and TX). Signed-off-by: Paweł Anikiel --- .../boot/dts/socfpga_arria10_chameleonv3.dts | 28 ++ sound/soc/Kconfig | 1 + sound/soc/Makefile | 1 + sound/soc/chameleonv3/Kconfig | 7 + sound/soc/chameleonv3/Makefile | 2 + sound/soc/chameleonv3/chv3-audio.c | 111 ++++++ sound/soc/chameleonv3/chv3-i2s.c | 347 ++++++++++++++++++ sound/soc/chameleonv3/chv3-it68051.c | 41 +++ 8 files changed, 538 insertions(+) create mode 100644 sound/soc/chameleonv3/Kconfig create mode 100644 sound/soc/chameleonv3/Makefile create mode 100644 sound/soc/chameleonv3/chv3-audio.c create mode 100644 sound/soc/chameleonv3/chv3-i2s.c create mode 100644 sound/soc/chameleonv3/chv3-it68051.c diff --git a/arch/arm/boot/dts/socfpga_arria10_chameleonv3.dts b/arch/arm/boot/dts/socfpga_arria10_chameleonv3.dts index 422d00cd4c74..c75f41058196 100644 --- a/arch/arm/boot/dts/socfpga_arria10_chameleonv3.dts +++ b/arch/arm/boot/dts/socfpga_arria10_chameleonv3.dts @@ -15,6 +15,34 @@ aliases { i2c0 = &i2c0; i2c1 = &i2c1; }; + + soc { + i2s0: i2s@c0060300 { + compatible = "google,chv3-i2s"; + reg = <0xc0060300 0x100>, + <0xc0060f00 0x10>; + interrupts = <0 20 IRQ_TYPE_LEVEL_HIGH>; + }; + + i2s1: i2s@c0060400 { + compatible = "google,chv3-i2s"; + reg = <0xc0060400 0x100>, + <0xc0060f10 0x10>; + interrupts = <0 21 IRQ_TYPE_LEVEL_HIGH>; + }; + }; + + sound { + compatible = "google,chv3-audio"; + google,audio-cpu0 = <&i2s1>; + google,audio-codec0 = <&ssm2603>; + google,audio-cpu1 = <&i2s0>; + google,audio-codec1 = <&it68051>; + }; + + it68051: audio-codec { + compatible = "ite,it68051"; + }; }; &gmac0 { diff --git a/sound/soc/Kconfig b/sound/soc/Kconfig index 848fbae26c3b..d5a24819a0eb 100644 --- a/sound/soc/Kconfig +++ b/sound/soc/Kconfig @@ -72,6 +72,7 @@ source "sound/soc/apple/Kconfig" source "sound/soc/atmel/Kconfig" source "sound/soc/au1x/Kconfig" source "sound/soc/bcm/Kconfig" +source "sound/soc/chameleonv3/Kconfig" source "sound/soc/cirrus/Kconfig" source "sound/soc/dwc/Kconfig" source "sound/soc/fsl/Kconfig" diff --git a/sound/soc/Makefile b/sound/soc/Makefile index 507eaed1d6a1..5572f4ebe59e 100644 --- a/sound/soc/Makefile +++ b/sound/soc/Makefile @@ -40,6 +40,7 @@ obj-$(CONFIG_SND_SOC) += amd/ obj-$(CONFIG_SND_SOC) += atmel/ obj-$(CONFIG_SND_SOC) += au1x/ obj-$(CONFIG_SND_SOC) += bcm/ +obj-$(CONFIG_SND_SOC) += chameleonv3/ obj-$(CONFIG_SND_SOC) += cirrus/ obj-$(CONFIG_SND_SOC) += dwc/ obj-$(CONFIG_SND_SOC) += fsl/ diff --git a/sound/soc/chameleonv3/Kconfig b/sound/soc/chameleonv3/Kconfig new file mode 100644 index 000000000000..8386c44d6e92 --- /dev/null +++ b/sound/soc/chameleonv3/Kconfig @@ -0,0 +1,7 @@ +# SPDX-License-Identifier: GPL-2.0-only +config SND_SOC_CHV3 + tristate "SoC Audio support for Chameleon v3" + select SND_SOC_SSM2602 + select SND_SOC_SSM2602_I2C + help + Say Y if you want to add audio support for the Chameleon v3. diff --git a/sound/soc/chameleonv3/Makefile b/sound/soc/chameleonv3/Makefile new file mode 100644 index 000000000000..a542ad412b93 --- /dev/null +++ b/sound/soc/chameleonv3/Makefile @@ -0,0 +1,2 @@ +# SPDX-License-Identifier: GPL-2.0-only +obj-$(CONFIG_SND_SOC_CHV3) += chv3-i2s.o chv3-audio.o chv3-it68051.o diff --git a/sound/soc/chameleonv3/chv3-audio.c b/sound/soc/chameleonv3/chv3-audio.c new file mode 100644 index 000000000000..e860447c2cef --- /dev/null +++ b/sound/soc/chameleonv3/chv3-audio.c @@ -0,0 +1,111 @@ +// SPDX-License-Identifier: GPL-2.0-only +#include +#include +#include + +#include + +static int chv3_ssm2603_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params) +{ + struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream); + struct snd_soc_dai *dai = asoc_rtd_to_codec(rtd, 0); + + return snd_soc_dai_set_sysclk(dai, 0, 22579200, SND_SOC_CLOCK_IN); +} + +static const struct snd_soc_ops chv3_ssm2603_ops = { + .hw_params = chv3_ssm2603_hw_params, +}; + +SND_SOC_DAILINK_DEFS(ssm2603, + DAILINK_COMP_ARRAY(COMP_CPU("chv3-i2s")), + DAILINK_COMP_ARRAY(COMP_CODEC(NULL, "ssm2602-hifi")), /* 2602 - not a typo */ + DAILINK_COMP_ARRAY(COMP_EMPTY())); + +SND_SOC_DAILINK_DEFS(it68051, + DAILINK_COMP_ARRAY(COMP_CPU("chv3-i2s")), + DAILINK_COMP_ARRAY(COMP_CODEC(NULL, "it68051-hifi")), + DAILINK_COMP_ARRAY(COMP_EMPTY())); + +static struct snd_soc_dai_link chv3_audio_dais[] = { +{ + .name = "ssm2603", + .stream_name = "ssm2603 PCM", + .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBM_CFM, + .ops = &chv3_ssm2603_ops, + SND_SOC_DAILINK_REG(ssm2603), +}, +{ + .name = "it68051", + .stream_name = "it68051 PCM", + .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBM_CFM, + SND_SOC_DAILINK_REG(it68051), +}, +}; + +static struct snd_soc_card chv3_audio_card = { + .name = "chv3-audio", + .owner = THIS_MODULE, + .dai_link = chv3_audio_dais, + .num_links = 2, +}; + +static int chv3_audio_probe(struct platform_device *pdev) +{ + struct snd_soc_card *card = &chv3_audio_card; + struct device_node *np; + + card->dev = &pdev->dev; + + np = of_parse_phandle(pdev->dev.of_node, "google,audio-cpu0", 0); + if (!np) { + dev_err(&pdev->dev, "no google,audio-cpu0 property\n"); + return -EINVAL; + } + chv3_audio_dais[0].cpus->of_node = np; + chv3_audio_dais[0].platforms->of_node = np; + + np = of_parse_phandle(pdev->dev.of_node, "google,audio-codec0", 0); + if (!np) { + dev_err(&pdev->dev, "no google,audio-codec0 property\n"); + return -EINVAL; + } + chv3_audio_dais[0].codecs->of_node = np; + + np = of_parse_phandle(pdev->dev.of_node, "google,audio-cpu1", 0); + if (!np) { + dev_err(&pdev->dev, "no google,audio-cpu1 property\n"); + return -EINVAL; + } + chv3_audio_dais[1].cpus->of_node = np; + chv3_audio_dais[1].platforms->of_node = np; + + np = of_parse_phandle(pdev->dev.of_node, "google,audio-codec1", 0); + if (!np) { + dev_err(&pdev->dev, "no google,audio-codec1 property\n"); + return -EINVAL; + } + chv3_audio_dais[1].codecs->of_node = np; + + return devm_snd_soc_register_card(card->dev, card); +} + +static const struct of_device_id chv3_audio_dt_ids[] = { + { .compatible = "google,chv3-audio" }, + { }, +}; + +static struct platform_driver chv3_audio_driver = { + .driver = { + .name = "chv3-audio", + .of_match_table = of_match_ptr(chv3_audio_dt_ids), + }, + .probe = chv3_audio_probe, +}; + +module_platform_driver(chv3_audio_driver); + +MODULE_AUTHOR("Pawel Anikiel "); +MODULE_DESCRIPTION("ALSA SoC Chameleon v3 audio driver"); +MODULE_LICENSE("GPL"); diff --git a/sound/soc/chameleonv3/chv3-i2s.c b/sound/soc/chameleonv3/chv3-i2s.c new file mode 100644 index 000000000000..e946bff2e6fc --- /dev/null +++ b/sound/soc/chameleonv3/chv3-i2s.c @@ -0,0 +1,347 @@ +// SPDX-License-Identifier: GPL-2.0-only +#include +#include +#include + +#include + +/* + * The I2S interface consists of two ring buffers - one for RX and one for + * TX. A ring buffer has a producer index and a consumer index. Depending + * on which way the data is flowing, either the software or the hardware + * writes data and updates the producer index, and the other end reads data + * and updates the consumer index. + * + * The pointer managed by software is updated using the .ack callback + * (see chv3_dma_ack). This seems to be the only way to reliably obtain + * the appl_ptr from within the driver and pass it to hardware. + * + * Because of the two pointer design, the ring buffer can never be full. With + * capture this isn't a problem, because the hardware being the producer + * will wait for the consumer index to move out of the way. With playback, + * however, this is problematic, because ALSA wants to fill up the buffer + * completely when waiting for hardware. In the .ack callback, the driver + * would have to wait for the consumer index to move out of the way by + * busy-waiting, which would keep stalling the kernel for quite a long time. + * + * The workaround to this problem is to "lie" to ALSA that the hw_pointer + * is one period behind what it actually is (see chv3_dma_pointer). This + * way, ALSA will not try to fill up the entire buffer, and all callbacks + * are wait-free. + */ + +#define I2S_TX_ENABLE 0x00 +#define I2S_TX_BASE_ADDR 0x04 +#define I2S_TX_BUFFER_SIZE 0x08 +#define I2S_TX_PRODUCER_IDX 0x0c +#define I2S_TX_CONSUMER_IDX 0x10 +#define I2S_RX_ENABLE 0x14 +#define I2S_RX_BASE_ADDR 0x18 +#define I2S_RX_BUFFER_SIZE 0x1c +#define I2S_RX_PRODUCER_IDX 0x20 +#define I2S_RX_CONSUMER_IDX 0x24 + +#define I2S_SOFT_RESET 0x2c +#define I2S_SOFT_RESET_RX_BIT 0x1 +#define I2S_SOFT_RESET_TX_BIT 0x2 + +#define I2S_RX_IRQ 0x4c +#define I2S_RX_IRQ_CONST 0x50 +#define I2S_TX_IRQ 0x54 +#define I2S_TX_IRQ_CONST 0x58 + +#define I2S_IRQ_MASK 0x8 +#define I2S_IRQ_CLR 0xc +#define I2S_IRQ_RX_BIT 0x1 +#define I2S_IRQ_TX_BIT 0x2 + +#define I2S_MAX_BUFFER_SIZE 0x200000 + +struct chv3_i2s_dev { + struct device *dev; + void __iomem *iobase; + void __iomem *iobase_irq; + struct snd_pcm_substream *rx_substream; + struct snd_pcm_substream *tx_substream; + int tx_bytes_to_fetch; + bool tx_ready; +}; + +static struct snd_soc_dai_driver chv3_i2s_dai = { + .name = "chv3-i2s", + .capture = { + .channels_min = 1, + .channels_max = 128, + .rates = SNDRV_PCM_RATE_CONTINUOUS, + .rate_min = 8000, + .rate_max = 96000, + .formats = SNDRV_PCM_FMTBIT_S32_LE, + }, + .playback = { + .channels_min = 1, + .channels_max = 128, + .rates = SNDRV_PCM_RATE_CONTINUOUS, + .rate_min = 8000, + .rate_max = 96000, + .formats = SNDRV_PCM_FMTBIT_S32_LE, + }, +}; + +static const struct snd_pcm_hardware chv3_dma_hw = { + .info = SNDRV_PCM_INFO_INTERLEAVED | + SNDRV_PCM_INFO_MMAP | + SNDRV_PCM_INFO_MMAP_VALID | + SNDRV_PCM_INFO_BLOCK_TRANSFER, + .buffer_bytes_max = I2S_MAX_BUFFER_SIZE, + .period_bytes_min = 64, + .period_bytes_max = 8192, + .periods_min = 4, + .periods_max = 256, +}; + +static inline void chv3_i2s_wr(struct chv3_i2s_dev *i2s, int offset, u32 val) +{ + writel(val, i2s->iobase + offset); +} + +static inline u32 chv3_i2s_rd(struct chv3_i2s_dev *i2s, int offset) +{ + return readl(i2s->iobase + offset); +} + +static irqreturn_t chv3_i2s_isr(int irq, void *data) +{ + struct chv3_i2s_dev *i2s = data; + u32 reg; + + reg = readl(i2s->iobase_irq + I2S_IRQ_CLR); + if (!reg) + return IRQ_NONE; + + if (reg & I2S_IRQ_RX_BIT) + snd_pcm_period_elapsed(i2s->rx_substream); + + if (reg & I2S_IRQ_TX_BIT) { + if (i2s->tx_ready) + snd_pcm_period_elapsed(i2s->tx_substream); + i2s->tx_ready = 1; + } + + writel(reg, i2s->iobase_irq + I2S_IRQ_CLR); + + return IRQ_HANDLED; +} + +static int chv3_dma_open(struct snd_soc_component *component, + struct snd_pcm_substream *substream) +{ + struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream); + struct chv3_i2s_dev *i2s = snd_soc_dai_get_drvdata(asoc_rtd_to_cpu(rtd, 0)); + int res; + + snd_soc_set_runtime_hwparams(substream, &chv3_dma_hw); + + res = snd_pcm_hw_constraint_pow2(substream->runtime, 0, + SNDRV_PCM_HW_PARAM_BUFFER_BYTES); + if (res) + return res; + + if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) + i2s->rx_substream = substream; + else + i2s->tx_substream = substream; + + return 0; +} +static int chv3_dma_close(struct snd_soc_component *component, + struct snd_pcm_substream *substream) +{ + struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream); + struct chv3_i2s_dev *i2s = snd_soc_dai_get_drvdata(asoc_rtd_to_cpu(rtd, 0)); + + if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE) + chv3_i2s_wr(i2s, I2S_RX_ENABLE, 0); + else + chv3_i2s_wr(i2s, I2S_TX_ENABLE, 0); + + return 0; +} + +static int chv3_dma_pcm_construct(struct snd_soc_component *component, + struct snd_soc_pcm_runtime *rtd) +{ + struct chv3_i2s_dev *i2s = snd_soc_dai_get_drvdata(asoc_rtd_to_cpu(rtd, 0)); + struct snd_pcm_substream *substream; + int res; + + substream = rtd->pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream; + if (substream) { + res = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, i2s->dev, + I2S_MAX_BUFFER_SIZE, &substream->dma_buffer); + if (res) + return res; + } + + substream = rtd->pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream; + if (substream) { + res = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, i2s->dev, + I2S_MAX_BUFFER_SIZE, &substream->dma_buffer); + if (res) + return res; + } + + return 0; +} + +static int chv3_dma_hw_params(struct snd_soc_component *component, + struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params) +{ + snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer); + return 0; +} + +static int chv3_dma_prepare(struct snd_soc_component *component, + struct snd_pcm_substream *substream) +{ + struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream); + struct chv3_i2s_dev *i2s = snd_soc_dai_get_drvdata(asoc_rtd_to_cpu(rtd, 0)); + unsigned int buffer_bytes, period_bytes, period_size; + + buffer_bytes = snd_pcm_lib_buffer_bytes(substream); + period_bytes = snd_pcm_lib_period_bytes(substream); + period_size = substream->runtime->period_size; + + if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE) { + chv3_i2s_wr(i2s, I2S_SOFT_RESET, I2S_SOFT_RESET_RX_BIT); + chv3_i2s_wr(i2s, I2S_RX_BASE_ADDR, substream->dma_buffer.addr); + chv3_i2s_wr(i2s, I2S_RX_BUFFER_SIZE, buffer_bytes); + chv3_i2s_wr(i2s, I2S_RX_IRQ, (period_size << 8) | 1); + chv3_i2s_wr(i2s, I2S_RX_ENABLE, 1); + } else { + i2s->tx_ready = 0; + chv3_i2s_wr(i2s, I2S_SOFT_RESET, I2S_SOFT_RESET_TX_BIT); + chv3_i2s_wr(i2s, I2S_TX_BASE_ADDR, substream->dma_buffer.addr); + chv3_i2s_wr(i2s, I2S_TX_BUFFER_SIZE, buffer_bytes); + chv3_i2s_wr(i2s, I2S_TX_IRQ, ((period_bytes / i2s->tx_bytes_to_fetch) << 8) | 1); + chv3_i2s_wr(i2s, I2S_TX_ENABLE, 1); + } + writel(I2S_IRQ_RX_BIT | I2S_IRQ_TX_BIT, i2s->iobase_irq + I2S_IRQ_MASK); + + return 0; +} + +static snd_pcm_uframes_t chv3_dma_pointer(struct snd_soc_component *component, + struct snd_pcm_substream *substream) +{ + struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream); + struct chv3_i2s_dev *i2s = snd_soc_dai_get_drvdata(asoc_rtd_to_cpu(rtd, 0)); + u32 period_bytes, buffer_bytes; + u32 idx_bytes; + + period_bytes = snd_pcm_lib_period_bytes(substream); + buffer_bytes = snd_pcm_lib_buffer_bytes(substream); + + if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE) { + idx_bytes = chv3_i2s_rd(i2s, I2S_RX_PRODUCER_IDX); + } else { + idx_bytes = chv3_i2s_rd(i2s, I2S_TX_CONSUMER_IDX); + if (i2s->tx_ready) + idx_bytes = (idx_bytes - period_bytes) & (buffer_bytes - 1); + else + idx_bytes = 0; + } + + return bytes_to_frames(substream->runtime, idx_bytes); +} + +static int chv3_dma_ack(struct snd_soc_component *component, + struct snd_pcm_substream *substream) +{ + struct snd_pcm_runtime *runtime = substream->runtime; + struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream); + struct chv3_i2s_dev *i2s = snd_soc_dai_get_drvdata(asoc_rtd_to_cpu(rtd, 0)); + unsigned int bytes, idx; + + bytes = frames_to_bytes(runtime, runtime->control->appl_ptr); + idx = bytes & (snd_pcm_lib_buffer_bytes(substream) - 1); + + if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE) + chv3_i2s_wr(i2s, I2S_RX_CONSUMER_IDX, idx); + else + chv3_i2s_wr(i2s, I2S_TX_PRODUCER_IDX, idx); + + return 0; +} + +static const struct snd_soc_component_driver chv3_i2s_comp = { + .name = "chv3-i2s-comp", + .open = chv3_dma_open, + .close = chv3_dma_close, + .pcm_construct = chv3_dma_pcm_construct, + .hw_params = chv3_dma_hw_params, + .prepare = chv3_dma_prepare, + .pointer = chv3_dma_pointer, + .ack = chv3_dma_ack, +}; + +static int chv3_i2s_probe(struct platform_device *pdev) +{ + struct chv3_i2s_dev *i2s; + int res; + int irq; + + i2s = devm_kzalloc(&pdev->dev, sizeof(*i2s), GFP_KERNEL); + if (!i2s) + return -ENOMEM; + + i2s->iobase = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(i2s->iobase)) + return PTR_ERR(i2s->iobase); + + i2s->iobase_irq = devm_platform_ioremap_resource(pdev, 1); + if (IS_ERR(i2s->iobase_irq)) + return PTR_ERR(i2s->iobase_irq); + + i2s->tx_bytes_to_fetch = (chv3_i2s_rd(i2s, I2S_TX_IRQ_CONST) >> 8) & 0xffff; + + i2s->dev = &pdev->dev; + dev_set_drvdata(&pdev->dev, i2s); + + irq = platform_get_irq(pdev, 0); + if (irq < 0) + return -ENXIO; + res = devm_request_irq(i2s->dev, irq, chv3_i2s_isr, 0, "chv3-i2s", i2s); + if (res) + return res; + + res = devm_snd_soc_register_component(&pdev->dev, &chv3_i2s_comp, + &chv3_i2s_dai, 1); + if (res) { + dev_err(&pdev->dev, "couldn't register component: %d\n", res); + return res; + } + + dev_info(&pdev->dev, "probed\n"); + + return 0; +} + +static const struct of_device_id chv3_i2s_of_match[] = { + { .compatible = "google,chv3-i2s" }, + {}, +}; + +static struct platform_driver chv3_i2s_driver = { + .probe = chv3_i2s_probe, + .driver = { + .name = "chv3-i2s", + .of_match_table = chv3_i2s_of_match, + }, +}; + +module_platform_driver(chv3_i2s_driver); + +MODULE_AUTHOR("Pawel Anikiel "); +MODULE_DESCRIPTION("Chameleon v3 I2S interface"); +MODULE_LICENSE("GPL"); diff --git a/sound/soc/chameleonv3/chv3-it68051.c b/sound/soc/chameleonv3/chv3-it68051.c new file mode 100644 index 000000000000..4813e699ec9c --- /dev/null +++ b/sound/soc/chameleonv3/chv3-it68051.c @@ -0,0 +1,41 @@ +// SPDX-License-Identifier: GPL-2.0-only +#include +#include + +static struct snd_soc_dai_driver it68051_dai = { + .name = "it68051-hifi", + .capture = { + .stream_name = "Capture", + .channels_min = 8, + .channels_max = 8, + .rates = SNDRV_PCM_RATE_CONTINUOUS, + .formats = SNDRV_PCM_FMTBIT_S32_LE, + }, +}; + +static const struct snd_soc_component_driver soc_component_dev_it68051 = { +}; + +static int it68051_probe(struct platform_device *pdev) +{ + return devm_snd_soc_register_component(&pdev->dev, + &soc_component_dev_it68051, &it68051_dai, 1); +} + +static const struct of_device_id it68051_of_match[] = { + { .compatible = "ite,it68051", }, + { } +}; + +static struct platform_driver it68051_platform_driver = { + .driver = { + .name = "it68051", + .of_match_table = it68051_of_match, + }, + .probe = it68051_probe, +}; +module_platform_driver(it68051_platform_driver); + +MODULE_DESCRIPTION("ASoC IT68051 driver"); +MODULE_AUTHOR("Pawel Anikiel "); +MODULE_LICENSE("GPL"); From patchwork Fri Apr 14 14:01:56 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Pawe=C5=82_Anikiel?= X-Patchwork-Id: 674126 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E6573C77B76 for ; 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[31.182.201.26]) by smtp.gmail.com with ESMTPSA id 15-20020a2eb2cf000000b002a76e2dedbcsm828684ljz.139.2023.04.14.07.02.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 14 Apr 2023 07:02:44 -0700 (PDT) From: =?utf-8?q?Pawe=C5=82_Anikiel?= To: alsa-devel@alsa-project.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, lgirdwood@gmail.com, broonie@kernel.org Cc: perex@perex.cz, tiwai@suse.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, dinguyen@kernel.org, lars@metafoo.de, nuno.sa@analog.com, upstream@semihalf.com, =?utf-8?q?Pawe=C5=82_Anikiel?= Subject: [PATCH 2/9] dt-bindings: ASoC: Add chv3-i2s Date: Fri, 14 Apr 2023 16:01:56 +0200 Message-ID: <20230414140203.707729-3-pan@semihalf.com> X-Mailer: git-send-email 2.40.0.634.g4ca3ef3211-goog In-Reply-To: <20230414140203.707729-1-pan@semihalf.com> References: <20230414140203.707729-1-pan@semihalf.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add binding for chv3-i2s device. Signed-off-by: Paweł Anikiel --- .../bindings/sound/google,chv3-i2s.yaml | 42 +++++++++++++++++++ 1 file changed, 42 insertions(+) create mode 100644 Documentation/devicetree/bindings/sound/google,chv3-i2s.yaml diff --git a/Documentation/devicetree/bindings/sound/google,chv3-i2s.yaml b/Documentation/devicetree/bindings/sound/google,chv3-i2s.yaml new file mode 100644 index 000000000000..6f49cf059ac5 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/google,chv3-i2s.yaml @@ -0,0 +1,42 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/google,chv3-i2s.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Google Chameleon v3 I2S device + +maintainers: + - Paweł Anikiel + +description: | + I2S device for the Google Chameleon v3. The device handles both RX + and TX using a producer/consumer ring buffer design. + +properties: + compatible: + const: google,chv3-i2s + reg: + items: + - description: core registers + - description: irq registers + interrupts: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + +additionalProperties: false + +examples: + - | + #include + + i2s0: i2s@c0060300 { + compatible = "google,chv3-i2s"; + reg = <0xc0060300 0x100>, + <0xc0060f00 0x10>; + interrupts = <0 20 IRQ_TYPE_LEVEL_HIGH>; + }; From patchwork Fri Apr 14 14:01:57 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Pawe=C5=82_Anikiel?= X-Patchwork-Id: 673183 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2D31EC77B6E for ; Fri, 14 Apr 2023 14:03:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230130AbjDNODd (ORCPT ); Fri, 14 Apr 2023 10:03:33 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53150 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229744AbjDNODc (ORCPT ); Fri, 14 Apr 2023 10:03:32 -0400 Received: from mail-lj1-x234.google.com (mail-lj1-x234.google.com [IPv6:2a00:1450:4864:20::234]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0419159FF for ; Fri, 14 Apr 2023 07:03:00 -0700 (PDT) Received: by mail-lj1-x234.google.com with SMTP id z38so2823076ljq.12 for ; Fri, 14 Apr 2023 07:02:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf.com; s=google; t=1681480966; x=1684072966; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=pAsx/vtlSONsGJaMiUuvZrWP17NNhM0s9aopfUG3YMs=; b=Qi8J8nvWCtFhQJhd2UX1NuWmfKbSuxCdjqjnDbhKFiBYPv3xo/hUC6Do2yDnUCewAT tl4VOteQPr1vA9ehtzJx9//7fZlv2nySr+BsyVTmcwpIEX1nKSDMlvaAlyUlYHXNsEpx gRf0Q7SM1nyAeFaDsOuPiresr4FTfzZwyOvBn6qzJEFghHmpmtp+Uap2CZHpoeicqPFC TlO8OVPwTjnp/FJTOYL+dZPoyeFIcpk/Gn0o5iSNzBJScOAyrh8sVcPPbEZrjuWTThOR QJ0AsZSe1L+lXynCjQG2TIcE/AElygHP+mila0NJdBrRzO7TCSkxv+fOFSljBz39gnOD M3xw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1681480966; x=1684072966; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=pAsx/vtlSONsGJaMiUuvZrWP17NNhM0s9aopfUG3YMs=; b=ZkYfYcgPWwZjsrgKzse7GuU45yXHhMSBcKdIK0j6e7K55lHqOHS6Vzg/8lBg3TpvAx cJh0gBqNy7BfaJCDM7NoSzJeV+hx++zoF6oNcf9PZ1MpP5WQaKcbk0BhqHPG+phzy0Lu 7NkVBg/w6qHjpB/SZb3a+FqVEBjAG+dZ8apSWjN5PLdH6XeXW8ygB7Lm6sDiVL//sTd0 4AFWhhmfWfDpHs0yjNGpb35Vu/sAvdTIiXz4Jj3F27WbAB9rf7EES5y2BgaFgYpQqH1q Yn7hLzMZpPsF2aoEAsA/tUS/T8niy8E+mFq18KvAVfOBAoDG2G6p7Yo9Fxt70aPoxatr c+nw== X-Gm-Message-State: AAQBX9emHv/MuY/S6RxAvPJZLWqKmvoEgkttq59lL45VCrhYp4X0P/nv LmGK7ltf63AdREZzx+QjD9Y+HA== X-Google-Smtp-Source: AKy350Z+QDZGlS7XF9A1X0316HTp53Mi+Jrm8uEaFMhPQvNowT32YfQLUfNynbysrYJBu0ehToQ6JA== X-Received: by 2002:a2e:9d84:0:b0:295:d7a8:559b with SMTP id c4-20020a2e9d84000000b00295d7a8559bmr1714528ljj.10.1681480965408; Fri, 14 Apr 2023 07:02:45 -0700 (PDT) Received: from panikiel.roam.corp.google.com (staticline-31-182-201-26.toya.net.pl. [31.182.201.26]) by smtp.gmail.com with ESMTPSA id 15-20020a2eb2cf000000b002a76e2dedbcsm828684ljz.139.2023.04.14.07.02.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 14 Apr 2023 07:02:45 -0700 (PDT) From: =?utf-8?q?Pawe=C5=82_Anikiel?= To: alsa-devel@alsa-project.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, lgirdwood@gmail.com, broonie@kernel.org Cc: perex@perex.cz, tiwai@suse.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, dinguyen@kernel.org, lars@metafoo.de, nuno.sa@analog.com, upstream@semihalf.com, =?utf-8?q?Pawe=C5=82_Anikiel?= Subject: [PATCH 3/9] dt-bindings: ASoC: Add chv3-audio Date: Fri, 14 Apr 2023 16:01:57 +0200 Message-ID: <20230414140203.707729-4-pan@semihalf.com> X-Mailer: git-send-email 2.40.0.634.g4ca3ef3211-goog In-Reply-To: <20230414140203.707729-1-pan@semihalf.com> References: <20230414140203.707729-1-pan@semihalf.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add binding for chv3-audio device. Signed-off-by: Paweł Anikiel --- .../bindings/sound/google,chv3-audio.yaml | 49 +++++++++++++++++++ 1 file changed, 49 insertions(+) create mode 100644 Documentation/devicetree/bindings/sound/google,chv3-audio.yaml diff --git a/Documentation/devicetree/bindings/sound/google,chv3-audio.yaml b/Documentation/devicetree/bindings/sound/google,chv3-audio.yaml new file mode 100644 index 000000000000..8b602b60eaee --- /dev/null +++ b/Documentation/devicetree/bindings/sound/google,chv3-audio.yaml @@ -0,0 +1,49 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/google,chv3-audio.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Google Chameleon v3 audio + +maintainers: + - Paweł Anikiel + +properties: + compatible: + const: google,chv3-audio + + google,audio-cpu0: + $ref: /schemas/types.yaml#/definitions/phandle + description: The phandle of controller #0 + + google,audio-codec0: + $ref: /schemas/types.yaml#/definitions/phandle + description: The phandle of codec #0 + + google,audio-cpu1: + $ref: /schemas/types.yaml#/definitions/phandle + description: The phandle of controller #1 + + google,audio-codec1: + $ref: /schemas/types.yaml#/definitions/phandle + description: The phandle of codec #1 + +required: + - compatible + - google,audio-cpu0: + - google,audio-codec0: + - google,audio-cpu1: + - google,audio-codec1: + +additionalProperties: false + +examples: + - | + sound { + compatible = "google,chv3-audio"; + google,audio-cpu0 = <&i2s1>; + google,audio-codec0 = <&ssm2603>; + google,audio-cpu1 = <&i2s0>; + google,audio-codec1 = <&it68051>; + }; From patchwork Fri Apr 14 14:01:58 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Pawe=C5=82_Anikiel?= X-Patchwork-Id: 673182 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E39AEC77B6E for ; Fri, 14 Apr 2023 14:03:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230184AbjDNODf (ORCPT ); Fri, 14 Apr 2023 10:03:35 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53180 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230163AbjDNODe (ORCPT ); Fri, 14 Apr 2023 10:03:34 -0400 Received: from mail-lf1-x12f.google.com (mail-lf1-x12f.google.com [IPv6:2a00:1450:4864:20::12f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5B2FBBB80 for ; Fri, 14 Apr 2023 07:03:00 -0700 (PDT) Received: by mail-lf1-x12f.google.com with SMTP id q26so11311652lfe.9 for ; Fri, 14 Apr 2023 07:03:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf.com; s=google; t=1681480967; x=1684072967; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=L6n77Uz+PsEL5Zjj7L5BoLRIOYIh+FfJEj7GLcVMFvg=; b=to1vKMIM1WC0fNpuIs5zm3Xd24aEi6aKDV9OLiqX3WkQ186p1OuycU1BZvA94dDYsT r09kVB9ndrgzrg5+P/PlIVIj6pggSuDLvitGJaAe+apJV9pcgVmTgO5MbPN5TvD/C6IL 0EtgNlqLzaUciDl3qcozHuoFcBoCWUVp+BLw+RrVuKI8qRirPnozw5rxTutWT69uV17+ kN29a9NOcNSqMukp4uOHgo0o0MbaVDiICQZpYsoHoF+uMeXyqgAMD1r/CBKX7CUpimbT 1r/morRdVUAFqIRIASuMeGpTdR3NjQC7ZlYp/eI2C4He8BfW4P+1LR9KmoDtUFbzgXAQ vCeQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1681480967; x=1684072967; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=L6n77Uz+PsEL5Zjj7L5BoLRIOYIh+FfJEj7GLcVMFvg=; b=jz032cOnPYUimtV/Yjd/hdj1fBJ00UfeXHiVlzPZndWiLCgw0FUEz78uz64U+LVruv SrKY5W6hhS7+ckxzLAO5zAKhoy1QDXZIrWeBH4EJWv5YxYqic2fmK90nmJfAfc2qSjnb lSN6jlwQsQI9TNSQflZjNqHmpvqlJe6ZGb0y/bptT4si/kl6//5ZBplXqn874QX2Lyzk aWpsziAPf7Nk6FuZz07eCXEaC6lP6H6XlA31KVxxoA7SkV7mM1b9rzlyckbyKgSHIwGh IzavrjTafVTI/lTF8NgLZnwSBpA8x2NXj5GeHlLpqvdWK4W3v3mizSBdRby90Q7du1iu gQyQ== X-Gm-Message-State: AAQBX9fAXKEtpUmcHruPTcbP8zfYLgzw7LtU9l+4bTNxmSfEtgc9RoW+ hCMbNsXs0Z6MHjT0rXUpPZiSCg== X-Google-Smtp-Source: AKy350ZSXgVjOCNXI2VQYGW1Lkq/T4J5v7tUI1rYH+arf0uiLVP1zRg1drMxe3NixehsPq/kIrQ5fw== X-Received: by 2002:a05:6512:4012:b0:4eb:2b62:134f with SMTP id br18-20020a056512401200b004eb2b62134fmr2780018lfb.16.1681480966909; Fri, 14 Apr 2023 07:02:46 -0700 (PDT) Received: from panikiel.roam.corp.google.com (staticline-31-182-201-26.toya.net.pl. [31.182.201.26]) by smtp.gmail.com with ESMTPSA id 15-20020a2eb2cf000000b002a76e2dedbcsm828684ljz.139.2023.04.14.07.02.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 14 Apr 2023 07:02:46 -0700 (PDT) From: =?utf-8?q?Pawe=C5=82_Anikiel?= To: alsa-devel@alsa-project.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, lgirdwood@gmail.com, broonie@kernel.org Cc: perex@perex.cz, tiwai@suse.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, dinguyen@kernel.org, lars@metafoo.de, nuno.sa@analog.com, upstream@semihalf.com, =?utf-8?q?Pawe=C5=82_Anikiel?= Subject: [PATCH 4/9] dt-bindings: ASoC: Add it68051 Date: Fri, 14 Apr 2023 16:01:58 +0200 Message-ID: <20230414140203.707729-5-pan@semihalf.com> X-Mailer: git-send-email 2.40.0.634.g4ca3ef3211-goog In-Reply-To: <20230414140203.707729-1-pan@semihalf.com> References: <20230414140203.707729-1-pan@semihalf.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add binding for it68051 device. Signed-off-by: Paweł Anikiel --- .../bindings/sound/ite,it68051.yaml | 23 +++++++++++++++++++ 1 file changed, 23 insertions(+) create mode 100644 Documentation/devicetree/bindings/sound/ite,it68051.yaml diff --git a/Documentation/devicetree/bindings/sound/ite,it68051.yaml b/Documentation/devicetree/bindings/sound/ite,it68051.yaml new file mode 100644 index 000000000000..341c171b8a8a --- /dev/null +++ b/Documentation/devicetree/bindings/sound/ite,it68051.yaml @@ -0,0 +1,23 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/ite,it68051.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: it68051 audio codec + +maintainers: + - Paweł Anikiel + +properties: + compatible: + const: ite,it68051 + +required: + - compatible + +examples: + - | + it68051: audio-codec { + compatible = "ite,it68051"; + }; From patchwork Fri Apr 14 14:01:59 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Pawe=C5=82_Anikiel?= X-Patchwork-Id: 673181 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 61BA6C77B76 for ; Fri, 14 Apr 2023 14:03:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230177AbjDNODp (ORCPT ); Fri, 14 Apr 2023 10:03:45 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53222 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230185AbjDNODg (ORCPT ); Fri, 14 Apr 2023 10:03:36 -0400 Received: from mail-lj1-x232.google.com (mail-lj1-x232.google.com [IPv6:2a00:1450:4864:20::232]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D31F0BB84 for ; Fri, 14 Apr 2023 07:03:00 -0700 (PDT) Received: by mail-lj1-x232.google.com with SMTP id r9so5221004ljp.9 for ; Fri, 14 Apr 2023 07:03:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf.com; s=google; t=1681480969; x=1684072969; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=3BhiBeghWpmkkfmklnaJ7LFrAZ1yIM3t/W3PcrsTKic=; b=ZIvH3A0hDweRAj48aerjGTpcA9Lg0NU1e7NMCLoS5TAsG28rGY5S7MJJ7LbPV4gE60 W3yYf12rm7y/sW/HEklbkSOvWJmDZWZQwiNpOVw7yVUoaxeeA7zFBZZ2zB5PR2zDlVC1 Jzxwbywa7p9UNHh/9090nxIM5BcN7qcekxA/XokHqil/W1PBhRURVtoj6oU2VBK+otcw kw8969oMp59kuqP0RWc9XYTRRZzccaxfh74IrcxN4FN1C60ATu7fDzedKERcZi8/WvrA RwNOJP8JIaYO06sGP69Q2Ktqq3xpmsNOvXg03BYydaElGUOPwCRTFZOiF2qBZlKogThI ebPA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1681480969; x=1684072969; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=3BhiBeghWpmkkfmklnaJ7LFrAZ1yIM3t/W3PcrsTKic=; b=OHdTa/lpgZtz9j8RcFNvCMAGS3KkjlV14d8zjVv7ORaOmjklHyinMbgsLV6nWcYgvC 0Oo9FEHX8K+xDPwKn8XNh1y7EFptgFOzYwMPB2Zy5M5fheSdLU2YPYPWeM/QMUD+r86e Y8hkjLxSlPMO161uMp07CGFZomBeDDrnQgAqMwLgu9AJN5sjOaAwgGhAz1dxwkxl4zna 103S2KlwiyloyFUvIh7JY8v2lVFitRZ1QiZREiO4/yidpPxgaFdg4hAV4gaalSxE6NRw AVBRpVLuSqnrLvDUrDD3tuNHF3W6HJIqPryi5aLsco8Yexy3emRYwYQkzsmcer0GmFpr +XrQ== X-Gm-Message-State: AAQBX9cTi8iku7xcWR8V7dIRe/i20XDtAB/xf5oO4aVtG7gJ527Bodye gOFqAgci6ZkSRB8Z+22JwwV44w== X-Google-Smtp-Source: AKy350aAUvPCStAOQkhJe5KNXKrPlT0yHPb0kYSRktYXq6/BaxKviwWfDLqFxScPxtJeHZ5xGmQ/WQ== X-Received: by 2002:a2e:804b:0:b0:295:9906:64e4 with SMTP id p11-20020a2e804b000000b00295990664e4mr1768345ljg.2.1681480968304; Fri, 14 Apr 2023 07:02:48 -0700 (PDT) Received: from panikiel.roam.corp.google.com (staticline-31-182-201-26.toya.net.pl. [31.182.201.26]) by smtp.gmail.com with ESMTPSA id 15-20020a2eb2cf000000b002a76e2dedbcsm828684ljz.139.2023.04.14.07.02.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 14 Apr 2023 07:02:47 -0700 (PDT) From: =?utf-8?q?Pawe=C5=82_Anikiel?= To: alsa-devel@alsa-project.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, lgirdwood@gmail.com, broonie@kernel.org Cc: perex@perex.cz, tiwai@suse.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, dinguyen@kernel.org, lars@metafoo.de, nuno.sa@analog.com, upstream@semihalf.com, =?utf-8?q?Pawe=C5=82_Anikiel?= Subject: [PATCH 5/9] ASoC: ssm2602: Add workaround for playback with external MCLK Date: Fri, 14 Apr 2023 16:01:59 +0200 Message-ID: <20230414140203.707729-6-pan@semihalf.com> X-Mailer: git-send-email 2.40.0.634.g4ca3ef3211-goog In-Reply-To: <20230414140203.707729-1-pan@semihalf.com> References: <20230414140203.707729-1-pan@semihalf.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Apply a workaround for what seems to be a hardware quirk: when using an external MCLK signal, powering on Output and DAC for the first time produces output distortions unless they're powered together with whole chip power. The workaround powers them on in probe for the first time, as doing it later may be impossible (e.g. when starting playback while recording, whole chip power will already be on). Here are some initialization sequences run after all other control registers were set (`ssmset reg val` sets the value of a register via i2c): ssmset 0x09 0x01 # core ssmset 0x06 0x07 # chip, out OK ssmset 0x09 0x01 # core ssmset 0x06 0x87 # out, dac ssmset 0x06 0x07 # chip OK (disable MCLK) ssmset 0x09 0x01 # core ssmset 0x06 0x1f # chip ssmset 0x06 0x07 # out, dac (enable MCLK) OK ssmset 0x09 0x01 # core ssmset 0x06 0x1f # chip ssmset 0x06 0x07 # out, dac NOT OK ssmset 0x06 0x1f # chip ssmset 0x09 0x01 # core ssmset 0x06 0x07 # out, dac NOT OK ssmset 0x09 0x01 # core ssmset 0x06 0x0f # chip, out ssmset 0x06 0x07 # dac NOT OK ssmset 0x09 0x01 # core ssmset 0x06 0x17 # chip, dac ssmset 0x06 0x07 # out NOT OK Here are some sequences run at the very start before a sw reset (and later using one of the NOT OK sequences from above): ssmset 0x09 0x01 # core ssmset 0x06 0x07 # chip, out, dac OK (disable MCLK) ssmset 0x09 0x01 # core ssmset 0x06 0x07 # chip, out, dac (enable MCLK after reset) NOT OK ssmset 0x09 0x01 # core ssmset 0x06 0x17 # chip, dac NOT OK ssmset 0x09 0x01 # core ssmset 0x06 0x0f # chip, out NOT OK ssmset 0x06 0x07 # chip, out, dac NOT OK This was tested on a Google Chameleon v3 board using an SSM2603 with an external MCLK. This doesn't seem to just be a PCB issue, as this was also observed on a ZYBO Z7-10: https://ez.analog.com/audio/f/q-a/543726/solved-ssm2603-right-output-offset-issue/480229 Signed-off-by: Paweł Anikiel --- sound/soc/codecs/ssm2602.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/sound/soc/codecs/ssm2602.c b/sound/soc/codecs/ssm2602.c index cbbe83b85ada..021e0c860fa1 100644 --- a/sound/soc/codecs/ssm2602.c +++ b/sound/soc/codecs/ssm2602.c @@ -589,6 +589,17 @@ static int ssm260x_component_probe(struct snd_soc_component *component) return ret; } + /* Workaround for what seems to be a hardware quirk: when using an + * external MCLK signal, powering on Output and DAC for the first + * time produces output distortions unless they're powered together + * with whole chip power. We power them here for the first time, + * as doing it later may be impossible (e.g. when starting playback + * while recording, whole chip power will already be on) + */ + regmap_write(ssm2602->regmap, SSM2602_ACTIVE, 0x01); + regmap_write(ssm2602->regmap, SSM2602_PWR, 0x07); + regmap_write(ssm2602->regmap, SSM2602_RESET, 0x00); + /* set the update bits */ regmap_update_bits(ssm2602->regmap, SSM2602_LINVOL, LINVOL_LRIN_BOTH, LINVOL_LRIN_BOTH); From patchwork Fri Apr 14 14:02:00 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Pawe=C5=82_Anikiel?= X-Patchwork-Id: 674124 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 997D0C77B72 for ; Fri, 14 Apr 2023 14:03:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230233AbjDNODo (ORCPT ); Fri, 14 Apr 2023 10:03:44 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53220 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230177AbjDNODg (ORCPT ); Fri, 14 Apr 2023 10:03:36 -0400 Received: from mail-lj1-x229.google.com (mail-lj1-x229.google.com [IPv6:2a00:1450:4864:20::229]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 882D9A5CC for ; Fri, 14 Apr 2023 07:03:02 -0700 (PDT) Received: by mail-lj1-x229.google.com with SMTP id h8so3066529ljf.3 for ; Fri, 14 Apr 2023 07:03:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf.com; s=google; t=1681480970; x=1684072970; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=b/pTs4z9rhsBzBw4ml9qs5JBHN4WLKpluPzA9XU/6Jk=; b=OXpk08I1AC9etobtye7i60c27lC4lj7/SZW9B5ttLpNUFKqf0S6rQ6xjLnu0O6h2DD rSG1RCCO6BeNy6NOLso/6J68yWcbnJ4MCO0bFEEK07LPLj66vlhIql0CIAKOAdAb9GMf /mNuvuM+bh5rghs6+bfmEU/hQmU6MFLUkIopX7dNWDZ6k3DniD+TkQlzdYDFlPRKdMRM VVi4SQyrVEx3XqVLJdWk9o2XfkRdnTfEoxMRjBRchUg5BfUo55RQiZHWx9feBm8xe4C1 rbpklvVxxNTe6IeiPG1crcrDS90TCgdjp2ZjVW3NeU8bR+s7SwN0MdYEJuGEgYZNRO7B LujQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1681480970; x=1684072970; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=b/pTs4z9rhsBzBw4ml9qs5JBHN4WLKpluPzA9XU/6Jk=; b=GbZGXWw24BStcNGfvzvLe4XDkDVB1G4VTh/LK6HMB6o3d9Ufjgh3xqwImAl3wkJJjU 1fHYYMi5RCGUw4gF6NYdd2oyxn81awXc7Xwsu/KWvjq6ayHnYaBgvaLixqx/MV5+M/+z v/bmfVRBaoXMufzEvqX2yT+tY6Kdo9N/QHc0xDR33/vMb9pJ1sdytx8OTx2MUOpcCbp6 3284FnaK1+W2KJBlBIYnKSyfRA/02LTSqyjjAi0rInUShbgOYNCdvo2S6K2E92+9Pz2r fQ4SF4NQA6LTnThgY+cNC5bRiC+IjqRoJHbh5gHp60tPyC/lm7cYCVFHo9ldgd7xX8l3 vYzw== X-Gm-Message-State: AAQBX9cY90x2NBNFsNb9YPygwUGZUOL28A+qY76nhHKPiKKT22qk0zBD eJNQSZtiBaSihMMOJBYrLrQ3sg== X-Google-Smtp-Source: AKy350a2jetYlrjNvabc9jILg3C4DgASyuZ+RZVm6baefXeSjrRJTfnzHFRX467sNw55w+dKiuBNqg== X-Received: by 2002:a2e:978a:0:b0:2a8:ad32:3d59 with SMTP id y10-20020a2e978a000000b002a8ad323d59mr770788lji.9.1681480970216; Fri, 14 Apr 2023 07:02:50 -0700 (PDT) Received: from panikiel.roam.corp.google.com (staticline-31-182-201-26.toya.net.pl. [31.182.201.26]) by smtp.gmail.com with ESMTPSA id 15-20020a2eb2cf000000b002a76e2dedbcsm828684ljz.139.2023.04.14.07.02.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 14 Apr 2023 07:02:49 -0700 (PDT) From: =?utf-8?q?Pawe=C5=82_Anikiel?= To: alsa-devel@alsa-project.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, lgirdwood@gmail.com, broonie@kernel.org Cc: perex@perex.cz, tiwai@suse.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, dinguyen@kernel.org, lars@metafoo.de, nuno.sa@analog.com, upstream@semihalf.com, =?utf-8?q?Pawe=C5=82_Anikiel?= Subject: [PATCH 6/9] ASoC: ssm2602: Add support for CLKDIV2 Date: Fri, 14 Apr 2023 16:02:00 +0200 Message-ID: <20230414140203.707729-7-pan@semihalf.com> X-Mailer: git-send-email 2.40.0.634.g4ca3ef3211-goog In-Reply-To: <20230414140203.707729-1-pan@semihalf.com> References: <20230414140203.707729-1-pan@semihalf.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The SSM260x chips have an internal MCLK /2 divider (bit D7 in register R8). Add logic that allows for more MCLK values using this divider. Signed-off-by: Paweł Anikiel --- sound/soc/codecs/ssm2602.c | 15 ++++++++++++--- 1 file changed, 12 insertions(+), 3 deletions(-) diff --git a/sound/soc/codecs/ssm2602.c b/sound/soc/codecs/ssm2602.c index 021e0c860fa1..35c4743e756e 100644 --- a/sound/soc/codecs/ssm2602.c +++ b/sound/soc/codecs/ssm2602.c @@ -280,9 +280,12 @@ static inline int ssm2602_get_coeff(int mclk, int rate) int i; for (i = 0; i < ARRAY_SIZE(ssm2602_coeff_table); i++) { - if (ssm2602_coeff_table[i].rate == rate && - ssm2602_coeff_table[i].mclk == mclk) - return ssm2602_coeff_table[i].srate; + if (ssm2602_coeff_table[i].rate == rate) { + if (ssm2602_coeff_table[i].mclk == mclk) + return ssm2602_coeff_table[i].srate; + if (ssm2602_coeff_table[i].mclk == mclk / 2) + return ssm2602_coeff_table[i].srate | SRATE_CORECLK_DIV2; + } } return -EINVAL; } @@ -365,18 +368,24 @@ static int ssm2602_set_dai_sysclk(struct snd_soc_dai *codec_dai, switch (freq) { case 12288000: case 18432000: + case 24576000: + case 36864000: ssm2602->sysclk_constraints = &ssm2602_constraints_12288000; break; case 11289600: case 16934400: + case 22579200: + case 33868800: ssm2602->sysclk_constraints = &ssm2602_constraints_11289600; break; case 12000000: + case 24000000: ssm2602->sysclk_constraints = NULL; break; default: return -EINVAL; } + ssm2602->sysclk = freq; } else { unsigned int mask; From patchwork Fri Apr 14 14:02:01 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Pawe=C5=82_Anikiel?= X-Patchwork-Id: 674122 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 82569C77B76 for ; Fri, 14 Apr 2023 14:03:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230293AbjDNODy (ORCPT ); Fri, 14 Apr 2023 10:03:54 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53408 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230240AbjDNODo (ORCPT ); Fri, 14 Apr 2023 10:03:44 -0400 Received: from mail-lj1-x22f.google.com (mail-lj1-x22f.google.com [IPv6:2a00:1450:4864:20::22f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C6962A5DC for ; Fri, 14 Apr 2023 07:03:03 -0700 (PDT) Received: by mail-lj1-x22f.google.com with SMTP id a29so19758432ljq.0 for ; Fri, 14 Apr 2023 07:03:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf.com; s=google; t=1681480971; x=1684072971; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=l00HAAnjKLxvI4M71LWAa1g6hA4VFu1YZpxf8JORAUs=; b=JzlusrDNdzUZCKHh7U6SmI+KlP/mVczAn9Xb3MZfbiz5r8m1L0lqAf9Z0JgZD3Tqxx X/DTdKdcVdFoEc02n65cBpez+thdu+oE08qMKBCO03cEzFiculVhVRZbG5DLG4CFH5bk EuymseLwwLz74StstE7lynJG+54dZLY4rdi+sSD39UBUKIAUmFkdUUPAgn0+lE7xe9xI aXGxbRy0yeAy20z1zjWdIESJpZ63qTDpzC6yhXnOVrFJUvqPVIkSeblw+Zm3H288fGw7 1AGJlriLqc33CclcKMinnVNJN0MwG6Pgb1IsmYYrXUCl7cZ0DdbTtOPnhdownoKzOkWs bywg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1681480971; x=1684072971; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=l00HAAnjKLxvI4M71LWAa1g6hA4VFu1YZpxf8JORAUs=; b=NWGWMjyHBH1rP7R9Vl6yLJteSubcn/hKLCLkY0AXVOpfuN+IAfmdeVRCYV2aIDmDvJ 53s1ai6iQgZPdR758mdVjxoVFBWHOAz7huSLRsZvlri1HJRoBaT3D6ne4tMUkSM12fQ/ 4NLIvFfpXMNNqlnlSZ+v10CD/L+kYX0Exnfhjxhhp/p4jj5ZvBXsgUGbq6BFO/uUPMz3 iLtF7NltebkzaOu7wlfwWA1P0xoAmJjK0Qm5VOQUK+9B0WTdN88plhwEmrKfKdw/YyTM RNkZL/PXQ8W9PbQYM2XX5y12QJqZIYeo7auh0N/fbkDwjXVjcXsfVjRttSrxCLEuU5dC 7Dpw== X-Gm-Message-State: AAQBX9dVvfU3kRjOJxf0lqY0vBgSpR6plXl9upkJopjXRU8VKSRne9o+ 66kOTx1kyxICkSkEi0yNNrZhtQ== X-Google-Smtp-Source: AKy350ZxhF8jz5Saa4u19lC/KyENjhrRMahkQQL0VeYcZWqgqY9MaL+3miI6fzj/xv1zhuIzYZZSRw== X-Received: by 2002:a2e:99d2:0:b0:2a7:ace8:e0ba with SMTP id l18-20020a2e99d2000000b002a7ace8e0bamr2212415ljj.42.1681480971325; Fri, 14 Apr 2023 07:02:51 -0700 (PDT) Received: from panikiel.roam.corp.google.com (staticline-31-182-201-26.toya.net.pl. [31.182.201.26]) by smtp.gmail.com with ESMTPSA id 15-20020a2eb2cf000000b002a76e2dedbcsm828684ljz.139.2023.04.14.07.02.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 14 Apr 2023 07:02:51 -0700 (PDT) From: =?utf-8?q?Pawe=C5=82_Anikiel?= To: alsa-devel@alsa-project.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, lgirdwood@gmail.com, broonie@kernel.org Cc: perex@perex.cz, tiwai@suse.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, dinguyen@kernel.org, lars@metafoo.de, nuno.sa@analog.com, upstream@semihalf.com, =?utf-8?q?Pawe=C5=82_Anikiel?= Subject: [PATCH 7/9] ASoC: ssm2602: Add mute gpio Date: Fri, 14 Apr 2023 16:02:01 +0200 Message-ID: <20230414140203.707729-8-pan@semihalf.com> X-Mailer: git-send-email 2.40.0.634.g4ca3ef3211-goog In-Reply-To: <20230414140203.707729-1-pan@semihalf.com> References: <20230414140203.707729-1-pan@semihalf.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The SSM2603 has a hardware mute pin. Add an optional mute gpio to control it. Signed-off-by: Paweł Anikiel --- sound/soc/codecs/ssm2602.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/sound/soc/codecs/ssm2602.c b/sound/soc/codecs/ssm2602.c index 35c4743e756e..dd81e62d7a3b 100644 --- a/sound/soc/codecs/ssm2602.c +++ b/sound/soc/codecs/ssm2602.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #include @@ -32,6 +33,8 @@ struct ssm2602_priv { enum ssm2602_type type; unsigned int clk_out_pwr; + + struct gpio_desc *mute_gpiod; }; /* @@ -352,6 +355,10 @@ static int ssm2602_mute(struct snd_soc_dai *dai, int mute, int direction) else regmap_update_bits(ssm2602->regmap, SSM2602_APDIGI, APDIGI_ENABLE_DAC_MUTE, 0); + + if (ssm2602->mute_gpiod) + gpiod_set_value_cansleep(ssm2602->mute_gpiod, mute); + return 0; } @@ -680,6 +687,10 @@ int ssm2602_probe(struct device *dev, enum ssm2602_type type, ssm2602->type = type; ssm2602->regmap = regmap; + ssm2602->mute_gpiod = devm_gpiod_get_optional(dev, "mute", GPIOD_OUT_LOW); + if (IS_ERR(ssm2602->mute_gpiod)) + return PTR_ERR(ssm2602->mute_gpiod); + return devm_snd_soc_register_component(dev, &soc_component_dev_ssm2602, &ssm2602_dai, 1); } From patchwork Fri Apr 14 14:02:02 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Pawe=C5=82_Anikiel?= X-Patchwork-Id: 674123 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6FD27C77B72 for ; Fri, 14 Apr 2023 14:03:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230260AbjDNODt (ORCPT ); Fri, 14 Apr 2023 10:03:49 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53358 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230219AbjDNODn (ORCPT ); Fri, 14 Apr 2023 10:03:43 -0400 Received: from mail-lj1-x22b.google.com (mail-lj1-x22b.google.com [IPv6:2a00:1450:4864:20::22b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9EAF2B452 for ; Fri, 14 Apr 2023 07:03:04 -0700 (PDT) Received: by mail-lj1-x22b.google.com with SMTP id r9so5221239ljp.9 for ; Fri, 14 Apr 2023 07:03:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf.com; s=google; t=1681480973; x=1684072973; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=76axTl8cbJUBy7OLAwyWyTtD7GTYfsTJiThiXMDIx3s=; b=SB1cVRyWZbrKZUFHSptgTkU1gCg6LU7UXA+761173EAj6Vq0hW3AwJe9c1WFRia95a y0/8K8hQMEDHSv7dvOdub+XGJE4Og/J8gc3u+1c4ZCYsBgtuq6vbexJ53O3gINqltJev CA5R5tLb85MQ+wtym2dYzB10QlkOI++8ifVF6o5z0LOG70v8JVdgoLFO+SVSGLZkONoi GMFrh22TWgY0MJFeT5YRpgnePigt/z8Lxd+XVKVpwXSHUDDJICe9h2ZWnh5aqTiLRB26 LzfR+GRmY+4c9Vh3opEtGsC5KlBNPtKojYkByTTCIgb+mc3gn/NtI9g5zL/s0D8yZ8hy E+9w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1681480973; x=1684072973; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=76axTl8cbJUBy7OLAwyWyTtD7GTYfsTJiThiXMDIx3s=; b=gJqHYI6GStIuCzv2uDVQjLTMUcx39n7JQBniMszJbGngMfsSWW6uqW36JxbGxXpWE4 npNb49x5HVGCduQtQlWEVD1Lr2sO9eGXLzjsBVXIoxJzpab9gkGlw5fbtjLtqp2cWafE TAt1AmmT4m4O4Evx1MDCCrU8J0/Z9wqx2wOZ641b9w79C4U8PrBueKcP+TUk9FaTgL2g faX/XviHw0y/E/OPey2lRf0Y+zGm5drK3QetPXEVtLZOW+xFhdfjbNQ/sv42RF/P1xAy D5I5ZvmHDB89enuGPmor+o8lFEBnjZE3z7J4DL6zFyKN9BYthbo3oqGV5Pzu8flLJfft ieQQ== X-Gm-Message-State: AAQBX9da9mPbO9HJ+nZtHMgvp1fMkajHrPnos8vPJkWt80oK+6//4/72 eXiXHcImQcEQsFaWQWqJkFcPEw== X-Google-Smtp-Source: AKy350ZzWs16uKXN2YB3yLTeEJy4YSzcbJzgsMuyu+FmMB5GC0CIO/mMbAp72GN1rsJ9oQhuSxCppg== X-Received: by 2002:a2e:9b49:0:b0:2a8:ae90:83d6 with SMTP id o9-20020a2e9b49000000b002a8ae9083d6mr584641ljj.48.1681480972484; Fri, 14 Apr 2023 07:02:52 -0700 (PDT) Received: from panikiel.roam.corp.google.com (staticline-31-182-201-26.toya.net.pl. [31.182.201.26]) by smtp.gmail.com with ESMTPSA id 15-20020a2eb2cf000000b002a76e2dedbcsm828684ljz.139.2023.04.14.07.02.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 14 Apr 2023 07:02:52 -0700 (PDT) From: =?utf-8?q?Pawe=C5=82_Anikiel?= To: alsa-devel@alsa-project.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, lgirdwood@gmail.com, broonie@kernel.org Cc: perex@perex.cz, tiwai@suse.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, dinguyen@kernel.org, lars@metafoo.de, nuno.sa@analog.com, upstream@semihalf.com, =?utf-8?q?Pawe=C5=82_Anikiel?= Subject: [PATCH 8/9] dt-bindings: ASoC: Add mute-gpio to ssm2602 Date: Fri, 14 Apr 2023 16:02:02 +0200 Message-ID: <20230414140203.707729-9-pan@semihalf.com> X-Mailer: git-send-email 2.40.0.634.g4ca3ef3211-goog In-Reply-To: <20230414140203.707729-1-pan@semihalf.com> References: <20230414140203.707729-1-pan@semihalf.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add mute-gpio to ssm2602 Signed-off-by: Paweł Anikiel --- Documentation/devicetree/bindings/sound/adi,ssm2602.txt | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/sound/adi,ssm2602.txt b/Documentation/devicetree/bindings/sound/adi,ssm2602.txt index 3b3302fe399b..132aa9668e7e 100644 --- a/Documentation/devicetree/bindings/sound/adi,ssm2602.txt +++ b/Documentation/devicetree/bindings/sound/adi,ssm2602.txt @@ -11,6 +11,10 @@ Required properties: - reg : the I2C address of the device for I2C, the chip select number for SPI. +Optional properties: + +- mute-gpios: GPIO specifier for the mute pin + Example: ssm2602: ssm2602@1a { From patchwork Fri Apr 14 14:02:03 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Pawe=C5=82_Anikiel?= X-Patchwork-Id: 673180 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5914AC77B76 for ; Fri, 14 Apr 2023 14:03:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230193AbjDNODu (ORCPT ); Fri, 14 Apr 2023 10:03:50 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53376 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230224AbjDNODn (ORCPT ); Fri, 14 Apr 2023 10:03:43 -0400 Received: from mail-lj1-x233.google.com (mail-lj1-x233.google.com [IPv6:2a00:1450:4864:20::233]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 550F32D4E for ; Fri, 14 Apr 2023 07:03:06 -0700 (PDT) Received: by mail-lj1-x233.google.com with SMTP id h8so3066795ljf.3 for ; Fri, 14 Apr 2023 07:03:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf.com; s=google; t=1681480974; x=1684072974; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=8YA5l458OG2xTSndJtJKAZvkZUt5Wi8ebzINtZE34dg=; b=m3EUEris+Gszu2c+E8GGw6gGzpt4sDNj107p2ZIilXUFmbTbGsKLm6NdlOpQpptIUX N4Qq7fKgJ3NbBQfGSO/Y2l9AXqga816Fb33t7GdzoycHpBzJi0BPR+Im58EHuYePTr6K 35qfsSB/ws4Q1yFa4Mq8SFyn4LPeWPvhJRHe+T0wrel5WDLLUzplMShn5K6uIirBp2Q0 2QU3tAnK7/4Wls5/mUAMlPpLRAjT3/jrwlbR8R7vYexFu+KGiUFTzVpY41YACjeaziR0 mnRcRfK/RHRl3paL2KBQ3tG2yGWJlybKfJsDKRb+2XagAOqcQx51qVWjGhX2UP5NiqV6 6Tkw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1681480974; x=1684072974; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=8YA5l458OG2xTSndJtJKAZvkZUt5Wi8ebzINtZE34dg=; b=hBk4Ssmhk4JWzzPAFHxqds5OoYZECEOdecLg+obotlwoGaL8wh9CWxBAU39vFBHTuB fTlI7awZdwNtGvhl8vpwuavsbNo0Ll/Oh938qw6dt94NMHaMBqpSWi5/3GgL0bhxLVTq eQ7FDdt3B3V0uT+GcPxKvcDFVyZXCgog8Y02tagb3KkSYVKjpwA6d7pWXiX12FVFPoSt qe7gK1oVPBWkkRW45yKu5ICKrLD9ebhl5r22OnsNbrQ3RnaGypOTOLLGOQojJHE2CXRN Z3zo7bRZiVw5t+UcS/dNih4rYsMmKXXMmKGtM5jUuwfmtyIf7KlpW6VmbLtljWMkx7Br TUWg== X-Gm-Message-State: AAQBX9eLgj86ei4ty2AlwmRXt+HWysSqL0qb7JYg03WzmBj9JrB6gege tOGM1DBFtva37T25yu8pFnXcYw== X-Google-Smtp-Source: AKy350YAbEsWVjeiiZRye1QbGqhGM+1HTvCZL1EsMT7NMasjE6Bie7EA43J69Wcu8qE2YMAwAr66iw== X-Received: by 2002:a2e:880a:0:b0:2a8:a573:aed5 with SMTP id x10-20020a2e880a000000b002a8a573aed5mr1333306ljh.27.1681480973763; Fri, 14 Apr 2023 07:02:53 -0700 (PDT) Received: from panikiel.roam.corp.google.com (staticline-31-182-201-26.toya.net.pl. [31.182.201.26]) by smtp.gmail.com with ESMTPSA id 15-20020a2eb2cf000000b002a76e2dedbcsm828684ljz.139.2023.04.14.07.02.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 14 Apr 2023 07:02:53 -0700 (PDT) From: =?utf-8?q?Pawe=C5=82_Anikiel?= To: alsa-devel@alsa-project.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, lgirdwood@gmail.com, broonie@kernel.org Cc: perex@perex.cz, tiwai@suse.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, dinguyen@kernel.org, lars@metafoo.de, nuno.sa@analog.com, upstream@semihalf.com, =?utf-8?q?Pawe=C5=82_Anikiel?= Subject: [PATCH 9/9] ARM: dts: chameleonv3: Add ssm2603 mute gpio Date: Fri, 14 Apr 2023 16:02:03 +0200 Message-ID: <20230414140203.707729-10-pan@semihalf.com> X-Mailer: git-send-email 2.40.0.634.g4ca3ef3211-goog In-Reply-To: <20230414140203.707729-1-pan@semihalf.com> References: <20230414140203.707729-1-pan@semihalf.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The ssm2603 mute pin is connected to a gpio expander. Add this connection to the devicetree. Signed-off-by: Paweł Anikiel --- arch/arm/boot/dts/socfpga_arria10_chameleonv3.dts | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/socfpga_arria10_chameleonv3.dts b/arch/arm/boot/dts/socfpga_arria10_chameleonv3.dts index c75f41058196..81e83ce0f8e7 100644 --- a/arch/arm/boot/dts/socfpga_arria10_chameleonv3.dts +++ b/arch/arm/boot/dts/socfpga_arria10_chameleonv3.dts @@ -3,6 +3,7 @@ * Copyright 2022 Google LLC */ /dts-v1/; +#include #include "socfpga_arria10_mercury_aa1.dtsi" / { @@ -67,6 +68,7 @@ &i2c0 { ssm2603: audio-codec@1a { compatible = "adi,ssm2603"; reg = <0x1a>; + mute-gpios = <&u80 0 GPIO_ACTIVE_LOW>; }; };