From patchwork Mon Apr 17 07:55:46 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 674010 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 698E1C77B76 for ; Mon, 17 Apr 2023 07:56:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231145AbjDQH4A (ORCPT ); Mon, 17 Apr 2023 03:56:00 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42102 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230496AbjDQHz6 (ORCPT ); Mon, 17 Apr 2023 03:55:58 -0400 Received: from mail-lj1-x22f.google.com (mail-lj1-x22f.google.com [IPv6:2a00:1450:4864:20::22f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5647F3AB6 for ; Mon, 17 Apr 2023 00:55:56 -0700 (PDT) Received: by mail-lj1-x22f.google.com with SMTP id 38308e7fff4ca-2a8baeac4d1so9499091fa.1 for ; Mon, 17 Apr 2023 00:55:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1681718154; x=1684310154; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=o2kEZXqS3DdorsV7KBvalbCQQT9rGiidMVD8f+P+zW8=; b=cszasHJqTYYYiVgMtunipV+yzyUhFzSLNhUSkwJDjzdL7jFJrC3sW5CWMmi297UZuk icxBUMV5s1ZlZ3lqmVzkwG02nMxJ6IXkEO26lhcMrSMSIQTM71BrUKYMkURHWrY6ZnKI bAVlqFHdMatGCfWMnFwelhVbkjVURlAIXTqiWVJhGu8myBWN+i9tHfHpmFR0NSKQGGud rkycl4wBZ3xdjEtnSM+p7sCoqwxTUDCrsMvfS03lNPgWMM9FCJlAe6K70IrzW+VLH3DA Xj6hQQfit2+FZiMRguB3LIuZ9asqaQCfhECdLQI7rljKFlEP08FJMzEBr2y1RJOH1FNS HyiQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1681718154; x=1684310154; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=o2kEZXqS3DdorsV7KBvalbCQQT9rGiidMVD8f+P+zW8=; b=PXspFdorox9o3hpoEKrcR+vlgnGOG03XE/exMy9kz9/E7umICfQ+uai9c6QvS36M7m VV75BpuEmTDw+xf6O5Jcrs5G1ECB0VQFTiLjPxedKqDy0QvXfBrGJcmLBQYDPHp1otvr uHrIprLYd+R37fmk0VGf0sEo81JF3bCfp2JFLds6z16p33wwPrn7vRD1sQMuIsOd/mCm OySgcERFeuQDpaDZdZqavb+wdof5qlOkCNI9A0TUrrjJkb+A/lApJo9WbrxvlopVU//D C5m2/NKdnLek/U3kSGy20wpJtEuy/9GfuCrjepAcChFWqPYFOPzrnnrfONukUPNaL6JS Ojnw== X-Gm-Message-State: AAQBX9fgqnUFqMzm5agocTc3O21psEJ0ApkIyco65uINkKm13rbFnv+r JdQi8/OPENRLNYKcKQMsyBGp14YwhRqIX2s6nMk= X-Google-Smtp-Source: AKy350bPHIoevthvL1Vu2On/x5qhfIXMiZgEySgZRAofY0B4hePo2ONJGYQf+Vn7/2yaEFBJjWs1Yw== X-Received: by 2002:a19:c502:0:b0:4ec:8087:88bb with SMTP id w2-20020a19c502000000b004ec808788bbmr1805886lfe.3.1681718154207; Mon, 17 Apr 2023 00:55:54 -0700 (PDT) Received: from [192.168.1.2] (c-05d8225c.014-348-6c756e10.bbcust.telenor.se. [92.34.216.5]) by smtp.gmail.com with ESMTPSA id p2-20020a19f002000000b004eb274b3a43sm1952547lfc.134.2023.04.17.00.55.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Apr 2023 00:55:53 -0700 (PDT) From: Linus Walleij Date: Mon, 17 Apr 2023 09:55:46 +0200 Subject: [PATCH 1/7] dt-bindings: dma: dma40: Prefer to pass sram through phandle MIME-Version: 1.0 Message-Id: <20230417-ux500-dma40-cleanup-v1-1-b26324956e47@linaro.org> References: <20230417-ux500-dma40-cleanup-v1-0-b26324956e47@linaro.org> In-Reply-To: <20230417-ux500-dma40-cleanup-v1-0-b26324956e47@linaro.org> To: Vinod Koul , Rob Herring , Krzysztof Kozlowski Cc: dmaengine@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Linus Walleij X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Extend the DMA40 bindings so that we can pass two SRAM segments as phandles instead of directly referring to the memory address in the second reg cell. This enables more granular control over the SRAM, and adds the optiona LCLA SRAM segment as well. Deprecate the old way of passing LCPA as a second reg cell, make sram compulsory. Signed-off-by: Linus Walleij --- .../devicetree/bindings/dma/stericsson,dma40.yaml | 35 +++++++++++++++++----- 1 file changed, 27 insertions(+), 8 deletions(-) diff --git a/Documentation/devicetree/bindings/dma/stericsson,dma40.yaml b/Documentation/devicetree/bindings/dma/stericsson,dma40.yaml index 64845347f44d..4fe0df937171 100644 --- a/Documentation/devicetree/bindings/dma/stericsson,dma40.yaml +++ b/Documentation/devicetree/bindings/dma/stericsson,dma40.yaml @@ -112,14 +112,23 @@ properties: - const: stericsson,dma40 reg: - items: - - description: DMA40 memory base - - description: LCPA memory base + oneOf: + - items: + - description: DMA40 memory base + - items: + - description: DMA40 memory base + - description: LCPA memory base, deprecated, use eSRAM pool instead + deprecated: true + reg-names: - items: - - const: base - - const: lcpa + oneOf: + - items: + - const: base + - items: + - const: base + - const: lcpa + deprecated: true interrupts: maxItems: 1 @@ -127,6 +136,14 @@ properties: clocks: maxItems: 1 + sram: + $ref: '/schemas/types.yaml#/definitions/phandle-array' + items: + maxItems: 2 + description: + List of phandles for the SRAM used by the DMA40 block, the first + phandle is the LCPA memory, the second is the LCLA memory. + memcpy-channels: $ref: /schemas/types.yaml#/definitions/uint32-array description: Array of u32 elements indicating which channels on the DMA @@ -138,6 +155,7 @@ required: - reg - interrupts - clocks + - sram - memcpy-channels additionalProperties: false @@ -149,8 +167,9 @@ examples: #include dma-controller@801c0000 { compatible = "stericsson,db8500-dma40", "stericsson,dma40"; - reg = <0x801c0000 0x1000>, <0x40010000 0x800>; - reg-names = "base", "lcpa"; + reg = <0x801c0000 0x1000>; + reg-names = "base"; + sram = <&lcpa>, <&lcla>; interrupts = ; #dma-cells = <3>; memcpy-channels = <56 57 58 59 60>; From patchwork Mon Apr 17 07:55:47 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 674808 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 60B4AC77B7C for ; Mon, 17 Apr 2023 07:56:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230496AbjDQH4B (ORCPT ); Mon, 17 Apr 2023 03:56:01 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42112 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230213AbjDQHz7 (ORCPT ); Mon, 17 Apr 2023 03:55:59 -0400 Received: from mail-lf1-x12a.google.com (mail-lf1-x12a.google.com [IPv6:2a00:1450:4864:20::12a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F0A6C3C10 for ; Mon, 17 Apr 2023 00:55:56 -0700 (PDT) Received: by mail-lf1-x12a.google.com with SMTP id 2adb3069b0e04-4ec9ccab8bbso1203348e87.2 for ; Mon, 17 Apr 2023 00:55:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1681718155; x=1684310155; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=wDtAHFkACNF4Fh0e1ECtMlpIQkwRfUIlYaCT74L7zJo=; b=q7WCF1N+CRQkoWPOWi5hetk0qFQtsHK02pWAAiDM91JT2mUoRVoQFvTq0XtekzYjfP aDNyKKUAvU7Zt6SdaYhc00poFYogGvx8fXCB0ZL0R2C+F3RjJbm9lvaJH889C1T9Pwkw 62Q0IQsR7pLMyPOgnyyh/OFIFQLd3HYmxAsAWzUiacTN149pJ8Toi5J7kLBdQ2gD+Hbh 5wxuzji9RIXzVnnHv6TxTd3nZWqc7Gl7eXzfBGHbIHLmY7SpYBoGkzrp7V1Dv7MprKOU AH/ITkbWNpr+A86d56rEn7+lMiMOrtUujLH+uEBAPreyfdRSEh6XeGHc9xfWB7x3OKej bJiQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1681718155; x=1684310155; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=wDtAHFkACNF4Fh0e1ECtMlpIQkwRfUIlYaCT74L7zJo=; b=cN8GlgOZDUWW/a99r6y/oqrEJzZQDyvOgyIc+11hQFvGf8H8FrcVYZHMaxfh6t5vWV PvvXjC5RKgmLAZ0jc7UjZA13FH4s3Yqq4IZuE3SLo0CpsJmJXq4fhzeLR06si9hX3iO6 dpAK2Kz8uV5e8ODT2LAbEdZKMXU0yADDjcNNfmWlMFtH73SPkvs3B1QToO540SCB8LFV zi2PlvBu3SDaojvKkUOZnZhCtCcNcHdxhp6nNqAyovRkqzbPCL8or5qOCULLYi85mYUm k96VtYup2fgLKv5fvKw+bNWJOy7YE/+7/JsKDWgcjCWnA/UUXDluJA1TkXue4fJMYcNf c5Xw== X-Gm-Message-State: AAQBX9dE4UNF6hNTHvPnng3gF27RZH6jJwI76VRLTWs/qyC2EXrHhS9k E7wzKqGzuKJsmYZvKcsnrHfB7WzMbMrLeoB+W4w= X-Google-Smtp-Source: AKy350ZboDm+4NK7B9xoD63pnZSAk88IDjHPqcL+OvTd7BTSkWUG9K2d8Mr8xj9P21rFBQtOk3YUqA== X-Received: by 2002:ac2:51b8:0:b0:4ed:bfbf:4486 with SMTP id f24-20020ac251b8000000b004edbfbf4486mr1417102lfk.4.1681718155000; Mon, 17 Apr 2023 00:55:55 -0700 (PDT) Received: from [192.168.1.2] (c-05d8225c.014-348-6c756e10.bbcust.telenor.se. [92.34.216.5]) by smtp.gmail.com with ESMTPSA id p2-20020a19f002000000b004eb274b3a43sm1952547lfc.134.2023.04.17.00.55.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Apr 2023 00:55:54 -0700 (PDT) From: Linus Walleij Date: Mon, 17 Apr 2023 09:55:47 +0200 Subject: [PATCH 2/7] dmaengine: ste_dma40: Get LCPA SRAM from SRAM node MIME-Version: 1.0 Message-Id: <20230417-ux500-dma40-cleanup-v1-2-b26324956e47@linaro.org> References: <20230417-ux500-dma40-cleanup-v1-0-b26324956e47@linaro.org> In-Reply-To: <20230417-ux500-dma40-cleanup-v1-0-b26324956e47@linaro.org> To: Vinod Koul , Rob Herring , Krzysztof Kozlowski Cc: dmaengine@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Linus Walleij X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Instead of passing the reserved SRAM as a "reg" field look for a phandle to the LCPA SRAM memory so we can use the proper SRAM device tree bindings for the SRAM. Signed-off-by: Linus Walleij --- drivers/dma/Kconfig | 1 + drivers/dma/ste_dma40.c | 47 ++++++++++++++++++++++++----------------------- 2 files changed, 25 insertions(+), 23 deletions(-) diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig index fb7073fc034f..37db3dc9a92a 100644 --- a/drivers/dma/Kconfig +++ b/drivers/dma/Kconfig @@ -553,6 +553,7 @@ config STE_DMA40 bool "ST-Ericsson DMA40 support" depends on ARCH_U8500 select DMA_ENGINE + select SRAM help Support for ST-Ericsson DMA40 controller diff --git a/drivers/dma/ste_dma40.c b/drivers/dma/ste_dma40.c index f093e08c23b1..236269d35a53 100644 --- a/drivers/dma/ste_dma40.c +++ b/drivers/dma/ste_dma40.c @@ -19,6 +19,7 @@ #include #include #include +#include #include #include #include @@ -3506,9 +3507,11 @@ static int __init d40_probe(struct platform_device *pdev) { struct stedma40_platform_data *plat_data = dev_get_platdata(&pdev->dev); struct device_node *np = pdev->dev.of_node; + struct device_node *np_lcpa; int ret = -ENOENT; struct d40_base *base; struct resource *res; + struct resource res_lcpa; int num_reserved_chans; u32 val; @@ -3535,37 +3538,37 @@ static int __init d40_probe(struct platform_device *pdev) spin_lock_init(&base->interrupt_lock); spin_lock_init(&base->execmd_lock); - /* Get IO for logical channel parameter address */ - res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "lcpa"); - if (!res) { - ret = -ENOENT; - d40_err(&pdev->dev, "No \"lcpa\" memory resource\n"); - goto destroy_cache; + /* Get IO for logical channel parameter address (LCPA) */ + np_lcpa = of_parse_phandle(np, "sram", 0); + if (!np_lcpa) { + dev_err(&pdev->dev, "no LCPA SRAM node\n"); + goto report_failure; } - base->lcpa_size = resource_size(res); - base->phy_lcpa = res->start; - - if (request_mem_region(res->start, resource_size(res), - D40_NAME " I/O lcpa") == NULL) { - ret = -EBUSY; - d40_err(&pdev->dev, "Failed to request LCPA region %pR\n", res); - goto destroy_cache; + /* This is no device so read the address directly from the node */ + ret = of_address_to_resource(np_lcpa, 0, &res_lcpa); + if (ret) { + dev_err(&pdev->dev, "no LCPA SRAM resource\n"); + goto report_failure; } + base->lcpa_size = resource_size(&res_lcpa); + base->phy_lcpa = res_lcpa.start; + dev_info(&pdev->dev, "found LCPA SRAM at 0x%08x, size 0x%08x\n", + base->phy_lcpa, base->lcpa_size); /* We make use of ESRAM memory for this. */ val = readl(base->virtbase + D40_DREG_LCPA); - if (res->start != val && val != 0) { + if (base->phy_lcpa != val && val != 0) { dev_warn(&pdev->dev, - "[%s] Mismatch LCPA dma 0x%x, def %pa\n", - __func__, val, &res->start); + "[%s] Mismatch LCPA dma 0x%x, def %08x\n", + __func__, val, base->phy_lcpa); } else - writel(res->start, base->virtbase + D40_DREG_LCPA); + writel(base->phy_lcpa, base->virtbase + D40_DREG_LCPA); - base->lcpa_base = ioremap(res->start, resource_size(res)); + base->lcpa_base = ioremap(base->phy_lcpa, base->lcpa_size); if (!base->lcpa_base) { ret = -ENOMEM; d40_err(&pdev->dev, "Failed to ioremap LCPA region\n"); - goto destroy_cache; + goto release_base; } /* If lcla has to be located in ESRAM we don't need to allocate */ if (base->plat_data->use_esram_lcla) { @@ -3678,9 +3681,7 @@ static int __init d40_probe(struct platform_device *pdev) if (base->lcpa_base) iounmap(base->lcpa_base); - if (base->phy_lcpa) - release_mem_region(base->phy_lcpa, - base->lcpa_size); +release_base: if (base->phy_start) release_mem_region(base->phy_start, base->phy_size); From patchwork Mon Apr 17 07:55:48 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 674009 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1E956C77B72 for ; Mon, 17 Apr 2023 07:56:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230424AbjDQH4F (ORCPT ); Mon, 17 Apr 2023 03:56:05 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42110 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231157AbjDQH4A (ORCPT ); Mon, 17 Apr 2023 03:56:00 -0400 Received: from mail-lf1-x136.google.com (mail-lf1-x136.google.com [IPv6:2a00:1450:4864:20::136]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DB0563A82 for ; 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[92.34.216.5]) by smtp.gmail.com with ESMTPSA id p2-20020a19f002000000b004eb274b3a43sm1952547lfc.134.2023.04.17.00.55.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Apr 2023 00:55:55 -0700 (PDT) From: Linus Walleij Date: Mon, 17 Apr 2023 09:55:48 +0200 Subject: [PATCH 3/7] dmaengine: ste_dma40: Add dev helper variable MIME-Version: 1.0 Message-Id: <20230417-ux500-dma40-cleanup-v1-3-b26324956e47@linaro.org> References: <20230417-ux500-dma40-cleanup-v1-0-b26324956e47@linaro.org> In-Reply-To: <20230417-ux500-dma40-cleanup-v1-0-b26324956e47@linaro.org> To: Vinod Koul , Rob Herring , Krzysztof Kozlowski Cc: dmaengine@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Linus Walleij X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The &pdev->dev device pointer is used so many times in the probe() and d40_hw_detect_init() functions that a local *dev variable makes the code way easier to read. Signed-off-by: Linus Walleij --- drivers/dma/ste_dma40.c | 50 +++++++++++++++++++++++++------------------------ 1 file changed, 26 insertions(+), 24 deletions(-) diff --git a/drivers/dma/ste_dma40.c b/drivers/dma/ste_dma40.c index 236269d35a53..ef2a2fdaa82e 100644 --- a/drivers/dma/ste_dma40.c +++ b/drivers/dma/ste_dma40.c @@ -3104,6 +3104,7 @@ static int __init d40_phy_res_init(struct d40_base *base) static struct d40_base * __init d40_hw_detect_init(struct platform_device *pdev) { struct stedma40_platform_data *plat_data = dev_get_platdata(&pdev->dev); + struct device *dev = &pdev->dev; struct clk *clk; void __iomem *virtbase; struct resource *res; @@ -3117,15 +3118,15 @@ static struct d40_base * __init d40_hw_detect_init(struct platform_device *pdev) u32 cid; u8 rev; - clk = clk_get(&pdev->dev, NULL); + clk = clk_get(dev, NULL); if (IS_ERR(clk)) { - d40_err(&pdev->dev, "No matching clock found\n"); + d40_err(dev, "No matching clock found\n"); goto check_prepare_enabled; } clk_ret = clk_prepare_enable(clk); if (clk_ret) { - d40_err(&pdev->dev, "Failed to prepare/enable clock\n"); + d40_err(dev, "Failed to prepare/enable clock\n"); goto disable_unprepare; } @@ -3151,11 +3152,11 @@ static struct d40_base * __init d40_hw_detect_init(struct platform_device *pdev) & 255) << (i * 8); if (cid != AMBA_CID) { - d40_err(&pdev->dev, "Unknown hardware! No PrimeCell ID\n"); + d40_err(dev, "Unknown hardware! No PrimeCell ID\n"); goto unmap_io; } if (AMBA_MANF_BITS(pid) != AMBA_VENDOR_ST) { - d40_err(&pdev->dev, "Unknown designer! Got %x wanted %x\n", + d40_err(dev, "Unknown designer! Got %x wanted %x\n", AMBA_MANF_BITS(pid), AMBA_VENDOR_ST); goto unmap_io; @@ -3171,7 +3172,7 @@ static struct d40_base * __init d40_hw_detect_init(struct platform_device *pdev) */ rev = AMBA_REV_BITS(pid); if (rev < 2) { - d40_err(&pdev->dev, "hardware revision: %d is not supported", rev); + d40_err(dev, "hardware revision: %d is not supported", rev); goto unmap_io; } @@ -3189,7 +3190,7 @@ static struct d40_base * __init d40_hw_detect_init(struct platform_device *pdev) num_log_chans = num_phy_chans * D40_MAX_LOG_CHAN_PER_PHY; - dev_info(&pdev->dev, + dev_info(dev, "hardware rev: %d @ %pa with %d physical and %d logical channels\n", rev, &res->start, num_phy_chans, num_log_chans); @@ -3209,7 +3210,7 @@ static struct d40_base * __init d40_hw_detect_init(struct platform_device *pdev) base->phy_size = resource_size(res); base->virtbase = virtbase; base->plat_data = plat_data; - base->dev = &pdev->dev; + base->dev = dev; base->phy_chans = ((void *)base) + ALIGN(sizeof(struct d40_base), 4); base->log_chans = &base->phy_chans[num_phy_chans]; @@ -3505,7 +3506,8 @@ static int __init d40_of_probe(struct platform_device *pdev, static int __init d40_probe(struct platform_device *pdev) { - struct stedma40_platform_data *plat_data = dev_get_platdata(&pdev->dev); + struct device *dev = &pdev->dev; + struct stedma40_platform_data *plat_data = dev_get_platdata(dev); struct device_node *np = pdev->dev.of_node; struct device_node *np_lcpa; int ret = -ENOENT; @@ -3522,7 +3524,7 @@ static int __init d40_probe(struct platform_device *pdev) goto report_failure; } } else { - d40_err(&pdev->dev, "No pdata or Device Tree provided\n"); + d40_err(dev, "No pdata or Device Tree provided\n"); goto report_failure; } } @@ -3541,24 +3543,24 @@ static int __init d40_probe(struct platform_device *pdev) /* Get IO for logical channel parameter address (LCPA) */ np_lcpa = of_parse_phandle(np, "sram", 0); if (!np_lcpa) { - dev_err(&pdev->dev, "no LCPA SRAM node\n"); + dev_err(dev, "no LCPA SRAM node\n"); goto report_failure; } /* This is no device so read the address directly from the node */ ret = of_address_to_resource(np_lcpa, 0, &res_lcpa); if (ret) { - dev_err(&pdev->dev, "no LCPA SRAM resource\n"); + dev_err(dev, "no LCPA SRAM resource\n"); goto report_failure; } base->lcpa_size = resource_size(&res_lcpa); base->phy_lcpa = res_lcpa.start; - dev_info(&pdev->dev, "found LCPA SRAM at 0x%08x, size 0x%08x\n", + dev_info(dev, "found LCPA SRAM at 0x%08x, size 0x%08x\n", base->phy_lcpa, base->lcpa_size); /* We make use of ESRAM memory for this. */ val = readl(base->virtbase + D40_DREG_LCPA); if (base->phy_lcpa != val && val != 0) { - dev_warn(&pdev->dev, + dev_warn(dev, "[%s] Mismatch LCPA dma 0x%x, def %08x\n", __func__, val, base->phy_lcpa); } else @@ -3567,7 +3569,7 @@ static int __init d40_probe(struct platform_device *pdev) base->lcpa_base = ioremap(base->phy_lcpa, base->lcpa_size); if (!base->lcpa_base) { ret = -ENOMEM; - d40_err(&pdev->dev, "Failed to ioremap LCPA region\n"); + d40_err(dev, "Failed to ioremap LCPA region\n"); goto release_base; } /* If lcla has to be located in ESRAM we don't need to allocate */ @@ -3576,7 +3578,7 @@ static int __init d40_probe(struct platform_device *pdev) "lcla_esram"); if (!res) { ret = -ENOENT; - d40_err(&pdev->dev, + d40_err(dev, "No \"lcla_esram\" memory resource\n"); goto destroy_cache; } @@ -3584,7 +3586,7 @@ static int __init d40_probe(struct platform_device *pdev) resource_size(res)); if (!base->lcla_pool.base) { ret = -ENOMEM; - d40_err(&pdev->dev, "Failed to ioremap LCLA region\n"); + d40_err(dev, "Failed to ioremap LCLA region\n"); goto destroy_cache; } writel(res->start, base->virtbase + D40_DREG_LCLA); @@ -3592,7 +3594,7 @@ static int __init d40_probe(struct platform_device *pdev) } else { ret = d40_lcla_allocate(base); if (ret) { - d40_err(&pdev->dev, "Failed to allocate LCLA area\n"); + d40_err(dev, "Failed to allocate LCLA area\n"); goto destroy_cache; } } @@ -3603,7 +3605,7 @@ static int __init d40_probe(struct platform_device *pdev) ret = request_irq(base->irq, d40_handle_interrupt, 0, D40_NAME, base); if (ret) { - d40_err(&pdev->dev, "No IRQ defined\n"); + d40_err(dev, "No IRQ defined\n"); goto destroy_cache; } @@ -3611,7 +3613,7 @@ static int __init d40_probe(struct platform_device *pdev) base->lcpa_regulator = regulator_get(base->dev, "lcla_esram"); if (IS_ERR(base->lcpa_regulator)) { - d40_err(&pdev->dev, "Failed to get lcpa_regulator\n"); + d40_err(dev, "Failed to get lcpa_regulator\n"); ret = PTR_ERR(base->lcpa_regulator); base->lcpa_regulator = NULL; goto destroy_cache; @@ -3619,7 +3621,7 @@ static int __init d40_probe(struct platform_device *pdev) ret = regulator_enable(base->lcpa_regulator); if (ret) { - d40_err(&pdev->dev, + d40_err(dev, "Failed to enable lcpa_regulator\n"); regulator_put(base->lcpa_regulator); base->lcpa_regulator = NULL; @@ -3642,7 +3644,7 @@ static int __init d40_probe(struct platform_device *pdev) ret = dma_set_max_seg_size(base->dev, STEDMA40_MAX_SEG_SIZE); if (ret) { - d40_err(&pdev->dev, "Failed to set dma max seg size\n"); + d40_err(dev, "Failed to set dma max seg size\n"); goto destroy_cache; } @@ -3651,7 +3653,7 @@ static int __init d40_probe(struct platform_device *pdev) if (np) { ret = of_dma_controller_register(np, d40_xlate, NULL); if (ret) - dev_err(&pdev->dev, + dev_err(dev, "could not register of_dma_controller\n"); } @@ -3701,7 +3703,7 @@ static int __init d40_probe(struct platform_device *pdev) kfree(base->phy_res); kfree(base); report_failure: - d40_err(&pdev->dev, "probe failed\n"); + d40_err(dev, "probe failed\n"); return ret; } From patchwork Mon Apr 17 07:55:49 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 674807 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A6996C77B70 for ; Mon, 17 Apr 2023 07:56:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229982AbjDQH42 (ORCPT ); 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[92.34.216.5]) by smtp.gmail.com with ESMTPSA id p2-20020a19f002000000b004eb274b3a43sm1952547lfc.134.2023.04.17.00.55.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Apr 2023 00:55:56 -0700 (PDT) From: Linus Walleij Date: Mon, 17 Apr 2023 09:55:49 +0200 Subject: [PATCH 4/7] dmaengine: ste_dma40: Remove platform data MIME-Version: 1.0 Message-Id: <20230417-ux500-dma40-cleanup-v1-4-b26324956e47@linaro.org> References: <20230417-ux500-dma40-cleanup-v1-0-b26324956e47@linaro.org> In-Reply-To: <20230417-ux500-dma40-cleanup-v1-0-b26324956e47@linaro.org> To: Vinod Koul , Rob Herring , Krzysztof Kozlowski Cc: dmaengine@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Linus Walleij X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The Ux500 is device tree-only since ages. Delete the platform data header and push it into or next to the driver instead. Drop the non-DT probe path since this will not happen. Signed-off-by: Linus Walleij --- drivers/dma/ste_dma40.c | 56 ++++++++---- .../dma-ste-dma40.h => drivers/dma/ste_dma40.h | 101 +-------------------- drivers/dma/ste_dma40_ll.c | 3 +- 3 files changed, 41 insertions(+), 119 deletions(-) diff --git a/drivers/dma/ste_dma40.c b/drivers/dma/ste_dma40.c index ef2a2fdaa82e..e5df28cdc4c8 100644 --- a/drivers/dma/ste_dma40.c +++ b/drivers/dma/ste_dma40.c @@ -23,11 +23,39 @@ #include #include #include -#include #include "dmaengine.h" +#include "ste_dma40.h" #include "ste_dma40_ll.h" +/** + * struct stedma40_platform_data - Configuration struct for the dma device. + * + * @dev_tx: mapping between destination event line and io address + * @dev_rx: mapping between source event line and io address + * @disabled_channels: A vector, ending with -1, that marks physical channels + * that are for different reasons not available for the driver. + * @soft_lli_chans: A vector, that marks physical channels will use LLI by SW + * which avoids HW bug that exists in some versions of the controller. + * SoftLLI introduces relink overhead that could impact performace for + * certain use cases. + * @num_of_soft_lli_chans: The number of channels that needs to be configured + * to use SoftLLI. + * @use_esram_lcla: flag for mapping the lcla into esram region + * @num_of_memcpy_chans: The number of channels reserved for memcpy. + * @num_of_phy_chans: The number of physical channels implemented in HW. + * 0 means reading the number of channels from DMA HW but this is only valid + * for 'multiple of 4' channels, like 8. + */ +struct stedma40_platform_data { + int disabled_channels[STEDMA40_MAX_PHYS]; + int *soft_lli_chans; + int num_of_soft_lli_chans; + bool use_esram_lcla; + int num_of_memcpy_chans; + int num_of_phy_chans; +}; + #define D40_NAME "dma40" #define D40_PHY_CHAN -1 @@ -2269,7 +2297,7 @@ d40_prep_sg(struct dma_chan *dchan, struct scatterlist *sg_src, return NULL; } -bool stedma40_filter(struct dma_chan *chan, void *data) +static bool stedma40_filter(struct dma_chan *chan, void *data) { struct stedma40_chan_cfg *info = data; struct d40_chan *d40c = @@ -2288,7 +2316,6 @@ bool stedma40_filter(struct dma_chan *chan, void *data) return err == 0; } -EXPORT_SYMBOL(stedma40_filter); static void __d40_set_prio_rt(struct d40_chan *d40c, int dev_type, bool src) { @@ -3517,16 +3544,9 @@ static int __init d40_probe(struct platform_device *pdev) int num_reserved_chans; u32 val; - if (!plat_data) { - if (np) { - if (d40_of_probe(pdev, np)) { - ret = -ENOMEM; - goto report_failure; - } - } else { - d40_err(dev, "No pdata or Device Tree provided\n"); - goto report_failure; - } + if (d40_of_probe(pdev, np)) { + ret = -ENOMEM; + goto report_failure; } base = d40_hw_detect_init(pdev); @@ -3650,11 +3670,11 @@ static int __init d40_probe(struct platform_device *pdev) d40_hw_init(base); - if (np) { - ret = of_dma_controller_register(np, d40_xlate, NULL); - if (ret) - dev_err(dev, - "could not register of_dma_controller\n"); + ret = of_dma_controller_register(np, d40_xlate, NULL); + if (ret) { + dev_err(dev, + "could not register of_dma_controller\n"); + goto destroy_cache; } dev_info(base->dev, "initialized\n"); diff --git a/include/linux/platform_data/dma-ste-dma40.h b/drivers/dma/ste_dma40.h similarity index 51% rename from include/linux/platform_data/dma-ste-dma40.h rename to drivers/dma/ste_dma40.h index 10641633facc..c697bfe16a01 100644 --- a/include/linux/platform_data/dma-ste-dma40.h +++ b/drivers/dma/ste_dma40.h @@ -1,19 +1,8 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -/* - * Copyright (C) ST-Ericsson SA 2007-2010 - * Author: Per Forlin for ST-Ericsson - * Author: Jonas Aaberg for ST-Ericsson - */ - #ifndef STE_DMA40_H #define STE_DMA40_H -#include -#include -#include -#include - /* * Maxium size for a single dma descriptor * Size is limited to 16 bits. @@ -118,92 +107,4 @@ struct stedma40_chan_cfg { int phy_channel; }; -/** - * struct stedma40_platform_data - Configuration struct for the dma device. - * - * @dev_tx: mapping between destination event line and io address - * @dev_rx: mapping between source event line and io address - * @disabled_channels: A vector, ending with -1, that marks physical channels - * that are for different reasons not available for the driver. - * @soft_lli_chans: A vector, that marks physical channels will use LLI by SW - * which avoids HW bug that exists in some versions of the controller. - * SoftLLI introduces relink overhead that could impact performace for - * certain use cases. - * @num_of_soft_lli_chans: The number of channels that needs to be configured - * to use SoftLLI. - * @use_esram_lcla: flag for mapping the lcla into esram region - * @num_of_memcpy_chans: The number of channels reserved for memcpy. - * @num_of_phy_chans: The number of physical channels implemented in HW. - * 0 means reading the number of channels from DMA HW but this is only valid - * for 'multiple of 4' channels, like 8. - */ -struct stedma40_platform_data { - int disabled_channels[STEDMA40_MAX_PHYS]; - int *soft_lli_chans; - int num_of_soft_lli_chans; - bool use_esram_lcla; - int num_of_memcpy_chans; - int num_of_phy_chans; -}; - -#ifdef CONFIG_STE_DMA40 - -/** - * stedma40_filter() - Provides stedma40_chan_cfg to the - * ste_dma40 dma driver via the dmaengine framework. - * does some checking of what's provided. - * - * Never directly called by client. It used by dmaengine. - * @chan: dmaengine handle. - * @data: Must be of type: struct stedma40_chan_cfg and is - * the configuration of the framework. - * - * - */ - -bool stedma40_filter(struct dma_chan *chan, void *data); - -/** - * stedma40_slave_mem() - Transfers a raw data buffer to or from a slave - * (=device) - * - * @chan: dmaengine handle - * @addr: source or destination physicall address. - * @size: bytes to transfer - * @direction: direction of transfer - * @flags: is actually enum dma_ctrl_flags. See dmaengine.h - */ - -static inline struct -dma_async_tx_descriptor *stedma40_slave_mem(struct dma_chan *chan, - dma_addr_t addr, - unsigned int size, - enum dma_transfer_direction direction, - unsigned long flags) -{ - struct scatterlist sg; - sg_init_table(&sg, 1); - sg.dma_address = addr; - sg.length = size; - - return dmaengine_prep_slave_sg(chan, &sg, 1, direction, flags); -} - -#else -static inline bool stedma40_filter(struct dma_chan *chan, void *data) -{ - return false; -} - -static inline struct -dma_async_tx_descriptor *stedma40_slave_mem(struct dma_chan *chan, - dma_addr_t addr, - unsigned int size, - enum dma_transfer_direction direction, - unsigned long flags) -{ - return NULL; -} -#endif - -#endif +#endif /* STE_DMA40_H */ diff --git a/drivers/dma/ste_dma40_ll.c b/drivers/dma/ste_dma40_ll.c index b5287c661eb7..4c489b126cb2 100644 --- a/drivers/dma/ste_dma40_ll.c +++ b/drivers/dma/ste_dma40_ll.c @@ -6,8 +6,9 @@ */ #include -#include +#include +#include "ste_dma40.h" #include "ste_dma40_ll.h" static u8 d40_width_to_bits(enum dma_slave_buswidth width) From patchwork Mon Apr 17 07:55:50 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 674008 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 40BCDC77B76 for ; Mon, 17 Apr 2023 07:56:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231224AbjDQH43 (ORCPT ); Mon, 17 Apr 2023 03:56:29 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42246 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231169AbjDQH4C (ORCPT ); Mon, 17 Apr 2023 03:56:02 -0400 Received: from mail-lf1-x12e.google.com (mail-lf1-x12e.google.com [IPv6:2a00:1450:4864:20::12e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 977593AB6 for ; Mon, 17 Apr 2023 00:55:59 -0700 (PDT) Received: by mail-lf1-x12e.google.com with SMTP id 2adb3069b0e04-4ec9ccab8bbso1203367e87.2 for ; Mon, 17 Apr 2023 00:55:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1681718157; x=1684310157; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=WctxKpomw5MLFuTazOUJElliLOUHb46B+NNI3oGGJOk=; b=nrm3vCoDnCsGk5roNJOkOPJb/qrgzSDL7HZTpjuS0DYFM6k0XGk3ilID4Iatv3LMvT U8XRVJCyLpQPX9QHRfpxzhPr+M0L7uNCX/jXSFPGuAct/7na75uNhvspwNSp+NPOOgy2 c5sf/zmkK6CZ4sSFs4FPA+pTrK5+A6eQfN2XMWFzbyvyf0fKZzzaenFoeKS3LNFBdHez 7Cpjj8F9/dvQDjk24cKykEUjvRQCrPGJwkXmFFL2E04fQ0gOv9h34nIfWleyj3Q+tie1 6lbhupaT40ktTPvKuE2LOCfoE9spvTMDf8WK04iGb50AQ3vq605S/bKk3klAWPhdAT0S muzg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1681718157; x=1684310157; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=WctxKpomw5MLFuTazOUJElliLOUHb46B+NNI3oGGJOk=; b=Q8BdlXZ4oLVae4dvGKYH6WewBHhXvOH0qvrNHapQ9akVII5/K6dcRno7WaJnpYlkfq ncg7VIsZusHiDcFECeSwwjYe+eNquyrQq9JwvAmzja6wOBKJGo90Dy8FvKspAdJycavl E833lEifxY5D+RO3KTS9Hw2y1mJ/NAzMv0ipIkNZ3gBB8RWQizT4f9YvcObsqedpUZvI BRQBjIH12hntmK0epsOnAi+nZ4w/1r3CWp85oYVMhzo6vKQGCg8nimLdgZXrXhD6VDZJ nCt0N3/W+QHpReE+MoWs7w3qNsAnGTRMqdMACJ9s5DdZfv5ATefNE415tIiDfS/FowAZ AP8Q== X-Gm-Message-State: AAQBX9dzkz8zUfknj1l/N4wk1TnKFgv48r7yaisIyeQ0Gv6mKl8Z9rOA qdXKoobpUNsBVB0wd4YFJ6Sus4fro4lzAAFvd0s= X-Google-Smtp-Source: AKy350brBnsZQMq3FHoLYXhVv31Cc/XfOFRTXUTswulWQSeew8raaiwxMvUBRANzUX5EgIbKWZTllw== X-Received: by 2002:a05:6512:924:b0:4eb:274b:a69 with SMTP id f4-20020a056512092400b004eb274b0a69mr2163114lft.26.1681718157639; Mon, 17 Apr 2023 00:55:57 -0700 (PDT) Received: from [192.168.1.2] (c-05d8225c.014-348-6c756e10.bbcust.telenor.se. [92.34.216.5]) by smtp.gmail.com with ESMTPSA id p2-20020a19f002000000b004eb274b3a43sm1952547lfc.134.2023.04.17.00.55.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Apr 2023 00:55:57 -0700 (PDT) From: Linus Walleij Date: Mon, 17 Apr 2023 09:55:50 +0200 Subject: [PATCH 5/7] dmaengine: ste_dma40: Pass dev to OF function MIME-Version: 1.0 Message-Id: <20230417-ux500-dma40-cleanup-v1-5-b26324956e47@linaro.org> References: <20230417-ux500-dma40-cleanup-v1-0-b26324956e47@linaro.org> In-Reply-To: <20230417-ux500-dma40-cleanup-v1-0-b26324956e47@linaro.org> To: Vinod Koul , Rob Herring , Krzysztof Kozlowski Cc: dmaengine@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Linus Walleij X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The OF platform data population function only wants to use struct device *dev, so pass that instead. This change makes the compiler realize that the local platform data variable is unused, so drop that too. Signed-off-by: Linus Walleij --- drivers/dma/ste_dma40.c | 13 ++++++------- 1 file changed, 6 insertions(+), 7 deletions(-) diff --git a/drivers/dma/ste_dma40.c b/drivers/dma/ste_dma40.c index e5df28cdc4c8..fe98f12b8130 100644 --- a/drivers/dma/ste_dma40.c +++ b/drivers/dma/ste_dma40.c @@ -3480,14 +3480,14 @@ static int __init d40_lcla_allocate(struct d40_base *base) return ret; } -static int __init d40_of_probe(struct platform_device *pdev, +static int __init d40_of_probe(struct device *dev, struct device_node *np) { struct stedma40_platform_data *pdata; int num_phy = 0, num_memcpy = 0, num_disabled = 0; const __be32 *list; - pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); + pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL); if (!pdata) return -ENOMEM; @@ -3500,7 +3500,7 @@ static int __init d40_of_probe(struct platform_device *pdev, num_memcpy /= sizeof(*list); if (num_memcpy > D40_MEMCPY_MAX_CHANS || num_memcpy <= 0) { - d40_err(&pdev->dev, + d40_err(dev, "Invalid number of memcpy channels specified (%d)\n", num_memcpy); return -EINVAL; @@ -3515,7 +3515,7 @@ static int __init d40_of_probe(struct platform_device *pdev, num_disabled /= sizeof(*list); if (num_disabled >= STEDMA40_MAX_PHYS || num_disabled < 0) { - d40_err(&pdev->dev, + d40_err(dev, "Invalid number of disabled channels specified (%d)\n", num_disabled); return -EINVAL; @@ -3526,7 +3526,7 @@ static int __init d40_of_probe(struct platform_device *pdev, num_disabled); pdata->disabled_channels[num_disabled] = -1; - pdev->dev.platform_data = pdata; + dev->platform_data = pdata; return 0; } @@ -3534,7 +3534,6 @@ static int __init d40_of_probe(struct platform_device *pdev, static int __init d40_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; - struct stedma40_platform_data *plat_data = dev_get_platdata(dev); struct device_node *np = pdev->dev.of_node; struct device_node *np_lcpa; int ret = -ENOENT; @@ -3544,7 +3543,7 @@ static int __init d40_probe(struct platform_device *pdev) int num_reserved_chans; u32 val; - if (d40_of_probe(pdev, np)) { + if (d40_of_probe(dev, np)) { ret = -ENOMEM; goto report_failure; } From patchwork Mon Apr 17 07:55:51 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 674806 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id ED9EFC7EE20 for ; Mon, 17 Apr 2023 07:56:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231241AbjDQH4b (ORCPT ); Mon, 17 Apr 2023 03:56:31 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42260 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231178AbjDQH4D (ORCPT ); Mon, 17 Apr 2023 03:56:03 -0400 Received: from mail-lj1-x22d.google.com (mail-lj1-x22d.google.com [IPv6:2a00:1450:4864:20::22d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 75E8140EF for ; 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[92.34.216.5]) by smtp.gmail.com with ESMTPSA id p2-20020a19f002000000b004eb274b3a43sm1952547lfc.134.2023.04.17.00.55.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Apr 2023 00:55:58 -0700 (PDT) From: Linus Walleij Date: Mon, 17 Apr 2023 09:55:51 +0200 Subject: [PATCH 6/7] dmaengine: ste_dma40: Use managed resources MIME-Version: 1.0 Message-Id: <20230417-ux500-dma40-cleanup-v1-6-b26324956e47@linaro.org> References: <20230417-ux500-dma40-cleanup-v1-0-b26324956e47@linaro.org> In-Reply-To: <20230417-ux500-dma40-cleanup-v1-0-b26324956e47@linaro.org> To: Vinod Koul , Rob Herring , Krzysztof Kozlowski Cc: dmaengine@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Linus Walleij X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This switches the DMA40 driver to use a bunch of managed resources and strip down the errorpath. The result is pretty neat and makes the driver way more readable. Signed-off-by: Linus Walleij --- drivers/dma/ste_dma40.c | 180 ++++++++++++++++-------------------------------- 1 file changed, 61 insertions(+), 119 deletions(-) diff --git a/drivers/dma/ste_dma40.c b/drivers/dma/ste_dma40.c index fe98f12b8130..c5991009d3e4 100644 --- a/drivers/dma/ste_dma40.c +++ b/drivers/dma/ste_dma40.c @@ -554,8 +554,6 @@ struct d40_gen_dmac { * @virtbase: The virtual base address of the DMA's register. * @rev: silicon revision detected. * @clk: Pointer to the DMA clock structure. - * @phy_start: Physical memory start of the DMA registers. - * @phy_size: Size of the DMA register map. * @irq: The IRQ number. * @num_memcpy_chans: The number of channels used for memcpy (mem-to-mem * transfers). @@ -599,8 +597,6 @@ struct d40_base { void __iomem *virtbase; u8 rev:4; struct clk *clk; - phys_addr_t phy_start; - resource_size_t phy_size; int irq; int num_memcpy_chans; int num_phy_chans; @@ -3128,65 +3124,58 @@ static int __init d40_phy_res_init(struct d40_base *base) return num_phy_chans_avail; } +/* Called from the registered devm action */ +static void d40_drop_kmem_cache_action(void *d) +{ + struct kmem_cache *desc_slab = d; + + kmem_cache_destroy(desc_slab); +} + static struct d40_base * __init d40_hw_detect_init(struct platform_device *pdev) { struct stedma40_platform_data *plat_data = dev_get_platdata(&pdev->dev); struct device *dev = &pdev->dev; struct clk *clk; void __iomem *virtbase; - struct resource *res; struct d40_base *base; int num_log_chans; int num_phy_chans; int num_memcpy_chans; - int clk_ret = -EINVAL; int i; u32 pid; u32 cid; u8 rev; + int ret; - clk = clk_get(dev, NULL); - if (IS_ERR(clk)) { - d40_err(dev, "No matching clock found\n"); - goto check_prepare_enabled; - } - - clk_ret = clk_prepare_enable(clk); - if (clk_ret) { - d40_err(dev, "Failed to prepare/enable clock\n"); - goto disable_unprepare; - } + clk = devm_clk_get_enabled(dev, NULL); + if (IS_ERR(clk)) + return NULL; /* Get IO for DMAC base address */ - res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "base"); - if (!res) - goto disable_unprepare; - - if (request_mem_region(res->start, resource_size(res), - D40_NAME " I/O base") == NULL) - goto release_region; - - virtbase = ioremap(res->start, resource_size(res)); - if (!virtbase) - goto release_region; + virtbase = devm_platform_ioremap_resource_byname(pdev, "base"); + if (IS_ERR(virtbase)) { + dev_err(dev, "No IO base defined\n"); + return NULL; + } /* This is just a regular AMBA PrimeCell ID actually */ for (pid = 0, i = 0; i < 4; i++) - pid |= (readl(virtbase + resource_size(res) - 0x20 + 4 * i) + pid |= (readl(virtbase + SZ_4K - 0x20 + 4 * i) & 255) << (i * 8); for (cid = 0, i = 0; i < 4; i++) - cid |= (readl(virtbase + resource_size(res) - 0x10 + 4 * i) + cid |= (readl(virtbase + SZ_4K - 0x10 + 4 * i) & 255) << (i * 8); if (cid != AMBA_CID) { d40_err(dev, "Unknown hardware! No PrimeCell ID\n"); - goto unmap_io; + return NULL; } if (AMBA_MANF_BITS(pid) != AMBA_VENDOR_ST) { d40_err(dev, "Unknown designer! Got %x wanted %x\n", AMBA_MANF_BITS(pid), AMBA_VENDOR_ST); - goto unmap_io; + return NULL; } /* * HW revision: @@ -3200,7 +3189,7 @@ static struct d40_base * __init d40_hw_detect_init(struct platform_device *pdev) rev = AMBA_REV_BITS(pid); if (rev < 2) { d40_err(dev, "hardware revision: %d is not supported", rev); - goto unmap_io; + return NULL; } /* The number of physical channels on this HW */ @@ -3218,23 +3207,22 @@ static struct d40_base * __init d40_hw_detect_init(struct platform_device *pdev) num_log_chans = num_phy_chans * D40_MAX_LOG_CHAN_PER_PHY; dev_info(dev, - "hardware rev: %d @ %pa with %d physical and %d logical channels\n", - rev, &res->start, num_phy_chans, num_log_chans); + "hardware rev: %d with %d physical and %d logical channels\n", + rev, num_phy_chans, num_log_chans); - base = kzalloc(ALIGN(sizeof(struct d40_base), 4) + - (num_phy_chans + num_log_chans + num_memcpy_chans) * - sizeof(struct d40_chan), GFP_KERNEL); + base = devm_kzalloc(dev, + ALIGN(sizeof(struct d40_base), 4) + + (num_phy_chans + num_log_chans + num_memcpy_chans) * + sizeof(struct d40_chan), GFP_KERNEL); - if (base == NULL) - goto unmap_io; + if (!base) + return NULL; base->rev = rev; base->clk = clk; base->num_memcpy_chans = num_memcpy_chans; base->num_phy_chans = num_phy_chans; base->num_log_chans = num_log_chans; - base->phy_start = res->start; - base->phy_size = resource_size(res); base->virtbase = virtbase; base->plat_data = plat_data; base->dev = dev; @@ -3271,76 +3259,55 @@ static struct d40_base * __init d40_hw_detect_init(struct platform_device *pdev) base->gen_dmac.init_reg_size = ARRAY_SIZE(dma_init_reg_v4a); } - base->phy_res = kcalloc(num_phy_chans, - sizeof(*base->phy_res), - GFP_KERNEL); + base->phy_res = devm_kcalloc(dev, num_phy_chans, + sizeof(*base->phy_res), + GFP_KERNEL); if (!base->phy_res) - goto free_base; + return NULL; - base->lookup_phy_chans = kcalloc(num_phy_chans, - sizeof(*base->lookup_phy_chans), - GFP_KERNEL); + base->lookup_phy_chans = devm_kcalloc(dev, num_phy_chans, + sizeof(*base->lookup_phy_chans), + GFP_KERNEL); if (!base->lookup_phy_chans) - goto free_phy_res; + return NULL; - base->lookup_log_chans = kcalloc(num_log_chans, - sizeof(*base->lookup_log_chans), - GFP_KERNEL); + base->lookup_log_chans = devm_kcalloc(dev, num_log_chans, + sizeof(*base->lookup_log_chans), + GFP_KERNEL); if (!base->lookup_log_chans) - goto free_phy_chans; + return NULL; - base->reg_val_backup_chan = kmalloc_array(base->num_phy_chans, + base->reg_val_backup_chan = devm_kmalloc_array(dev, base->num_phy_chans, sizeof(d40_backup_regs_chan), GFP_KERNEL); if (!base->reg_val_backup_chan) - goto free_log_chans; + return NULL; - base->lcla_pool.alloc_map = kcalloc(num_phy_chans + base->lcla_pool.alloc_map = devm_kcalloc(dev, num_phy_chans * D40_LCLA_LINK_PER_EVENT_GRP, sizeof(*base->lcla_pool.alloc_map), GFP_KERNEL); if (!base->lcla_pool.alloc_map) - goto free_backup_chan; + return NULL; - base->regs_interrupt = kmalloc_array(base->gen_dmac.il_size, + base->regs_interrupt = devm_kmalloc_array(dev, base->gen_dmac.il_size, sizeof(*base->regs_interrupt), GFP_KERNEL); if (!base->regs_interrupt) - goto free_map; + return NULL; base->desc_slab = kmem_cache_create(D40_NAME, sizeof(struct d40_desc), 0, SLAB_HWCACHE_ALIGN, NULL); - if (base->desc_slab == NULL) - goto free_regs; + if (!base->desc_slab) + return NULL; + ret = devm_add_action_or_reset(dev, d40_drop_kmem_cache_action, + base->desc_slab); + if (ret) + return NULL; return base; - free_regs: - kfree(base->regs_interrupt); - free_map: - kfree(base->lcla_pool.alloc_map); - free_backup_chan: - kfree(base->reg_val_backup_chan); - free_log_chans: - kfree(base->lookup_log_chans); - free_phy_chans: - kfree(base->lookup_phy_chans); - free_phy_res: - kfree(base->phy_res); - free_base: - kfree(base); - unmap_io: - iounmap(virtbase); - release_region: - release_mem_region(res->start, resource_size(res)); - check_prepare_enabled: - if (!clk_ret) - disable_unprepare: - clk_disable_unprepare(clk); - if (!IS_ERR(clk)) - clk_put(clk); - return NULL; } static void __init d40_hw_init(struct d40_base *base) @@ -3585,11 +3552,11 @@ static int __init d40_probe(struct platform_device *pdev) } else writel(base->phy_lcpa, base->virtbase + D40_DREG_LCPA); - base->lcpa_base = ioremap(base->phy_lcpa, base->lcpa_size); + base->lcpa_base = devm_ioremap(dev, base->phy_lcpa, base->lcpa_size); if (!base->lcpa_base) { ret = -ENOMEM; d40_err(dev, "Failed to ioremap LCPA region\n"); - goto release_base; + goto report_failure; } /* If lcla has to be located in ESRAM we don't need to allocate */ if (base->plat_data->use_esram_lcla) { @@ -3599,14 +3566,14 @@ static int __init d40_probe(struct platform_device *pdev) ret = -ENOENT; d40_err(dev, "No \"lcla_esram\" memory resource\n"); - goto destroy_cache; + goto report_failure; } - base->lcla_pool.base = ioremap(res->start, - resource_size(res)); + base->lcla_pool.base = devm_ioremap(dev, res->start, + resource_size(res)); if (!base->lcla_pool.base) { ret = -ENOMEM; d40_err(dev, "Failed to ioremap LCLA region\n"); - goto destroy_cache; + goto report_failure; } writel(res->start, base->virtbase + D40_DREG_LCLA); @@ -3678,16 +3645,8 @@ static int __init d40_probe(struct platform_device *pdev) dev_info(base->dev, "initialized\n"); return 0; - destroy_cache: - kmem_cache_destroy(base->desc_slab); - if (base->virtbase) - iounmap(base->virtbase); - - if (base->lcla_pool.base && base->plat_data->use_esram_lcla) { - iounmap(base->lcla_pool.base); - base->lcla_pool.base = NULL; - } + destroy_cache: if (base->lcla_pool.dma_addr) dma_unmap_single(base->dev, base->lcla_pool.dma_addr, SZ_1K * base->num_phy_chans, @@ -3699,28 +3658,11 @@ static int __init d40_probe(struct platform_device *pdev) kfree(base->lcla_pool.base_unaligned); - if (base->lcpa_base) - iounmap(base->lcpa_base); - -release_base: - if (base->phy_start) - release_mem_region(base->phy_start, - base->phy_size); - if (base->clk) { - clk_disable_unprepare(base->clk); - clk_put(base->clk); - } - if (base->lcpa_regulator) { regulator_disable(base->lcpa_regulator); regulator_put(base->lcpa_regulator); } - kfree(base->lcla_pool.alloc_map); - kfree(base->lookup_log_chans); - kfree(base->lookup_phy_chans); - kfree(base->phy_res); - kfree(base); report_failure: d40_err(dev, "probe failed\n"); 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[92.34.216.5]) by smtp.gmail.com with ESMTPSA id p2-20020a19f002000000b004eb274b3a43sm1952547lfc.134.2023.04.17.00.55.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Apr 2023 00:55:59 -0700 (PDT) From: Linus Walleij Date: Mon, 17 Apr 2023 09:55:52 +0200 Subject: [PATCH 7/7] dmaengine: ste_dma40: Return error codes properly MIME-Version: 1.0 Message-Id: <20230417-ux500-dma40-cleanup-v1-7-b26324956e47@linaro.org> References: <20230417-ux500-dma40-cleanup-v1-0-b26324956e47@linaro.org> In-Reply-To: <20230417-ux500-dma40-cleanup-v1-0-b26324956e47@linaro.org> To: Vinod Koul , Rob Herring , Krzysztof Kozlowski Cc: dmaengine@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Linus Walleij X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This makes the probe() and its subfunction d40_hw_detect_init() return proper error codes. One effect of this is that deferred probe, e.g from the clock, will start to work, would it happen. Also it is better design. Signed-off-by: Linus Walleij --- drivers/dma/ste_dma40.c | 46 ++++++++++++++++++++++++---------------------- 1 file changed, 24 insertions(+), 22 deletions(-) diff --git a/drivers/dma/ste_dma40.c b/drivers/dma/ste_dma40.c index c5991009d3e4..2911017265cf 100644 --- a/drivers/dma/ste_dma40.c +++ b/drivers/dma/ste_dma40.c @@ -3132,7 +3132,8 @@ static void d40_drop_kmem_cache_action(void *d) kmem_cache_destroy(desc_slab); } -static struct d40_base * __init d40_hw_detect_init(struct platform_device *pdev) +static int __init d40_hw_detect_init(struct platform_device *pdev, + struct d40_base **retbase) { struct stedma40_platform_data *plat_data = dev_get_platdata(&pdev->dev); struct device *dev = &pdev->dev; @@ -3150,14 +3151,12 @@ static struct d40_base * __init d40_hw_detect_init(struct platform_device *pdev) clk = devm_clk_get_enabled(dev, NULL); if (IS_ERR(clk)) - return NULL; + return PTR_ERR(clk); /* Get IO for DMAC base address */ virtbase = devm_platform_ioremap_resource_byname(pdev, "base"); - if (IS_ERR(virtbase)) { - dev_err(dev, "No IO base defined\n"); - return NULL; - } + if (IS_ERR(virtbase)) + return PTR_ERR(virtbase); /* This is just a regular AMBA PrimeCell ID actually */ for (pid = 0, i = 0; i < 4; i++) @@ -3169,13 +3168,13 @@ static struct d40_base * __init d40_hw_detect_init(struct platform_device *pdev) if (cid != AMBA_CID) { d40_err(dev, "Unknown hardware! No PrimeCell ID\n"); - return NULL; + return -EINVAL; } if (AMBA_MANF_BITS(pid) != AMBA_VENDOR_ST) { d40_err(dev, "Unknown designer! Got %x wanted %x\n", AMBA_MANF_BITS(pid), AMBA_VENDOR_ST); - return NULL; + return -EINVAL; } /* * HW revision: @@ -3189,7 +3188,7 @@ static struct d40_base * __init d40_hw_detect_init(struct platform_device *pdev) rev = AMBA_REV_BITS(pid); if (rev < 2) { d40_err(dev, "hardware revision: %d is not supported", rev); - return NULL; + return -EINVAL; } /* The number of physical channels on this HW */ @@ -3216,7 +3215,7 @@ static struct d40_base * __init d40_hw_detect_init(struct platform_device *pdev) sizeof(struct d40_chan), GFP_KERNEL); if (!base) - return NULL; + return -ENOMEM; base->rev = rev; base->clk = clk; @@ -3263,51 +3262,53 @@ static struct d40_base * __init d40_hw_detect_init(struct platform_device *pdev) sizeof(*base->phy_res), GFP_KERNEL); if (!base->phy_res) - return NULL; + return -ENOMEM; base->lookup_phy_chans = devm_kcalloc(dev, num_phy_chans, sizeof(*base->lookup_phy_chans), GFP_KERNEL); if (!base->lookup_phy_chans) - return NULL; + return -ENOMEM; base->lookup_log_chans = devm_kcalloc(dev, num_log_chans, sizeof(*base->lookup_log_chans), GFP_KERNEL); if (!base->lookup_log_chans) - return NULL; + return -ENOMEM; base->reg_val_backup_chan = devm_kmalloc_array(dev, base->num_phy_chans, sizeof(d40_backup_regs_chan), GFP_KERNEL); if (!base->reg_val_backup_chan) - return NULL; + return -ENOMEM; base->lcla_pool.alloc_map = devm_kcalloc(dev, num_phy_chans * D40_LCLA_LINK_PER_EVENT_GRP, sizeof(*base->lcla_pool.alloc_map), GFP_KERNEL); if (!base->lcla_pool.alloc_map) - return NULL; + return -ENOMEM; base->regs_interrupt = devm_kmalloc_array(dev, base->gen_dmac.il_size, sizeof(*base->regs_interrupt), GFP_KERNEL); if (!base->regs_interrupt) - return NULL; + return -ENOMEM; base->desc_slab = kmem_cache_create(D40_NAME, sizeof(struct d40_desc), 0, SLAB_HWCACHE_ALIGN, NULL); if (!base->desc_slab) - return NULL; + return -ENOMEM; ret = devm_add_action_or_reset(dev, d40_drop_kmem_cache_action, base->desc_slab); if (ret) - return NULL; + return ret; + + *retbase = base; - return base; + return 0; } static void __init d40_hw_init(struct d40_base *base) @@ -3503,20 +3504,20 @@ static int __init d40_probe(struct platform_device *pdev) struct device *dev = &pdev->dev; struct device_node *np = pdev->dev.of_node; struct device_node *np_lcpa; - int ret = -ENOENT; struct d40_base *base; struct resource *res; struct resource res_lcpa; int num_reserved_chans; u32 val; + int ret; if (d40_of_probe(dev, np)) { ret = -ENOMEM; goto report_failure; } - base = d40_hw_detect_init(pdev); - if (!base) + ret = d40_hw_detect_init(pdev, &base); + if (ret) goto report_failure; num_reserved_chans = d40_phy_res_init(base); @@ -3530,6 +3531,7 @@ static int __init d40_probe(struct platform_device *pdev) np_lcpa = of_parse_phandle(np, "sram", 0); if (!np_lcpa) { dev_err(dev, "no LCPA SRAM node\n"); + ret = -EINVAL; goto report_failure; } /* This is no device so read the address directly from the node */