From patchwork Tue Apr 18 08:00:35 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Ceresoli X-Patchwork-Id: 674724 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7FE23C77B76 for ; Tue, 18 Apr 2023 08:01:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231394AbjDRIB2 (ORCPT ); Tue, 18 Apr 2023 04:01:28 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40548 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231343AbjDRIBK (ORCPT ); Tue, 18 Apr 2023 04:01:10 -0400 Received: from relay10.mail.gandi.net (relay10.mail.gandi.net [217.70.178.230]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 32CF965A4; Tue, 18 Apr 2023 01:01:08 -0700 (PDT) Received: from booty.fritz.box (unknown [77.244.183.192]) (Authenticated sender: luca.ceresoli@bootlin.com) by mail.gandi.net (Postfix) with ESMTPA id 0E022240015; Tue, 18 Apr 2023 08:01:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1681804866; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=z7GfPWRpbf9UqB83Mc5mi8nxcPDTIomI81207IaIT4I=; b=mvxsrb+RgiiH0AOwHdobQcIJeWlosCy3nftmZzt0AM78e/sCGdJZT+WrWUctOFRMB5FmL0 ph3YVCL3l1c0kG2n5lJN2BKqq/AUSmAayrx5P7EXoAEbTVH5xmiQE77OmW5fBtheOOu33I mK/l+QDv+dOsnCQSrkw0QXs0Cm6kMUWAVkbBQXJ3HUNTsQA2bCbknJEoHV9DryroscK9Ei cy6oKIL544o1ftZQ9wiDeaaqWKixR0kGPQtmjldoTWxPWJlKdk0pO4ygth8V6vyCmDfEFu zZvcdJ+Gc6qKSYCMgzk7Gx7XTcDXc6e2InPbSI6KIUz6hcKsrxts+erV99/vDw== From: Luca Ceresoli To: linux-tegra@vger.kernel.org Cc: Luca Ceresoli , Thierry Reding , Jonathan Hunter , Sowjanya Komatineni , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Mauro Carvalho Chehab , Greg Kroah-Hartman , linux-media@vger.kernel.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-staging@lists.linux.dev, Laurent Pinchart , Hans Verkuil , Thomas Petazzoni , Paul Kocialkowski , Richard Leitner , Krzysztof Kozlowski , Dmitry Osipenko Subject: [PATCH v6 01/20] dt-bindings: display: tegra: add Tegra20 VIP Date: Tue, 18 Apr 2023 10:00:35 +0200 Message-Id: <20230418080054.452955-2-luca.ceresoli@bootlin.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230418080054.452955-1-luca.ceresoli@bootlin.com> References: <20230418080054.452955-1-luca.ceresoli@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org VIP is the parallel video capture component within the video input subsystem of Tegra20 (and other Tegra chips, apparently). Signed-off-by: Luca Ceresoli Reviewed-by: Krzysztof Kozlowski Reviewed-by: Dmitry Osipenko --- No changes in v6 No changes in v5 Changed in v4: - Added review tags - remove leftover lines after removal of 'channel@0' Changed in v3: - remove channel@0 node (Krzysztof, Rob, Dmitry) - add myself as a maintainer of the whole Tegra video driver (Dmitry) Changed in v2 (suggested by Krzysztof Kozlowski): - remove redundant "bindings" from subject line - remove $nodename - add channel@0 description - add reg: const: 0 --- .../display/tegra/nvidia,tegra20-vip.yaml | 41 +++++++++++++++++++ MAINTAINERS | 2 + 2 files changed, 43 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-vip.yaml diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-vip.yaml b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-vip.yaml new file mode 100644 index 000000000000..14294edb8d8c --- /dev/null +++ b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-vip.yaml @@ -0,0 +1,41 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-vip.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NVIDIA Tegra VIP (parallel video capture) controller + +maintainers: + - Luca Ceresoli + +properties: + compatible: + enum: + - nvidia,tegra20-vip + + ports: + $ref: /schemas/graph.yaml#/properties/ports + + properties: + port@0: + $ref: /schemas/graph.yaml#/properties/port + description: + Port receiving the video stream from the sensor + + port@1: + $ref: /schemas/graph.yaml#/properties/port + description: + Port sending the video stream to the VI + + required: + - port@0 + - port@1 + +unevaluatedProperties: false + +required: + - compatible + - ports + +# see nvidia,tegra20-vi.yaml for an example diff --git a/MAINTAINERS b/MAINTAINERS index 0e64787aace8..8d8b0aa8e009 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -20610,10 +20610,12 @@ TEGRA VIDEO DRIVER M: Thierry Reding M: Jonathan Hunter M: Sowjanya Komatineni +M: Luca Ceresoli L: linux-media@vger.kernel.org L: linux-tegra@vger.kernel.org S: Maintained F: Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.yaml +F: Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-vip.yaml F: drivers/staging/media/tegra-video/ TEGRA XUSB PADCTL DRIVER From patchwork Tue Apr 18 08:00:36 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Ceresoli X-Patchwork-Id: 675383 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id ADA1EC77B71 for ; Tue, 18 Apr 2023 08:01:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231440AbjDRIBa (ORCPT ); Tue, 18 Apr 2023 04:01:30 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40628 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231376AbjDRIB1 (ORCPT ); Tue, 18 Apr 2023 04:01:27 -0400 Received: from relay10.mail.gandi.net (relay10.mail.gandi.net [217.70.178.230]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D96FB6E82; Tue, 18 Apr 2023 01:01:12 -0700 (PDT) Received: from booty.fritz.box (unknown [77.244.183.192]) (Authenticated sender: luca.ceresoli@bootlin.com) by mail.gandi.net (Postfix) with ESMTPA id E2758240008; Tue, 18 Apr 2023 08:01:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1681804871; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=+KUWvGYikatFyyoz0R9fUwy3FH2dfnuJpHoufok0Upc=; b=KMKSV/hpssetkSA9DSlp2h/+T8gLtAkR4PiCPjWV8Q5A8rfTd5n+fzGuGA2sZT7WW4wOep 3rdeXAGGHXAjkxACULVhomVslIz2auUnbyC49XTV17u73XX991uZU+YNOHd1VkT3jv1J/8 rzfXx+9szN8l7JxjcFCeDVccc6ok1ptf/2kUk59rd88TxQdNCKz/OMUXA6NNK9KI5rtnaC h9CadxaW7tc/N2QmBm6aSdZFj+gVoU1i6Pq+F8NP7RtoS751oZP64UEYbaKtzfkTjEL5EE fJYK0q9kxrJmlU9+MXpHhThJf9egPYZ7Ny2Nt97RJxeL/EF2oRHHchxyHtAFKw== From: Luca Ceresoli To: linux-tegra@vger.kernel.org Cc: Luca Ceresoli , Thierry Reding , Jonathan Hunter , Sowjanya Komatineni , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Mauro Carvalho Chehab , Greg Kroah-Hartman , linux-media@vger.kernel.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-staging@lists.linux.dev, Laurent Pinchart , Hans Verkuil , Thomas Petazzoni , Paul Kocialkowski , Richard Leitner , Rob Herring Subject: [PATCH v6 02/20] dt-bindings: display: tegra: vi: add 'vip' property and example Date: Tue, 18 Apr 2023 10:00:36 +0200 Message-Id: <20230418080054.452955-3-luca.ceresoli@bootlin.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230418080054.452955-1-luca.ceresoli@bootlin.com> References: <20230418080054.452955-1-luca.ceresoli@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The Tegra20 VI peripheral can receive parallel input from the VIP parallel input module. Add it to the allowed properties and augment the existing nvidia,tegra20-vi example to show a 'vip' property. Signed-off-by: Luca Ceresoli Reviewed-by: Rob Herring --- No changes in v6 No changes in v5 Changed in RESEND,v4: - Add Reviewed-by: Rob Herring Changed in v4: - complete the removal of 'channel@0' Changed in v3 (suggested by Rob Herring): - drop 'endpoint', unneeded as there's no extra properties in the endpoints Changed in v2 (suggested by Krzysztof Kozlowski): - rename "i2c3" -> "ic2" - add review tag --- .../display/tegra/nvidia,tegra20-vi.yaml | 59 +++++++++++++++++++ MAINTAINERS | 1 + 2 files changed, 60 insertions(+) diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-vi.yaml b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-vi.yaml index a42bf33d1e7d..2181855a0920 100644 --- a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-vi.yaml +++ b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-vi.yaml @@ -73,6 +73,18 @@ properties: avdd-dsi-csi-supply: description: DSI/CSI power supply. Must supply 1.2 V. + vip: + $ref: /schemas/display/tegra/nvidia,tegra20-vip.yaml + + ports: + $ref: /schemas/graph.yaml#/properties/ports + + properties: + port@0: + $ref: /schemas/graph.yaml#/properties/port + description: + Input from the VIP (parallel input capture) module + patternProperties: "^csi@[0-9a-f]+$": type: object @@ -108,6 +120,22 @@ examples: #include #include + i2c { + #address-cells = <1>; + #size-cells = <0>; + camera@48 { + compatible = "aptina,mt9v111"; + reg = <0x48>; + clocks = <&camera_clk>; + + port { + mt9v111_out: endpoint { + remote-endpoint = <&vi_vip_in>; + }; + }; + }; + }; + vi@54080000 { compatible = "nvidia,tegra20-vi"; reg = <0x54080000 0x00040000>; @@ -115,6 +143,37 @@ examples: clocks = <&tegra_car TEGRA20_CLK_VI>; resets = <&tegra_car 100>; reset-names = "vi"; + + vip { + compatible = "nvidia,tegra20-vip"; + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + vi_vip_in: endpoint { + remote-endpoint = <&mt9v111_out>; + }; + }; + port@1 { + reg = <1>; + vi_vip_out: endpoint { + remote-endpoint = <&vi_in>; + }; + }; + }; + }; + + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + vi_in: endpoint { + remote-endpoint = <&vi_vip_out>; + }; + }; + }; }; - | diff --git a/MAINTAINERS b/MAINTAINERS index 8d8b0aa8e009..90594131be4f 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -20615,6 +20615,7 @@ L: linux-media@vger.kernel.org L: linux-tegra@vger.kernel.org S: Maintained F: Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.yaml +F: Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-vi.yaml F: Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-vip.yaml F: drivers/staging/media/tegra-video/ From patchwork Tue Apr 18 08:00:37 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Ceresoli X-Patchwork-Id: 674723 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5CA3DC77B71 for ; Tue, 18 Apr 2023 08:01:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231474AbjDRIBr (ORCPT ); Tue, 18 Apr 2023 04:01:47 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40628 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231431AbjDRIB3 (ORCPT ); Tue, 18 Apr 2023 04:01:29 -0400 Received: from relay10.mail.gandi.net (relay10.mail.gandi.net [217.70.178.230]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A6EDE72A4; Tue, 18 Apr 2023 01:01:16 -0700 (PDT) Received: from booty.fritz.box (unknown [77.244.183.192]) (Authenticated sender: luca.ceresoli@bootlin.com) by mail.gandi.net (Postfix) with ESMTPA id A3B3824001B; Tue, 18 Apr 2023 08:01:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1681804875; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=jLABZBNg77lXkYmbYD6rmCLffL1EmDa6Je6DquhfXlI=; b=jCmpIYQWDWm4Ns73jcDFnertj7akxCBeeQSqWOL1zM+b/J50TmHltmZ7HVZM2dRhCFaMTQ zGHK/tnD9UKlhNq6SVmyblQJr70Xcf+2u8eaIxQk1w8dLaZhvL5bB/M8gip6kmyN7BlOfU /se22K5p/eNQQL5j+MMBhBUd2S4pZz8OJk2ww18fn/Ipjv2yKq3RgnEmobOT3ypQmPt/R4 MCjl7Mwvh0nYGLVRc4Muj6JqkdE84buC68fjPv7mUEm2TBcO/oL56vIEStZJ4g/EgNZWlv 1RZIX+SqvCTi0SblwJi2AolIDcqDY39P/Gpgwu1pl1OJGzIij2lg1qmRP8Y/+Q== From: Luca Ceresoli To: linux-tegra@vger.kernel.org Cc: Luca Ceresoli , Thierry Reding , Jonathan Hunter , Sowjanya Komatineni , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Mauro Carvalho Chehab , Greg Kroah-Hartman , linux-media@vger.kernel.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-staging@lists.linux.dev, Laurent Pinchart , Hans Verkuil , Thomas Petazzoni , Paul Kocialkowski , Richard Leitner , Dmitry Osipenko Subject: [PATCH v6 03/20] staging: media: tegra-video: improve documentation of tegra_video_format fields Date: Tue, 18 Apr 2023 10:00:37 +0200 Message-Id: <20230418080054.452955-4-luca.ceresoli@bootlin.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230418080054.452955-1-luca.ceresoli@bootlin.com> References: <20230418080054.452955-1-luca.ceresoli@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Some fields are irrelevant for Tegra20/VIP. Add a note to clarify that. Signed-off-by: Luca Ceresoli Reviewed-by: Dmitry Osipenko --- No changes in v6 No changes in v5 Changed in v4: - Added review tags No changes in v3 No changes in v2 --- drivers/staging/media/tegra-video/vi.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/staging/media/tegra-video/vi.h b/drivers/staging/media/tegra-video/vi.h index a68e2c02c7b0..5396bf53ab75 100644 --- a/drivers/staging/media/tegra-video/vi.h +++ b/drivers/staging/media/tegra-video/vi.h @@ -260,11 +260,11 @@ enum tegra_image_dt { /** * struct tegra_video_format - Tegra video format description * - * @img_dt: image data type - * @bit_width: format width in bits per component + * @img_dt: MIPI CSI-2 data type (for CSI-2 only) + * @bit_width: format width in bits per component (for CSI/Tegra210 only) * @code: media bus format code * @bpp: bytes per pixel (when stored in memory) - * @img_fmt: image format + * @img_fmt: image format (for CSI/Tegra210 only) * @fourcc: V4L2 pixel format FCC identifier */ struct tegra_video_format { From patchwork Tue Apr 18 08:00:38 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Ceresoli X-Patchwork-Id: 675382 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 93B98C77B75 for ; Tue, 18 Apr 2023 08:02:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231401AbjDRIB7 (ORCPT ); Tue, 18 Apr 2023 04:01:59 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41492 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231376AbjDRIBf (ORCPT ); Tue, 18 Apr 2023 04:01:35 -0400 Received: from relay10.mail.gandi.net (relay10.mail.gandi.net [217.70.178.230]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 77F657D87; Tue, 18 Apr 2023 01:01:20 -0700 (PDT) Received: from booty.fritz.box (unknown [77.244.183.192]) (Authenticated sender: luca.ceresoli@bootlin.com) by mail.gandi.net (Postfix) with ESMTPA id 748B8240013; Tue, 18 Apr 2023 08:01:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1681804879; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=zEr0+swVK3WMZ0u3R6JdAyAw0vxa2R9V1YYMnBRXmiM=; b=VlArBWYO0GHWM0tVuD++le8G/QfyLoXa+QN+akk3JTrNqZq233IkarBTNAViSky0sFnME3 hGuSU4HbeSinWCRXm7PQf2WY4sm8ye7luOu5SPOIaHsW8b93f9CtHau7sT/O6cj/5Et5Kg ukuUsXLQ0omoSQGMbBdKESNZXDfk1yOvNNiwtbLFs07rY5Vkqs3hkBk5HCVMZnSPfcfopx R7TEFkPp7LRZOXlDCIqtKUp97boWOKxTrAEoq5lhP0jKZ1TCjd5wP+0BoxzphuWwacnPOa /lnYXXmFE0gi5ZB/eq6sCuuYW3rX2iv7jT3t9efHUQIDUSmH+Z+dpEY9ZFtQpg== From: Luca Ceresoli To: linux-tegra@vger.kernel.org Cc: Luca Ceresoli , Thierry Reding , Jonathan Hunter , Sowjanya Komatineni , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Mauro Carvalho Chehab , Greg Kroah-Hartman , linux-media@vger.kernel.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-staging@lists.linux.dev, Laurent Pinchart , Hans Verkuil , Thomas Petazzoni , Paul Kocialkowski , Richard Leitner , Dmitry Osipenko Subject: [PATCH v6 04/20] staging: media: tegra-video: document tegra_channel_get_remote_source_subdev Date: Tue, 18 Apr 2023 10:00:38 +0200 Message-Id: <20230418080054.452955-5-luca.ceresoli@bootlin.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230418080054.452955-1-luca.ceresoli@bootlin.com> References: <20230418080054.452955-1-luca.ceresoli@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Clarify what this function does. Signed-off-by: Luca Ceresoli Reviewed-by: Dmitry Osipenko --- No changes in v6 No changes in v5 Changed in v4: - Added review tags No changes in v3 No changes in v2 --- drivers/staging/media/tegra-video/vi.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/staging/media/tegra-video/vi.c b/drivers/staging/media/tegra-video/vi.c index 11dd142c98c5..44c56dc85980 100644 --- a/drivers/staging/media/tegra-video/vi.c +++ b/drivers/staging/media/tegra-video/vi.c @@ -164,6 +164,9 @@ tegra_channel_get_remote_csi_subdev(struct tegra_vi_channel *chan) return media_entity_to_v4l2_subdev(pad->entity); } +/* + * Walk up the chain until the initial source (e.g. image sensor) + */ struct v4l2_subdev * tegra_channel_get_remote_source_subdev(struct tegra_vi_channel *chan) { From patchwork Tue Apr 18 08:00:39 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Ceresoli X-Patchwork-Id: 674722 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 94335C77B7D for ; Tue, 18 Apr 2023 08:02:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231410AbjDRICH (ORCPT ); Tue, 18 Apr 2023 04:02:07 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41248 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231466AbjDRIBr (ORCPT ); Tue, 18 Apr 2023 04:01:47 -0400 Received: from relay10.mail.gandi.net (relay10.mail.gandi.net [217.70.178.230]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 004497D92; Tue, 18 Apr 2023 01:01:23 -0700 (PDT) Received: from booty.fritz.box (unknown [77.244.183.192]) (Authenticated sender: luca.ceresoli@bootlin.com) by mail.gandi.net (Postfix) with ESMTPA id 45847240002; Tue, 18 Apr 2023 08:01:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1681804882; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=uFW43TGlDfYKqzfsHCpEy0ODtZ8ric12BDIS5XN/hY8=; b=lHz7u5KQQxMSJUhODl0shSb0rIRdo/007+0iqp0T9zxmwvFIfNDQNaWgTCGS7Nw0Zh9zLv bN0YRK9braSY3jokQchVqjV9lZhYY01I7ag8g2uuGozRICEZ09YoxVyvwMGJXRhwRPTFya ghyrnA7/Rga4N1rV+PNICiNB7Wi8CmqkFSTel9eQ5WQX91lfR9VVU5l2D7NZD6YKW/Ldzz YFdsqfswTAt/bCVWQiEK6jqv9F+tIIhJ65LRKPCeo+Gr5jrkw4S3Fr4o28S8JQM8Eblzv9 Uwdj2XfUOuPKUpPxSIFeV6T2gh0DUtqFJB5voCkct59VUFbIPMDeWhtQOwrZXQ== From: Luca Ceresoli To: linux-tegra@vger.kernel.org Cc: Luca Ceresoli , Thierry Reding , Jonathan Hunter , Sowjanya Komatineni , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Mauro Carvalho Chehab , Greg Kroah-Hartman , linux-media@vger.kernel.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-staging@lists.linux.dev, Laurent Pinchart , Hans Verkuil , Thomas Petazzoni , Paul Kocialkowski , Richard Leitner , Dmitry Osipenko Subject: [PATCH v6 05/20] staging: media: tegra-video: fix typos in comment Date: Tue, 18 Apr 2023 10:00:39 +0200 Message-Id: <20230418080054.452955-6-luca.ceresoli@bootlin.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230418080054.452955-1-luca.ceresoli@bootlin.com> References: <20230418080054.452955-1-luca.ceresoli@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add "skip" in "so we can *skip* the current channel" or it doesn't make sense. Also add articles where appropriate to fix English grammar. Signed-off-by: Luca Ceresoli Reviewed-by: Dmitry Osipenko --- No changes in v6 No changes in v5 Changed in v4: - Added review tags No changes in v3 No changes in v2 --- drivers/staging/media/tegra-video/vi.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/staging/media/tegra-video/vi.c b/drivers/staging/media/tegra-video/vi.c index 44c56dc85980..79dd02a1e29b 100644 --- a/drivers/staging/media/tegra-video/vi.c +++ b/drivers/staging/media/tegra-video/vi.c @@ -1859,10 +1859,10 @@ static int tegra_vi_graph_init(struct tegra_vi *vi) * Walk the links to parse the full graph. Each channel will have * one endpoint of the composite node. Start by parsing the * composite node and parse the remote entities in turn. - * Each channel will register v4l2 async notifier to make the graph - * independent between the channels so we can the current channel + * Each channel will register a v4l2 async notifier to make the graph + * independent between the channels so we can skip the current channel * in case of something wrong during graph parsing and continue with - * next channels. + * the next channels. */ list_for_each_entry(chan, &vi->vi_chans, list) { struct fwnode_handle *ep, *remote; From patchwork Tue Apr 18 08:00:40 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Ceresoli X-Patchwork-Id: 675381 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BA573C77B76 for ; Tue, 18 Apr 2023 08:02:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231480AbjDRICT (ORCPT ); Tue, 18 Apr 2023 04:02:19 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42022 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231445AbjDRIB6 (ORCPT ); Tue, 18 Apr 2023 04:01:58 -0400 Received: from relay10.mail.gandi.net (relay10.mail.gandi.net [IPv6:2001:4b98:dc4:8::230]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9EBC9729D; Tue, 18 Apr 2023 01:01:28 -0700 (PDT) Received: from booty.fritz.box (unknown [77.244.183.192]) (Authenticated sender: luca.ceresoli@bootlin.com) by mail.gandi.net (Postfix) with ESMTPA id CABDF240009; Tue, 18 Apr 2023 08:01:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1681804886; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=h4hLigvdbOVO3P4ObAFFWRZdoPUgyggKpMDr+PVSErU=; b=ej0CFkiYcDlbNTe95lM4ZQRGtji1xCD/12axQgLoDUa2qIc82WGBOukcHlE/3ZY8oBXrMh ObGlJCM9Brxe2PHwcWvobDsxHSnqDX59DJqncnSrFqRpmybNbWHnRT82EaGKRXAF+n89P7 CDI+wklPwZXQbgzUqEGXXw4Wm3FP/Yv3y+NCxwtdN+XyLMPMm0+gT/UAwDhS6U/flobopr V339JsO2QSz9F63yt5MlwuIiTfGJwo8riWz3c0vFGa9hFnUS+cnzt04umaPEKOGKnrOCFT ykX3UJmAxbcVl+1mxB37LvrwBDncjM7vglk0aj+nvr+mNAVlzKVNOseAEEnS9g== From: Luca Ceresoli To: linux-tegra@vger.kernel.org Cc: Luca Ceresoli , Thierry Reding , Jonathan Hunter , Sowjanya Komatineni , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Mauro Carvalho Chehab , Greg Kroah-Hartman , linux-media@vger.kernel.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-staging@lists.linux.dev, Laurent Pinchart , Hans Verkuil , Thomas Petazzoni , Paul Kocialkowski , Richard Leitner , Dmitry Osipenko Subject: [PATCH v6 06/20] staging: media: tegra-video: improve error messages Date: Tue, 18 Apr 2023 10:00:40 +0200 Message-Id: <20230418080054.452955-7-luca.ceresoli@bootlin.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230418080054.452955-1-luca.ceresoli@bootlin.com> References: <20230418080054.452955-1-luca.ceresoli@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org tegra_vi_channels_alloc() can primarily fail for two reasons: 1. "ports" node not found 2. port_num > vi->soc->vi_max_channels Case 1 prints nothing, case 2 has a dev_err(). The caller [tegra_vi_init()] has a generic dev_err() on any failure. This mean that in case 2 we print two messages, and in case 1 we only print a generic message. Remove the generic message and add a specific message when case 1 happens, so that we always have one specific message without even increasing the number of dev_dbg*() calls. Signed-off-by: Luca Ceresoli Reviewed-by: Dmitry Osipenko --- No changes in v6 No changes in v5 Changed in v4: - Added review tags No changes in v3 No changes in v2 --- drivers/staging/media/tegra-video/vi.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/drivers/staging/media/tegra-video/vi.c b/drivers/staging/media/tegra-video/vi.c index 79dd02a1e29b..1c0424bf1ab0 100644 --- a/drivers/staging/media/tegra-video/vi.c +++ b/drivers/staging/media/tegra-video/vi.c @@ -1361,7 +1361,7 @@ static int tegra_vi_channels_alloc(struct tegra_vi *vi) ports = of_get_child_by_name(node, "ports"); if (!ports) - return -ENODEV; + return dev_err_probe(vi->dev, -ENODEV, "%pOF: missing 'ports' node\n", node); for_each_child_of_node(ports, port) { if (!of_node_name_eq(port, "port")) @@ -1921,11 +1921,8 @@ static int tegra_vi_init(struct host1x_client *client) ret = tegra_vi_tpg_channels_alloc(vi); else ret = tegra_vi_channels_alloc(vi); - if (ret < 0) { - dev_err(vi->dev, - "failed to allocate vi channels: %d\n", ret); + if (ret < 0) goto free_chans; - } ret = tegra_vi_channels_init(vi); if (ret < 0) From patchwork Tue Apr 18 08:00:41 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Ceresoli X-Patchwork-Id: 675380 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3593FC77B7F for ; Tue, 18 Apr 2023 08:02:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231522AbjDRICf (ORCPT ); Tue, 18 Apr 2023 04:02:35 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41834 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231458AbjDRICM (ORCPT ); Tue, 18 Apr 2023 04:02:12 -0400 Received: from relay10.mail.gandi.net (relay10.mail.gandi.net [217.70.178.230]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5ABB18684; Tue, 18 Apr 2023 01:01:35 -0700 (PDT) Received: from booty.fritz.box (unknown [77.244.183.192]) (Authenticated sender: luca.ceresoli@bootlin.com) by mail.gandi.net (Postfix) with ESMTPA id 84CE824000B; Tue, 18 Apr 2023 08:01:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1681804890; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=p+VzAfaSqgxKGJT/6W+d7FGRqtXq2O0GiseDQOgCfqU=; b=CGSJMVEfNn8zDkV84d82TAiUJl2y5+Pwo1O9aV9Ce6AJUmPS1EFtWXRwjBkjvUpbugSmJF gWNi3LaMjt3p0GQ1boGQjjxiRUhwx0e1IVVbR7U82AwdGKH9DRehcs9Qf0Q5uvaPNNYp53 LBwqkFoviljVP5xY31IOwLko5O0Y2bEwke3syBsV21u6A75adHeimqpA7r0Y3at6Kj2tRU rxMP8LdJ3mFOz6Ll0PnuOdpJaaZ3sMNKH/bFqvduwga4so63TVUXUK9xPChmKRrjYecbBt w5mwIpP+OXS7y1YT0hCEpk6JM31QPYZPS/HVg/RcmtRji64IiXrR/r3EfatQHg== From: Luca Ceresoli To: linux-tegra@vger.kernel.org Cc: Luca Ceresoli , Thierry Reding , Jonathan Hunter , Sowjanya Komatineni , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Mauro Carvalho Chehab , Greg Kroah-Hartman , linux-media@vger.kernel.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-staging@lists.linux.dev, Laurent Pinchart , Hans Verkuil , Thomas Petazzoni , Paul Kocialkowski , Richard Leitner , Dmitry Osipenko Subject: [PATCH v6 07/20] staging: media: tegra-video: slightly simplify cleanup on errors Date: Tue, 18 Apr 2023 10:00:41 +0200 Message-Id: <20230418080054.452955-8-luca.ceresoli@bootlin.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230418080054.452955-1-luca.ceresoli@bootlin.com> References: <20230418080054.452955-1-luca.ceresoli@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org of_node_put(node) does nothing if node == NULL, so it can be moved to the cleanup section at the bottom. Signed-off-by: Luca Ceresoli Reviewed-by: Dmitry Osipenko --- No changes in v6 No changes in v5 Changed in v4: - Added review tags No changes in v3 No changes in v2 --- drivers/staging/media/tegra-video/vi.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/drivers/staging/media/tegra-video/vi.c b/drivers/staging/media/tegra-video/vi.c index 1c0424bf1ab0..ce4ff4cbf587 100644 --- a/drivers/staging/media/tegra-video/vi.c +++ b/drivers/staging/media/tegra-video/vi.c @@ -1352,7 +1352,7 @@ static int tegra_vi_channels_alloc(struct tegra_vi *vi) struct device_node *node = vi->dev->of_node; struct device_node *ep = NULL; struct device_node *ports; - struct device_node *port; + struct device_node *port = NULL; unsigned int port_num; struct device_node *parent; struct v4l2_fwnode_endpoint v4l2_ep = { .bus_type = 0 }; @@ -1375,7 +1375,6 @@ static int tegra_vi_channels_alloc(struct tegra_vi *vi) dev_err(vi->dev, "invalid port num %d for %pOF\n", port_num, port); ret = -EINVAL; - of_node_put(port); goto cleanup; } @@ -1398,13 +1397,12 @@ static int tegra_vi_channels_alloc(struct tegra_vi *vi) lanes = v4l2_ep.bus.mipi_csi2.num_data_lanes; ret = tegra_vi_channel_alloc(vi, port_num, port, lanes); - if (ret < 0) { - of_node_put(port); + if (ret < 0) goto cleanup; - } } cleanup: + of_node_put(port); of_node_put(ports); return ret; } From patchwork Tue Apr 18 08:00:42 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Ceresoli X-Patchwork-Id: 674721 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 82F16C77B76 for ; Tue, 18 Apr 2023 08:02:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231307AbjDRICe (ORCPT ); Tue, 18 Apr 2023 04:02:34 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41254 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231463AbjDRICN (ORCPT ); Tue, 18 Apr 2023 04:02:13 -0400 Received: from relay10.mail.gandi.net (relay10.mail.gandi.net [IPv6:2001:4b98:dc4:8::230]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D54BF868B; Tue, 18 Apr 2023 01:01:35 -0700 (PDT) Received: from booty.fritz.box (unknown [77.244.183.192]) (Authenticated sender: luca.ceresoli@bootlin.com) by mail.gandi.net (Postfix) with ESMTPA id 89064240011; Tue, 18 Apr 2023 08:01:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1681804894; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=ce1Cq6IBrZ258McFK0fXzLWtRecvX/0hdobwe0m2ndY=; b=GRYjYaFHbz5AcIYbRWM4ZvWspoFCeAwfoWazMbWqkK6ZdUBpyufPTWiYHR7EqEyMCCQBII ZXeAD4bwi7Ck8ehh22K1AmaOoEe7W1EEd4i48bxjyvEFT+9ZUvPyggMkoER4QfZ60Khlpk RWlHON3DCati5VF83pVAjidF2GDFx5w+48+B1NvoFEEWRjZfCMgVbmySyXnRzPvum5pxIN EAQldYjM7aaYPt3hc1gqRU8QszMtVnel7ouk5uM7X8Re1uEf/zMkk87Uo3ADoGF08rNdvd H6et9e6zyYRqZVFBkGsfjEFN51Nfyi6lgo1K86QhqjZqNcsbjq58TrYe/9unrA== From: Luca Ceresoli To: linux-tegra@vger.kernel.org Cc: Luca Ceresoli , Thierry Reding , Jonathan Hunter , Sowjanya Komatineni , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Mauro Carvalho Chehab , Greg Kroah-Hartman , linux-media@vger.kernel.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-staging@lists.linux.dev, Laurent Pinchart , Hans Verkuil , Thomas Petazzoni , Paul Kocialkowski , Richard Leitner , Dmitry Osipenko Subject: [PATCH v6 08/20] staging: media: tegra-video: move private struct declaration to C file Date: Tue, 18 Apr 2023 10:00:42 +0200 Message-Id: <20230418080054.452955-9-luca.ceresoli@bootlin.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230418080054.452955-1-luca.ceresoli@bootlin.com> References: <20230418080054.452955-1-luca.ceresoli@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org struct tegra_vi_graph_entity is an internal implementation detail of the VI module. Move its declaration from vi.h to vi.c. Signed-off-by: Luca Ceresoli Reviewed-by: Dmitry Osipenko --- No changes in v6 No changes in v5 Changed in v4: - Added review tags No changes in v3 No changes in v2 --- drivers/staging/media/tegra-video/vi.c | 13 +++++++++++++ drivers/staging/media/tegra-video/vi.h | 13 ------------- 2 files changed, 13 insertions(+), 13 deletions(-) diff --git a/drivers/staging/media/tegra-video/vi.c b/drivers/staging/media/tegra-video/vi.c index ce4ff4cbf587..db98d06351b4 100644 --- a/drivers/staging/media/tegra-video/vi.c +++ b/drivers/staging/media/tegra-video/vi.c @@ -32,6 +32,19 @@ #define MAX_CID_CONTROLS 1 +/** + * struct tegra_vi_graph_entity - Entity in the video graph + * + * @asd: subdev asynchronous registration information + * @entity: media entity from the corresponding V4L2 subdev + * @subdev: V4L2 subdev + */ +struct tegra_vi_graph_entity { + struct v4l2_async_subdev asd; + struct media_entity *entity; + struct v4l2_subdev *subdev; +}; + static const struct tegra_video_format tegra_default_format = { .img_dt = TEGRA_IMAGE_DT_RAW10, .bit_width = 10, diff --git a/drivers/staging/media/tegra-video/vi.h b/drivers/staging/media/tegra-video/vi.h index 5396bf53ab75..9959cbe02ca0 100644 --- a/drivers/staging/media/tegra-video/vi.h +++ b/drivers/staging/media/tegra-video/vi.h @@ -98,19 +98,6 @@ struct tegra_vi { struct list_head vi_chans; }; -/** - * struct tegra_vi_graph_entity - Entity in the video graph - * - * @asd: subdev asynchronous registration information - * @entity: media entity from the corresponding V4L2 subdev - * @subdev: V4L2 subdev - */ -struct tegra_vi_graph_entity { - struct v4l2_async_subdev asd; - struct media_entity *entity; - struct v4l2_subdev *subdev; -}; - /** * struct tegra_vi_channel - Tegra video channel * From patchwork Tue Apr 18 08:00:43 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Ceresoli X-Patchwork-Id: 675378 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 011B6C77B76 for ; Tue, 18 Apr 2023 08:03:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231512AbjDRIDB (ORCPT ); Tue, 18 Apr 2023 04:03:01 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42412 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231518AbjDRICf (ORCPT ); Tue, 18 Apr 2023 04:02:35 -0400 Received: from relay10.mail.gandi.net (relay10.mail.gandi.net [217.70.178.230]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 83A046EB1; Tue, 18 Apr 2023 01:02:03 -0700 (PDT) Received: from booty.fritz.box (unknown [77.244.183.192]) (Authenticated sender: luca.ceresoli@bootlin.com) by mail.gandi.net (Postfix) with ESMTPA id 7E430240019; Tue, 18 Apr 2023 08:01:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1681804897; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=89LKE84J28tS17t2LdvykdrtMycfjqjpFsn9fqF7WMA=; b=cR/vLn9OfPIFbn5rnGwm6tVQg2V4B2GZV4leUnT4A7/YjQ8kZ5r2GXEunwfwQw0ucjVRWU tHzsV4rFsIrBb9oeVXAHXmHA5PXF/rF/8g/cqweqMg7JUBUDeyVH9UZjUijJcmDORJ/PhN LvHGr8Krxrn5c468h94c50UnxEsvR2+MXp3wKUrWdWWhfXJI07bLFonZCs5AcSua6yn4Zs EEentkxlW/9oHPx1pdRCkYGyGPvTsIkHiYihTEru81CQQ9T7hzEhzamF+7PY/aXYDsl0IT bIe8VaVsihthCGJ/WhAEFYesUyHFBxspIPth+V+hikEcxG2d80QY4ptMXLYNyA== From: Luca Ceresoli To: linux-tegra@vger.kernel.org Cc: Luca Ceresoli , Thierry Reding , Jonathan Hunter , Sowjanya Komatineni , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Mauro Carvalho Chehab , Greg Kroah-Hartman , linux-media@vger.kernel.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-staging@lists.linux.dev, Laurent Pinchart , Hans Verkuil , Thomas Petazzoni , Paul Kocialkowski , Richard Leitner , Dmitry Osipenko Subject: [PATCH v6 09/20] staging: media: tegra-video: move tegra210_csi_soc to C file Date: Tue, 18 Apr 2023 10:00:43 +0200 Message-Id: <20230418080054.452955-10-luca.ceresoli@bootlin.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230418080054.452955-1-luca.ceresoli@bootlin.com> References: <20230418080054.452955-1-luca.ceresoli@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This declaration is used only in csi.c, no need to export it elsewhere. Signed-off-by: Luca Ceresoli Reviewed-by: Dmitry Osipenko --- No changes in v6 No changes in v5 Changed in v4: - Added review tags This patch was added in v3. --- drivers/staging/media/tegra-video/csi.c | 4 ++++ drivers/staging/media/tegra-video/csi.h | 4 ---- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/staging/media/tegra-video/csi.c b/drivers/staging/media/tegra-video/csi.c index 426e653bd55d..9a03d5ccdf3c 100644 --- a/drivers/staging/media/tegra-video/csi.c +++ b/drivers/staging/media/tegra-video/csi.c @@ -792,6 +792,10 @@ static int tegra_csi_remove(struct platform_device *pdev) return 0; } +#if defined(CONFIG_ARCH_TEGRA_210_SOC) +extern const struct tegra_csi_soc tegra210_csi_soc; +#endif + static const struct of_device_id tegra_csi_of_id_table[] = { #if defined(CONFIG_ARCH_TEGRA_210_SOC) { .compatible = "nvidia,tegra210-csi", .data = &tegra210_csi_soc }, diff --git a/drivers/staging/media/tegra-video/csi.h b/drivers/staging/media/tegra-video/csi.h index 6960ea2e3d36..3e6e5ee1bb1e 100644 --- a/drivers/staging/media/tegra-video/csi.h +++ b/drivers/staging/media/tegra-video/csi.h @@ -151,10 +151,6 @@ struct tegra_csi { struct list_head csi_chans; }; -#if defined(CONFIG_ARCH_TEGRA_210_SOC) -extern const struct tegra_csi_soc tegra210_csi_soc; -#endif - void tegra_csi_error_recover(struct v4l2_subdev *subdev); void tegra_csi_calc_settle_time(struct tegra_csi_channel *csi_chan, u8 csi_port_num, From patchwork Tue Apr 18 08:00:44 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Ceresoli X-Patchwork-Id: 674717 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 26492C7EE20 for ; Tue, 18 Apr 2023 08:03:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231271AbjDRIDd (ORCPT ); Tue, 18 Apr 2023 04:03:33 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40646 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231509AbjDRIC5 (ORCPT ); Tue, 18 Apr 2023 04:02:57 -0400 Received: from relay10.mail.gandi.net (relay10.mail.gandi.net [217.70.178.230]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C2A788A66; Tue, 18 Apr 2023 01:02:28 -0700 (PDT) Received: from booty.fritz.box (unknown [77.244.183.192]) (Authenticated sender: luca.ceresoli@bootlin.com) by mail.gandi.net (Postfix) with ESMTPA id 406C724000C; Tue, 18 Apr 2023 08:01:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1681804901; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=TR9pjOAZzWgKnjvG+owPqH/u0Bf+LaCHBSMuW/TJZmM=; b=RHb0Tm2mVPMQ3qyjuwCNzQAx9bMkPPvnNYmC2DvlHAd20TpvlK1MjRtIycV2fuEPq5+Hxo 7032AhjrRrgtwAEFh3XFdHBG3IC6aTsIIcM7eMZwaXOVmgJEHdgyiFBjK9MIIgmjTBOUkY cyuzKRK6nEf+jLlQJer8EQRnyYjFsRqKGyCH/7ggQs60kyFUjkgQwG9xRW+OfJxg715nFe FJ23OuBone0k6lRpenbVBT4m10dvwozNrPHesGOpOfL9lloNFjYG97w+LnWOTvEW+emcxm 9SbOYwce3N96UIqD/iJU6asLzJP0Fa6MqSZOEBlWhiUVk8asHVgUpq9ZoMitqQ== From: Luca Ceresoli To: linux-tegra@vger.kernel.org Cc: Luca Ceresoli , Thierry Reding , Jonathan Hunter , Sowjanya Komatineni , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Mauro Carvalho Chehab , Greg Kroah-Hartman , linux-media@vger.kernel.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-staging@lists.linux.dev, Laurent Pinchart , Hans Verkuil , Thomas Petazzoni , Paul Kocialkowski , Richard Leitner , Dmitry Osipenko Subject: [PATCH v6 10/20] staging: media: tegra-video: remove unneeded include Date: Tue, 18 Apr 2023 10:00:44 +0200 Message-Id: <20230418080054.452955-11-luca.ceresoli@bootlin.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230418080054.452955-1-luca.ceresoli@bootlin.com> References: <20230418080054.452955-1-luca.ceresoli@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org There is only a pointer reference to struct tegra_vi in video.h, thus vi.h is not needed. Signed-off-by: Luca Ceresoli Reviewed-by: Dmitry Osipenko --- No changes in v6 No changes in v5 Changed in v4: - Added review tags No changes in v3 No changes in v2 --- drivers/staging/media/tegra-video/video.h | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/staging/media/tegra-video/video.h b/drivers/staging/media/tegra-video/video.h index fadaf2189dc9..1e9be1474a9c 100644 --- a/drivers/staging/media/tegra-video/video.h +++ b/drivers/staging/media/tegra-video/video.h @@ -12,7 +12,6 @@ #include #include "vi.h" -#include "csi.h" struct tegra_video_device { struct v4l2_device v4l2_dev; From patchwork Tue Apr 18 08:00:45 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Ceresoli X-Patchwork-Id: 674720 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0CAB1C77B76 for ; Tue, 18 Apr 2023 08:02:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231467AbjDRICr (ORCPT ); Tue, 18 Apr 2023 04:02:47 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42630 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230518AbjDRICX (ORCPT ); Tue, 18 Apr 2023 04:02:23 -0400 Received: from relay10.mail.gandi.net (relay10.mail.gandi.net [IPv6:2001:4b98:dc4:8::230]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7E8C7768F; Tue, 18 Apr 2023 01:01:49 -0700 (PDT) Received: from booty.fritz.box (unknown [77.244.183.192]) (Authenticated sender: luca.ceresoli@bootlin.com) by mail.gandi.net (Postfix) with ESMTPA id 28D43240005; Tue, 18 Apr 2023 08:01:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1681804905; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=sEpZa6qkEtZA/sYasHT0KSLqJUG9raTunh20gU2nJN0=; b=HtDM7Cc5DRT26gIQDAWaqnZ4eYqR35bZki/EBuUqVdgaIxAbuJw7sYu7mFyR1s/8f54hMe Bx5JDdKDqdjH3Y1msA32POp4ElttSe/Rtt67tHg2LlP8Ge0dWW7F7gA54Sdd7l5pUfUQox +v0dYcKWS7bf+51IuWXodk0PhbEYsLpXD/mwk6BIKJL3qdcU227qCiprOL+zZ0oNN37+lE 2T+8VfRqyD6xSNNPCBfw6Qu4DQ+aj54U55oYeiWxbwR7yAMf2nEtvzueWGA7pS/suqF3NN nAuIH8IUAwoyqm63uauisSwsDFmu9NLc/Vs2OYoTZQ6CCsF2rfcfJJtHW9C+lw== From: Luca Ceresoli To: linux-tegra@vger.kernel.org Cc: Luca Ceresoli , Thierry Reding , Jonathan Hunter , Sowjanya Komatineni , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Mauro Carvalho Chehab , Greg Kroah-Hartman , linux-media@vger.kernel.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-staging@lists.linux.dev, Laurent Pinchart , Hans Verkuil , Thomas Petazzoni , Paul Kocialkowski , Richard Leitner , Dmitry Osipenko Subject: [PATCH v6 11/20] staging: media: tegra-video: Kconfig: allow TPG only on Tegra210 Date: Tue, 18 Apr 2023 10:00:45 +0200 Message-Id: <20230418080054.452955-12-luca.ceresoli@bootlin.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230418080054.452955-1-luca.ceresoli@bootlin.com> References: <20230418080054.452955-1-luca.ceresoli@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org We are about to add support for the Tegra20 parallel video capture, which has no TPG. In preparation for that, limit the VIDEO_TEGRA_TPG option to Tegra210 which is the only implementation currently provided by this driver. Signed-off-by: Luca Ceresoli Reviewed-by: Dmitry Osipenko --- No changes in v6 No changes in v5 Changed in v4: - Added review tags No changes in v3 No changes in v2 --- drivers/staging/media/tegra-video/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/staging/media/tegra-video/Kconfig b/drivers/staging/media/tegra-video/Kconfig index df1b2cff2417..c53441822fdf 100644 --- a/drivers/staging/media/tegra-video/Kconfig +++ b/drivers/staging/media/tegra-video/Kconfig @@ -15,5 +15,6 @@ config VIDEO_TEGRA config VIDEO_TEGRA_TPG bool "NVIDIA Tegra VI driver TPG mode" depends on VIDEO_TEGRA + depends on ARCH_TEGRA_210_SOC help Say yes here to enable Tegra internal TPG mode From patchwork Tue Apr 18 08:00:46 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Ceresoli X-Patchwork-Id: 675376 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0012FC77B76 for ; Tue, 18 Apr 2023 08:03:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231534AbjDRIDu (ORCPT ); Tue, 18 Apr 2023 04:03:50 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41314 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231545AbjDRIDW (ORCPT ); Tue, 18 Apr 2023 04:03:22 -0400 Received: from relay10.mail.gandi.net (relay10.mail.gandi.net [217.70.178.230]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EBA6D6A52; Tue, 18 Apr 2023 01:02:36 -0700 (PDT) Received: from booty.fritz.box (unknown [77.244.183.192]) (Authenticated sender: luca.ceresoli@bootlin.com) by mail.gandi.net (Postfix) with ESMTPA id DC826240013; Tue, 18 Apr 2023 08:01:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1681804908; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=ki5tVtpHfbVLHN3PhSIPzP3TaFUuCpit4Uxj/8j+9cM=; b=CmmlNmHFtX3RqV/i4yyhtIUHK1lKD2+rlXqbumI+ouuVC9DYpNASeIv8ZytosDVYQdmT4b uEonwvaobsiCUEEP45NdZlRaHsJ98lmuVDGveAuVuib8RpyfzoK4QdO80u6DQqvxJKNjom 6Fsi7QT3mVCBUBTsLrvFRkw4TFO5gIwaOwALVK0ChIMpoSh/qgGsVSGzgMi9qDZ1qUeIN9 8obDgttG04fxHbiIQG21lYbkUdMMjlqbMAxxP4Y5i0gOFVAtVNZz/92eKuIkepaPhJpz0Z DhBv04ZwchpKVZGfYD4m8eRbi0C7q9SMDt2ULoesIotMMdkOpmbP/OcrfnZAVg== From: Luca Ceresoli To: linux-tegra@vger.kernel.org Cc: Luca Ceresoli , Thierry Reding , Jonathan Hunter , Sowjanya Komatineni , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Mauro Carvalho Chehab , Greg Kroah-Hartman , linux-media@vger.kernel.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-staging@lists.linux.dev, Laurent Pinchart , Hans Verkuil , Thomas Petazzoni , Paul Kocialkowski , Richard Leitner , Dmitry Osipenko Subject: [PATCH v6 12/20] staging: media: tegra-video: move tegra_channel_fmt_align to a per-soc op Date: Tue, 18 Apr 2023 10:00:46 +0200 Message-Id: <20230418080054.452955-13-luca.ceresoli@bootlin.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230418080054.452955-1-luca.ceresoli@bootlin.com> References: <20230418080054.452955-1-luca.ceresoli@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org tegra_channel_fmt_align() takes care of the size constraints, alignment and rounding requirements of the Tegra210 VI peripheral. Tegra20 has different constraints. In preparation for adding Tegra20 support, move this function to a new op in the soc-specific `struct tegra_vi_ops` . Also move to tegra210.c the T210-specific defines used in the moved code. No functional changes. Signed-off-by: Luca Ceresoli Reviewed-by: Dmitry Osipenko --- No changes in v6 No changes in v5 Changed in v4: - Added review tags No changes in v3 No changes in v2 --- drivers/staging/media/tegra-video/tegra210.c | 36 ++++++++++++++++++ drivers/staging/media/tegra-video/vi.c | 40 +++----------------- drivers/staging/media/tegra-video/vi.h | 9 ++--- 3 files changed, 44 insertions(+), 41 deletions(-) diff --git a/drivers/staging/media/tegra-video/tegra210.c b/drivers/staging/media/tegra-video/tegra210.c index d58370a84737..d19ff6b49ae8 100644 --- a/drivers/staging/media/tegra-video/tegra210.c +++ b/drivers/staging/media/tegra-video/tegra210.c @@ -17,6 +17,13 @@ #include "csi.h" #include "vi.h" +#define TEGRA210_MIN_WIDTH 32U +#define TEGRA210_MAX_WIDTH 32768U +#define TEGRA210_MIN_HEIGHT 32U +#define TEGRA210_MAX_HEIGHT 32768U + +#define SURFACE_ALIGN_BYTES 64 + #define TEGRA_VI_SYNCPT_WAIT_TIMEOUT msecs_to_jiffies(200) /* Tegra210 VI registers */ @@ -172,6 +179,34 @@ static u32 vi_csi_read(struct tegra_vi_channel *chan, u8 portno, /* * Tegra210 VI channel capture operations */ +static void tegra210_fmt_align(struct v4l2_pix_format *pix, unsigned int bpp) +{ + unsigned int min_bpl; + unsigned int max_bpl; + unsigned int bpl; + + /* + * The transfer alignment requirements are expressed in bytes. + * Clamp the requested width and height to the limits. + */ + pix->width = clamp(pix->width, TEGRA210_MIN_WIDTH, TEGRA210_MAX_WIDTH); + pix->height = clamp(pix->height, TEGRA210_MIN_HEIGHT, TEGRA210_MAX_HEIGHT); + + /* Clamp the requested bytes per line value. If the maximum bytes per + * line value is zero, the module doesn't support user configurable + * line sizes. Override the requested value with the minimum in that + * case. + */ + min_bpl = pix->width * bpp; + max_bpl = rounddown(TEGRA210_MAX_WIDTH, SURFACE_ALIGN_BYTES); + bpl = roundup(pix->bytesperline, SURFACE_ALIGN_BYTES); + + pix->bytesperline = clamp(bpl, min_bpl, max_bpl); + pix->sizeimage = pix->bytesperline * pix->height; + if (pix->pixelformat == V4L2_PIX_FMT_NV16) + pix->sizeimage *= 2; +} + static int tegra_channel_capture_setup(struct tegra_vi_channel *chan, u8 portno) { @@ -718,6 +753,7 @@ static const struct tegra_video_format tegra210_video_formats[] = { /* Tegra210 VI operations */ static const struct tegra_vi_ops tegra210_vi_ops = { + .vi_fmt_align = tegra210_fmt_align, .vi_start_streaming = tegra210_vi_start_streaming, .vi_stop_streaming = tegra210_vi_stop_streaming, }; diff --git a/drivers/staging/media/tegra-video/vi.c b/drivers/staging/media/tegra-video/vi.c index db98d06351b4..35d7cda1373f 100644 --- a/drivers/staging/media/tegra-video/vi.c +++ b/drivers/staging/media/tegra-video/vi.c @@ -473,36 +473,6 @@ static int tegra_channel_get_format(struct file *file, void *fh, return 0; } -static void tegra_channel_fmt_align(struct tegra_vi_channel *chan, - struct v4l2_pix_format *pix, - unsigned int bpp) -{ - unsigned int min_bpl; - unsigned int max_bpl; - unsigned int bpl; - - /* - * The transfer alignment requirements are expressed in bytes. - * Clamp the requested width and height to the limits. - */ - pix->width = clamp(pix->width, TEGRA_MIN_WIDTH, TEGRA_MAX_WIDTH); - pix->height = clamp(pix->height, TEGRA_MIN_HEIGHT, TEGRA_MAX_HEIGHT); - - /* Clamp the requested bytes per line value. If the maximum bytes per - * line value is zero, the module doesn't support user configurable - * line sizes. Override the requested value with the minimum in that - * case. - */ - min_bpl = pix->width * bpp; - max_bpl = rounddown(TEGRA_MAX_WIDTH, SURFACE_ALIGN_BYTES); - bpl = roundup(pix->bytesperline, SURFACE_ALIGN_BYTES); - - pix->bytesperline = clamp(bpl, min_bpl, max_bpl); - pix->sizeimage = pix->bytesperline * pix->height; - if (pix->pixelformat == V4L2_PIX_FMT_NV16) - pix->sizeimage *= 2; -} - static int __tegra_channel_try_format(struct tegra_vi_channel *chan, struct v4l2_pix_format *pix) { @@ -578,7 +548,7 @@ static int __tegra_channel_try_format(struct tegra_vi_channel *chan, return ret; v4l2_fill_pix_format(pix, &fmt.format); - tegra_channel_fmt_align(chan, pix, fmtinfo->bpp); + chan->vi->ops->vi_fmt_align(pix, fmtinfo->bpp); __v4l2_subdev_state_free(sd_state); @@ -630,7 +600,7 @@ static int tegra_channel_set_format(struct file *file, void *fh, return ret; v4l2_fill_pix_format(pix, &fmt.format); - tegra_channel_fmt_align(chan, pix, fmtinfo->bpp); + chan->vi->ops->vi_fmt_align(pix, fmtinfo->bpp); chan->format = *pix; chan->fmtinfo = fmtinfo; @@ -666,7 +636,7 @@ static int tegra_channel_set_subdev_active_fmt(struct tegra_vi_channel *chan) chan->format.bytesperline = chan->format.width * chan->fmtinfo->bpp; chan->format.sizeimage = chan->format.bytesperline * chan->format.height; - tegra_channel_fmt_align(chan, &chan->format, chan->fmtinfo->bpp); + chan->vi->ops->vi_fmt_align(&chan->format, chan->fmtinfo->bpp); tegra_channel_update_gangports(chan); return 0; @@ -835,7 +805,7 @@ static int tegra_channel_s_dv_timings(struct file *file, void *fh, chan->format.height = bt->height; chan->format.bytesperline = bt->width * chan->fmtinfo->bpp; chan->format.sizeimage = chan->format.bytesperline * bt->height; - tegra_channel_fmt_align(chan, &chan->format, chan->fmtinfo->bpp); + chan->vi->ops->vi_fmt_align(&chan->format, chan->fmtinfo->bpp); tegra_channel_update_gangports(chan); return 0; @@ -1238,7 +1208,7 @@ static int tegra_channel_init(struct tegra_vi_channel *chan) chan->format.height = TEGRA_DEF_HEIGHT; chan->format.bytesperline = TEGRA_DEF_WIDTH * chan->fmtinfo->bpp; chan->format.sizeimage = chan->format.bytesperline * TEGRA_DEF_HEIGHT; - tegra_channel_fmt_align(chan, &chan->format, chan->fmtinfo->bpp); + vi->ops->vi_fmt_align(&chan->format, chan->fmtinfo->bpp); ret = tegra_channel_host1x_syncpt_init(chan); if (ret) diff --git a/drivers/staging/media/tegra-video/vi.h b/drivers/staging/media/tegra-video/vi.h index 9959cbe02ca0..213955c7545d 100644 --- a/drivers/staging/media/tegra-video/vi.h +++ b/drivers/staging/media/tegra-video/vi.h @@ -25,17 +25,11 @@ #define V4L2_CID_TEGRA_SYNCPT_TIMEOUT_RETRY (V4L2_CTRL_CLASS_CAMERA | 0x1001) -#define TEGRA_MIN_WIDTH 32U -#define TEGRA_MAX_WIDTH 32768U -#define TEGRA_MIN_HEIGHT 32U -#define TEGRA_MAX_HEIGHT 32768U - #define TEGRA_DEF_WIDTH 1920 #define TEGRA_DEF_HEIGHT 1080 #define TEGRA_IMAGE_FORMAT_DEF 32 #define MAX_FORMAT_NUM 64 -#define SURFACE_ALIGN_BYTES 64 enum tegra_vi_pg_mode { TEGRA_VI_PG_DISABLED = 0, @@ -45,6 +39,8 @@ enum tegra_vi_pg_mode { /** * struct tegra_vi_ops - Tegra VI operations + * @vi_fmt_align: modify `pix` to fit the hardware alignment + * requirements and fill image geometry * @vi_start_streaming: starts media pipeline, subdevice streaming, sets up * VI for capture and runs capture start and capture finish * kthreads for capturing frames to buffer and returns them back. @@ -52,6 +48,7 @@ enum tegra_vi_pg_mode { * back any queued buffers. */ struct tegra_vi_ops { + void (*vi_fmt_align)(struct v4l2_pix_format *pix, unsigned int bpp); int (*vi_start_streaming)(struct vb2_queue *vq, u32 count); void (*vi_stop_streaming)(struct vb2_queue *vq); }; From patchwork Tue Apr 18 08:00:47 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Ceresoli X-Patchwork-Id: 675375 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BEF73C77B75 for ; Tue, 18 Apr 2023 08:04:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231579AbjDRIEA (ORCPT ); Tue, 18 Apr 2023 04:04:00 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41344 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231551AbjDRIDc (ORCPT ); Tue, 18 Apr 2023 04:03:32 -0400 Received: from relay10.mail.gandi.net (relay10.mail.gandi.net [217.70.178.230]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 54FA47EEB; Tue, 18 Apr 2023 01:02:47 -0700 (PDT) Received: from booty.fritz.box (unknown [77.244.183.192]) (Authenticated sender: luca.ceresoli@bootlin.com) by mail.gandi.net (Postfix) with ESMTPA id 120AB24001A; Tue, 18 Apr 2023 08:01:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1681804912; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=WiE3J/ZOXI1J5wUqjC9+bkIXh5jNrN6O4z7mUkMhHyw=; b=i5d1jmjfVRl7A7wPSmJJsjHqYz6LwegI32FzADO4J45upyQzkYZj6YmWP0o2TOuZYDg2cm SjxNvdadRt1WocfK0qxLxvjFTTotO6boulfSPfQR689oX5uHrPeOfvSbt9SUh2g442i7rf ISsL0+hjuDb1tl15AeZMvmscZzTfTrlD+p3BGe7krJNfDZtumzaor7kdzPwYP8DG7WNZop oJldGlV87YpdxAbNjJAP7kR3P4wUvYQCPNix6qvdPF67EiIvqPHqvKBA6Jp82f4D6S+pgO j+pWCC2wfvlrSnoRIVcsr3MqLDCMO6mnB6wTvn9zK4FQxi1Yrm37NkqwnRQu7w== From: Luca Ceresoli To: linux-tegra@vger.kernel.org Cc: Luca Ceresoli , Thierry Reding , Jonathan Hunter , Sowjanya Komatineni , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Mauro Carvalho Chehab , Greg Kroah-Hartman , linux-media@vger.kernel.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-staging@lists.linux.dev, Laurent Pinchart , Hans Verkuil , Thomas Petazzoni , Paul Kocialkowski , Richard Leitner , Dmitry Osipenko Subject: [PATCH v6 13/20] staging: media: tegra-video: move default format to soc-specific data Date: Tue, 18 Apr 2023 10:00:47 +0200 Message-Id: <20230418080054.452955-14-luca.ceresoli@bootlin.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230418080054.452955-1-luca.ceresoli@bootlin.com> References: <20230418080054.452955-1-luca.ceresoli@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The tegra_default_format in vi.c is specific to Tegra210 CSI. In preparation for adding Tegra20 VIP support, move the default format to a new field in the soc-specific `struct tegra_vi_soc`. Instead of an entire format struct, only store a pointer to an item in the existing format array. No functional changes. The format pointed to is the same that used to be in vi.c. Signed-off-by: Luca Ceresoli Reviewed-by: Dmitry Osipenko --- No changes in v6 Changed in v5: - Minor update after removal of "staging: media: tegra-video: fix .vidioc_enum_fmt_vid_cap to return all formats" patch Changed in v4: - Added review tags No changes in v3 No changes in v2 --- drivers/staging/media/tegra-video/tegra210.c | 2 ++ drivers/staging/media/tegra-video/vi.c | 13 ++----------- drivers/staging/media/tegra-video/vi.h | 2 ++ 3 files changed, 6 insertions(+), 11 deletions(-) diff --git a/drivers/staging/media/tegra-video/tegra210.c b/drivers/staging/media/tegra-video/tegra210.c index d19ff6b49ae8..b4fcd4e93b8c 100644 --- a/drivers/staging/media/tegra-video/tegra210.c +++ b/drivers/staging/media/tegra-video/tegra210.c @@ -766,8 +766,10 @@ const struct tegra_vi_soc tegra210_vi_soc = { .hw_revision = 3, .vi_max_channels = 6, #if IS_ENABLED(CONFIG_VIDEO_TEGRA_TPG) + .default_video_format = &tegra210_video_formats[0], .vi_max_clk_hz = 499200000, #else + .default_video_format = &tegra210_video_formats[4], .vi_max_clk_hz = 998400000, #endif }; diff --git a/drivers/staging/media/tegra-video/vi.c b/drivers/staging/media/tegra-video/vi.c index 35d7cda1373f..b88532d8d2c9 100644 --- a/drivers/staging/media/tegra-video/vi.c +++ b/drivers/staging/media/tegra-video/vi.c @@ -45,15 +45,6 @@ struct tegra_vi_graph_entity { struct v4l2_subdev *subdev; }; -static const struct tegra_video_format tegra_default_format = { - .img_dt = TEGRA_IMAGE_DT_RAW10, - .bit_width = 10, - .code = MEDIA_BUS_FMT_SRGGB10_1X10, - .bpp = 2, - .img_fmt = TEGRA_IMAGE_FORMAT_DEF, - .fourcc = V4L2_PIX_FMT_SRGGB10, -}; - static inline struct tegra_vi * host1x_client_to_vi(struct host1x_client *client) { @@ -1103,7 +1094,7 @@ static int vi_fmts_bitmap_init(struct tegra_vi_channel *chan) * there are no matched formats. */ if (!match_code) { - match_code = tegra_default_format.code; + match_code = chan->vi->soc->default_video_format->code; index = tegra_get_format_idx_by_code(chan->vi, match_code, 0); if (WARN_ON(index < 0)) return -EINVAL; @@ -1200,7 +1191,7 @@ static int tegra_channel_init(struct tegra_vi_channel *chan) init_waitqueue_head(&chan->done_wait); /* initialize the video format */ - chan->fmtinfo = &tegra_default_format; + chan->fmtinfo = chan->vi->soc->default_video_format; chan->format.pixelformat = chan->fmtinfo->fourcc; chan->format.colorspace = V4L2_COLORSPACE_SRGB; chan->format.field = V4L2_FIELD_NONE; diff --git a/drivers/staging/media/tegra-video/vi.h b/drivers/staging/media/tegra-video/vi.h index 213955c7545d..b424c967c6f2 100644 --- a/drivers/staging/media/tegra-video/vi.h +++ b/drivers/staging/media/tegra-video/vi.h @@ -58,6 +58,7 @@ struct tegra_vi_ops { * * @video_formats: supported video formats * @nformats: total video formats + * @default_video_format: default video format (pointer to a @video_formats item) * @ops: vi operations * @hw_revision: VI hw_revision * @vi_max_channels: supported max streaming channels @@ -66,6 +67,7 @@ struct tegra_vi_ops { struct tegra_vi_soc { const struct tegra_video_format *video_formats; const unsigned int nformats; + const struct tegra_video_format *default_video_format; const struct tegra_vi_ops *ops; u32 hw_revision; unsigned int vi_max_channels; From patchwork Tue Apr 18 08:00:48 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Ceresoli X-Patchwork-Id: 675379 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5B1D3C77B76 for ; Tue, 18 Apr 2023 08:03:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231202AbjDRIDA (ORCPT ); Tue, 18 Apr 2023 04:03:00 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41368 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231455AbjDRICe (ORCPT ); Tue, 18 Apr 2023 04:02:34 -0400 Received: from relay10.mail.gandi.net (relay10.mail.gandi.net [IPv6:2001:4b98:dc4:8::230]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5C6D57A8A; Tue, 18 Apr 2023 01:02:01 -0700 (PDT) Received: from booty.fritz.box (unknown [77.244.183.192]) (Authenticated sender: luca.ceresoli@bootlin.com) by mail.gandi.net (Postfix) with ESMTPA id 40241240002; Tue, 18 Apr 2023 08:01:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1681804916; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=WHtXu443TJRJ6GwgsTbQlfRYlzvdX8VV6/Serf3ZnwY=; b=aCYRKFDbcbpSSwmY3f7//lwHf52xby6RZcxxhcTBMaGC7fuLf5jev5tBEBXAKlEgGOjyGu V05OQys+bWYSCW6bvph1nEm7Gu7Xeuu6E5/j403vBw9x3LBqkK18MiqpQqvPnolhN1TQ8D KJE6/6pfIwxDjjnwtY1RtmpVxP/qw9R+zI7jGlHKKau5KCX7oE4ttwggdYA7D7D/E+dQGE /vXQSW7QhRzR11MRNeDhXMv1zqmdSc/SITmkMi2jBAjrSsau1Xloyl9WGhKWg4XVISgqJS 0xtdEdz/APe4hcKi2PZocrUrvbACqHxvTpg6sLJ1bj14KnouNO8By+xQ4X4OxA== From: Luca Ceresoli To: linux-tegra@vger.kernel.org Cc: Luca Ceresoli , Thierry Reding , Jonathan Hunter , Sowjanya Komatineni , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Mauro Carvalho Chehab , Greg Kroah-Hartman , linux-media@vger.kernel.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-staging@lists.linux.dev, Laurent Pinchart , Hans Verkuil , Thomas Petazzoni , Paul Kocialkowski , Richard Leitner , Dmitry Osipenko Subject: [PATCH v6 14/20] staging: media: tegra-video: move MIPI calibration calls from VI to CSI Date: Tue, 18 Apr 2023 10:00:48 +0200 Message-Id: <20230418080054.452955-15-luca.ceresoli@bootlin.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230418080054.452955-1-luca.ceresoli@bootlin.com> References: <20230418080054.452955-1-luca.ceresoli@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The CSI module does not handle all the MIPI lane calibration procedure, leaving a small part of it to the VI module. In doing this, tegra_channel_enable_stream() (vi.c) manipulates the private data of the upstream subdev casting it to struct 'tegra_csi_channel', which will be wrong after introducing a VIP (parallel video input) channel. This prevents adding support for the VIP module. It also breaks the logical isolation between modules. Since the lane calibration requirement does not exist in the parallel input module, moving the calibration function to a per-module op is not optimal. Instead move the calibration procedure in the CSI module, together with the rest of the calibration procedures. After this change, tegra_channel_enable_stream() just calls v4l2_subdev_call() to ask for a stream start/stop to the CSI module, which in turn knows all the CSI-specific details to implement it. Signed-off-by: Luca Ceresoli Reviewed-by: Dmitry Osipenko --- Changed in v6: - Fix unlock imbalance on Tegra210 (thanks Hans for reporting!) No changes in v5 Changed in v4: - Added review tags No changes in v3 No changes in v2 --- drivers/staging/media/tegra-video/csi.c | 44 ++++++++++++++++++++ drivers/staging/media/tegra-video/vi.c | 54 ++----------------------- 2 files changed, 48 insertions(+), 50 deletions(-) diff --git a/drivers/staging/media/tegra-video/csi.c b/drivers/staging/media/tegra-video/csi.c index 9a03d5ccdf3c..91d9febb8fd8 100644 --- a/drivers/staging/media/tegra-video/csi.c +++ b/drivers/staging/media/tegra-video/csi.c @@ -328,12 +328,42 @@ static int tegra_csi_enable_stream(struct v4l2_subdev *subdev) } csi_chan->pg_mode = chan->pg_mode; + + /* + * Tegra CSI receiver can detect the first LP to HS transition. + * So, start the CSI stream-on prior to sensor stream-on and + * vice-versa for stream-off. + */ ret = csi->ops->csi_start_streaming(csi_chan); if (ret < 0) goto finish_calibration; + if (csi_chan->mipi) { + struct v4l2_subdev *src_subdev; + /* + * TRM has incorrectly documented to wait for done status from + * calibration logic after CSI interface power on. + * As per the design, calibration results are latched and applied + * to the pads only when the link is in LP11 state which will happen + * during the sensor stream-on. + * CSI subdev stream-on triggers start of MIPI pads calibration. + * Wait for calibration to finish here after sensor subdev stream-on. + */ + src_subdev = tegra_channel_get_remote_source_subdev(chan); + ret = v4l2_subdev_call(src_subdev, video, s_stream, true); + + if (ret < 0 && ret != -ENOIOCTLCMD) + goto disable_csi_stream; + + err = tegra_mipi_finish_calibration(csi_chan->mipi); + if (err < 0) + dev_warn(csi->dev, "MIPI calibration failed: %d\n", err); + } + return 0; +disable_csi_stream: + csi->ops->csi_stop_streaming(csi_chan); finish_calibration: if (csi_chan->mipi) tegra_mipi_finish_calibration(csi_chan->mipi); @@ -352,10 +382,24 @@ static int tegra_csi_enable_stream(struct v4l2_subdev *subdev) static int tegra_csi_disable_stream(struct v4l2_subdev *subdev) { + struct tegra_vi_channel *chan = v4l2_get_subdev_hostdata(subdev); struct tegra_csi_channel *csi_chan = to_csi_chan(subdev); struct tegra_csi *csi = csi_chan->csi; int err; + /* + * Stream-off subdevices in reverse order to stream-on. + * Remote source subdev in TPG mode is same as CSI subdev. + */ + if (csi_chan->mipi) { + struct v4l2_subdev *src_subdev; + + src_subdev = tegra_channel_get_remote_source_subdev(chan); + err = v4l2_subdev_call(src_subdev, video, s_stream, false); + if (err < 0 && err != -ENOIOCTLCMD) + dev_err_probe(csi->dev, err, "source subdev stream off failed\n"); + } + csi->ops->csi_stop_streaming(csi_chan); if (csi_chan->mipi) { diff --git a/drivers/staging/media/tegra-video/vi.c b/drivers/staging/media/tegra-video/vi.c index b88532d8d2c9..c76c2a404889 100644 --- a/drivers/staging/media/tegra-video/vi.c +++ b/drivers/staging/media/tegra-video/vi.c @@ -197,49 +197,15 @@ tegra_channel_get_remote_source_subdev(struct tegra_vi_channel *chan) static int tegra_channel_enable_stream(struct tegra_vi_channel *chan) { - struct v4l2_subdev *csi_subdev, *src_subdev; - struct tegra_csi_channel *csi_chan; - int ret, err; + struct v4l2_subdev *subdev; + int ret; - /* - * Tegra CSI receiver can detect the first LP to HS transition. - * So, start the CSI stream-on prior to sensor stream-on and - * vice-versa for stream-off. - */ - csi_subdev = tegra_channel_get_remote_csi_subdev(chan); - ret = v4l2_subdev_call(csi_subdev, video, s_stream, true); + subdev = tegra_channel_get_remote_csi_subdev(chan); + ret = v4l2_subdev_call(subdev, video, s_stream, true); if (ret < 0 && ret != -ENOIOCTLCMD) return ret; - if (IS_ENABLED(CONFIG_VIDEO_TEGRA_TPG)) - return 0; - - csi_chan = v4l2_get_subdevdata(csi_subdev); - /* - * TRM has incorrectly documented to wait for done status from - * calibration logic after CSI interface power on. - * As per the design, calibration results are latched and applied - * to the pads only when the link is in LP11 state which will happen - * during the sensor stream-on. - * CSI subdev stream-on triggers start of MIPI pads calibration. - * Wait for calibration to finish here after sensor subdev stream-on. - */ - src_subdev = tegra_channel_get_remote_source_subdev(chan); - ret = v4l2_subdev_call(src_subdev, video, s_stream, true); - err = tegra_mipi_finish_calibration(csi_chan->mipi); - - if (ret < 0 && ret != -ENOIOCTLCMD) - goto err_disable_csi_stream; - - if (err < 0) - dev_warn(csi_chan->csi->dev, - "MIPI calibration failed: %d\n", err); - return 0; - -err_disable_csi_stream: - v4l2_subdev_call(csi_subdev, video, s_stream, false); - return ret; } static int tegra_channel_disable_stream(struct tegra_vi_channel *chan) @@ -247,18 +213,6 @@ static int tegra_channel_disable_stream(struct tegra_vi_channel *chan) struct v4l2_subdev *subdev; int ret; - /* - * Stream-off subdevices in reverse order to stream-on. - * Remote source subdev in TPG mode is same as CSI subdev. - */ - subdev = tegra_channel_get_remote_source_subdev(chan); - ret = v4l2_subdev_call(subdev, video, s_stream, false); - if (ret < 0 && ret != -ENOIOCTLCMD) - return ret; - - if (IS_ENABLED(CONFIG_VIDEO_TEGRA_TPG)) - return 0; - subdev = tegra_channel_get_remote_csi_subdev(chan); ret = v4l2_subdev_call(subdev, video, s_stream, false); if (ret < 0 && ret != -ENOIOCTLCMD) From patchwork Tue Apr 18 08:00:49 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Ceresoli X-Patchwork-Id: 674719 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 48252C77B78 for ; Tue, 18 Apr 2023 08:03:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230450AbjDRIDA (ORCPT ); Tue, 18 Apr 2023 04:03:00 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42410 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231378AbjDRICe (ORCPT ); Tue, 18 Apr 2023 04:02:34 -0400 Received: from relay10.mail.gandi.net (relay10.mail.gandi.net [IPv6:2001:4b98:dc4:8::230]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DE6A14492; Tue, 18 Apr 2023 01:02:02 -0700 (PDT) Received: from booty.fritz.box (unknown [77.244.183.192]) (Authenticated sender: luca.ceresoli@bootlin.com) by mail.gandi.net (Postfix) with ESMTPA id 78450240003; Tue, 18 Apr 2023 08:01:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1681804919; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=OjDn7feuOfCx2JjEUm878aYF49HGL6X0Phz44CtOnuQ=; b=I7tZjmhH627GBuHF1wzSyhCZUFSROiN803K5xByz5h/wt2k+vh76TmZaCefebp80x3tKbt 0kpo4QrCalP+dLGNLqxKfbSCCAJm+6bwNHkBQLwEzKBagUNnUGZPxEd8jWtNRK3e+59QaY Tiq9bgDcC3neCV9d6syb1oGzdfrMqs4FkUl0j+lc6Pke91BnkjTVb7xe10tZYr6dDnbLZf zIBUz+rbcZ2D0oSA8IE8pOVTb9vauOgQKOMhQ53snUFlXg2m+oy2KvfcCUeQRmhCHsEPA7 mCfxL1NF8yRAm6lppOViupcDCHjs+CPjo1eGp96jBBk0KBYkZyXgfdD4uy9HrA== From: Luca Ceresoli To: linux-tegra@vger.kernel.org Cc: Luca Ceresoli , Thierry Reding , Jonathan Hunter , Sowjanya Komatineni , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Mauro Carvalho Chehab , Greg Kroah-Hartman , linux-media@vger.kernel.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-staging@lists.linux.dev, Laurent Pinchart , Hans Verkuil , Thomas Petazzoni , Paul Kocialkowski , Richard Leitner , Dmitry Osipenko Subject: [PATCH v6 15/20] staging: media: tegra-video: add a per-soc enable/disable op Date: Tue, 18 Apr 2023 10:00:49 +0200 Message-Id: <20230418080054.452955-16-luca.ceresoli@bootlin.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230418080054.452955-1-luca.ceresoli@bootlin.com> References: <20230418080054.452955-1-luca.ceresoli@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The Tegra20 VI needs an additional operation to enable the VI, add an operation for that. Signed-off-by: Luca Ceresoli Reviewed-by: Dmitry Osipenko --- No changes in v6 No changes in v5 Changed in v4: - Added review tags No changes in v3 No changes in v2 --- drivers/staging/media/tegra-video/vi.c | 7 +++++++ drivers/staging/media/tegra-video/vi.h | 4 ++++ 2 files changed, 11 insertions(+) diff --git a/drivers/staging/media/tegra-video/vi.c b/drivers/staging/media/tegra-video/vi.c index c76c2a404889..8df233049c81 100644 --- a/drivers/staging/media/tegra-video/vi.c +++ b/drivers/staging/media/tegra-video/vi.c @@ -1950,6 +1950,9 @@ static int tegra_vi_probe(struct platform_device *pdev) vi->client.ops = &vi_client_ops; vi->client.dev = &pdev->dev; + if (vi->ops->vi_enable) + vi->ops->vi_enable(vi, true); + ret = host1x_client_register(&vi->client); if (ret < 0) { dev_err(&pdev->dev, @@ -1960,6 +1963,8 @@ static int tegra_vi_probe(struct platform_device *pdev) return 0; rpm_disable: + if (vi->ops->vi_enable) + vi->ops->vi_enable(vi, false); pm_runtime_disable(&pdev->dev); return ret; } @@ -1976,6 +1981,8 @@ static int tegra_vi_remove(struct platform_device *pdev) return err; } + if (vi->ops->vi_enable) + vi->ops->vi_enable(vi, false); pm_runtime_disable(&pdev->dev); return 0; diff --git a/drivers/staging/media/tegra-video/vi.h b/drivers/staging/media/tegra-video/vi.h index b424c967c6f2..886b10e7d723 100644 --- a/drivers/staging/media/tegra-video/vi.h +++ b/drivers/staging/media/tegra-video/vi.h @@ -37,8 +37,11 @@ enum tegra_vi_pg_mode { TEGRA_VI_PG_PATCH, }; +struct tegra_vi; + /** * struct tegra_vi_ops - Tegra VI operations + * @vi_enable: soc-specific operations needed to enable/disable the VI peripheral * @vi_fmt_align: modify `pix` to fit the hardware alignment * requirements and fill image geometry * @vi_start_streaming: starts media pipeline, subdevice streaming, sets up @@ -48,6 +51,7 @@ enum tegra_vi_pg_mode { * back any queued buffers. */ struct tegra_vi_ops { + int (*vi_enable)(struct tegra_vi *vi, bool on); void (*vi_fmt_align)(struct v4l2_pix_format *pix, unsigned int bpp); int (*vi_start_streaming)(struct vb2_queue *vq, u32 count); void (*vi_stop_streaming)(struct vb2_queue *vq); From patchwork Tue Apr 18 08:00:50 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Ceresoli X-Patchwork-Id: 674718 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 79EB5C77B71 for ; Tue, 18 Apr 2023 08:03:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231390AbjDRIDI (ORCPT ); Tue, 18 Apr 2023 04:03:08 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42496 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231528AbjDRICh (ORCPT ); Tue, 18 Apr 2023 04:02:37 -0400 Received: from relay10.mail.gandi.net (relay10.mail.gandi.net [IPv6:2001:4b98:dc4:8::230]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2D006173D; Tue, 18 Apr 2023 01:02:10 -0700 (PDT) Received: from booty.fritz.box (unknown [77.244.183.192]) (Authenticated sender: luca.ceresoli@bootlin.com) by mail.gandi.net (Postfix) with ESMTPA id 0AF12240012; Tue, 18 Apr 2023 08:01:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1681804923; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=vdK6nt2jp8murA6Tyi2XudKL24Qk5UvZgDlNDAZbm+o=; b=RctV38/fZrPDiDU+1EtCQ/5ISnxOi0YoDmtx0A1CZJs9N6GFU5LYxMXQPk2MhnHTxr6I3+ Z2LpBlwcD4iys3WAqS0GdHepOif0G8SA4y4iip+a9maHEKjb/agVyOLG+OIjBaJhX6CM9E LAZMCBIWu8+FQE1+iLMxfOHYT/Qd83o9vxZYg8AXqssAPzugQZB4b12Ojt+Y8Kz9X3eBua mMto97YutzgNchVSBA9+NGQaz92dza6cyShQFH9uTbOkGWVSSCVf9Xi6e0Aa17bLcEBAXR V3l9WLHKODu324mG1/QiaVj+/49+moYb04sp9iOhcI99yVU+iZGt8PeW4asrSg== From: Luca Ceresoli To: linux-tegra@vger.kernel.org Cc: Luca Ceresoli , Thierry Reding , Jonathan Hunter , Sowjanya Komatineni , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Mauro Carvalho Chehab , Greg Kroah-Hartman , linux-media@vger.kernel.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-staging@lists.linux.dev, Laurent Pinchart , Hans Verkuil , Thomas Petazzoni , Paul Kocialkowski , Richard Leitner , Dmitry Osipenko Subject: [PATCH v6 16/20] staging: media: tegra-video: move syncpt init/free to a per-soc op Date: Tue, 18 Apr 2023 10:00:50 +0200 Message-Id: <20230418080054.452955-17-luca.ceresoli@bootlin.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230418080054.452955-1-luca.ceresoli@bootlin.com> References: <20230418080054.452955-1-luca.ceresoli@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org tegra_channel_host1x_syncpt_init() gets the host1x syncpts needed for the Tegra210 implementation, and tegra_channel_host1x_syncpts_free() puts them. Tegra20 needs to get and put a different syncpt. In preparation for adding Tegra20 support, move these functions to new ops in the soc-specific `struct tegra_vi_ops` . No functional changes. Signed-off-by: Luca Ceresoli Reviewed-by: Dmitry Osipenko --- No changes in v6 No changes in v5 Changed in v4: - Added review tags No changes in v3 No changes in v2 --- drivers/staging/media/tegra-video/tegra210.c | 52 ++++++++++++++++++++ drivers/staging/media/tegra-video/vi.c | 52 ++------------------ drivers/staging/media/tegra-video/vi.h | 5 ++ 3 files changed, 60 insertions(+), 49 deletions(-) diff --git a/drivers/staging/media/tegra-video/tegra210.c b/drivers/staging/media/tegra-video/tegra210.c index b4fcd4e93b8c..da99f19a39e7 100644 --- a/drivers/staging/media/tegra-video/tegra210.c +++ b/drivers/staging/media/tegra-video/tegra210.c @@ -179,6 +179,56 @@ static u32 vi_csi_read(struct tegra_vi_channel *chan, u8 portno, /* * Tegra210 VI channel capture operations */ + +static int tegra210_channel_host1x_syncpt_init(struct tegra_vi_channel *chan) +{ + struct tegra_vi *vi = chan->vi; + unsigned long flags = HOST1X_SYNCPT_CLIENT_MANAGED; + struct host1x_syncpt *fs_sp; + struct host1x_syncpt *mw_sp; + int ret, i; + + for (i = 0; i < chan->numgangports; i++) { + fs_sp = host1x_syncpt_request(&vi->client, flags); + if (!fs_sp) { + dev_err(vi->dev, "failed to request frame start syncpoint\n"); + ret = -ENOMEM; + goto free_syncpts; + } + + mw_sp = host1x_syncpt_request(&vi->client, flags); + if (!mw_sp) { + dev_err(vi->dev, "failed to request memory ack syncpoint\n"); + host1x_syncpt_put(fs_sp); + ret = -ENOMEM; + goto free_syncpts; + } + + chan->frame_start_sp[i] = fs_sp; + chan->mw_ack_sp[i] = mw_sp; + spin_lock_init(&chan->sp_incr_lock[i]); + } + + return 0; + +free_syncpts: + for (i = 0; i < chan->numgangports; i++) { + host1x_syncpt_put(chan->mw_ack_sp[i]); + host1x_syncpt_put(chan->frame_start_sp[i]); + } + return ret; +} + +static void tegra210_channel_host1x_syncpt_free(struct tegra_vi_channel *chan) +{ + int i; + + for (i = 0; i < chan->numgangports; i++) { + host1x_syncpt_put(chan->mw_ack_sp[i]); + host1x_syncpt_put(chan->frame_start_sp[i]); + } +} + static void tegra210_fmt_align(struct v4l2_pix_format *pix, unsigned int bpp) { unsigned int min_bpl; @@ -753,6 +803,8 @@ static const struct tegra_video_format tegra210_video_formats[] = { /* Tegra210 VI operations */ static const struct tegra_vi_ops tegra210_vi_ops = { + .channel_host1x_syncpt_init = tegra210_channel_host1x_syncpt_init, + .channel_host1x_syncpt_free = tegra210_channel_host1x_syncpt_free, .vi_fmt_align = tegra210_fmt_align, .vi_start_streaming = tegra210_vi_start_streaming, .vi_stop_streaming = tegra210_vi_stop_streaming, diff --git a/drivers/staging/media/tegra-video/vi.c b/drivers/staging/media/tegra-video/vi.c index 8df233049c81..b74cdd1d1c82 100644 --- a/drivers/staging/media/tegra-video/vi.c +++ b/drivers/staging/media/tegra-video/vi.c @@ -1062,21 +1062,11 @@ static int vi_fmts_bitmap_init(struct tegra_vi_channel *chan) return 0; } -static void tegra_channel_host1x_syncpts_free(struct tegra_vi_channel *chan) -{ - int i; - - for (i = 0; i < chan->numgangports; i++) { - host1x_syncpt_put(chan->mw_ack_sp[i]); - host1x_syncpt_put(chan->frame_start_sp[i]); - } -} - static void tegra_channel_cleanup(struct tegra_vi_channel *chan) { v4l2_ctrl_handler_free(&chan->ctrl_handler); media_entity_cleanup(&chan->video.entity); - tegra_channel_host1x_syncpts_free(chan); + chan->vi->ops->channel_host1x_syncpt_free(chan); mutex_destroy(&chan->video_lock); } @@ -1094,42 +1084,6 @@ void tegra_channels_cleanup(struct tegra_vi *vi) } } -static int tegra_channel_host1x_syncpt_init(struct tegra_vi_channel *chan) -{ - struct tegra_vi *vi = chan->vi; - unsigned long flags = HOST1X_SYNCPT_CLIENT_MANAGED; - struct host1x_syncpt *fs_sp; - struct host1x_syncpt *mw_sp; - int ret, i; - - for (i = 0; i < chan->numgangports; i++) { - fs_sp = host1x_syncpt_request(&vi->client, flags); - if (!fs_sp) { - dev_err(vi->dev, "failed to request frame start syncpoint\n"); - ret = -ENOMEM; - goto free_syncpts; - } - - mw_sp = host1x_syncpt_request(&vi->client, flags); - if (!mw_sp) { - dev_err(vi->dev, "failed to request memory ack syncpoint\n"); - host1x_syncpt_put(fs_sp); - ret = -ENOMEM; - goto free_syncpts; - } - - chan->frame_start_sp[i] = fs_sp; - chan->mw_ack_sp[i] = mw_sp; - spin_lock_init(&chan->sp_incr_lock[i]); - } - - return 0; - -free_syncpts: - tegra_channel_host1x_syncpts_free(chan); - return ret; -} - static int tegra_channel_init(struct tegra_vi_channel *chan) { struct tegra_vi *vi = chan->vi; @@ -1155,7 +1109,7 @@ static int tegra_channel_init(struct tegra_vi_channel *chan) chan->format.sizeimage = chan->format.bytesperline * TEGRA_DEF_HEIGHT; vi->ops->vi_fmt_align(&chan->format, chan->fmtinfo->bpp); - ret = tegra_channel_host1x_syncpt_init(chan); + ret = vi->ops->channel_host1x_syncpt_init(chan); if (ret) return ret; @@ -1218,7 +1172,7 @@ static int tegra_channel_init(struct tegra_vi_channel *chan) cleanup_media: media_entity_cleanup(&chan->video.entity); free_syncpts: - tegra_channel_host1x_syncpts_free(chan); + vi->ops->channel_host1x_syncpt_free(chan); return ret; } diff --git a/drivers/staging/media/tegra-video/vi.h b/drivers/staging/media/tegra-video/vi.h index 886b10e7d723..dfb5870b1411 100644 --- a/drivers/staging/media/tegra-video/vi.h +++ b/drivers/staging/media/tegra-video/vi.h @@ -38,10 +38,13 @@ enum tegra_vi_pg_mode { }; struct tegra_vi; +struct tegra_vi_channel; /** * struct tegra_vi_ops - Tegra VI operations * @vi_enable: soc-specific operations needed to enable/disable the VI peripheral + * @channel_host1x_syncpt_init: initialize synchronization points + * @channel_host1x_syncpt_free: free all synchronization points * @vi_fmt_align: modify `pix` to fit the hardware alignment * requirements and fill image geometry * @vi_start_streaming: starts media pipeline, subdevice streaming, sets up @@ -52,6 +55,8 @@ struct tegra_vi; */ struct tegra_vi_ops { int (*vi_enable)(struct tegra_vi *vi, bool on); + int (*channel_host1x_syncpt_init)(struct tegra_vi_channel *chan); + void (*channel_host1x_syncpt_free)(struct tegra_vi_channel *chan); void (*vi_fmt_align)(struct v4l2_pix_format *pix, unsigned int bpp); int (*vi_start_streaming)(struct vb2_queue *vq, u32 count); void (*vi_stop_streaming)(struct vb2_queue *vq); From patchwork Tue Apr 18 08:00:51 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Ceresoli X-Patchwork-Id: 674716 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 68AE0C77B71 for ; Tue, 18 Apr 2023 08:03:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230518AbjDRIDz (ORCPT ); Tue, 18 Apr 2023 04:03:55 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41668 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231503AbjDRIDc (ORCPT ); Tue, 18 Apr 2023 04:03:32 -0400 Received: from relay10.mail.gandi.net (relay10.mail.gandi.net [IPv6:2001:4b98:dc4:8::230]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0655593C5; Tue, 18 Apr 2023 01:02:45 -0700 (PDT) Received: from booty.fritz.box (unknown [77.244.183.192]) (Authenticated sender: luca.ceresoli@bootlin.com) by mail.gandi.net (Postfix) with ESMTPA id BFC4024000A; Tue, 18 Apr 2023 08:02:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1681804927; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=EYhB7o2AHjpvyLHUbhfBBM1o50IKtS3uoFjAW1ZtS+A=; b=EpvMOP5kQrj60rQkQhZWQXCF6iGRIHCa8g59e1F2e57Jc9njUfGKkDqDs0x65Ji1zstuDJ wpyeRb7A5qj4Aah2nQumxTMzmtCHmGNyks/WpEMzEbt52drwqt2vTOSAgwMyftZj4pDB4z WhFpkjfqAEG4AAQJRZyS3FNW84Z4WvldW6pb6mR/waP3lFq6XdtwGd/Qnq1oBmQWWtP+FI 7QXDx4QtRoPZN3DarvCGeHJ2p+kbKpXid2KwyvkMx9WPXxOJ+CEaDCs3JEKCAaaQvksxy/ QN1I9//QBwKGXlPRznavkti8tJFynqEdK3snqMnZYx85pK8w0+sDcA02SgDeDg== From: Luca Ceresoli To: linux-tegra@vger.kernel.org Cc: Luca Ceresoli , Thierry Reding , Jonathan Hunter , Sowjanya Komatineni , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Mauro Carvalho Chehab , Greg Kroah-Hartman , linux-media@vger.kernel.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-staging@lists.linux.dev, Laurent Pinchart , Hans Verkuil , Thomas Petazzoni , Paul Kocialkowski , Richard Leitner , Dmitry Osipenko Subject: [PATCH v6 17/20] staging: media: tegra-video: add syncpts for Tegra20 to struct tegra_vi Date: Tue, 18 Apr 2023 10:00:51 +0200 Message-Id: <20230418080054.452955-18-luca.ceresoli@bootlin.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230418080054.452955-1-luca.ceresoli@bootlin.com> References: <20230418080054.452955-1-luca.ceresoli@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org In preparation to implement Tegra20 parallel video capture, add a variable to hold the required syncpt and document all the syncpt variables. Signed-off-by: Luca Ceresoli Reviewed-by: Dmitry Osipenko --- No changes in v6 No changes in v5 Changed in v4: - Added review tags Changed in v3: - recycle mw_ack_sp[0] instead of adding out_sp No changes in v2 --- drivers/staging/media/tegra-video/vi.h | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/staging/media/tegra-video/vi.h b/drivers/staging/media/tegra-video/vi.h index dfb5870b1411..02f940f2e2eb 100644 --- a/drivers/staging/media/tegra-video/vi.h +++ b/drivers/staging/media/tegra-video/vi.h @@ -117,11 +117,13 @@ struct tegra_vi { * @vi: Tegra video input device structure * @frame_start_sp: host1x syncpoint pointer to synchronize programmed capture * start condition with hardware frame start events through host1x - * syncpoint counters. + * syncpoint counters. (Tegra210) * @mw_ack_sp: host1x syncpoint pointer to synchronize programmed memory write * ack trigger condition with hardware memory write done at end of - * frame through host1x syncpoint counters. + * frame through host1x syncpoint counters (On Tegra20 used for the + * OUT_1 syncpt) * @sp_incr_lock: protects cpu syncpoint increment. + * @next_out_sp_idx: next expected value for mw_ack_sp[0], i.e. OUT_1 (Tegra20) * * @kthread_start_capture: kthread to start capture of single frame when * vb buffer is available. This thread programs VI CSI hardware @@ -175,6 +177,7 @@ struct tegra_vi_channel { struct host1x_syncpt *mw_ack_sp[GANG_PORTS_MAX]; /* protects the cpu syncpoint increment */ spinlock_t sp_incr_lock[GANG_PORTS_MAX]; + u32 next_out_sp_idx; struct task_struct *kthread_start_capture; wait_queue_head_t start_wait; From patchwork Tue Apr 18 08:00:52 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Ceresoli X-Patchwork-Id: 674715 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CBCD6C77B76 for ; Tue, 18 Apr 2023 08:04:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231162AbjDRIEI (ORCPT ); Tue, 18 Apr 2023 04:04:08 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43672 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231135AbjDRIDm (ORCPT ); Tue, 18 Apr 2023 04:03:42 -0400 Received: from relay10.mail.gandi.net (relay10.mail.gandi.net [IPv6:2001:4b98:dc4:8::230]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D67E293DE; Tue, 18 Apr 2023 01:02:48 -0700 (PDT) Received: from booty.fritz.box (unknown [77.244.183.192]) (Authenticated sender: luca.ceresoli@bootlin.com) by mail.gandi.net (Postfix) with ESMTPA id E5270240017; Tue, 18 Apr 2023 08:02:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1681804930; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=PsM0loFRr7Qqghs8TxnS6mVQjrcznghYt4siqeLqiTA=; b=TUwe/PdtzCx0VYAlos4wo9jTu8GD4uuLKuwxLrUhSYm7uLHmv/t1jD7+BnwEBMUrbRaI4U CGY427TlyZ3vEhGSeXlx+0EipsBeTz9i+EKETqQz+N7yu5W9AzzA+w/NAkvsvuDxrCvNmg yB53EC/4jjS+YSIzgKLOOju5ErmoRjeHX+PU9bWoNnZy4BE3xaICAcXKW8XaymY+tjfTqH dINyRVBjJK9UFRYle3ayhapaQCC9b1rYhu8KKD3SJeNbJsIvsTrEmayLWJrejJNCvOD64i JHo3ro4qcOb1nkXzpl151Oy1Os45FZJF5lVty60n6h+9SjloCnlEgsRf/nLonA== From: Luca Ceresoli To: linux-tegra@vger.kernel.org Cc: Luca Ceresoli , Thierry Reding , Jonathan Hunter , Sowjanya Komatineni , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Mauro Carvalho Chehab , Greg Kroah-Hartman , linux-media@vger.kernel.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-staging@lists.linux.dev, Laurent Pinchart , Hans Verkuil , Thomas Petazzoni , Paul Kocialkowski , Richard Leitner , Dmitry Osipenko Subject: [PATCH v6 18/20] staging: media: tegra-video: add hooks for planar YUV and H/V flip Date: Tue, 18 Apr 2023 10:00:52 +0200 Message-Id: <20230418080054.452955-19-luca.ceresoli@bootlin.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230418080054.452955-1-luca.ceresoli@bootlin.com> References: <20230418080054.452955-1-luca.ceresoli@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Tegra20 supports planar YUV422 capture, which can be implemented by writing U and V base address registers in addition to the "main" base buffer address register. It also supports H and V flip, which among others requires to write the start address (i.e. the 1st offset to write, at the end of the buffer or line) in more registers for Y and, for planar formats, U and V. Add minimal hooks in VI to allow per-SoC optional support to those features: - variables in struct tegra_vi for the U and V buffer base offsets - variables in struct tegra_vi for the Y, U and V buffer start offsets - an optional per-soc VI operation to compute those values on queue setup Signed-off-by: Luca Ceresoli Reviewed-by: Dmitry Osipenko --- No changes in v6 No changes in v5 Changed in v4: - Added review tags No changes in v3 No changes in v2 --- drivers/staging/media/tegra-video/vi.c | 4 ++++ drivers/staging/media/tegra-video/vi.h | 14 ++++++++++++++ 2 files changed, 18 insertions(+) diff --git a/drivers/staging/media/tegra-video/vi.c b/drivers/staging/media/tegra-video/vi.c index b74cdd1d1c82..5ab24977ec46 100644 --- a/drivers/staging/media/tegra-video/vi.c +++ b/drivers/staging/media/tegra-video/vi.c @@ -102,6 +102,7 @@ tegra_get_format_by_fourcc(struct tegra_vi *vi, u32 fourcc) /* * videobuf2 queue operations */ + static int tegra_channel_queue_setup(struct vb2_queue *vq, unsigned int *nbuffers, unsigned int *nplanes, @@ -117,6 +118,9 @@ static int tegra_channel_queue_setup(struct vb2_queue *vq, sizes[0] = chan->format.sizeimage; alloc_devs[0] = chan->vi->dev; + if (chan->vi->ops->channel_queue_setup) + chan->vi->ops->channel_queue_setup(chan); + return 0; } diff --git a/drivers/staging/media/tegra-video/vi.h b/drivers/staging/media/tegra-video/vi.h index 02f940f2e2eb..cadf80b742a8 100644 --- a/drivers/staging/media/tegra-video/vi.h +++ b/drivers/staging/media/tegra-video/vi.h @@ -47,6 +47,7 @@ struct tegra_vi_channel; * @channel_host1x_syncpt_free: free all synchronization points * @vi_fmt_align: modify `pix` to fit the hardware alignment * requirements and fill image geometry + * @channel_queue_setup: additional operations at the end of vb2_ops::queue_setup * @vi_start_streaming: starts media pipeline, subdevice streaming, sets up * VI for capture and runs capture start and capture finish * kthreads for capturing frames to buffer and returns them back. @@ -58,6 +59,7 @@ struct tegra_vi_ops { int (*channel_host1x_syncpt_init)(struct tegra_vi_channel *chan); void (*channel_host1x_syncpt_free)(struct tegra_vi_channel *chan); void (*vi_fmt_align)(struct v4l2_pix_format *pix, unsigned int bpp); + void (*channel_queue_setup)(struct tegra_vi_channel *chan); int (*vi_start_streaming)(struct vb2_queue *vq, u32 count); void (*vi_stop_streaming)(struct vb2_queue *vq); }; @@ -148,6 +150,12 @@ struct tegra_vi { * @queue: vb2 buffers queue * @sequence: V4L2 buffers sequence number * + * @addr_offset_u: U plane base address, relative to buffer base address (only for planar) + * @addr_offset_v: V plane base address, relative to buffer base address (only for planar) + * @start_offset: 1st Y byte to write, relative to buffer base address (for H/V flip) + * @start_offset_u: 1st U byte to write, relative to buffer base address (for H/V flip) + * @start_offset_v: 1st V byte to write, relative to buffer base address (for H/V flip) + * * @capture: list of queued buffers for capture * @start_lock: protects the capture queued list * @done: list of capture done queued buffers @@ -189,6 +197,12 @@ struct tegra_vi_channel { struct vb2_queue queue; u32 sequence; + unsigned int addr_offset_u; + unsigned int addr_offset_v; + unsigned int start_offset; + unsigned int start_offset_u; + unsigned int start_offset_v; + struct list_head capture; /* protects the capture queued list */ spinlock_t start_lock; From patchwork Tue Apr 18 08:00:53 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Ceresoli X-Patchwork-Id: 675377 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 33E5EC77B71 for ; Tue, 18 Apr 2023 08:03:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231376AbjDRIDb (ORCPT ); Tue, 18 Apr 2023 04:03:31 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42722 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231497AbjDRICu (ORCPT ); Tue, 18 Apr 2023 04:02:50 -0400 Received: from relay10.mail.gandi.net (relay10.mail.gandi.net [IPv6:2001:4b98:dc4:8::230]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4EC727DB6; Tue, 18 Apr 2023 01:02:25 -0700 (PDT) Received: from booty.fritz.box (unknown [77.244.183.192]) (Authenticated sender: luca.ceresoli@bootlin.com) by mail.gandi.net (Postfix) with ESMTPA id C321824001E; Tue, 18 Apr 2023 08:02:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1681804934; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=zI1HE7xYpFUXXPJOpa1EDaS4Y2c6dkA50VEWah254Wo=; b=irXErdd8xPwyarlKe1jRze6lT993QTpw4Tx2xanfkQ65ACxGv9ta18N42bZHomyBfMPf4K c/eRLUiMBKNtEAZ1rYECxImo+AF0peAN8nMYGzQLvhCyGoi5nf/f0DkUXUngG1at2wTRv3 LKwZfl27owGIUj2BvakXFUvODQ0R0b1jhBTcOifJ0gGnZ4m7W+ryqheuPc9VqIPX6whbhh MOTDb2/9PwJQa3BE+BXuLLxd2p291CztSoSFqPc7OPNc2Ny5EYYOxU7hdfCPm7IxvsNOu0 GJi4dOIzrxN1lBrGA8py5nQn6YWWDau/5zwQDumASGd/Cmw5Gv6DF2xGPkMmiA== From: Luca Ceresoli To: linux-tegra@vger.kernel.org Cc: Luca Ceresoli , Thierry Reding , Jonathan Hunter , Sowjanya Komatineni , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Mauro Carvalho Chehab , Greg Kroah-Hartman , linux-media@vger.kernel.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-staging@lists.linux.dev, Laurent Pinchart , Hans Verkuil , Thomas Petazzoni , Paul Kocialkowski , Richard Leitner , Dmitry Osipenko Subject: [PATCH v6 19/20] staging: media: tegra-video: add H/V flip controls Date: Tue, 18 Apr 2023 10:00:53 +0200 Message-Id: <20230418080054.452955-20-luca.ceresoli@bootlin.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230418080054.452955-1-luca.ceresoli@bootlin.com> References: <20230418080054.452955-1-luca.ceresoli@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Tegra20 can do horizontal and vertical image flip, but Tegra210 cannot (either the hardware, or this driver). In preparation to adding Tegra20 support, add a flag in struct tegra_vi_soc so the generic vi.c code knows whether the flip controls should be added or not. Also provide a generic implementation that simply sets two flags in the channel struct. The Tegra20 implementation will enable flipping at stream start based on those flags. Signed-off-by: Luca Ceresoli Reviewed-by: Dmitry Osipenko --- No changes in v6 Changed in v5: - Fixed typo in comment Changed in v4: - Added review tags No changes in v3 No changes in v2 --- drivers/staging/media/tegra-video/vi.c | 14 +++++++++++++- drivers/staging/media/tegra-video/vi.h | 8 ++++++++ 2 files changed, 21 insertions(+), 1 deletion(-) diff --git a/drivers/staging/media/tegra-video/vi.c b/drivers/staging/media/tegra-video/vi.c index 5ab24977ec46..39e9df895ede 100644 --- a/drivers/staging/media/tegra-video/vi.c +++ b/drivers/staging/media/tegra-video/vi.c @@ -30,7 +30,7 @@ #include "vi.h" #include "video.h" -#define MAX_CID_CONTROLS 1 +#define MAX_CID_CONTROLS 3 /** * struct tegra_vi_graph_entity - Entity in the video graph @@ -910,6 +910,12 @@ static int vi_s_ctrl(struct v4l2_ctrl *ctrl) case V4L2_CID_TEGRA_SYNCPT_TIMEOUT_RETRY: chan->syncpt_timeout_retry = ctrl->val; break; + case V4L2_CID_HFLIP: + chan->hflip = ctrl->val; + break; + case V4L2_CID_VFLIP: + chan->vflip = ctrl->val; + break; default: return -EINVAL; } @@ -981,6 +987,12 @@ static int tegra_channel_setup_ctrl_handler(struct tegra_vi_channel *chan) v4l2_ctrl_handler_free(&chan->ctrl_handler); return ret; } + + if (chan->vi->soc->has_h_v_flip) { + v4l2_ctrl_new_std(&chan->ctrl_handler, &vi_ctrl_ops, V4L2_CID_HFLIP, 0, 1, 1, 0); + v4l2_ctrl_new_std(&chan->ctrl_handler, &vi_ctrl_ops, V4L2_CID_VFLIP, 0, 1, 1, 0); + } + #endif /* setup the controls */ diff --git a/drivers/staging/media/tegra-video/vi.h b/drivers/staging/media/tegra-video/vi.h index cadf80b742a8..778c0ec475ab 100644 --- a/drivers/staging/media/tegra-video/vi.h +++ b/drivers/staging/media/tegra-video/vi.h @@ -74,6 +74,7 @@ struct tegra_vi_ops { * @hw_revision: VI hw_revision * @vi_max_channels: supported max streaming channels * @vi_max_clk_hz: VI clock max frequency + * @has_h_v_flip: the chip can do H and V flip, and the driver implements it */ struct tegra_vi_soc { const struct tegra_video_format *video_formats; @@ -83,6 +84,7 @@ struct tegra_vi_soc { u32 hw_revision; unsigned int vi_max_channels; unsigned int vi_max_clk_hz; + bool has_h_v_flip:1; }; /** @@ -172,6 +174,9 @@ struct tegra_vi { * @tpg_fmts_bitmap: a bitmap for supported TPG formats * @pg_mode: test pattern generator mode (disabled/direct/patch) * @notifier: V4L2 asynchronous subdevs notifier + * + * @hflip: Horizontal flip is enabled + * @vflip: Vertical flip is enabled */ struct tegra_vi_channel { struct list_head list; @@ -222,6 +227,9 @@ struct tegra_vi_channel { enum tegra_vi_pg_mode pg_mode; struct v4l2_async_notifier notifier; + + bool hflip:1; + bool vflip:1; }; /** From patchwork Tue Apr 18 08:00:54 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Ceresoli X-Patchwork-Id: 675374 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7F9FFC77B75 for ; Tue, 18 Apr 2023 08:04:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231316AbjDRIEq (ORCPT ); Tue, 18 Apr 2023 04:04:46 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41668 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231528AbjDRIEd (ORCPT ); Tue, 18 Apr 2023 04:04:33 -0400 Received: from relay10.mail.gandi.net (relay10.mail.gandi.net [IPv6:2001:4b98:dc4:8::230]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 54AC98A48; Tue, 18 Apr 2023 01:04:00 -0700 (PDT) Received: from booty.fritz.box (unknown [77.244.183.192]) (Authenticated sender: luca.ceresoli@bootlin.com) by mail.gandi.net (Postfix) with ESMTPA id 70DFA240009; Tue, 18 Apr 2023 08:02:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1681804937; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=Vw3JYJLxDwUuAh4yEiuwcB4K9Kr4fI3bOxGoYXkrbAg=; b=ERbX87a20PsGtAbjdIKzwsgUD+RZsvFmmeoLGOAWGd+YBdVf9ESx2JxYVPBR4KoaFjuhth 1q73IEe8UDMvNBikr2dUwNrWqOCxdWnHfrdUCyuYMRMZm/q14Ym7SGvKZq1GlCzEFYICNw tMFelGuRDtYL0AnNLYfHkt99W88pVvRZBYpre5xS1rzX5pD1p4o9J9Y/V9EzVVD80ZVaze 3u73B5TRKrzPmjfBBCw6BiQvUtJaWJhsPoVFbaqdVHvF78fO1iHBKNsdSWBgUNiIN/aBdu CwARlAAQshZ3B1h3iDpr/9elAjO3HLkUKjLVw6MehTXh/K3LPQULMZvWw1LKNg== From: Luca Ceresoli To: linux-tegra@vger.kernel.org Cc: Luca Ceresoli , Thierry Reding , Jonathan Hunter , Sowjanya Komatineni , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Mauro Carvalho Chehab , Greg Kroah-Hartman , linux-media@vger.kernel.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-staging@lists.linux.dev, Laurent Pinchart , Hans Verkuil , Thomas Petazzoni , Paul Kocialkowski , Richard Leitner , Dmitry Osipenko Subject: [PATCH v6 20/20] staging: media: tegra-video: add support for Tegra20 parallel input Date: Tue, 18 Apr 2023 10:00:54 +0200 Message-Id: <20230418080054.452955-21-luca.ceresoli@bootlin.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230418080054.452955-1-luca.ceresoli@bootlin.com> References: <20230418080054.452955-1-luca.ceresoli@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The VI peripheral of Tegra supports capturing from MIPI CSI-2 or parallel video (called VIP in the docs). The staging tegra-video driver currently implements MIPI CSI-2 video capture for Tegra210. Add support for parallel video capture (VIP) on Tegra20. With the generalizations added to the VI driver in previous commits, this is only a matter of adding the vip.c and tegra20.c implementations and registering them. Unfortunately there was no documentation available for the VI or VIP peripherals of Tegra20 (or any other Tegra chips). This implementation has been based entirely on the code from a vendor kernel based on Linux 3.1 and massively adapted to fit into the tegra-video driver. Parts of this code is definitely non-optimal to say the least (especially tegra20_vi_enable() and the single-frame capture logic), but it was impossible to improve it. Signed-off-by: Luca Ceresoli Reviewed-by: Dmitry Osipenko --- No changes in v6 Changed in v5: - Fixed small typo - Upgraded copyright year Changed in v4: - Added review tags Changed in v3 (suggested by Dmitry Osipenko): - merged the VIP patch and the Tegra20 patch to avoid chicken-egg problem due to the two modules depending on each other at build time - move tegra20_vip_soc to vip.c - remove channel@0 node from device tree parsing - remove unused variable Changed in v2: - fix tegra20_vi_enable() to clear bit when on==false - clamp width/height from set/try_fmt to avoid returning sizeimage=0 (fixes v4l2-compliance) --- drivers/staging/media/tegra-video/Makefile | 2 + drivers/staging/media/tegra-video/tegra20.c | 661 ++++++++++++++++++++ drivers/staging/media/tegra-video/vi.c | 3 + drivers/staging/media/tegra-video/vi.h | 3 + drivers/staging/media/tegra-video/video.c | 5 + drivers/staging/media/tegra-video/video.h | 1 + drivers/staging/media/tegra-video/vip.c | 290 +++++++++ drivers/staging/media/tegra-video/vip.h | 68 ++ 8 files changed, 1033 insertions(+) create mode 100644 drivers/staging/media/tegra-video/tegra20.c create mode 100644 drivers/staging/media/tegra-video/vip.c create mode 100644 drivers/staging/media/tegra-video/vip.h diff --git a/drivers/staging/media/tegra-video/Makefile b/drivers/staging/media/tegra-video/Makefile index dfa2ef8f99ef..6c7552e05109 100644 --- a/drivers/staging/media/tegra-video/Makefile +++ b/drivers/staging/media/tegra-video/Makefile @@ -2,7 +2,9 @@ tegra-video-objs := \ video.o \ vi.o \ + vip.o \ csi.o +tegra-video-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra20.o tegra-video-$(CONFIG_ARCH_TEGRA_210_SOC) += tegra210.o obj-$(CONFIG_VIDEO_TEGRA) += tegra-video.o diff --git a/drivers/staging/media/tegra-video/tegra20.c b/drivers/staging/media/tegra-video/tegra20.c new file mode 100644 index 000000000000..c25286772603 --- /dev/null +++ b/drivers/staging/media/tegra-video/tegra20.c @@ -0,0 +1,661 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Tegra20-specific VI implementation + * + * Copyright (C) 2023 SKIDATA GmbH + * Author: Luca Ceresoli + */ + +/* + * This source file contains Tegra20 supported video formats, + * VI and VIP SoC specific data, operations and registers accessors. + */ + +#include +#include +#include +#include +#include +#include + +#include "vip.h" +#include "vi.h" + +#define TEGRA_VI_SYNCPT_WAIT_TIMEOUT msecs_to_jiffies(200) + +/* This are just good-sense numbers. The actual min/max is not documented. */ +#define TEGRA20_MIN_WIDTH 32U +#define TEGRA20_MIN_HEIGHT 32U +#define TEGRA20_MAX_WIDTH 2048U +#define TEGRA20_MAX_HEIGHT 2048U + +/* -------------------------------------------------------------------------- + * Registers + */ + +#define TEGRA_VI_CONT_SYNCPT_OUT_1 0x0060 +#define VI_CONT_SYNCPT_OUT_1_CONTINUOUS_SYNCPT BIT(8) +#define VI_CONT_SYNCPT_OUT_1_SYNCPT_IDX_SFT 0 + +#define TEGRA_VI_VI_INPUT_CONTROL 0x0088 +#define VI_INPUT_FIELD_DETECT BIT(27) +#define VI_INPUT_BT656 BIT(25) +#define VI_INPUT_YUV_INPUT_FORMAT_SFT 8 /* bits [9:8] */ +#define VI_INPUT_YUV_INPUT_FORMAT_UYVY (0 << VI_INPUT_YUV_INPUT_FORMAT_SFT) +#define VI_INPUT_YUV_INPUT_FORMAT_VYUY (1 << VI_INPUT_YUV_INPUT_FORMAT_SFT) +#define VI_INPUT_YUV_INPUT_FORMAT_YUYV (2 << VI_INPUT_YUV_INPUT_FORMAT_SFT) +#define VI_INPUT_YUV_INPUT_FORMAT_YVYU (3 << VI_INPUT_YUV_INPUT_FORMAT_SFT) +#define VI_INPUT_INPUT_FORMAT_SFT 2 /* bits [5:2] */ +#define VI_INPUT_INPUT_FORMAT_YUV422 (0 << VI_INPUT_INPUT_FORMAT_SFT) +#define VI_INPUT_VIP_INPUT_ENABLE BIT(1) + +#define TEGRA_VI_VI_CORE_CONTROL 0x008c +#define VI_VI_CORE_CONTROL_PLANAR_CONV_IN_SEL_EXT BIT(31) +#define VI_VI_CORE_CONTROL_CSC_INPUT_SEL_EXT BIT(30) +#define VI_VI_CORE_CONTROL_INPUT_TO_ALT_MUX_SFT 27 +#define VI_VI_CORE_CONTROL_INPUT_TO_CORE_EXT_SFT 24 +#define VI_VI_CORE_CONTROL_OUTPUT_TO_ISP_EXT_SFT 21 +#define VI_VI_CORE_CONTROL_ISP_HOST_STALL_OFF BIT(20) +#define VI_VI_CORE_CONTROL_V_DOWNSCALING BIT(19) +#define VI_VI_CORE_CONTROL_V_AVERAGING BIT(18) +#define VI_VI_CORE_CONTROL_H_DOWNSCALING BIT(17) +#define VI_VI_CORE_CONTROL_H_AVERAGING BIT(16) +#define VI_VI_CORE_CONTROL_CSC_INPUT_SEL BIT(11) +#define VI_VI_CORE_CONTROL_PLANAR_CONV_INPUT_SEL BIT(10) +#define VI_VI_CORE_CONTROL_INPUT_TO_CORE_SFT 8 +#define VI_VI_CORE_CONTROL_ISP_DOWNSAMPLE_SFT 5 +#define VI_VI_CORE_CONTROL_OUTPUT_TO_EPP_SFT 2 +#define VI_VI_CORE_CONTROL_OUTPUT_TO_ISP_SFT 0 + +#define TEGRA_VI_VI_FIRST_OUTPUT_CONTROL 0x0090 +#define VI_OUTPUT_FORMAT_EXT BIT(22) +#define VI_OUTPUT_V_DIRECTION BIT(20) +#define VI_OUTPUT_H_DIRECTION BIT(19) +#define VI_OUTPUT_YUV_OUTPUT_FORMAT_SFT 17 +#define VI_OUTPUT_YUV_OUTPUT_FORMAT_UYVY (0 << VI_OUTPUT_YUV_OUTPUT_FORMAT_SFT) +#define VI_OUTPUT_YUV_OUTPUT_FORMAT_VYUY (1 << VI_OUTPUT_YUV_OUTPUT_FORMAT_SFT) +#define VI_OUTPUT_YUV_OUTPUT_FORMAT_YUYV (2 << VI_OUTPUT_YUV_OUTPUT_FORMAT_SFT) +#define VI_OUTPUT_YUV_OUTPUT_FORMAT_YVYU (3 << VI_OUTPUT_YUV_OUTPUT_FORMAT_SFT) +#define VI_OUTPUT_OUTPUT_BYTE_SWAP BIT(16) +#define VI_OUTPUT_LAST_PIXEL_DUPLICATION BIT(8) +#define VI_OUTPUT_OUTPUT_FORMAT_SFT 0 +#define VI_OUTPUT_OUTPUT_FORMAT_YUV422POST (3 << VI_OUTPUT_OUTPUT_FORMAT_SFT) +#define VI_OUTPUT_OUTPUT_FORMAT_YUV420PLANAR (6 << VI_OUTPUT_OUTPUT_FORMAT_SFT) + +#define TEGRA_VI_VIP_H_ACTIVE 0x00a4 +#define VI_VIP_H_ACTIVE_PERIOD_SFT 16 /* active pixels/line, must be even */ +#define VI_VIP_H_ACTIVE_START_SFT 0 + +#define TEGRA_VI_VIP_V_ACTIVE 0x00a8 +#define VI_VIP_V_ACTIVE_PERIOD_SFT 16 /* active lines */ +#define VI_VIP_V_ACTIVE_START_SFT 0 + +#define TEGRA_VI_VB0_START_ADDRESS_FIRST 0x00c4 +#define TEGRA_VI_VB0_BASE_ADDRESS_FIRST 0x00c8 +#define TEGRA_VI_VB0_START_ADDRESS_U 0x00cc +#define TEGRA_VI_VB0_BASE_ADDRESS_U 0x00d0 +#define TEGRA_VI_VB0_START_ADDRESS_V 0x00d4 +#define TEGRA_VI_VB0_BASE_ADDRESS_V 0x00d8 + +#define TEGRA_VI_FIRST_OUTPUT_FRAME_SIZE 0x00e0 +#define VI_FIRST_OUTPUT_FRAME_HEIGHT_SFT 16 +#define VI_FIRST_OUTPUT_FRAME_WIDTH_SFT 0 + +#define TEGRA_VI_VB0_COUNT_FIRST 0x00e4 + +#define TEGRA_VI_VB0_SIZE_FIRST 0x00e8 +#define VI_VB0_SIZE_FIRST_V_SFT 16 +#define VI_VB0_SIZE_FIRST_H_SFT 0 + +#define TEGRA_VI_VB0_BUFFER_STRIDE_FIRST 0x00ec +#define VI_VB0_BUFFER_STRIDE_FIRST_CHROMA_SFT 30 +#define VI_VB0_BUFFER_STRIDE_FIRST_LUMA_SFT 0 + +#define TEGRA_VI_H_LPF_CONTROL 0x0108 +#define VI_H_LPF_CONTROL_CHROMA_SFT 16 +#define VI_H_LPF_CONTROL_LUMA_SFT 0 + +#define TEGRA_VI_H_DOWNSCALE_CONTROL 0x010c +#define TEGRA_VI_V_DOWNSCALE_CONTROL 0x0110 + +#define TEGRA_VI_VIP_INPUT_STATUS 0x0144 + +#define TEGRA_VI_VI_DATA_INPUT_CONTROL 0x0168 +#define VI_DATA_INPUT_SFT 0 /* [11:0] = mask pin inputs to VI core */ + +#define TEGRA_VI_PIN_INPUT_ENABLE 0x016c +#define VI_PIN_INPUT_VSYNC BIT(14) +#define VI_PIN_INPUT_HSYNC BIT(13) +#define VI_PIN_INPUT_VD_SFT 0 /* [11:0] = data bin N input enable */ + +#define TEGRA_VI_PIN_INVERSION 0x0174 +#define VI_PIN_INVERSION_VSYNC_ACTIVE_HIGH BIT(1) +#define VI_PIN_INVERSION_HSYNC_ACTIVE_HIGH BIT(0) + +#define TEGRA_VI_CAMERA_CONTROL 0x01a0 +#define VI_CAMERA_CONTROL_STOP_CAPTURE BIT(2) +#define VI_CAMERA_CONTROL_TEST_MODE BIT(1) +#define VI_CAMERA_CONTROL_VIP_ENABLE BIT(0) + +#define TEGRA_VI_VI_ENABLE 0x01a4 +#define VI_VI_ENABLE_SW_FLOW_CONTROL_OUT1 BIT(1) +#define VI_VI_ENABLE_FIRST_OUTPUT_TO_MEM_DISABLE BIT(0) + +#define TEGRA_VI_VI_RAISE 0x01ac +#define VI_VI_RAISE_ON_EDGE BIT(0) + +/* -------------------------------------------------------------------------- + * VI + */ + +static void tegra20_vi_write(struct tegra_vi_channel *chan, unsigned int addr, u32 val) +{ + writel(val, chan->vi->iomem + addr); +} + +/* + * Get the main input format (YUV/RGB...) and the YUV variant as values to + * be written into registers for the current VI input mbus code. + */ +static void tegra20_vi_get_input_formats(struct tegra_vi_channel *chan, + unsigned int *main_input_format, + unsigned int *yuv_input_format) +{ + unsigned int input_mbus_code = chan->fmtinfo->code; + + (*main_input_format) = VI_INPUT_INPUT_FORMAT_YUV422; + + switch (input_mbus_code) { + case MEDIA_BUS_FMT_UYVY8_2X8: + (*yuv_input_format) = VI_INPUT_YUV_INPUT_FORMAT_UYVY; + break; + case MEDIA_BUS_FMT_VYUY8_2X8: + (*yuv_input_format) = VI_INPUT_YUV_INPUT_FORMAT_VYUY; + break; + case MEDIA_BUS_FMT_YUYV8_2X8: + (*yuv_input_format) = VI_INPUT_YUV_INPUT_FORMAT_YUYV; + break; + case MEDIA_BUS_FMT_YVYU8_2X8: + (*yuv_input_format) = VI_INPUT_YUV_INPUT_FORMAT_YVYU; + break; + } +} + +/* + * Get the main output format (YUV/RGB...) and the YUV variant as values to + * be written into registers for the current VI output pixel format. + */ +static void tegra20_vi_get_output_formats(struct tegra_vi_channel *chan, + unsigned int *main_output_format, + unsigned int *yuv_output_format) +{ + u32 output_fourcc = chan->format.pixelformat; + + /* Default to YUV422 non-planar (U8Y8V8Y8) after downscaling */ + (*main_output_format) = VI_OUTPUT_OUTPUT_FORMAT_YUV422POST; + (*yuv_output_format) = VI_OUTPUT_YUV_OUTPUT_FORMAT_UYVY; + + switch (output_fourcc) { + case V4L2_PIX_FMT_UYVY: + (*yuv_output_format) = VI_OUTPUT_YUV_OUTPUT_FORMAT_UYVY; + break; + case V4L2_PIX_FMT_VYUY: + (*yuv_output_format) = VI_OUTPUT_YUV_OUTPUT_FORMAT_VYUY; + break; + case V4L2_PIX_FMT_YUYV: + (*yuv_output_format) = VI_OUTPUT_YUV_OUTPUT_FORMAT_YUYV; + break; + case V4L2_PIX_FMT_YVYU: + (*yuv_output_format) = VI_OUTPUT_YUV_OUTPUT_FORMAT_YVYU; + break; + case V4L2_PIX_FMT_YUV420: + case V4L2_PIX_FMT_YVU420: + (*main_output_format) = VI_OUTPUT_OUTPUT_FORMAT_YUV420PLANAR; + break; + } +} + +/* + * Make the VI accessible (needed on Tegra20). + * + * This function writes an unknown bit into an unknown register. The code + * comes from a downstream 3.1 kernel that has a working VIP driver for + * Tegra20, and removing it makes the VI completely unaccessible. It should + * be rewritten and possibly moved elsewhere, but the appropriate location + * and implementation is unknown due to a total lack of documentation. + */ +static int tegra20_vi_enable(struct tegra_vi *vi, bool on) +{ + /* from arch/arm/mach-tegra/iomap.h */ + const phys_addr_t TEGRA_APB_MISC_BASE = 0x70000000; + const unsigned long reg_offset = 0x42c; + void __iomem *apb_misc; + u32 val; + + apb_misc = ioremap(TEGRA_APB_MISC_BASE, PAGE_SIZE); + if (!apb_misc) + apb_misc = ERR_PTR(-ENOENT); + if (IS_ERR(apb_misc)) + return dev_err_probe(vi->dev, PTR_ERR(apb_misc), "cannot access APB_MISC"); + + val = readl(apb_misc + reg_offset); + val &= ~BIT(0); + val |= on ? BIT(0) : 0; + writel(val, apb_misc + reg_offset); + iounmap(apb_misc); + + return 0; +} + +static int tegra20_channel_host1x_syncpt_init(struct tegra_vi_channel *chan) +{ + struct tegra_vi *vi = chan->vi; + struct host1x_syncpt *out_sp; + + out_sp = host1x_syncpt_request(&vi->client, HOST1X_SYNCPT_CLIENT_MANAGED); + if (!out_sp) + return dev_err_probe(vi->dev, -ENOMEM, "failed to request syncpoint\n"); + + chan->mw_ack_sp[0] = out_sp; + + return 0; +} + +static void tegra20_channel_host1x_syncpt_free(struct tegra_vi_channel *chan) +{ + host1x_syncpt_put(chan->mw_ack_sp[0]); +} + +static void tegra20_fmt_align(struct v4l2_pix_format *pix, unsigned int bpp) +{ + pix->width = clamp(pix->width, TEGRA20_MIN_WIDTH, TEGRA20_MAX_WIDTH); + pix->height = clamp(pix->height, TEGRA20_MIN_HEIGHT, TEGRA20_MAX_HEIGHT); + + switch (pix->pixelformat) { + case V4L2_PIX_FMT_UYVY: + case V4L2_PIX_FMT_VYUY: + case V4L2_PIX_FMT_YUYV: + case V4L2_PIX_FMT_YVYU: + pix->bytesperline = roundup(pix->width, 2) * 2; + pix->sizeimage = roundup(pix->width, 2) * 2 * pix->height; + break; + case V4L2_PIX_FMT_YUV420: + case V4L2_PIX_FMT_YVU420: + pix->bytesperline = roundup(pix->width, 8); + pix->sizeimage = roundup(pix->width, 8) * pix->height * 3 / 2; + break; + } +} + +/* + * Compute buffer offsets once per stream so that + * tegra20_channel_vi_buffer_setup() only has to do very simple maths for + * each buffer. + */ +static void tegra20_channel_queue_setup(struct tegra_vi_channel *chan) +{ + unsigned int stride = chan->format.bytesperline; + unsigned int height = chan->format.height; + + chan->start_offset = 0; + + switch (chan->format.pixelformat) { + case V4L2_PIX_FMT_UYVY: + case V4L2_PIX_FMT_VYUY: + case V4L2_PIX_FMT_YUYV: + case V4L2_PIX_FMT_YVYU: + if (chan->vflip) + chan->start_offset += stride * (height - 1); + if (chan->hflip) + chan->start_offset += stride - 1; + break; + + case V4L2_PIX_FMT_YUV420: + case V4L2_PIX_FMT_YVU420: + chan->addr_offset_u = stride * height; + chan->addr_offset_v = chan->addr_offset_u + stride * height / 4; + + /* For YVU420, we swap the locations of the U and V planes. */ + if (chan->format.pixelformat == V4L2_PIX_FMT_YVU420) { + unsigned long temp; + + temp = chan->addr_offset_u; + chan->addr_offset_u = chan->addr_offset_v; + chan->addr_offset_v = temp; + } + + chan->start_offset_u = chan->addr_offset_u; + chan->start_offset_v = chan->addr_offset_v; + + if (chan->vflip) { + chan->start_offset += stride * (height - 1); + chan->start_offset_u += (stride / 2) * ((height / 2) - 1); + chan->start_offset_v += (stride / 2) * ((height / 2) - 1); + } + if (chan->hflip) { + chan->start_offset += stride - 1; + chan->start_offset_u += (stride / 2) - 1; + chan->start_offset_v += (stride / 2) - 1; + } + break; + } +} + +static void release_buffer(struct tegra_vi_channel *chan, + struct tegra_channel_buffer *buf, + enum vb2_buffer_state state) +{ + struct vb2_v4l2_buffer *vb = &buf->buf; + + vb->sequence = chan->sequence++; + vb->field = V4L2_FIELD_NONE; + vb->vb2_buf.timestamp = ktime_get_ns(); + vb2_buffer_done(&vb->vb2_buf, state); +} + +static void tegra20_channel_vi_buffer_setup(struct tegra_vi_channel *chan, + struct tegra_channel_buffer *buf) +{ + dma_addr_t base = buf->addr; + + switch (chan->fmtinfo->fourcc) { + case V4L2_PIX_FMT_YUV420: + case V4L2_PIX_FMT_YVU420: + tegra20_vi_write(chan, TEGRA_VI_VB0_BASE_ADDRESS_U, base + chan->addr_offset_u); + tegra20_vi_write(chan, TEGRA_VI_VB0_START_ADDRESS_U, base + chan->start_offset_u); + tegra20_vi_write(chan, TEGRA_VI_VB0_BASE_ADDRESS_V, base + chan->addr_offset_v); + tegra20_vi_write(chan, TEGRA_VI_VB0_START_ADDRESS_V, base + chan->start_offset_v); + fallthrough; + + case V4L2_PIX_FMT_UYVY: + case V4L2_PIX_FMT_VYUY: + case V4L2_PIX_FMT_YUYV: + case V4L2_PIX_FMT_YVYU: + tegra20_vi_write(chan, TEGRA_VI_VB0_BASE_ADDRESS_FIRST, base); + tegra20_vi_write(chan, TEGRA_VI_VB0_START_ADDRESS_FIRST, base + chan->start_offset); + break; + } +} + +static int tegra20_channel_capture_frame(struct tegra_vi_channel *chan, + struct tegra_channel_buffer *buf) +{ + int err; + + chan->next_out_sp_idx++; + + tegra20_channel_vi_buffer_setup(chan, buf); + + tegra20_vi_write(chan, TEGRA_VI_CAMERA_CONTROL, VI_CAMERA_CONTROL_VIP_ENABLE); + + /* Wait for syncpt counter to reach frame start event threshold */ + err = host1x_syncpt_wait(chan->mw_ack_sp[0], chan->next_out_sp_idx, + TEGRA_VI_SYNCPT_WAIT_TIMEOUT, NULL); + if (err) { + host1x_syncpt_incr(chan->mw_ack_sp[0]); + dev_err_ratelimited(&chan->video.dev, "frame start syncpt timeout: %d\n", err); + release_buffer(chan, buf, VB2_BUF_STATE_ERROR); + return err; + } + + tegra20_vi_write(chan, TEGRA_VI_CAMERA_CONTROL, + VI_CAMERA_CONTROL_STOP_CAPTURE | VI_CAMERA_CONTROL_VIP_ENABLE); + + release_buffer(chan, buf, VB2_BUF_STATE_DONE); + + return 0; +} + +static int tegra20_chan_capture_kthread_start(void *data) +{ + struct tegra_vi_channel *chan = data; + struct tegra_channel_buffer *buf; + unsigned int retries = 0; + int err = 0; + + while (1) { + /* + * Source is not streaming if error is non-zero. + * So, do not dequeue buffers on error and let the thread sleep + * till kthread stop signal is received. + */ + wait_event_interruptible(chan->start_wait, + kthread_should_stop() || + (!list_empty(&chan->capture) && !err)); + + if (kthread_should_stop()) + break; + + /* dequeue the buffer and start capture */ + spin_lock(&chan->start_lock); + if (list_empty(&chan->capture)) { + spin_unlock(&chan->start_lock); + continue; + } + + buf = list_first_entry(&chan->capture, struct tegra_channel_buffer, queue); + list_del_init(&buf->queue); + spin_unlock(&chan->start_lock); + + err = tegra20_channel_capture_frame(chan, buf); + if (!err) { + retries = 0; + continue; + } + + if (retries++ > chan->syncpt_timeout_retry) + vb2_queue_error(&chan->queue); + else + err = 0; + } + + return 0; +} + +static void tegra20_camera_capture_setup(struct tegra_vi_channel *chan) +{ + u32 output_fourcc = chan->format.pixelformat; + int width = chan->format.width; + int height = chan->format.height; + int stride_l = chan->format.bytesperline; + int stride_c = (output_fourcc == V4L2_PIX_FMT_YUV420 || + output_fourcc == V4L2_PIX_FMT_YVU420) ? 1 : 0; + int main_output_format; + int yuv_output_format; + + tegra20_vi_get_output_formats(chan, &main_output_format, &yuv_output_format); + + /* + * Set up low pass filter. Use 0x240 for chromaticity and 0x240 + * for luminance, which is the default and means not to touch + * anything. + */ + tegra20_vi_write(chan, TEGRA_VI_H_LPF_CONTROL, + 0x0240 << VI_H_LPF_CONTROL_LUMA_SFT | + 0x0240 << VI_H_LPF_CONTROL_CHROMA_SFT); + + /* Set up raise-on-edge, so we get an interrupt on end of frame. */ + tegra20_vi_write(chan, TEGRA_VI_VI_RAISE, VI_VI_RAISE_ON_EDGE); + + tegra20_vi_write(chan, TEGRA_VI_VI_FIRST_OUTPUT_CONTROL, + (chan->vflip ? VI_OUTPUT_V_DIRECTION : 0) | + (chan->hflip ? VI_OUTPUT_H_DIRECTION : 0) | + yuv_output_format << VI_OUTPUT_YUV_OUTPUT_FORMAT_SFT | + main_output_format << VI_OUTPUT_OUTPUT_FORMAT_SFT); + + /* Set up frame size */ + tegra20_vi_write(chan, TEGRA_VI_FIRST_OUTPUT_FRAME_SIZE, + height << VI_FIRST_OUTPUT_FRAME_HEIGHT_SFT | + width << VI_FIRST_OUTPUT_FRAME_WIDTH_SFT); + + /* First output memory enabled */ + tegra20_vi_write(chan, TEGRA_VI_VI_ENABLE, 0); + + /* Set the number of frames in the buffer */ + tegra20_vi_write(chan, TEGRA_VI_VB0_COUNT_FIRST, 1); + + /* Set up buffer frame size */ + tegra20_vi_write(chan, TEGRA_VI_VB0_SIZE_FIRST, + height << VI_VB0_SIZE_FIRST_V_SFT | + width << VI_VB0_SIZE_FIRST_H_SFT); + + tegra20_vi_write(chan, TEGRA_VI_VB0_BUFFER_STRIDE_FIRST, + stride_l << VI_VB0_BUFFER_STRIDE_FIRST_LUMA_SFT | + stride_c << VI_VB0_BUFFER_STRIDE_FIRST_CHROMA_SFT); + + tegra20_vi_write(chan, TEGRA_VI_VI_ENABLE, 0); +} + +static int tegra20_vi_start_streaming(struct vb2_queue *vq, u32 count) +{ + struct tegra_vi_channel *chan = vb2_get_drv_priv(vq); + struct media_pipeline *pipe = &chan->video.pipe; + int err; + + chan->next_out_sp_idx = host1x_syncpt_read(chan->mw_ack_sp[0]); + + err = video_device_pipeline_start(&chan->video, pipe); + if (err) + goto error_pipeline_start; + + tegra20_camera_capture_setup(chan); + + err = tegra_channel_set_stream(chan, true); + if (err) + goto error_set_stream; + + chan->sequence = 0; + + chan->kthread_start_capture = kthread_run(tegra20_chan_capture_kthread_start, + chan, "%s:0", chan->video.name); + if (IS_ERR(chan->kthread_start_capture)) { + err = PTR_ERR(chan->kthread_start_capture); + chan->kthread_start_capture = NULL; + dev_err_probe(&chan->video.dev, err, "failed to run capture kthread\n"); + goto error_kthread_start; + } + + return 0; + +error_kthread_start: + tegra_channel_set_stream(chan, false); +error_set_stream: + video_device_pipeline_stop(&chan->video); +error_pipeline_start: + tegra_channel_release_buffers(chan, VB2_BUF_STATE_QUEUED); + + return err; +} + +static void tegra20_vi_stop_streaming(struct vb2_queue *vq) +{ + struct tegra_vi_channel *chan = vb2_get_drv_priv(vq); + + if (chan->kthread_start_capture) { + kthread_stop(chan->kthread_start_capture); + chan->kthread_start_capture = NULL; + } + + tegra_channel_release_buffers(chan, VB2_BUF_STATE_ERROR); + tegra_channel_set_stream(chan, false); + video_device_pipeline_stop(&chan->video); +} + +static const struct tegra_vi_ops tegra20_vi_ops = { + .vi_enable = tegra20_vi_enable, + .channel_host1x_syncpt_init = tegra20_channel_host1x_syncpt_init, + .channel_host1x_syncpt_free = tegra20_channel_host1x_syncpt_free, + .vi_fmt_align = tegra20_fmt_align, + .channel_queue_setup = tegra20_channel_queue_setup, + .vi_start_streaming = tegra20_vi_start_streaming, + .vi_stop_streaming = tegra20_vi_stop_streaming, +}; + +#define TEGRA20_VIDEO_FMT(MBUS_CODE, BPP, FOURCC) \ +{ \ + .code = MEDIA_BUS_FMT_##MBUS_CODE, \ + .bpp = BPP, \ + .fourcc = V4L2_PIX_FMT_##FOURCC, \ +} + +static const struct tegra_video_format tegra20_video_formats[] = { + TEGRA20_VIDEO_FMT(UYVY8_2X8, 2, UYVY), + TEGRA20_VIDEO_FMT(VYUY8_2X8, 2, VYUY), + TEGRA20_VIDEO_FMT(YUYV8_2X8, 2, YUYV), + TEGRA20_VIDEO_FMT(YVYU8_2X8, 2, YVYU), + TEGRA20_VIDEO_FMT(UYVY8_2X8, 1, YUV420), + TEGRA20_VIDEO_FMT(UYVY8_2X8, 1, YVU420), +}; + +const struct tegra_vi_soc tegra20_vi_soc = { + .video_formats = tegra20_video_formats, + .nformats = ARRAY_SIZE(tegra20_video_formats), + .default_video_format = &tegra20_video_formats[0], + .ops = &tegra20_vi_ops, + .vi_max_channels = 1, /* parallel input (VIP) */ + .vi_max_clk_hz = 150000000, + .has_h_v_flip = true, +}; + +/* -------------------------------------------------------------------------- + * VIP + */ + +/* + * VIP-specific configuration for stream start. + * + * Whatever is common among VIP and CSI is done by the VI component (see + * tegra20_vi_start_streaming()). Here we do what is VIP-specific. + */ +static int tegra20_vip_start_streaming(struct tegra_vip_channel *vip_chan) +{ + struct tegra_vi_channel *vi_chan = v4l2_get_subdev_hostdata(&vip_chan->subdev); + int width = vi_chan->format.width; + int height = vi_chan->format.height; + + unsigned int main_input_format; + unsigned int yuv_input_format; + + tegra20_vi_get_input_formats(vi_chan, &main_input_format, &yuv_input_format); + + tegra20_vi_write(vi_chan, TEGRA_VI_VI_CORE_CONTROL, 0); + + tegra20_vi_write(vi_chan, TEGRA_VI_VI_INPUT_CONTROL, + VI_INPUT_VIP_INPUT_ENABLE | main_input_format | yuv_input_format); + + tegra20_vi_write(vi_chan, TEGRA_VI_V_DOWNSCALE_CONTROL, 0); + tegra20_vi_write(vi_chan, TEGRA_VI_H_DOWNSCALE_CONTROL, 0); + + tegra20_vi_write(vi_chan, TEGRA_VI_VIP_V_ACTIVE, height << VI_VIP_V_ACTIVE_PERIOD_SFT); + tegra20_vi_write(vi_chan, TEGRA_VI_VIP_H_ACTIVE, + roundup(width, 2) << VI_VIP_H_ACTIVE_PERIOD_SFT); + + /* + * For VIP, D9..D2 is mapped to the video decoder's P7..P0. + * Disable/mask out the other Dn wires. When not in BT656 + * mode we also need the V/H sync. + */ + tegra20_vi_write(vi_chan, TEGRA_VI_PIN_INPUT_ENABLE, + GENMASK(9, 2) << VI_PIN_INPUT_VD_SFT | + VI_PIN_INPUT_HSYNC | VI_PIN_INPUT_VSYNC); + tegra20_vi_write(vi_chan, TEGRA_VI_VI_DATA_INPUT_CONTROL, + GENMASK(9, 2) << VI_DATA_INPUT_SFT); + tegra20_vi_write(vi_chan, TEGRA_VI_PIN_INVERSION, 0); + + tegra20_vi_write(vi_chan, TEGRA_VI_CONT_SYNCPT_OUT_1, + VI_CONT_SYNCPT_OUT_1_CONTINUOUS_SYNCPT | + host1x_syncpt_id(vi_chan->mw_ack_sp[0]) + << VI_CONT_SYNCPT_OUT_1_SYNCPT_IDX_SFT); + + tegra20_vi_write(vi_chan, TEGRA_VI_CAMERA_CONTROL, VI_CAMERA_CONTROL_STOP_CAPTURE); + + return 0; +} + +static const struct tegra_vip_ops tegra20_vip_ops = { + .vip_start_streaming = tegra20_vip_start_streaming, +}; + +const struct tegra_vip_soc tegra20_vip_soc = { + .ops = &tegra20_vip_ops, +}; diff --git a/drivers/staging/media/tegra-video/vi.c b/drivers/staging/media/tegra-video/vi.c index 39e9df895ede..08cd1c7a6576 100644 --- a/drivers/staging/media/tegra-video/vi.c +++ b/drivers/staging/media/tegra-video/vi.c @@ -1959,6 +1959,9 @@ static int tegra_vi_remove(struct platform_device *pdev) } static const struct of_device_id tegra_vi_of_id_table[] = { +#if defined(CONFIG_ARCH_TEGRA_2x_SOC) + { .compatible = "nvidia,tegra20-vi", .data = &tegra20_vi_soc }, +#endif #if defined(CONFIG_ARCH_TEGRA_210_SOC) { .compatible = "nvidia,tegra210-vi", .data = &tegra210_vi_soc }, #endif diff --git a/drivers/staging/media/tegra-video/vi.h b/drivers/staging/media/tegra-video/vi.h index 778c0ec475ab..1e6a5caa7082 100644 --- a/drivers/staging/media/tegra-video/vi.h +++ b/drivers/staging/media/tegra-video/vi.h @@ -296,6 +296,9 @@ struct tegra_video_format { u32 fourcc; }; +#if defined(CONFIG_ARCH_TEGRA_2x_SOC) +extern const struct tegra_vi_soc tegra20_vi_soc; +#endif #if defined(CONFIG_ARCH_TEGRA_210_SOC) extern const struct tegra_vi_soc tegra210_vi_soc; #endif diff --git a/drivers/staging/media/tegra-video/video.c b/drivers/staging/media/tegra-video/video.c index d966b319553f..074ad0dc56ca 100644 --- a/drivers/staging/media/tegra-video/video.c +++ b/drivers/staging/media/tegra-video/video.c @@ -123,6 +123,10 @@ static int host1x_video_remove(struct host1x_device *dev) } static const struct of_device_id host1x_video_subdevs[] = { +#if defined(CONFIG_ARCH_TEGRA_2x_SOC) + { .compatible = "nvidia,tegra20-vip", }, + { .compatible = "nvidia,tegra20-vi", }, +#endif #if defined(CONFIG_ARCH_TEGRA_210_SOC) { .compatible = "nvidia,tegra210-csi", }, { .compatible = "nvidia,tegra210-vi", }, @@ -141,6 +145,7 @@ static struct host1x_driver host1x_video_driver = { static struct platform_driver * const drivers[] = { &tegra_csi_driver, + &tegra_vip_driver, &tegra_vi_driver, }; diff --git a/drivers/staging/media/tegra-video/video.h b/drivers/staging/media/tegra-video/video.h index 1e9be1474a9c..7275affa6558 100644 --- a/drivers/staging/media/tegra-video/video.h +++ b/drivers/staging/media/tegra-video/video.h @@ -24,5 +24,6 @@ int tegra_v4l2_nodes_setup_tpg(struct tegra_video_device *vid); void tegra_v4l2_nodes_cleanup_tpg(struct tegra_video_device *vid); extern struct platform_driver tegra_vi_driver; +extern struct platform_driver tegra_vip_driver; extern struct platform_driver tegra_csi_driver; #endif diff --git a/drivers/staging/media/tegra-video/vip.c b/drivers/staging/media/tegra-video/vip.c new file mode 100644 index 000000000000..6e71d56bc7e3 --- /dev/null +++ b/drivers/staging/media/tegra-video/vip.c @@ -0,0 +1,290 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Parallel video capture module (VIP) for the Tegra VI. + * + * This file implements the VIP-specific infrastructure. + * + * Copyright (C) 2023 SKIDATA GmbH + * Author: Luca Ceresoli + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#include "vip.h" + +static inline struct tegra_vip *host1x_client_to_vip(struct host1x_client *client) +{ + return container_of(client, struct tegra_vip, client); +} + +static inline struct tegra_vip_channel *subdev_to_vip_channel(struct v4l2_subdev *subdev) +{ + return container_of(subdev, struct tegra_vip_channel, subdev); +} + +static inline struct tegra_vip *vip_channel_to_vip(struct tegra_vip_channel *chan) +{ + return container_of(chan, struct tegra_vip, chan); +} + +/* Find the previous subdev in the pipeline (i.e. the one connected to our sink pad) */ +static struct v4l2_subdev *tegra_vip_channel_get_prev_subdev(struct tegra_vip_channel *chan) +{ + struct media_pad *remote_pad; + + remote_pad = media_pad_remote_pad_first(&chan->pads[TEGRA_VIP_PAD_SINK]); + if (!remote_pad) + return NULL; + + return media_entity_to_v4l2_subdev(remote_pad->entity); +} + +static int tegra_vip_enable_stream(struct v4l2_subdev *subdev) +{ + struct tegra_vip_channel *vip_chan = subdev_to_vip_channel(subdev); + struct tegra_vip *vip = vip_channel_to_vip(vip_chan); + struct v4l2_subdev *prev_subdev = tegra_vip_channel_get_prev_subdev(vip_chan); + int err; + + err = pm_runtime_resume_and_get(vip->dev); + if (err) + return dev_err_probe(vip->dev, err, "failed to get runtime PM\n"); + + err = vip->soc->ops->vip_start_streaming(vip_chan); + if (err < 0) + goto err_start_streaming; + + err = v4l2_subdev_call(prev_subdev, video, s_stream, true); + if (err < 0 && err != -ENOIOCTLCMD) + goto err_prev_subdev_start_stream; + + return 0; + +err_prev_subdev_start_stream: +err_start_streaming: + pm_runtime_put(vip->dev); + return err; +} + +static int tegra_vip_disable_stream(struct v4l2_subdev *subdev) +{ + struct tegra_vip_channel *vip_chan = subdev_to_vip_channel(subdev); + struct tegra_vip *vip = vip_channel_to_vip(vip_chan); + struct v4l2_subdev *prev_subdev = tegra_vip_channel_get_prev_subdev(vip_chan); + + v4l2_subdev_call(prev_subdev, video, s_stream, false); + + pm_runtime_put(vip->dev); + + return 0; +} + +static int tegra_vip_s_stream(struct v4l2_subdev *subdev, int enable) +{ + int err; + + if (enable) + err = tegra_vip_enable_stream(subdev); + else + err = tegra_vip_disable_stream(subdev); + + return err; +} + +static const struct v4l2_subdev_video_ops tegra_vip_video_ops = { + .s_stream = tegra_vip_s_stream, +}; + +static const struct v4l2_subdev_ops tegra_vip_ops = { + .video = &tegra_vip_video_ops, +}; + +static int tegra_vip_channel_of_parse(struct tegra_vip *vip) +{ + struct device *dev = vip->dev; + struct device_node *np = dev->of_node; + struct v4l2_fwnode_endpoint v4l2_ep = { + .bus_type = V4L2_MBUS_PARALLEL + }; + struct fwnode_handle *fwh; + struct device_node *ep; + unsigned int num_pads; + int err; + + dev_dbg(dev, "Parsing %pOF", np); + + ep = of_graph_get_endpoint_by_regs(np, 0, 0); + if (!ep) { + err = -EINVAL; + dev_err_probe(dev, err, "%pOF: error getting endpoint node\n", np); + goto err_node_put; + } + + fwh = of_fwnode_handle(ep); + err = v4l2_fwnode_endpoint_parse(fwh, &v4l2_ep); + of_node_put(ep); + if (err) { + dev_err_probe(dev, err, "%pOF: failed to parse v4l2 endpoint\n", np); + goto err_node_put; + } + + num_pads = of_graph_get_endpoint_count(np); + if (num_pads != TEGRA_VIP_PADS_NUM) { + err = -EINVAL; + dev_err_probe(dev, err, "%pOF: need 2 pads, got %d\n", np, num_pads); + goto err_node_put; + } + + vip->chan.of_node = of_node_get(np); + vip->chan.pads[TEGRA_VIP_PAD_SINK].flags = MEDIA_PAD_FL_SINK; + vip->chan.pads[TEGRA_VIP_PAD_SOURCE].flags = MEDIA_PAD_FL_SOURCE; + + return 0; + +err_node_put: + of_node_put(np); + return err; +} + +static int tegra_vip_channel_init(struct tegra_vip *vip) +{ + struct v4l2_subdev *subdev; + int err; + + subdev = &vip->chan.subdev; + v4l2_subdev_init(subdev, &tegra_vip_ops); + subdev->dev = vip->dev; + snprintf(subdev->name, V4L2_SUBDEV_NAME_SIZE, "%s", + kbasename(vip->chan.of_node->full_name)); + + v4l2_set_subdevdata(subdev, &vip->chan); + subdev->fwnode = of_fwnode_handle(vip->chan.of_node); + subdev->entity.function = MEDIA_ENT_F_VID_IF_BRIDGE; + + err = media_entity_pads_init(&subdev->entity, TEGRA_VIP_PADS_NUM, vip->chan.pads); + if (err) + return dev_err_probe(vip->dev, err, "failed to initialize media entity\n"); + + err = v4l2_async_register_subdev(subdev); + if (err) { + dev_err_probe(vip->dev, err, "failed to register subdev\n"); + goto err_register_subdev; + } + + return 0; + +err_register_subdev: + media_entity_cleanup(&subdev->entity); + return err; +} + +static int tegra_vip_init(struct host1x_client *client) +{ + struct tegra_vip *vip = host1x_client_to_vip(client); + int err; + + err = tegra_vip_channel_of_parse(vip); + if (err) + return err; + + err = tegra_vip_channel_init(vip); + if (err) + goto err_init; + + return 0; + +err_init: + of_node_put(vip->chan.of_node); + return err; +} + +static int tegra_vip_exit(struct host1x_client *client) +{ + struct tegra_vip *vip = host1x_client_to_vip(client); + struct v4l2_subdev *subdev = &vip->chan.subdev; + + v4l2_async_unregister_subdev(subdev); + media_entity_cleanup(&subdev->entity); + of_node_put(vip->chan.of_node); + + return 0; +} + +static const struct host1x_client_ops vip_client_ops = { + .init = tegra_vip_init, + .exit = tegra_vip_exit, +}; + +static int tegra_vip_probe(struct platform_device *pdev) +{ + struct tegra_vip *vip; + int err; + + dev_dbg(&pdev->dev, "Probing VIP \"%s\" from %pOF\n", pdev->name, pdev->dev.of_node); + + vip = devm_kzalloc(&pdev->dev, sizeof(*vip), GFP_KERNEL); + if (!vip) + return -ENOMEM; + + vip->soc = of_device_get_match_data(&pdev->dev); + + vip->dev = &pdev->dev; + platform_set_drvdata(pdev, vip); + + /* initialize host1x interface */ + INIT_LIST_HEAD(&vip->client.list); + vip->client.ops = &vip_client_ops; + vip->client.dev = &pdev->dev; + + err = host1x_client_register(&vip->client); + if (err) + return dev_err_probe(&pdev->dev, err, "failed to register host1x client\n"); + + pm_runtime_enable(&pdev->dev); + + return 0; +} + +static int tegra_vip_remove(struct platform_device *pdev) +{ + struct tegra_vip *vip = platform_get_drvdata(pdev); + int err; + + err = host1x_client_unregister(&vip->client); + if (err) + return dev_err_probe(&pdev->dev, err, "failed to unregister host1x client\n"); + + pm_runtime_disable(&pdev->dev); + + return 0; +} + +#if defined(CONFIG_ARCH_TEGRA_2x_SOC) +extern const struct tegra_vip_soc tegra20_vip_soc; +#endif + +static const struct of_device_id tegra_vip_of_id_table[] = { +#if defined(CONFIG_ARCH_TEGRA_2x_SOC) + { .compatible = "nvidia,tegra20-vip", .data = &tegra20_vip_soc }, +#endif + { } +}; +MODULE_DEVICE_TABLE(of, tegra_vip_of_id_table); + +struct platform_driver tegra_vip_driver = { + .driver = { + .name = "tegra-vip", + .of_match_table = tegra_vip_of_id_table, + }, + .probe = tegra_vip_probe, + .remove = tegra_vip_remove, +}; diff --git a/drivers/staging/media/tegra-video/vip.h b/drivers/staging/media/tegra-video/vip.h new file mode 100644 index 000000000000..32ceaaccbba2 --- /dev/null +++ b/drivers/staging/media/tegra-video/vip.h @@ -0,0 +1,68 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (C) 2023 SKIDATA GmbH + * Author: Luca Ceresoli + */ + +#ifndef __TEGRA_VIP_H__ +#define __TEGRA_VIP_H__ + +#include +#include +#include + +enum { + TEGRA_VIP_PAD_SINK, + TEGRA_VIP_PAD_SOURCE, + TEGRA_VIP_PADS_NUM, +}; + +struct tegra_vip; + +/** + * struct tegra_vip_channel - Tegra VIP (parallel video capture) channel + * + * @subdev: V4L2 subdevice associated with this channel + * @pads: media pads for the subdevice entity + * @of_node: vip device tree node + */ +struct tegra_vip_channel { + struct v4l2_subdev subdev; + struct media_pad pads[TEGRA_VIP_PADS_NUM]; + struct device_node *of_node; +}; + +/** + * struct tegra_vip_ops - Tegra VIP operations + * + * @vip_start_streaming: programs vip hardware to enable streaming. + */ +struct tegra_vip_ops { + int (*vip_start_streaming)(struct tegra_vip_channel *vip_chan); +}; + +/** + * struct tegra_vip_soc - NVIDIA Tegra VIP SoC structure + * + * @ops: vip hardware operations + */ +struct tegra_vip_soc { + const struct tegra_vip_ops *ops; +}; + +/** + * struct tegra_vip - NVIDIA Tegra VIP device structure + * + * @dev: device struct + * @client: host1x_client struct + * @soc: pointer to SoC data structure + * @chan: the VIP channel + */ +struct tegra_vip { + struct device *dev; + struct host1x_client client; + const struct tegra_vip_soc *soc; + struct tegra_vip_channel chan; +}; + +#endif