From patchwork Fri May 31 06:38:46 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 165509 Delivered-To: patch@linaro.org Received: by 2002:a92:9e1a:0:0:0:0:0 with SMTP id q26csp318234ili; Thu, 30 May 2019 23:39:21 -0700 (PDT) X-Google-Smtp-Source: APXvYqzfcUKDXLsW3oUuGlZ/dpFTUoN4Fj9DszDufQqJuOzPGRRBlmpdgxsmNRiwotPrymEsGGOu X-Received: by 2002:a17:902:7897:: with SMTP id q23mr7361968pll.21.1559284761378; Thu, 30 May 2019 23:39:21 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1559284761; cv=none; d=google.com; s=arc-20160816; b=rFbQJzIudfnc4ZNS4C/1VYBMZjoREQ9XTyWsJn6TF5WIvMAEvtp+hxxFBqJbCorTYa p5clulPNxtZHJoCJr0Gx9Wu7F9EsYxJnFEACAXdJV2Xky2JEvUOIVSTV/lEWEg4IdWw4 dqq6JJkz3FUJFoiHglh8+DfyokwZXoQqM6Uky3f6SYJfzI9lhGpyL8+f8pEwpq6LRDuV P12FvJBwpoudRRF2HNCwM4Jd/0e2fCrOWOBJMh/h05lTExVzCMvoqp6u9S4cbb7fFnLr 8dBcogyYqyF3lQEcGZOC1pWKfWrp0DWBrAGq7U+eHRtK8LfYjcPBntFSirZ8L5+OIA2M 0jDg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=WKqEBPsoDpTtAdSfNyFLIMHr8olM8ej+c9mYA02GcCA=; b=bnjPadNwXHQIj7XKHVPEMc6wNgzvRw45yXGry4yra7dkR4X8g4CLCcPRBAjdMZFNbt 91bLFux2IkPTS4Nmft6rDyL9sT72x2dTnqfmODpcalCcEaQEq6X0aqgk41rgyhmtR8hY AeA0IZrar7fdf0wVIjMdjOjbWK1kCZBGW77UHQXtcChjP2vBwc7QSP10J9SI+HyafAxD k0Fxu9d3RBQBWWh4SbJ3oOoh2qn0Jbkky0gJ+naNmWJrJsBbDbr51PnxVOpWCiFFa5fb UkbyQGloM9jd/GGhxRx1lZ7Avq7xn5F00kaYTSXQNm0VhFdMK2rtt2KEJQy6+uP2f8Bo 0QVA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=zlKiD5zR; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id d3si5063961pln.272.2019.05.30.23.39.21; Thu, 30 May 2019 23:39:21 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=zlKiD5zR; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726842AbfEaGjU (ORCPT + 30 others); Fri, 31 May 2019 02:39:20 -0400 Received: from mail-pl1-f172.google.com ([209.85.214.172]:41709 "EHLO mail-pl1-f172.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726330AbfEaGjT (ORCPT ); Fri, 31 May 2019 02:39:19 -0400 Received: by mail-pl1-f172.google.com with SMTP id s24so3458136plr.8 for ; Thu, 30 May 2019 23:39:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=WKqEBPsoDpTtAdSfNyFLIMHr8olM8ej+c9mYA02GcCA=; b=zlKiD5zROteFBR1T1SqUplBS5mT+9ZfmxIbdv8FynG+rE9TAyGHJYPAhBo4UZYTtFD dbHJ2iZep4dUQCtwooz+CSqtZPoOGbP2XIcJfe4gq+uyTlqNkgVr5GmDwwYbPVMVeZ1R /6YrHHEoBXiuNzIRzLLJaqfW6t/oGsCjtw/WcQ2wzWTPAqwPCIgaeTziF1i5YLfGbsiH KPJNd0qiVvgDkjt522zTCVIF4yx0leSd/rLo7knaKV0DwbLv3AsTteQ+HsB3SIN47LG7 CI8UPhFrkAqkQnnXSHkfAboWQGGJzFbCAYR4+dtikbvFBL7EfSHCgxT4U0dnqz+X3kuU 85xA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=WKqEBPsoDpTtAdSfNyFLIMHr8olM8ej+c9mYA02GcCA=; b=QibU3o5OobfXJvmG/TVDgYqFrp1Ef3CIXuGdlDESeeFih3ZvRWcix/AeKxFjX9dNd7 gQs5APGFRusTtTmq5ULHW5d35YhOSsv8d/rfsuA6bLetRNq6LHDVr2WXmT/Z8lRPh4VO GKzRgImpGaJ2Oda9cxDcUnoUfPWlYHuW3TbFPedTe7l1Xx094AU8eZRmP7w8wvKthBTw MtSaEBQP9jgJxXxjBTuXbMU0YgsMykAEmDB5iuE6YeIDV+IV/+oimu0a/nC1VYEtVDI9 AB8OTFeb1zW5sw4p3nRrsJc56d9JRCsexdwQBhocNVuCgQhDkk+OGTUy9rOvOyPK7qrk +EqQ== X-Gm-Message-State: APjAAAUpViDOMdH4n87RhiinADmz9ub+DE5PlxysPbz1Ty3+Haf7uTXA 4LrL1I1f1fXZZ3gfY1PGapTe X-Received: by 2002:a17:902:1121:: with SMTP id d30mr7268009pla.153.1559284758857; Thu, 30 May 2019 23:39:18 -0700 (PDT) Received: from localhost.localdomain ([2405:204:72cb:ebf2:a51d:3877:feab:5634]) by smtp.gmail.com with ESMTPSA id y12sm4644158pgp.63.2019.05.30.23.39.13 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 30 May 2019 23:39:18 -0700 (PDT) From: Manivannan Sadhasivam To: mcoquelin.stm32@gmail.com, alexandre.torgue@st.com, robh+dt@kernel.org Cc: linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, loic.pallardy@st.com, Manivannan Sadhasivam Subject: [PATCH v3 1/4] ARM: dts: stm32mp157: Add missing pinctrl definitions Date: Fri, 31 May 2019 12:08:46 +0530 Message-Id: <20190531063849.26142-2-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190531063849.26142-1-manivannan.sadhasivam@linaro.org> References: <20190531063849.26142-1-manivannan.sadhasivam@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add missing pinctrl definitions for STM32MP157 MPU. Signed-off-by: Manivannan Sadhasivam --- arch/arm/boot/dts/stm32mp157-pinctrl.dtsi | 75 +++++++++++++++++++++++ 1 file changed, 75 insertions(+) -- 2.17.1 diff --git a/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi b/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi index 85c417d9983b..5efae4b4b37f 100644 --- a/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi +++ b/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi @@ -241,6 +241,23 @@ }; }; + i2c1_pins_b: i2c1-2 { + pins { + pinmux = , /* I2C1_SCL */ + ; /* I2C1_SDA */ + bias-disable; + drive-open-drain; + slew-rate = <0>; + }; + }; + + i2c1_pins_sleep_b: i2c1-3 { + pins { + pinmux = , /* I2C1_SCL */ + ; /* I2C1_SDA */ + }; + }; + i2c2_pins_a: i2c2-0 { pins { pinmux = , /* I2C2_SCL */ @@ -258,6 +275,21 @@ }; }; + i2c2_pins_b1: i2c2-2 { + pins { + pinmux = ; /* I2C2_SDA */ + bias-disable; + drive-open-drain; + slew-rate = <0>; + }; + }; + + i2c2_pins_sleep_b1: i2c2-3 { + pins { + pinmux = ; /* I2C2_SDA */ + }; + }; + i2c5_pins_a: i2c5-0 { pins { pinmux = , /* I2C5_SCL */ @@ -599,6 +631,34 @@ bias-disable; }; }; + + uart4_pins_b: uart4-1 { + pins1 { + pinmux = ; /* UART4_TX */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + pins2 { + pinmux = ; /* UART4_RX */ + bias-disable; + }; + }; + + uart7_pins_a: uart7-0 { + pins1 { + pinmux = ; /* UART4_TX */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + pins2 { + pinmux = , /* UART4_RX */ + , /* UART4_CTS */ + ; /* UART4_RTS */ + bias-disable; + }; + }; }; pinctrl_z: pin-controller-z@54004000 { @@ -623,6 +683,21 @@ gpio-ranges = <&pinctrl_z 0 400 8>; }; + i2c2_pins_b2: i2c2-0 { + pins { + pinmux = ; /* I2C2_SCL */ + bias-disable; + drive-open-drain; + slew-rate = <0>; + }; + }; + + i2c2_pins_sleep_b2: i2c2-1 { + pins { + pinmux = ; /* I2C2_SCL */ + }; + }; + i2c4_pins_a: i2c4-0 { pins { pinmux = , /* I2C4_SCL */ From patchwork Fri May 31 06:38:47 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 165510 Delivered-To: patch@linaro.org Received: by 2002:a92:9e1a:0:0:0:0:0 with SMTP id q26csp318325ili; Thu, 30 May 2019 23:39:26 -0700 (PDT) X-Google-Smtp-Source: APXvYqzFaqyJBD94aS04TDgs2iiEJ+zzESyOzuJqIgTbWHog69w8nIjP9bmmMqX5WmmpbC7e71Sr X-Received: by 2002:a17:902:28c9:: with SMTP id f67mr7515086plb.19.1559284766792; Thu, 30 May 2019 23:39:26 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1559284766; cv=none; d=google.com; s=arc-20160816; b=ZbRbnEU1rtMx1K4ZOYl99xWlxPVvOOVXbGrib30Kg4x/52S+dZFXUeH4HP4UYAnx1P Btz53UgUgkvdarmKZG0k+DFMBIIu8X6YhegaXv6I8vlkANazCW/AWWsJ2AxiZKGFfApS zTYC4H+/LDq2tI1FiVURBiYK5tIcr5Eb9b9taRJUYpsJuiExYBPWqqGoFYZdoB5gpcpt ZkMgatHUaMshqSUeonoPFH+ukRfJWOZ1+X2GjZWu2Iov9kOMC1gh6UrY5YLspXZwB/p1 dH34u+Jg8PezR0rDK0i0ORPlP0PoMsNo+9F0TfHkpyVAVQAe9wpNeXV5C+jhf95+OKBl wojA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=8Zaxe7WowXS+tN6OY6tghQ3pLhHizFEDpbSLAZpdnRg=; b=xcp39C+UCmn/H+DDjpS4RFcXNRDAtSvP9ldu0HgdwXnOm5kA81EPcmzQjga3eT9mrM es3Kzi2aaREhi5a4z4jPmAsytChV2s5xdouDyTL93mfyRo/292hhDBk2MXLwdrNVBCqn wwewxNNi7rbaMW4KPnUkvuZf480EuBWvvHPYa9m5No/q02WgLwec8/Nutg/idX3RDL31 XtOPDW8j3nnZfEjK0xYcgKtw/REoTLhVsrS+ZDShrF+SLRQJsGka1p7GW57NQFcN43nW cEK4HccI2e46RvXs0rabajLN/CT03KNSVVeocnfgDhW0oICr4APlzsEkhL556j5YZ3Hz 7gAg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=N4TnIUkx; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Signed-off-by: Manivannan Sadhasivam --- .../devicetree/bindings/arm/stm32/stm32.yaml | 29 +++++++++++++++++++ 1 file changed, 29 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/stm32/stm32.yaml -- 2.17.1 diff --git a/Documentation/devicetree/bindings/arm/stm32/stm32.yaml b/Documentation/devicetree/bindings/arm/stm32/stm32.yaml new file mode 100644 index 000000000000..f53dc0f2d7b3 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/stm32/stm32.yaml @@ -0,0 +1,29 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/stm32/stm32.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: STMicroelectronics STM32 Platforms Device Tree Bindings + +maintainers: + - Alexandre Torgue + +properties: + compatible: + oneOf: + - items: + - const: st,stm32f429 + + - items: + - const: st,stm32f469 + + - items: + - const: st,stm32f746 + + - items: + - const: st,stm32h743 + + - items: + - const: st,stm32mp157 +...