From patchwork Sat Apr 22 21:24:23 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Seiderer X-Patchwork-Id: 676306 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 466E4C7618E for ; Sat, 22 Apr 2023 21:25:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229834AbjDVVZX (ORCPT ); Sat, 22 Apr 2023 17:25:23 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58116 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229551AbjDVVZW (ORCPT ); Sat, 22 Apr 2023 17:25:22 -0400 Received: from mout.gmx.net (mout.gmx.net [212.227.17.20]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8D58B19BD; Sat, 22 Apr 2023 14:25:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gmx.net; s=s31663417; t=1682198669; i=ps.report@gmx.net; bh=CKleXDjojnUys/EN2562bwv+uQ9gPgoHRl6X6zTBatI=; h=X-UI-Sender-Class:From:To:Cc:Subject:Date; b=Ikt9vyDBnkMF3kOLCA2mBfIh4qNPWurVhq1wy2Y61A9fpfNXeojEc3jEcXFsapCTr c6dOnVyWkbCQ9emiEsbsa9i8af30jeDlC7q9z93ckoOyc2KH98cJqm0d1ItqfDCCmf e6yTejnsc0mn3RIzghcDopivSr4jqQnIh4Dq546KacFPAdPCya9UsIS8kDG1iz8ozv Zt3HnekTT7deFxuFEJfBDKkYntbMAnOQNHz1uH0wr+lex+ejSGX9I7mRGabe5vEEmr WHwf6rIeJKZj/8wg9FHYp3j2So/0nJwAsInqVMY9JLxvkissfPzfD9p0F5OjT0quPS 8IjUkVeKKDpAg== X-UI-Sender-Class: 724b4f7f-cbec-4199-ad4e-598c01a50d3a Received: from localhost.fritz.box ([62.216.209.208]) by mail.gmx.net (mrgmx104 [212.227.17.168]) with ESMTPSA (Nemesis) id 1MQ5rU-1pd341049I-00M0eA; Sat, 22 Apr 2023 23:24:29 +0200 From: Peter Seiderer To: linux-wireless@vger.kernel.org Cc: =?utf-8?q?Toke_H=C3=B8iland-J=C3=B8rgensen?= , Kalle Valo , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Sujith Manoharan , "John W . Linville" , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, Gregg Wonderly , Simon Horman , Peter Seiderer Subject: [PATCH v2] wifi: ath9k: fix AR9003 mac hardware hang check register offset calculation Date: Sat, 22 Apr 2023 23:24:23 +0200 Message-Id: <20230422212423.26065-1-ps.report@gmx.net> X-Mailer: git-send-email 2.40.0 MIME-Version: 1.0 X-Provags-ID: V03:K1:MWRn4Naaur756elw6S7aPNR3FXkqQmr1CmWuvHm3qoLXSoDxiwQ NUr9zv4ex4UpY0z6ePltBP0qqQQXQZ9NJDq4xDuaHqp47hwzSZuvvkp5a8aJhzw6FfT1do8 Gx9/kmyhenxhNaKlxvcRUlACPwa+abOWwG8gPJxyiWDvfZMVct70w9GX5Vrp7FuXXDvKLE/ mS1LHkG4FY5tUhb+eESbw== UI-OutboundReport: notjunk:1;M01:P0:h7xOhIpkgCs=;txeLScRw9U49r2KaX2fX75E6MWC 7d9DRRbUOktExE9V2Y5x3BEpX/gi7EI/OAZfIiN/nihj20OQCUUc3udnWPk0Iq1ryGFt0ObJ7 vYPUkdiarBGni8zfqBHPDzGz+l9tUp8rKvqbq3CLhH/mAQmIYDC7S8wWocYc5dnXcHvuRPHMT eAtB58h5e/I5welvFkhvAZ3GK74e1/BZzOfXzvrojCj0Bp8Ff5jQ37tvEKAONE3QVJHD7zd+Y f7FV83Qo6qxdDvj310Z6ZI4gvLXKNzqYG1Fc39z3zPPr8B96hS5AI+dKuqS5WJ5IkMAKPXR72 XKxzb5zY27eOLzPV/jzvtet6MiOVo/7NE5eYIsnMQDggcrBSMTwGv/Wpms/eTUOlJb9BIhW9F cPmD+lner8vd33WfSLID6w2Nqqlo3sZMrgzlbFTjvmYE8RQHlD22b1GqO1Gf0imqkIgWtyhsp mrIQRwmeSp5r7f0Wea4Gf1z6qDFE1hF8q38FnjFD5wdPJ2LFt4Mi9bGLNKUcQSARnFfqk1KPe /KOQyYqL9AEiEjftOtsQ5j7Zu4Vj4348UogPvAJuOBzMWSJnUNXoPfZ697wSMbSFXzHLjuT1h 1bvwuv922jUTjcpEaiHnbfY7xshhdNo1N+NSPrlxL5ITnY1NpqvvGOCp47PVabqWVdmp/s9lD diHB8/AbqBjhW4lW/GmqYdq74PZWu4+1e1tPll+6UPqJyEKAJJ95TnqnN5HMGrOnYAy+cZuCm lNAUA0cLFkkvKGllVl6/van+o+KyCcgDq3mUV4RnpyHpF5g2U4Nl/ukZS8ruKNyn904tS8Ooe M0IAQBo9s2mOLRwQT5UDZA/FwTVJeIx5JEQhcAxYT89hnbAm9cjIYYFLPOO8y/X/2TuTWVz9c fA+sS4jFK9PjQbSnXMldAxGsOfnCgLgedh6d9BO7NkKa/rh5dCzWO5i2EKERUW5nKW49w5PHo l/2LuZPTS3wjd9BYfHyEiSFAohw= Precedence: bulk List-ID: X-Mailing-List: linux-wireless@vger.kernel.org Fix ath9k_hw_verify_hang()/ar9003_hw_detect_mac_hang() register offset calculation (do not overflow the shift for the second register/queues above five, use the register layout described in the comments above ath9k_hw_verify_hang() instead). Fixes: 222e04830ff0 ("ath9k: Fix MAC HW hang check for AR9003") Reported-by: Gregg Wonderly Link: https://lore.kernel.org/linux-wireless/E3A9C354-0CB7-420C-ADEF-F0177FB722F4@seqtechllc.com/ Signed-off-by: Peter Seiderer Acked-by: Toke Høiland-Jørgensen Reviewed-by: Simon Horman --- Changes v1 -> v2: - fix c&p error in ath9k_hw_verify_hang (i vs. queue), thanks to Simon Horman for review Notes: - tested with MikroTik R11e-5HnD/Atheros AR9300 Rev:4 (lspci: 168c:0033 Qualcomm Atheros AR958x 802.11abgn Wireless Network Adapter (rev 01)) card --- drivers/net/wireless/ath/ath9k/ar9003_hw.c | 27 ++++++++++++++-------- 1 file changed, 18 insertions(+), 9 deletions(-) diff --git a/drivers/net/wireless/ath/ath9k/ar9003_hw.c b/drivers/net/wireless/ath/ath9k/ar9003_hw.c index 4f27a9fb1482..e9bd13eeee92 100644 --- a/drivers/net/wireless/ath/ath9k/ar9003_hw.c +++ b/drivers/net/wireless/ath/ath9k/ar9003_hw.c @@ -1099,17 +1099,22 @@ static bool ath9k_hw_verify_hang(struct ath_hw *ah, unsigned int queue) { u32 dma_dbg_chain, dma_dbg_complete; u8 dcu_chain_state, dcu_complete_state; + unsigned int dbg_reg, reg_offset; int i; - for (i = 0; i < NUM_STATUS_READS; i++) { - if (queue < 6) - dma_dbg_chain = REG_READ(ah, AR_DMADBG_4); - else - dma_dbg_chain = REG_READ(ah, AR_DMADBG_5); + if (queue < 6) { + dbg_reg = AR_DMADBG_4; + reg_offset = queue * 5; + } else { + dbg_reg = AR_DMADBG_5; + reg_offset = (queue - 6) * 5; + } + for (i = 0; i < NUM_STATUS_READS; i++) { + dma_dbg_chain = REG_READ(ah, dbg_reg); dma_dbg_complete = REG_READ(ah, AR_DMADBG_6); - dcu_chain_state = (dma_dbg_chain >> (5 * queue)) & 0x1f; + dcu_chain_state = (dma_dbg_chain >> reg_offset) & 0x1f; dcu_complete_state = dma_dbg_complete & 0x3; if ((dcu_chain_state != 0x6) || (dcu_complete_state != 0x1)) @@ -1128,6 +1133,7 @@ static bool ar9003_hw_detect_mac_hang(struct ath_hw *ah) u8 dcu_chain_state, dcu_complete_state; bool dcu_wait_frdone = false; unsigned long chk_dcu = 0; + unsigned int reg_offset; unsigned int i = 0; dma_dbg_4 = REG_READ(ah, AR_DMADBG_4); @@ -1139,12 +1145,15 @@ static bool ar9003_hw_detect_mac_hang(struct ath_hw *ah) goto exit; for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) { - if (i < 6) + if (i < 6) { chk_dbg = dma_dbg_4; - else + reg_offset = i * 5; + } else { chk_dbg = dma_dbg_5; + reg_offset = (i - 6) * 5; + } - dcu_chain_state = (chk_dbg >> (5 * i)) & 0x1f; + dcu_chain_state = (chk_dbg >> reg_offset) & 0x1f; if (dcu_chain_state == 0x6) { dcu_wait_frdone = true; chk_dcu |= BIT(i);