From patchwork Mon May 1 08:43:54 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cristian Ciocaltea X-Patchwork-Id: 678237 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CDB97C7EE21 for ; Mon, 1 May 2023 08:44:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232229AbjEAIoP (ORCPT ); Mon, 1 May 2023 04:44:15 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47926 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229482AbjEAIoN (ORCPT ); Mon, 1 May 2023 04:44:13 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 49D0B10E7; Mon, 1 May 2023 01:44:12 -0700 (PDT) Received: from localhost (unknown [188.27.34.213]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-256) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: cristicc) by madras.collabora.co.uk (Postfix) with ESMTPSA id EC90866031F8; Mon, 1 May 2023 09:44:10 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1682930651; bh=yOu4hxNG9H8E3BYZJ09jRWvIMd5u45GgHcAb3KhsBXs=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=dDtM4xXkSvrO9zdyBpA378ZJAH4M4xhc/dBOhKHaCOt+9q5hwE0pELA34MPZ+5FYv 7jqO+uj9fguFhOi6cHFI4hkdJX3pJppxA3yD92B7JYgdPfiXahOU0yyskQch7zhtho y0Fi5zukqvta1IISIzKQWtPUIc8IaskyI6nDtLiaHC+WFb8A6K7hRNdFRVtYD8pydi twf95xDWKxcWNTw6i8HBMpHlXcAZOEZZCaZUXcbWC82fB1frbWIYFfWuUdbjpE+EG+ pBJCVYA9hYqPLOZyX7Lk6mBvjolYDh6aNl3eZ0LlapUSoJ/+X6C9TI51ZCRXl+AUu0 YWtqnDKAxOK9A== From: Cristian Ciocaltea To: Srinivas Kandagatla , Rob Herring , Krzysztof Kozlowski , Heiko Stuebner , Philipp Zabel , Sebastian Reichel , Shreeya Patel , Kever Yang , Finley Xiao Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@collabora.com Subject: [PATCH 2/8] dt-bindings: nvmem: rockchip-otp: Add compatible for RK3588 Date: Mon, 1 May 2023 11:43:54 +0300 Message-Id: <20230501084401.765169-3-cristian.ciocaltea@collabora.com> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230501084401.765169-1-cristian.ciocaltea@collabora.com> References: <20230501084401.765169-1-cristian.ciocaltea@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Document the OTP memory found on Rockchip RK3588 SoC. Signed-off-by: Cristian Ciocaltea --- .../bindings/nvmem/rockchip-otp.yaml | 71 ++++++++++++++++--- 1 file changed, 60 insertions(+), 11 deletions(-) diff --git a/Documentation/devicetree/bindings/nvmem/rockchip-otp.yaml b/Documentation/devicetree/bindings/nvmem/rockchip-otp.yaml index 658ceed14ee2..84a11382c6e7 100644 --- a/Documentation/devicetree/bindings/nvmem/rockchip-otp.yaml +++ b/Documentation/devicetree/bindings/nvmem/rockchip-otp.yaml @@ -9,34 +9,31 @@ title: Rockchip internal OTP (One Time Programmable) memory maintainers: - Heiko Stuebner -allOf: - - $ref: nvmem.yaml# - properties: compatible: enum: - rockchip,px30-otp - rockchip,rk3308-otp + - rockchip,rk3588-otp reg: maxItems: 1 clocks: minItems: 3 - maxItems: 3 + maxItems: 4 clock-names: - items: - - const: otp - - const: apb_pclk - - const: phy + minItems: 3 + maxItems: 4 resets: - maxItems: 1 + minItems: 1 + maxItems: 3 reset-names: - items: - - const: phy + minItems: 1 + maxItems: 3 required: - compatible @@ -46,6 +43,58 @@ required: - resets - reset-names +allOf: + - $ref: nvmem.yaml# + + - if: + properties: + compatible: + contains: + enum: + - rockchip,px30-otp + - rockchip,rk3308-otp + then: + properties: + clocks: + minItems: 3 + maxItems: 3 + clock-names: + items: + - const: otp + - const: apb_pclk + - const: phy + resets: + maxItems: 1 + reset-names: + items: + - const: phy + + - if: + properties: + compatible: + contains: + enum: + - rockchip,rk3588-otp + then: + properties: + clocks: + minItems: 4 + maxItems: 4 + clock-names: + items: + - const: otpc + - const: apb + - const: arb + - const: phy + resets: + minItems: 1 + maxItems: 3 + reset-names: + items: + - const: otpc + - const: apb + - const: arb + unevaluatedProperties: false examples: From patchwork Mon May 1 08:43:56 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cristian Ciocaltea X-Patchwork-Id: 678236 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3424AC7EE21 for ; Mon, 1 May 2023 08:44:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232064AbjEAIo3 (ORCPT ); Mon, 1 May 2023 04:44:29 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48094 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232301AbjEAIoT (ORCPT ); Mon, 1 May 2023 04:44:19 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 836C8E7A; Mon, 1 May 2023 01:44:17 -0700 (PDT) Received: from localhost (unknown [188.27.34.213]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-256) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: cristicc) by madras.collabora.co.uk (Postfix) with ESMTPSA id 415B16602F6A; Mon, 1 May 2023 09:44:16 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1682930656; bh=ZmCzaqB0Ylzg7HWMRjjmRxOmRNTg2+5slMJcMqm5f6E=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=d1YFnRqU2NXyvNPxFtU+B4cH0+o7q5oe9isAwzP7ExBDZR0Itb2A7oFB0Eyy5tFNL YU1BihI9sYxK2yHEPU24oB3gfHcoXqynHmCirbreZzU9wRczVxs0z4YvokBGvAHnDd GPgHGdmbIitnMCvs1s+zBJ+/CAYAFjvD0sOM4G2TPa+m0cWwHxQydOrmQ0YrA9qFjj eLwmtoXdjlbRZTnnc1zYZqW4ojTxyDdMG/RlYyAsy5+3Io3RFggqtKYBwoBfAeM3bQ +KaZo9etZNsf4UsqpPiuzrwXaFLNYN5u+g00qCMpeJCjHMpQhVohoEHGmkv+UldU3q vUN1ZoJRr9Nsw== From: Cristian Ciocaltea To: Srinivas Kandagatla , Rob Herring , Krzysztof Kozlowski , Heiko Stuebner , Philipp Zabel , Sebastian Reichel , Shreeya Patel , Kever Yang , Finley Xiao Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@collabora.com Subject: [PATCH 4/8] nvmem: rockchip-otp: Generalize rockchip_otp_wait_status() Date: Mon, 1 May 2023 11:43:56 +0300 Message-Id: <20230501084401.765169-5-cristian.ciocaltea@collabora.com> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230501084401.765169-1-cristian.ciocaltea@collabora.com> References: <20230501084401.765169-1-cristian.ciocaltea@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org In preparation to support additional Rockchip OTP memory devices with different register layout, generalize rockchip_otp_wait_status() to accept a new parameter for specifying the offset of the status register. Signed-off-by: Cristian Ciocaltea --- drivers/nvmem/rockchip-otp.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/drivers/nvmem/rockchip-otp.c b/drivers/nvmem/rockchip-otp.c index a5b234e60735..e308dd3b4eb1 100644 --- a/drivers/nvmem/rockchip-otp.c +++ b/drivers/nvmem/rockchip-otp.c @@ -90,18 +90,19 @@ static int rockchip_otp_reset(struct rockchip_otp *otp) return 0; } -static int rockchip_otp_wait_status(struct rockchip_otp *otp, u32 flag) +static int rockchip_otp_wait_status(struct rockchip_otp *otp, + unsigned int reg, u32 flag) { u32 status = 0; int ret; - ret = readl_poll_timeout_atomic(otp->base + OTPC_INT_STATUS, status, + ret = readl_poll_timeout_atomic(otp->base + reg, status, (status & flag), 1, OTPC_TIMEOUT); if (ret) return ret; /* clean int status */ - writel(flag, otp->base + OTPC_INT_STATUS); + writel(flag, otp->base + reg); return 0; } @@ -123,7 +124,7 @@ static int rockchip_otp_ecc_enable(struct rockchip_otp *otp, bool enable) writel(SBPI_ENABLE_MASK | SBPI_ENABLE, otp->base + OTPC_SBPI_CTRL); - ret = rockchip_otp_wait_status(otp, OTPC_SBPI_DONE); + ret = rockchip_otp_wait_status(otp, OTPC_INT_STATUS, OTPC_SBPI_DONE); if (ret < 0) dev_err(otp->dev, "timeout during ecc_enable\n"); @@ -156,7 +157,7 @@ static int px30_otp_read(void *context, unsigned int offset, otp->base + OTPC_USER_ADDR); writel(OTPC_USER_FSM_ENABLE | OTPC_USER_FSM_ENABLE_MASK, otp->base + OTPC_USER_ENABLE); - ret = rockchip_otp_wait_status(otp, OTPC_USER_DONE); + ret = rockchip_otp_wait_status(otp, OTPC_INT_STATUS, OTPC_USER_DONE); if (ret < 0) { dev_err(otp->dev, "timeout during read setup\n"); goto read_end; From patchwork Mon May 1 08:43:58 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cristian Ciocaltea X-Patchwork-Id: 678235 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E18E6C7EE21 for ; Mon, 1 May 2023 08:44:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229861AbjEAIos (ORCPT ); Mon, 1 May 2023 04:44:48 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48772 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232298AbjEAIoc (ORCPT ); Mon, 1 May 2023 04:44:32 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D581010FD; Mon, 1 May 2023 01:44:24 -0700 (PDT) Received: from localhost (unknown [188.27.34.213]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-256) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: cristicc) by madras.collabora.co.uk (Postfix) with ESMTPSA id 0A4876602F6A; Mon, 1 May 2023 09:44:22 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1682930663; bh=eFpFeWyImJpFwgodlftFerx7HEWYmMUA01PlcCUlrro=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=fFTI9Pf9U4RPcD9XXPwfu/CVDrBtiM4yD72KEGx3dNlWSaV/qWZxI3W157KB967UO ukEVanU1quhqoOsERuxQEs66gOnBHm7bmebpxtFoI5tJZK1jHVb2jXx9c+Zhm4GUpa nNi5xD5sY1cO3cBOzyfjlndWGOeVXc4mYK/iT2I21tyff3yLllzBeS8m53RZELmKuY u4Gq8DCXieEX3lZJ2C+OlXfVCcrpdrnhs9EZy8DSQnRnuKGHB40O2P27uZqUVp5Ycu OOOgfrtb3MJTdWr0JTD6/Ex6xNseScCt9kNJAJcaOWTCc68DRhQ+vpOb4etdlQ0aJl J6k3z0sUjXPHw== From: Cristian Ciocaltea To: Srinivas Kandagatla , Rob Herring , Krzysztof Kozlowski , Heiko Stuebner , Philipp Zabel , Sebastian Reichel , Shreeya Patel , Kever Yang , Finley Xiao Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@collabora.com Subject: [PATCH 6/8] nvmem: rockchip-otp: Improve probe error handling Date: Mon, 1 May 2023 11:43:58 +0300 Message-Id: <20230501084401.765169-7-cristian.ciocaltea@collabora.com> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230501084401.765169-1-cristian.ciocaltea@collabora.com> References: <20230501084401.765169-1-cristian.ciocaltea@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Enhance error handling in the probe function by making use of dev_err_probe(), which ensures the error code is always printed, in addition to the specified error message. Signed-off-by: Cristian Ciocaltea --- drivers/nvmem/rockchip-otp.c | 21 ++++++++++++--------- 1 file changed, 12 insertions(+), 9 deletions(-) diff --git a/drivers/nvmem/rockchip-otp.c b/drivers/nvmem/rockchip-otp.c index b74d98f82ae5..4370d6c5e4e9 100644 --- a/drivers/nvmem/rockchip-otp.c +++ b/drivers/nvmem/rockchip-otp.c @@ -235,10 +235,8 @@ static int rockchip_otp_probe(struct platform_device *pdev) int ret, i; data = of_device_get_match_data(dev); - if (!data) { - dev_err(dev, "failed to get match data\n"); - return -EINVAL; - } + if (!data) + return dev_err_probe(dev, -EINVAL, "failed to get match data\n"); otp = devm_kzalloc(&pdev->dev, sizeof(struct rockchip_otp), GFP_KERNEL); @@ -249,7 +247,8 @@ static int rockchip_otp_probe(struct platform_device *pdev) otp->dev = dev; otp->base = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(otp->base)) - return PTR_ERR(otp->base); + return dev_err_probe(dev, PTR_ERR(otp->base), + "failed to ioremap resource\n"); otp->clks = devm_kcalloc(dev, data->num_clks, sizeof(*otp->clks), GFP_KERNEL); @@ -261,18 +260,22 @@ static int rockchip_otp_probe(struct platform_device *pdev) ret = devm_clk_bulk_get(dev, data->num_clks, otp->clks); if (ret) - return ret; + return dev_err_probe(dev, ret, "failed to get clocks\n"); otp->rst = devm_reset_control_array_get_exclusive(dev); if (IS_ERR(otp->rst)) - return PTR_ERR(otp->rst); + return dev_err_probe(dev, PTR_ERR(otp->rst), + "failed to get resets\n"); otp_config.size = data->size; otp_config.priv = otp; otp_config.dev = dev; - nvmem = devm_nvmem_register(dev, &otp_config); - return PTR_ERR_OR_ZERO(nvmem); + nvmem = devm_nvmem_register(dev, &otp_config); + if (IS_ERR(nvmem)) + return dev_err_probe(dev, PTR_ERR(nvmem), + "failed to register nvmem device\n"); + return 0; } static struct platform_driver rockchip_otp_driver = { From patchwork Mon May 1 08:44:00 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cristian Ciocaltea X-Patchwork-Id: 678234 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id ABEBCC7EE21 for ; Mon, 1 May 2023 08:45:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232132AbjEAIo7 (ORCPT ); Mon, 1 May 2023 04:44:59 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49152 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232370AbjEAIoq (ORCPT ); Mon, 1 May 2023 04:44:46 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0C55510CA; Mon, 1 May 2023 01:44:29 -0700 (PDT) Received: from localhost (unknown [188.27.34.213]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-256) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: cristicc) by madras.collabora.co.uk (Postfix) with ESMTPSA id 7776C66031C9; Mon, 1 May 2023 09:44:28 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1682930668; bh=rxSmyDetIZGvppZUNfAhus6ErLEiFJ3xF8DbQXYz7ag=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=GOIXfJMWPnN+iB38HSKAo06ZeYvHke9DTjRs95PihjrzCHA8Z9/9v9acS5hdPHKBW Pf2vJ47cHYzPOP5Tz/2YHeu2EsMMALzj4bZ8980EoquE+7GcfQUfkov3FXTt8XyvdS ggr8sQIXcnWYvaCVjgmpxnxwLj2bYlxta/IUVVpV8uV4m8x965N/zpwf9uQ0mEHjMT ICnbSZQy1ItIsmMaYWrzK8gkTaVgWuF80l18vDx4F5vXKVX6HLxkpN4bRjiVTM+RB7 AycotF6qNKY703ZhMgJIvL80ObyB2x7YAtRZiZUDLXR7V1xQ8UgNgrWVIxej/29tTf 7BmAtbsvY/gVQ== From: Cristian Ciocaltea To: Srinivas Kandagatla , Rob Herring , Krzysztof Kozlowski , Heiko Stuebner , Philipp Zabel , Sebastian Reichel , Shreeya Patel , Kever Yang , Finley Xiao Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@collabora.com Subject: [PATCH 8/8] arm64: dts: rockchip: Add rk3588 OTP node Date: Mon, 1 May 2023 11:44:00 +0300 Message-Id: <20230501084401.765169-9-cristian.ciocaltea@collabora.com> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230501084401.765169-1-cristian.ciocaltea@collabora.com> References: <20230501084401.765169-1-cristian.ciocaltea@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add DT node for Rockchip RK3588/RK3588S OTP memory. Co-developed-by: Finley Xiao Signed-off-by: Finley Xiao Signed-off-by: Cristian Ciocaltea --- arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 54 +++++++++++++++++++++++ 1 file changed, 54 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi index 767084a1ec43..0abcd51d7d66 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi @@ -1822,6 +1822,60 @@ spi4: spi@fecb0000 { status = "disabled"; }; + otp: efuse@fecc0000 { + compatible = "rockchip,rk3588-otp"; + reg = <0x0 0xfecc0000 0x0 0x400>; + clocks = <&cru CLK_OTPC_NS>, <&cru PCLK_OTPC_NS>, + <&cru CLK_OTPC_ARB>, <&cru CLK_OTP_PHY_G>; + clock-names = "otpc", "apb", "arb", "phy"; + resets = <&cru SRST_OTPC_NS>, <&cru SRST_P_OTPC_NS>, + <&cru SRST_OTPC_ARB>; + reset-names = "otpc", "apb", "arb"; + #address-cells = <1>; + #size-cells = <1>; + + cpu_code: cpu-code@2 { + reg = <0x02 0x2>; + }; + + otp_id: id@7 { + reg = <0x07 0x10>; + }; + + otp_cpu_version: cpu-version@1c { + reg = <0x1c 0x1>; + bits = <3 3>; + }; + + cpub0_leakage: cpu-leakage@17 { + reg = <0x17 0x1>; + }; + + cpub1_leakage: cpu-leakage@18 { + reg = <0x18 0x1>; + }; + + cpul_leakage: cpu-leakage@19 { + reg = <0x19 0x1>; + }; + + log_leakage: log-leakage@1a { + reg = <0x1a 0x1>; + }; + + gpu_leakage: gpu-leakage@1b { + reg = <0x1b 0x1>; + }; + + npu_leakage: npu-leakage@28 { + reg = <0x28 0x1>; + }; + + codec_leakage: codec-leakage@29 { + reg = <0x29 0x1>; + }; + }; + dmac2: dma-controller@fed10000 { compatible = "arm,pl330", "arm,primecell"; reg = <0x0 0xfed10000 0x0 0x4000>;