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a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add the USB3+DP Combo QMP PHY port subnodes in the SM8350 SoC DTSI to avoid duplication in the devices DTs. Signed-off-by: Neil Armstrong --- arch/arm64/boot/dts/qcom/sm8350.dtsi | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi index ebcb481571c2..d048f4d35c89 100644 --- a/arch/arm64/boot/dts/qcom/sm8350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi @@ -2149,6 +2149,32 @@ usb_1_qmpphy: phy@88e9000 { #phy-cells = <1>; status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + usb_1_qmpphy_out: endpoint { + }; + }; + + port@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + + usb_1_qmpphy_usb_ss_in: endpoint@0 { + reg = <0>; + }; + + usb_1_qmpphy_dp_in: endpoint@1 { + reg = <1>; + }; + }; + }; }; usb_2_qmpphy: phy-wrapper@88eb000 { From patchwork Wed May 3 13:10:34 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 678872 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6D291C7EE2C for ; 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Wed, 03 May 2023 06:10:40 -0700 (PDT) Received: from arrakeen.starnux.net ([2a01:e0a:982:cbb0:8261:5fff:fe11:bdda]) by smtp.gmail.com with ESMTPSA id c10-20020adffb0a000000b00306344eaebfsm5413479wrr.28.2023.05.03.06.10.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 03 May 2023 06:10:40 -0700 (PDT) From: Neil Armstrong Date: Wed, 03 May 2023 15:10:34 +0200 Subject: [PATCH 2/6] arm64: dts: qcom: sm8450: add ports subnodes in usb1 qmpphy node MIME-Version: 1.0 Message-Id: <20230503-topic-sm8450-graphics-dp-next-v1-2-d1ee9397f2a6@linaro.org> References: <20230503-topic-sm8450-graphics-dp-next-v1-0-d1ee9397f2a6@linaro.org> In-Reply-To: <20230503-topic-sm8450-graphics-dp-next-v1-0-d1ee9397f2a6@linaro.org> To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Catalin Marinas , Will Deacon Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Neil Armstrong X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; 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a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add the USB3+DP Combo QMP PHY port subnodes in the SM8450 SoC DTSI to avoid duplication in the devices DTs. Signed-off-by: Neil Armstrong --- arch/arm64/boot/dts/qcom/sm8450.dtsi | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi index 595533aeafc4..207afd48788f 100644 --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi @@ -2044,6 +2044,32 @@ usb_1_qmpphy: phy@88e8000 { #phy-cells = <1>; status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + usb_1_qmpphy_out: endpoint { + }; + }; + + port@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + + usb_1_qmpphy_usb_ss_in: endpoint@0 { + reg = <0>; + }; + + usb_1_qmpphy_dp_in: endpoint@1 { + reg = <1>; + }; + }; + }; }; remoteproc_slpi: remoteproc@2400000 { From patchwork Wed May 3 13:10:35 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 679141 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 45A1CC77B78 for ; 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a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org With support for the QMP combo phy to react to USB Type-C switch events, introduce it as the next hop for the SuperSpeed lanes of the Type-C connector, and connect the output of the DisplayPort controller to the QMP combo phy. This allows the TCPM to perform orientation switching of both USB and DisplayPort signals. Signed-off-by: Neil Armstrong Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sm8350-hdk.dts | 74 ++++++++++++++++++++++++++++++++- 1 file changed, 72 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8350-hdk.dts b/arch/arm64/boot/dts/qcom/sm8350-hdk.dts index 2ee1b121686a..fa835bdb7408 100644 --- a/arch/arm64/boot/dts/qcom/sm8350-hdk.dts +++ b/arch/arm64/boot/dts/qcom/sm8350-hdk.dts @@ -58,7 +58,15 @@ port@1 { reg = <1>; pmic_glink_ss_in: endpoint { - remote-endpoint = <&usb_1_dwc3_ss>; + remote-endpoint = <&usb_1_qmpphy_out>; + }; + }; + + port@2 { + reg = <2>; + + pmic_glink_sbu: endpoint { + remote-endpoint = <&fsa4480_sbu_mux>; }; }; }; @@ -326,6 +334,36 @@ zap-shader { }; }; +&i2c13 { + status = "okay"; + clock-frequency = <100000>; + + fsa4480@42 { + compatible = "fcs,fsa4480"; + reg = <0x42>; + + interrupts-extended = <&tlmm 2 IRQ_TYPE_LEVEL_LOW>; + + vcc-supply = <&vreg_bob>; + mode-switch; + orientation-switch; + svid = /bits/ 16 <0xff01>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + fsa4480_sbu_mux: endpoint { + remote-endpoint = <&pmic_glink_sbu>; + }; + }; + }; + }; +}; + &i2c15 { clock-frequency = <400000>; status = "okay"; @@ -370,6 +408,20 @@ &mdss { status = "okay"; }; +&mdss_dp { + status = "okay"; + + ports { + port@1 { + reg = <1>; + mdss_dp0_out: endpoint { + data-lanes = <0 1>; + remote-endpoint = <&usb_1_qmpphy_dp_in>; + }; + }; + }; +}; + &mdss_mdp { status = "okay"; }; @@ -416,6 +468,10 @@ &qupv3_id_0 { status = "okay"; }; +&qupv3_id_1 { + status = "okay"; +}; + &qupv3_id_2 { status = "okay"; }; @@ -716,7 +772,7 @@ &usb_1_dwc3_hs { }; &usb_1_dwc3_ss { - remote-endpoint = <&pmic_glink_ss_in>; + remote-endpoint = <&usb_1_qmpphy_usb_ss_in>; }; &usb_1_hsphy { @@ -732,6 +788,20 @@ &usb_1_qmpphy { vdda-phy-supply = <&vreg_l6b_1p2>; vdda-pll-supply = <&vreg_l1b_0p88>; + + orientation-switch; +}; + +&usb_1_qmpphy_out { + remote-endpoint = <&pmic_glink_ss_in>; +}; + +&usb_1_qmpphy_usb_ss_in { + remote-endpoint = <&usb_1_dwc3_ss>; +}; + +&usb_1_qmpphy_dp_in { + remote-endpoint = <&mdss_dp0_out>; }; &usb_2 { From patchwork Wed May 3 13:10:36 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 678871 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BBAD4C7EE22 for ; Wed, 3 May 2023 13:10:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229844AbjECNKs (ORCPT ); Wed, 3 May 2023 09:10:48 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36182 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229745AbjECNKq (ORCPT ); Wed, 3 May 2023 09:10:46 -0400 Received: from mail-wr1-x433.google.com (mail-wr1-x433.google.com [IPv6:2a00:1450:4864:20::433]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 00E904EDB for ; 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Wed, 03 May 2023 06:10:42 -0700 (PDT) From: Neil Armstrong Date: Wed, 03 May 2023 15:10:36 +0200 Subject: [PATCH 4/6] arm64: dts: qcom: sm8450-hdk: Add QMP & DP to SuperSpeed graph MIME-Version: 1.0 Message-Id: <20230503-topic-sm8450-graphics-dp-next-v1-4-d1ee9397f2a6@linaro.org> References: <20230503-topic-sm8450-graphics-dp-next-v1-0-d1ee9397f2a6@linaro.org> In-Reply-To: <20230503-topic-sm8450-graphics-dp-next-v1-0-d1ee9397f2a6@linaro.org> To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Catalin Marinas , Will Deacon Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Neil Armstrong X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2616; i=neil.armstrong@linaro.org; h=from:subject:message-id; bh=uhTUIsStzdCJQRhHk+dZA22dSJYnvAZB8z8+Kedv+nE=; b=owEBbQKS/ZANAwAKAXfc29rIyEnRAcsmYgBkUl1MEWaSitA6EIBDjcJ8mttgBjcdKIMzHh3l8tY0 YbU79SaJAjMEAAEKAB0WIQQ9U8YmyFYF/h30LIt33NvayMhJ0QUCZFJdTAAKCRB33NvayMhJ0QPwD/ 4zD/5Od4m2v2qYe1840oHq0RHGRd6GnF3m3ELEtmw+DC3JOkb5xwMRiKkOkNzae43ls8do6xBtL8mp fi1Oz5sdKM5vNrkyMKmHRVE3dloY5896Tf5QOhBZend3DEwUIL7mVp9ZBimkBSOru3Kz6fQI8iTrwR uW/ohY2wK+NojbrEpBwcefssj/hNDKGLyWnRGQNuMNtnySG9Kttl/CDe6n9lHA0H3hrnYRtaMcD3hX NbHA8UVVrRoAv0snH9wSDwmbmZw28/fK+bm+yPpd3dxW/c1ASLkKzkkpbdLNPMJ0F4afl7Tx+p9tAd A+nILtGSSQjxWFbUb5hD5jmmDPsNbHvoA9/WEQfwCDQadivsEs5V8XV6apY7aJGQoiA5HnJQwXIp+M Q0Ly3DEQOsn42GUUGQUpt0wcMIOAwmdd2LXgq3UMKSrsXM8OvDEoqoS4MMDXLCF2Qdu6Gc/qG4M7vW AGim/Tp9WTlIrbJ3QFymFG3SHSajCgsWsAu0xZlSeFMrs8Q8oHvwIuP54Y8mf48sg7cKbPei/94LFP HPxYYagj5OKc8dLoN7tShuAmdecghVZmMBCOBm2iT8iMM3q/Ul0cZj6l/ug61b42ge9p/5QKIASJiw VpSQIIwi00WO+ExKNmTHbWMcJLZJAAQc7rY2zLTXrfmKSBW+yyTkHe9flPlQ== X-Developer-Key: i=neil.armstrong@linaro.org; a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org With support for the QMP combo phy to react to USB Type-C switch events, introduce it as the next hop for the SuperSpeed lanes of the Type-C connector, and connect the output of the DisplayPort controller to the QMP combo phy. This allows the TCPM to perform orientation switching of both USB and DisplayPort signals. Signed-off-by: Neil Armstrong --- arch/arm64/boot/dts/qcom/sm8450-hdk.dts | 71 ++++++++++++++++++++++++++++++++- 1 file changed, 69 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8450-hdk.dts b/arch/arm64/boot/dts/qcom/sm8450-hdk.dts index e931545a2cac..52a14ae0321b 100644 --- a/arch/arm64/boot/dts/qcom/sm8450-hdk.dts +++ b/arch/arm64/boot/dts/qcom/sm8450-hdk.dts @@ -114,9 +114,18 @@ port@1 { reg = <1>; pmic_glink_ss_in: endpoint { - remote-endpoint = <&usb_1_dwc3_ss>; + remote-endpoint = <&usb_1_qmpphy_out>; }; }; + + port@2 { + reg = <2>; + + pmic_glink_sbu: endpoint { + remote-endpoint = <&fsa4480_sbu_mux>; + }; + }; + }; }; }; @@ -494,6 +503,36 @@ lt9611_out: endpoint { }; }; +&i2c5 { + status = "okay"; + clock-frequency = <100000>; + + fsa4480@42 { + compatible = "fcs,fsa4480"; + reg = <0x42>; + + interrupts-extended = <&tlmm 2 IRQ_TYPE_LEVEL_LOW>; + + vcc-supply = <&vreg_bob>; + mode-switch; + orientation-switch; + svid = /bits/ 16 <0xff01>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + fsa4480_sbu_mux: endpoint { + remote-endpoint = <&pmic_glink_sbu>; + }; + }; + }; + }; +}; + &mdss { status = "okay"; }; @@ -513,6 +552,20 @@ &mdss_dsi0_phy { status = "okay"; }; +&mdss_dp0 { + status = "okay"; + + ports { + port@1 { + reg = <1>; + mdss_dp0_out: endpoint { + data-lanes = <0 1>; + remote-endpoint = <&usb_1_qmpphy_dp_in>; + }; + }; + }; +}; + &mdss_mdp { status = "okay"; }; @@ -766,7 +819,7 @@ &usb_1_dwc3_hs { }; &usb_1_dwc3_ss { - remote-endpoint = <&pmic_glink_ss_in>; + remote-endpoint = <&usb_1_qmpphy_usb_ss_in>; }; &usb_1_hsphy { @@ -782,6 +835,20 @@ &usb_1_qmpphy { vdda-phy-supply = <&vreg_l6b_1p2>; vdda-pll-supply = <&vreg_l1b_0p91>; + + orientation-switch; +}; + +&usb_1_qmpphy_out { + remote-endpoint = <&pmic_glink_ss_in>; +}; + +&usb_1_qmpphy_usb_ss_in { + remote-endpoint = <&usb_1_dwc3_ss>; +}; + +&usb_1_qmpphy_dp_in { + remote-endpoint = <&mdss_dp0_out>; }; &vamacro { From patchwork Wed May 3 13:10:37 2023 Content-Type: text/plain; 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a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Enable the FSA4480 driver as module for HDK8350 and HDK8450 platforms to permit USB-C Altmode support. Signed-off-by: Neil Armstrong --- arch/arm64/configs/defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index a24609e14d50..e548bb52260e 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -992,6 +992,7 @@ CONFIG_TYPEC_FUSB302=m CONFIG_TYPEC_TPS6598X=m CONFIG_TYPEC_HD3SS3220=m CONFIG_TYPEC_UCSI=m +CONFIG_TYPEC_MUX_FSA4480=m CONFIG_UCSI_CCG=m CONFIG_TYPEC_MUX_GPIO_SBU=m CONFIG_MMC=y From patchwork Wed May 3 13:10:38 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 678870 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0F78FC7EE23 for ; Wed, 3 May 2023 13:11:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230125AbjECNK6 (ORCPT ); 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Wed, 03 May 2023 06:10:43 -0700 (PDT) From: Neil Armstrong Date: Wed, 03 May 2023 15:10:38 +0200 Subject: [PATCH 6/6] qcom: pmic_glink: enable altmode for SM8450 MIME-Version: 1.0 Message-Id: <20230503-topic-sm8450-graphics-dp-next-v1-6-d1ee9397f2a6@linaro.org> References: <20230503-topic-sm8450-graphics-dp-next-v1-0-d1ee9397f2a6@linaro.org> In-Reply-To: <20230503-topic-sm8450-graphics-dp-next-v1-0-d1ee9397f2a6@linaro.org> To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Catalin Marinas , Will Deacon Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Neil Armstrong X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1399; i=neil.armstrong@linaro.org; h=from:subject:message-id; bh=qkASJFOC8Sum3nf8ciK4XNKG+cxf4hgwBJ+cUAn3rO4=; b=owEBbQKS/ZANAwAKAXfc29rIyEnRAcsmYgBkUl1NKRunTI8gTuu1bmZf0rFwrWODpoC9Ruv+xEWx dqZglNOJAjMEAAEKAB0WIQQ9U8YmyFYF/h30LIt33NvayMhJ0QUCZFJdTQAKCRB33NvayMhJ0f1yEA DAHeZRXxPUb4hZtFMNqS8d/kOp/k4sNXsY/IAWHPTsRBj14r04Gq7SWME1lm2Q82PRKdnyGOZSHkYw CPhKE82yL7J6D5xPEy1mxlFFMCd8e2J2XOBXIYO7hl7IXx3qLlkQSLaDfY1YlYSUoVFzVSWX8PY1O4 hLu7+a4PkFE/b6jGzu5RMuze6qGz5RguPb1XCQvb3Q8MiixJeAy+Es5vp7+RFsIbVj1ukmjx7BszKr mlsC6LKI5+Uz0KXr2QLmdp78YyJF6UsXqSVbIz6w4mqRNaEsokKPtufIx2zcvl6JBd/xZLQvnIT4fk G7dTJ7OyBQ/80sABtv3HxWjzxFFidNwBbbPPSUoydVNOSlAR+1fygt0HVSOIgqAdWlQbWPhuY5u1NU Fs7cbB1vlhrFg5uRckf8PsN0qZWnSnvW+UKfQtGpY0R6H+dOXbfAGkDKWvdt1A12+Tti2v/vQyZM7h lGc0TYKlVgHoYj2cq3n2Ya+8n12OINqsdAN5/kmtUTcGDSGUawiOkY8EwZn6Sl+nu7Wn3r7zeyoob9 aUy7jcI/oqRzJTcvmvD0d7t969uAf800JjPx79ZHbQ0POfZYUlftJ4c8fH+YyOtFQ3t4dUlKk3FsiR SRTWTpmFONG0+TEaC+nJm1QNvBdXhHLV0O2f8/DgVJKfoJivz7hoDRwN/gAQ== X-Developer-Key: i=neil.armstrong@linaro.org; a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Create a separate bitmask for sm8550 and enable altmode aux driver for sm8450 platform to enable pmic-glink altmode events. Signed-off-by: Neil Armstrong --- drivers/soc/qcom/pmic_glink.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/soc/qcom/pmic_glink.c b/drivers/soc/qcom/pmic_glink.c index 8bf95df0a56a..c87056769ebd 100644 --- a/drivers/soc/qcom/pmic_glink.c +++ b/drivers/soc/qcom/pmic_glink.c @@ -338,13 +338,17 @@ static int pmic_glink_remove(struct platform_device *pdev) return 0; } -/* Do not handle altmode for now on those platforms */ static const unsigned long pmic_glink_sm8450_client_mask = BIT(PMIC_GLINK_CLIENT_BATT) | + BIT(PMIC_GLINK_CLIENT_ALTMODE) | + BIT(PMIC_GLINK_CLIENT_UCSI); + +/* Do not handle altmode for now on those platforms */ +static const unsigned long pmic_glink_sm8550_client_mask = BIT(PMIC_GLINK_CLIENT_BATT) | BIT(PMIC_GLINK_CLIENT_UCSI); static const struct of_device_id pmic_glink_of_match[] = { { .compatible = "qcom,sm8450-pmic-glink", .data = &pmic_glink_sm8450_client_mask }, - { .compatible = "qcom,sm8550-pmic-glink", .data = &pmic_glink_sm8450_client_mask }, + { .compatible = "qcom,sm8550-pmic-glink", .data = &pmic_glink_sm8550_client_mask }, { .compatible = "qcom,pmic-glink" }, {} };