From patchwork Thu May 4 14:57:31 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joy Chakraborty X-Patchwork-Id: 679204 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 16A9CC77B7C for ; Thu, 4 May 2023 14:59:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230437AbjEDO7G (ORCPT ); Thu, 4 May 2023 10:59:06 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52354 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230519AbjEDO7A (ORCPT ); Thu, 4 May 2023 10:59:00 -0400 Received: from mail-yb1-xb4a.google.com (mail-yb1-xb4a.google.com [IPv6:2607:f8b0:4864:20::b4a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 31AC23C05 for ; Thu, 4 May 2023 07:58:33 -0700 (PDT) Received: by mail-yb1-xb4a.google.com with SMTP id 3f1490d57ef6-b9a776a5eb2so1353366276.0 for ; Thu, 04 May 2023 07:58:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20221208; t=1683212285; x=1685804285; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:from:to:cc:subject:date:message-id:reply-to; bh=IBBR9Gpj6AENx07xObOvliG6DKbsyP8bVAT3ugF7Lw0=; b=Bm+hotMwTf3HmxBmAE5daNhihvDIBR6hTHsQD13iwNaFOBjVaTI+AwbBzFTHxfmDjS L9qr0x7GtBiXlzRprJjL9lPbhKPiTNgZRNqAVzlpB69tXujMAmuL2ooGL0Hj58gUgTz9 ttugCUEN/CMSwmfxNjycm7b0a74skHz4MJlFYORccprny/38mMSuE6kOOtEWSlhplbnw Yx/Wpq1rGI6do55XSfuyFmDVkH46p9+jpivruEX59DhlayUQ+ETdxyZAPrHT7lNmtAdI 8O5K+AzEA0nkN5J9MKx7h6ppG10WYH+eKCKmEjDim0EZ9khO6JRCLtT3mRpVgAXFVeig EUmg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1683212285; x=1685804285; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=IBBR9Gpj6AENx07xObOvliG6DKbsyP8bVAT3ugF7Lw0=; b=bAOX/SWMDbbUNKyqkkr+QIR5kiArbGU3ld0hp1Od1IAiiWhdfYAs/TBaJZ6jKjvbRY CMIM8vcS2J2OigIFHpzjCbD2IQuGhTfvQ7Gvy3Ti+jlAOZorq1F0Rkga51aqAFncUjtf qzrfNL8l32AHknQW3tMn3FLBjyPgwclrHf7g2RPEwbMcf04Fl0KaoTN0B+TuzlM72L72 Lu1eahoQLYUJUU3TxC02H0ewPvC4E/yLRCHu1ceygxR5atRmH3aBGmXbaxxv8rU9b0TB g3eZ8QhcClwjn8sQk66LHd8bB7ng8srNZSy7BsJLM3gEUeM6P8clxGmN2vOAOwWk0kon j9XQ== X-Gm-Message-State: AC+VfDy4AhLtCHLxKG5Kl0Em+rq9bXAyGnCsTER34a9kaFd8n4zg+jP8 OzegC4Ak0SSmq0UeLAzKzdjfUQUQ7eVLqQ== X-Google-Smtp-Source: ACHHUZ4uNifwGkkKP/nqQYBaOewLLqK9iJjqVQ8HGG4hUdtx7I0jL8ngEvrX54UF9uiST/kJXf2XlnA9v7M59Q== X-Received: from joychakr.c.googlers.com ([fda3:e722:ac3:cc00:4f:4b78:c0a8:6ea]) (user=joychakr job=sendgmr) by 2002:a25:8490:0:b0:ba1:d0:7f7c with SMTP id v16-20020a258490000000b00ba100d07f7cmr76053ybk.2.1683212285420; Thu, 04 May 2023 07:58:05 -0700 (PDT) Date: Thu, 4 May 2023 14:57:31 +0000 In-Reply-To: <20230504145737.286444-1-joychakr@google.com> Mime-Version: 1.0 References: <20230504145737.286444-1-joychakr@google.com> X-Mailer: git-send-email 2.40.1.495.gc816e09b53d-goog Message-ID: <20230504145737.286444-2-joychakr@google.com> Subject: [PATCH 1/7] dmaengine: pl330: Separate SRC and DST burst size and len From: Joy Chakraborty To: Vinod Koul , Rob Herring , Krzysztof Kozlowski Cc: dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, manugautam@google.com, danielmentz@google.com, sjadavani@google.com, Joy Chakraborty Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add new variables in request configuration to handle source and destination AxSize and AxLen separately and allow them to have different values. This allows further patches to configure different AxSize and AxLen for optimum bus utilisation. Signed-off-by: Joy Chakraborty --- drivers/dma/pl330.c | 71 +++++++++++++++++++++++++++++---------------- 1 file changed, 46 insertions(+), 25 deletions(-) diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c index 0d9257fbdfb0..c006e481b4c5 100644 --- a/drivers/dma/pl330.c +++ b/drivers/dma/pl330.c @@ -240,6 +240,12 @@ enum pl330_byteswap { #define BYTE_TO_BURST(b, ccr) ((b) / BRST_SIZE(ccr) / BRST_LEN(ccr)) #define BURST_TO_BYTE(c, ccr) ((c) * BRST_SIZE(ccr) * BRST_LEN(ccr)) +#define SRC_BRST_SIZE(ccr) BRST_SIZE(ccr) +#define DST_BRST_SIZE(ccr) (1 << (((ccr) >> CC_DSTBRSTSIZE_SHFT) & 0x7)) + +#define SRC_BRST_LEN(ccr) BRST_LEN(ccr) +#define DST_BRST_LEN(ccr) ((((ccr) >> CC_DSTBRSTLEN_SHFT) & 0xf) + 1) + /* * With 256 bytes, we can do more than 2.5MB and 5MB xfers per req * at 1byte/burst for P<->M and M<->M respectively. @@ -305,8 +311,10 @@ struct pl330_reqcfg { bool nonsecure; bool privileged; bool insnaccess; - unsigned brst_len:5; - unsigned brst_size:3; /* in power of 2 */ + unsigned src_brst_size : 3; /* in power of 2 */ + unsigned src_brst_len:5; + unsigned dst_brst_size : 3; /* in power of 2 */ + unsigned dst_brst_len:5; enum pl330_cachectrl dcctl; enum pl330_cachectrl scctl; @@ -1204,7 +1212,10 @@ static int _bursts(struct pl330_dmac *pl330, unsigned dry_run, u8 buf[], const struct _xfer_spec *pxs, int cyc) { int off = 0; - enum pl330_cond cond = BRST_LEN(pxs->ccr) > 1 ? BURST : SINGLE; + enum pl330_cond cond = SINGLE; + + if (SRC_BRST_LEN(pxs->ccr) > 1 || DST_BRST_LEN(pxs->ccr) > 1) + cond = BURST; if (pl330->quirks & PL330_QUIRK_PERIPH_BURST) cond = BURST; @@ -1235,12 +1246,12 @@ static int _bursts(struct pl330_dmac *pl330, unsigned dry_run, u8 buf[], * for mem-to-mem, mem-to-dev or dev-to-mem. */ static int _dregs(struct pl330_dmac *pl330, unsigned int dry_run, u8 buf[], - const struct _xfer_spec *pxs, int transfer_length) + const struct _xfer_spec *pxs, int src_length, int dst_length) { int off = 0; int dregs_ccr; - if (transfer_length == 0) + if (src_length == 0 || dst_length == 0) return off; /* @@ -1253,9 +1264,9 @@ static int _dregs(struct pl330_dmac *pl330, unsigned int dry_run, u8 buf[], dregs_ccr = pxs->ccr; dregs_ccr &= ~((0xf << CC_SRCBRSTLEN_SHFT) | (0xf << CC_DSTBRSTLEN_SHFT)); - dregs_ccr |= (((transfer_length - 1) & 0xf) << + dregs_ccr |= (((src_length - 1) & 0xf) << CC_SRCBRSTLEN_SHFT); - dregs_ccr |= (((transfer_length - 1) & 0xf) << + dregs_ccr |= (((dst_length - 1) & 0xf) << CC_DSTBRSTLEN_SHFT); switch (pxs->desc->rqtype) { @@ -1369,16 +1380,18 @@ static inline int _setup_loops(struct pl330_dmac *pl330, struct pl330_xfer *x = &pxs->desc->px; u32 ccr = pxs->ccr; unsigned long c, bursts = BYTE_TO_BURST(x->bytes, ccr); - int num_dregs = (x->bytes - BURST_TO_BYTE(bursts, ccr)) / - BRST_SIZE(ccr); - int off = 0; + int num_dreg_bytes = x->bytes - BURST_TO_BYTE(bursts, ccr); + int num_src_dregs, num_dst_dregs, off = 0; + + num_src_dregs = num_dreg_bytes / SRC_BRST_SIZE(ccr); + num_dst_dregs = num_dreg_bytes / DST_BRST_SIZE(ccr); while (bursts) { c = bursts; off += _loop(pl330, dry_run, &buf[off], &c, pxs); bursts -= c; } - off += _dregs(pl330, dry_run, &buf[off], pxs, num_dregs); + off += _dregs(pl330, dry_run, &buf[off], pxs, num_src_dregs, num_dst_dregs); return off; } @@ -1446,11 +1459,11 @@ static inline u32 _prepare_ccr(const struct pl330_reqcfg *rqc) if (rqc->insnaccess) ccr |= CC_SRCIA | CC_DSTIA; - ccr |= (((rqc->brst_len - 1) & 0xf) << CC_SRCBRSTLEN_SHFT); - ccr |= (((rqc->brst_len - 1) & 0xf) << CC_DSTBRSTLEN_SHFT); + ccr |= (((rqc->src_brst_len - 1) & 0xf) << CC_SRCBRSTLEN_SHFT); + ccr |= (((rqc->dst_brst_len - 1) & 0xf) << CC_DSTBRSTLEN_SHFT); - ccr |= (rqc->brst_size << CC_SRCBRSTSIZE_SHFT); - ccr |= (rqc->brst_size << CC_DSTBRSTSIZE_SHFT); + ccr |= (rqc->src_brst_size << CC_SRCBRSTSIZE_SHFT); + ccr |= (rqc->dst_brst_size << CC_DSTBRSTSIZE_SHFT); ccr |= (rqc->scctl << CC_SRCCCTRL_SHFT); ccr |= (rqc->dcctl << CC_DSTCCTRL_SHFT); @@ -2656,7 +2669,7 @@ static inline int get_burst_len(struct dma_pl330_desc *desc, size_t len) burst_len = pl330->pcfg.data_bus_width / 8; burst_len *= pl330->pcfg.data_buf_dep / pl330->pcfg.num_chan; - burst_len >>= desc->rqcfg.brst_size; + burst_len >>= desc->rqcfg.src_brst_size; /* src/dst_burst_len can't be more than 16 */ if (burst_len > PL330_MAX_BURST) @@ -2735,8 +2748,10 @@ static struct dma_async_tx_descriptor *pl330_prep_dma_cyclic( } desc->rqtype = direction; - desc->rqcfg.brst_size = pch->burst_sz; - desc->rqcfg.brst_len = pch->burst_len; + desc->rqcfg.src_brst_size = pch->burst_sz; + desc->rqcfg.src_brst_len = pch->burst_len; + desc->rqcfg.dst_brst_size = pch->burst_sz; + desc->rqcfg.dst_brst_len = pch->burst_len; desc->bytes_requested = period_len; fill_px(&desc->px, dst, src, period_len); @@ -2789,17 +2804,21 @@ pl330_prep_dma_memcpy(struct dma_chan *chan, dma_addr_t dst, while ((src | dst | len) & (burst - 1)) burst /= 2; - desc->rqcfg.brst_size = 0; - while (burst != (1 << desc->rqcfg.brst_size)) - desc->rqcfg.brst_size++; + desc->rqcfg.src_brst_size = 0; + while (burst != (1 << desc->rqcfg.src_brst_size)) + desc->rqcfg.src_brst_size++; - desc->rqcfg.brst_len = get_burst_len(desc, len); + desc->rqcfg.src_brst_len = get_burst_len(desc, len); /* * If burst size is smaller than bus width then make sure we only * transfer one at a time to avoid a burst stradling an MFIFO entry. */ if (burst * 8 < pl330->pcfg.data_bus_width) - desc->rqcfg.brst_len = 1; + desc->rqcfg.src_brst_len = 1; + + /* For Mem2Mem, set destination AxSize and AxLen same as source*/ + desc->rqcfg.dst_brst_len = desc->rqcfg.src_brst_len; + desc->rqcfg.dst_brst_size = desc->rqcfg.src_brst_size; desc->bytes_requested = len; @@ -2879,8 +2898,10 @@ pl330_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl, sg_dma_len(sg)); } - desc->rqcfg.brst_size = pch->burst_sz; - desc->rqcfg.brst_len = pch->burst_len; + desc->rqcfg.src_brst_size = pch->burst_sz; + desc->rqcfg.src_brst_len = pch->burst_len; + desc->rqcfg.dst_brst_size = pch->burst_sz; + desc->rqcfg.dst_brst_len = pch->burst_len; desc->rqtype = direction; desc->bytes_requested = sg_dma_len(sg); } From patchwork Thu May 4 14:57:33 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joy Chakraborty X-Patchwork-Id: 679203 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 05ADDC7EE29 for ; Thu, 4 May 2023 14:59:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230510AbjEDO7J (ORCPT ); Thu, 4 May 2023 10:59:09 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52198 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231171AbjEDO7E (ORCPT ); Thu, 4 May 2023 10:59:04 -0400 Received: from mail-yb1-xb4a.google.com (mail-yb1-xb4a.google.com [IPv6:2607:f8b0:4864:20::b4a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BF79540E5 for ; Thu, 4 May 2023 07:58:37 -0700 (PDT) Received: by mail-yb1-xb4a.google.com with SMTP id 3f1490d57ef6-b9a6f15287eso11745433276.1 for ; Thu, 04 May 2023 07:58:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20221208; t=1683212294; x=1685804294; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:from:to:cc:subject:date:message-id:reply-to; bh=ZW3YbnOWzAROANQ0CBt1Fwgra5x6iOOxVOyhCTd/l4A=; b=5s2YzHT1XroaygOER5aXVBNbiAm4WFX/Ndy4UwMbss1mVh8cTf2unf4R4+e0d4uVb/ DckxyB7Hs1Zd5MMcaR93B6CdU2DzzPS5CBG/6x9Q7ocGJxJZgYxyKDiDZsLHeGjJVi4/ 36dQnJ2hDhP7aSu/exokzIMmcOyJYKcnLHTNAqgTtsmt4nKCDDW7SUsI7oFKEfn/onF5 o/YbzYvXxjfduWBsulERXdQDEgsuMTH3JrOWh9p/7jzRxPDCa/bteXRw563bEMPzIr7a aZaSYlihzs0DMnNmab5t2pNRTyqXJn7LjkxNHm1R/SQpvRIkl9Ww6qkgYlE8y7I0nsz/ hmzQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1683212294; x=1685804294; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=ZW3YbnOWzAROANQ0CBt1Fwgra5x6iOOxVOyhCTd/l4A=; b=dXQPip6PHP+GGmF2s61qJtp9GadbnmHceXkqk5Eq9SVy3185lDJgV+lvZKrORlRwiu zuykesWgzh8SL8j5WemhF3dDHgRKff488XE76ltzu1yTl0GvXqZupUp30hhw0JNWs6t4 FrAngaBGY+t6fNTRzZ/EAWYRvdXjUfmEqkDKxl7ihvKxXj0Co3Ui6RggEGsQNHKds5xF QYY7uQ+Qdx5AbzlerBVE2R5HHBcr5t+5ZykbtFzmw2Ud6CfsuuXJJfy2B027tIUzC7Qa N5/D1b0G6vHcpRKIoYPcNDsasaZh3bR0IsuBJ+rlBmY1vvw0h+U4kmEmEJb7nsm231mx UAaQ== X-Gm-Message-State: AC+VfDxpq7jGGvbb5maWpwKzqlcWR6X3d6pOa3A+xui/LigqBo3WOms9 de8VTRPjFZDsUBCPVXsYmVWasrkRN+aF4w== X-Google-Smtp-Source: ACHHUZ7nk6pfnrO2Vl4gHjCqd8e1I6OuRinIyBbIqIcNsM/NimujGakIOUS4ok+jBP2y67mUnP9rgAnF5ho2fA== X-Received: from joychakr.c.googlers.com ([fda3:e722:ac3:cc00:4f:4b78:c0a8:6ea]) (user=joychakr job=sendgmr) by 2002:a05:6902:990:b0:b8f:5b11:6d6c with SMTP id bv16-20020a056902099000b00b8f5b116d6cmr13858ybb.1.1683212294723; Thu, 04 May 2023 07:58:14 -0700 (PDT) Date: Thu, 4 May 2023 14:57:33 +0000 In-Reply-To: <20230504145737.286444-1-joychakr@google.com> Mime-Version: 1.0 References: <20230504145737.286444-1-joychakr@google.com> X-Mailer: git-send-email 2.40.1.495.gc816e09b53d-goog Message-ID: <20230504145737.286444-4-joychakr@google.com> Subject: [PATCH 3/7] dmaengine: pl330: Change if-else to switch-case for consistency From: Joy Chakraborty To: Vinod Koul , Rob Herring , Krzysztof Kozlowski Cc: dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, manugautam@google.com, danielmentz@google.com, sjadavani@google.com, Joy Chakraborty Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Change if-else to switch-case in pl330_prep_slave_sg() function for consistency with other peripheral transfer functions in the driver. Signed-off-by: Joy Chakraborty --- drivers/dma/pl330.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c index 39a66ff29e27..746da0bbea92 100644 --- a/drivers/dma/pl330.c +++ b/drivers/dma/pl330.c @@ -2883,16 +2883,21 @@ pl330_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl, else list_add_tail(&desc->node, &first->node); - if (direction == DMA_MEM_TO_DEV) { + switch (direction) { + case DMA_MEM_TO_DEV: desc->rqcfg.src_inc = 1; desc->rqcfg.dst_inc = 0; fill_px(&desc->px, pch->fifo_dma, sg_dma_address(sg), sg_dma_len(sg)); - } else { + break; + case DMA_DEV_TO_MEM: desc->rqcfg.src_inc = 0; desc->rqcfg.dst_inc = 1; fill_px(&desc->px, sg_dma_address(sg), pch->fifo_dma, sg_dma_len(sg)); + break; + default: + break; } desc->rqcfg.src_brst_size = pch->burst_sz; From patchwork Thu May 4 14:57:35 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joy Chakraborty X-Patchwork-Id: 679202 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7440DC77B78 for ; Thu, 4 May 2023 14:59:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231348AbjEDO73 (ORCPT ); Thu, 4 May 2023 10:59:29 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52528 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231232AbjEDO7G (ORCPT ); Thu, 4 May 2023 10:59:06 -0400 Received: from mail-yb1-xb49.google.com (mail-yb1-xb49.google.com [IPv6:2607:f8b0:4864:20::b49]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5A1F42D66 for ; Thu, 4 May 2023 07:58:44 -0700 (PDT) Received: by mail-yb1-xb49.google.com with SMTP id 3f1490d57ef6-b9a7766d1f2so757316276.3 for ; Thu, 04 May 2023 07:58:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20221208; t=1683212304; x=1685804304; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:from:to:cc:subject:date:message-id:reply-to; bh=cmjaIRPyR5OKdf02GACB/fx4eJBLPx7/7rEGOj0i7h0=; b=Npa8tJhk/Rl57/4enBWz8lg2nvQDhdQTSnbVDFE2lgk2BLJxivKtPSY6hUFdn3wW6l v1REXZVoP5NsVUr0gD29PV9sRNxZnxP/CQptfuBxi+cjV+7YFDPjVBomfDNpvo1skWzP PtFEt9GOtleAd8qMiZmFL3/BnaGyZInLz7SjaJvEghEyiePkZYORM8TgpbRCru2WZVBB BpLgrQcZXXRuLhuylbktYv7D8qn/V79l2U6AZ4B+8k/XskfQ4zVdhSTblZ7/mNXS3qiu J0jwtX1DfmT6RtM9sTzA8GAO0zMmoXp75diF6r8cD0zh5KIAVC+F0Td4y/Cs3lFVqBFa qQGg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1683212304; x=1685804304; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=cmjaIRPyR5OKdf02GACB/fx4eJBLPx7/7rEGOj0i7h0=; b=RTyukoZ8WNmAYP5aFTA9SvNqxJfmRCSiX5DoIBnbuLbbvv2wK0MlrUg1+pNpdAqTtd 0djUBm8eIFb6ZpKgA1DYtYbejxoU3ZUP4Nz1kzYTdnmshnWsFipfaF4NGBS+zwqnaaP6 jIkzfp4tohYEmP+2BanxEno+7zS37w0VE/klhmYY0nD0z5T4QjCzlNYCiNwrXoe35QET i9qUB3j/8jBdP6JvrIq4yo4cqST2ZGsLp6A2YYs0CnIde7T5hkxtNTq7CYi+vBptcCqA 8OYzxxDg46I+tuSsFcGgnpQJSCW51xUx9P18FGkp5vaZQjlP9nRoQ9izCmAkUNtOkhcM cu+A== X-Gm-Message-State: AC+VfDyNOguNL8g7pou6Lunz57oIgdx2oIwm0R1a4K5RyvWCOVy7f52x v5bO2BbGn/ICVxTT6vgn57HHSImUoeB3Gg== X-Google-Smtp-Source: ACHHUZ7Acs9BuSbDMP0NpP2tEqzon7Bw5llOE81ZkAf+HSeEsxYgXZGDptBJ4txV0qxAzgJNOSM5sKTF0oJuzA== X-Received: from joychakr.c.googlers.com ([fda3:e722:ac3:cc00:4f:4b78:c0a8:6ea]) (user=joychakr job=sendgmr) by 2002:a05:6902:993:b0:b9d:fe66:a424 with SMTP id bv19-20020a056902099300b00b9dfe66a424mr125691ybb.2.1683212304642; Thu, 04 May 2023 07:58:24 -0700 (PDT) Date: Thu, 4 May 2023 14:57:35 +0000 In-Reply-To: <20230504145737.286444-1-joychakr@google.com> Mime-Version: 1.0 References: <20230504145737.286444-1-joychakr@google.com> X-Mailer: git-send-email 2.40.1.495.gc816e09b53d-goog Message-ID: <20230504145737.286444-6-joychakr@google.com> Subject: [PATCH 5/7] dmaengine: pl330: Quirk to optimize AxSize for peripheral usecases From: Joy Chakraborty To: Vinod Koul , Rob Herring , Krzysztof Kozlowski Cc: dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, manugautam@google.com, danielmentz@google.com, sjadavani@google.com, Joy Chakraborty Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add quirk "arm,pl330-optimize-dev2mem-axsize" to choose maximum possible AxSize for transactions towards memory during usecases which copy data between memory and peripherals. Currently PL330 driver chooses equal AxLen and AxSize for both loads and stores to/from memory and peripherals which is inefficient towards memory as the whole bus width is not used for transfers as a peripheral might be limited to use only a narrow size of the buswidth available. Example scenario: A peripheral might require data byte by byte which would make AxSize = 1 byte and AxLen = 16 for both load from memory and store to Peripheral. This can be optimized for memory by using maximum AxSize (say 16bytes) then load from memory can be done with AxSize = 16byte, AxLen = 1 and store to peripheral with AxSize = 1byte, AxLen = 16 beats. Instruction setup with quirk : 512bytes copy from Memory(16bytes * 4beats) to Peripheral(4bytes * 16 beats) --- DMAMOV CCR 0xbd0239 DMAMOV SAR 0xffffe000 DMAMOV DAR 0xffffc860 DMALP_1 7 DMAFLUSHP 0 DMAWFPB 0 DMALDB DMASTPB 0 DMALPENDA_1 bjmpto_7 DMASEV 3 DMAEND --- Signed-off-by: Joy Chakraborty --- drivers/dma/pl330.c | 105 +++++++++++++++++++++++++++++++++++++------- 1 file changed, 89 insertions(+), 16 deletions(-) diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c index e5e610c91f18..b4933fab8a62 100644 --- a/drivers/dma/pl330.c +++ b/drivers/dma/pl330.c @@ -35,6 +35,7 @@ #define PL330_QUIRK_BROKEN_NO_FLUSHP BIT(0) #define PL330_QUIRK_PERIPH_BURST BIT(1) +#define PL330_QUIRK_OPTIMIZE_DEV2MEM_AXSIZE BIT(2) enum pl330_cachectrl { CCTRL0, /* Noncacheable and nonbufferable */ @@ -519,6 +520,10 @@ static struct pl330_of_quirks { { .quirk = "arm,pl330-periph-burst", .id = PL330_QUIRK_PERIPH_BURST, + }, + { + .quirk = "arm,pl330-optimize-dev2mem-axsize", + .id = PL330_QUIRK_OPTIMIZE_DEV2MEM_AXSIZE, } }; @@ -2677,6 +2682,56 @@ static inline int get_burst_len(struct dma_pl330_desc *desc, unsigned int brst_s return burst_len; } +/* + * Returns burst size to be used to copy data from/to memory during a + * peripheral transfer + */ +static unsigned int get_periph_mem_brst_sz(dma_addr_t addr, size_t len, + struct dma_pl330_chan *pch, int quirks) +{ + unsigned int burst, burst_size = pch->burst_sz; + + if (quirks & PL330_QUIRK_OPTIMIZE_DEV2MEM_AXSIZE) { + /* Select max possible burst size */ + burst = pch->dmac->pcfg.data_bus_width / 8; + + /* + * Make sure we use a burst size that aligns with the memory and length. + */ + while ((addr | len) & (burst - 1)) + burst /= 2; + + burst_size = __ffs(burst); + } + return burst_size; +} + +/* + * Returns burst length to be used to copy data from/to memory during a + * peripheral transfer + */ +static unsigned int get_periph_mem_brst_len(struct dma_pl330_desc *desc, + struct dma_pl330_chan *pch, + unsigned int burst_size, int quirks) +{ + unsigned int burst_len = pch->burst_len; + + if (quirks & PL330_QUIRK_OPTIMIZE_DEV2MEM_AXSIZE && + burst_size != pch->burst_sz) { + /* Select max possible burst len */ + burst_len = get_burst_len(desc, burst_size); + + /* + * Adjust AxLen to keep number of bytes same in Load/Store + */ + if (burst_size > pch->burst_sz) + burst_len = pch->burst_len >> (burst_size - pch->burst_sz); + else + pch->burst_len = burst_len >> (pch->burst_sz - burst_size); + } + return burst_len; +} + static struct dma_async_tx_descriptor *pl330_prep_dma_cyclic( struct dma_chan *chan, dma_addr_t dma_addr, size_t len, size_t period_len, enum dma_transfer_direction direction, @@ -2684,8 +2739,8 @@ static struct dma_async_tx_descriptor *pl330_prep_dma_cyclic( { struct dma_pl330_desc *desc = NULL, *first = NULL; struct dma_pl330_chan *pch = to_pchan(chan); + unsigned int i, burst_size, burst_len; struct pl330_dmac *pl330 = pch->dmac; - unsigned int i; dma_addr_t dst; dma_addr_t src; @@ -2729,28 +2784,35 @@ static struct dma_async_tx_descriptor *pl330_prep_dma_cyclic( return NULL; } + burst_size = get_periph_mem_brst_sz(dma_addr, period_len, pch, pl330->quirks); + burst_len = get_periph_mem_brst_len(desc, pch, burst_size, pl330->quirks); + switch (direction) { case DMA_MEM_TO_DEV: desc->rqcfg.src_inc = 1; desc->rqcfg.dst_inc = 0; src = dma_addr; dst = pch->fifo_dma; + desc->rqcfg.src_brst_size = burst_size; + desc->rqcfg.src_brst_len = burst_len; + desc->rqcfg.dst_brst_size = pch->burst_sz; + desc->rqcfg.dst_brst_len = pch->burst_len; break; case DMA_DEV_TO_MEM: desc->rqcfg.src_inc = 0; desc->rqcfg.dst_inc = 1; src = pch->fifo_dma; dst = dma_addr; + desc->rqcfg.src_brst_size = pch->burst_sz; + desc->rqcfg.src_brst_len = pch->burst_len; + desc->rqcfg.dst_brst_size = burst_size; + desc->rqcfg.dst_brst_len = burst_len; break; default: break; } desc->rqtype = direction; - desc->rqcfg.src_brst_size = pch->burst_sz; - desc->rqcfg.src_brst_len = pch->burst_len; - desc->rqcfg.dst_brst_size = pch->burst_sz; - desc->rqcfg.dst_brst_len = pch->burst_len; desc->bytes_requested = period_len; fill_px(&desc->px, dst, src, period_len); @@ -2850,7 +2912,11 @@ pl330_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl, { struct dma_pl330_desc *first, *desc = NULL; struct dma_pl330_chan *pch = to_pchan(chan); + unsigned int burst_size, burst_len; + struct pl330_dmac *pl330; struct scatterlist *sg; + dma_addr_t mem_addr; + size_t len; int i; if (unlikely(!pch || !sgl || !sg_len)) @@ -2862,13 +2928,12 @@ pl330_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl, return NULL; first = NULL; + pl330 = pch->dmac; for_each_sg(sgl, sg, sg_len, i) { desc = pl330_get_desc(pch); if (!desc) { - struct pl330_dmac *pl330 = pch->dmac; - dev_err(pch->dmac->ddma.dev, "%s:%d Unable to fetch desc\n", __func__, __LINE__); @@ -2882,29 +2947,37 @@ pl330_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl, else list_add_tail(&desc->node, &first->node); + mem_addr = sg_dma_address(sg); + len = sg_dma_len(sg); + + burst_size = get_periph_mem_brst_sz(mem_addr, len, pch, pl330->quirks); + burst_len = get_periph_mem_brst_len(desc, pch, burst_size, pl330->quirks); + switch (direction) { case DMA_MEM_TO_DEV: desc->rqcfg.src_inc = 1; desc->rqcfg.dst_inc = 0; - fill_px(&desc->px, pch->fifo_dma, sg_dma_address(sg), - sg_dma_len(sg)); + desc->rqcfg.src_brst_size = burst_size; + desc->rqcfg.src_brst_len = burst_len; + desc->rqcfg.dst_brst_size = pch->burst_sz; + desc->rqcfg.dst_brst_len = pch->burst_len; + fill_px(&desc->px, pch->fifo_dma, mem_addr, len); break; case DMA_DEV_TO_MEM: desc->rqcfg.src_inc = 0; desc->rqcfg.dst_inc = 1; - fill_px(&desc->px, sg_dma_address(sg), pch->fifo_dma, - sg_dma_len(sg)); + desc->rqcfg.src_brst_size = pch->burst_sz; + desc->rqcfg.src_brst_len = pch->burst_len; + desc->rqcfg.dst_brst_size = burst_size; + desc->rqcfg.dst_brst_len = burst_len; + fill_px(&desc->px, mem_addr, pch->fifo_dma, len); break; default: break; } - desc->rqcfg.src_brst_size = pch->burst_sz; - desc->rqcfg.src_brst_len = pch->burst_len; - desc->rqcfg.dst_brst_size = pch->burst_sz; - desc->rqcfg.dst_brst_len = pch->burst_len; desc->rqtype = direction; - desc->bytes_requested = sg_dma_len(sg); + desc->bytes_requested = len; } /* Return the last desc in the chain */ From patchwork Thu May 4 14:57:37 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joy Chakraborty X-Patchwork-Id: 679201 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F25F6C7EE26 for ; Thu, 4 May 2023 14:59:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231128AbjEDO7c (ORCPT ); Thu, 4 May 2023 10:59:32 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52448 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230350AbjEDO7H (ORCPT ); Thu, 4 May 2023 10:59:07 -0400 Received: from mail-yb1-xb49.google.com (mail-yb1-xb49.google.com [IPv6:2607:f8b0:4864:20::b49]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 456243AA7 for ; Thu, 4 May 2023 07:58:46 -0700 (PDT) Received: by mail-yb1-xb49.google.com with SMTP id 3f1490d57ef6-b9a7c58ec19so756576276.2 for ; Thu, 04 May 2023 07:58:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20221208; t=1683212314; x=1685804314; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:from:to:cc:subject:date:message-id:reply-to; bh=h8IvnB7h0HAb5+pIi9GxWOAfPdgUl4BJHVh6FYr/ed4=; b=kuPcLL3YoUQz+usR6xPzkJy7Qzr+xCOBwv6dT38Ejb2rkKMHl6Kndt9vgn2RH4iitP GJzORCEA21O3g7/+GS33g9uei5QHrpLimIHK6fsQUacmH2Ffj7SjKmI206Xa7q3FfAQi y0KxVKkNxuqVL/Y5uOl7Vn77LsMWYTuLC9BGNUjEoBMOCy3RNHDuPInha6yTRnHysOvv 87lKZJwjKlaTS/8g3dW2kRdfZ59pgJYwl/S5nwAj4svodlkgx0dFw2640Q/nGRWC7fPl qDXmBQWzRWA9JPZf/U42JKCVkiRpstLjCijuixLhhfkoz85C07G08kXg+HuqmmsDwhzu hgkQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1683212314; x=1685804314; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=h8IvnB7h0HAb5+pIi9GxWOAfPdgUl4BJHVh6FYr/ed4=; b=PhJJ3H2LF18xxZ9cej66L40L4tvwVPgZk2dyC4HHYsKG9wPGq6aFmegKj/+bNOmFdn Qtd008weeHxxVKyp6KlemixouiOiScA+JhH2z1URUHovK1fUTuPzNGim3DdtXMwwf3Kz QiZ53ky0LEu4DGjXx/Wv5scnjw5HAnwimvC7++Ef31Lfwgr0BrJTKPYPK7aSDAkMoFp3 +EAi4YDYDO6tNvJThxh/HJoBV/3bPm27LhNXAGI2CkMgSMhGcquMi8faogtj95Ih9dim DHlE6afMqlrUAM5aTsrksEd8+AXtZu3ak4mSzGYHO2oU3IcxOJcbN03Tlz6JZeVp6vor LbUA== X-Gm-Message-State: AC+VfDzCrp/1pwTDcEMvn/T808+kHMF7F/2U7J7aQvheR4pdyTMrxjZx eFtKPDYuuZ2Z4eV4j5SwvRbvxd3ppf/Jdg== X-Google-Smtp-Source: ACHHUZ6iw4g9UiLmwSI+Th1Vi+OjDYXsXi9WmxXGjir0X1Fu8w/cioZXKeCSGJecPFY3tcD4sPqcliqCieMm+Q== X-Received: from joychakr.c.googlers.com ([fda3:e722:ac3:cc00:4f:4b78:c0a8:6ea]) (user=joychakr job=sendgmr) by 2002:a05:6902:c2:b0:b96:7676:db4a with SMTP id i2-20020a05690200c200b00b967676db4amr152609ybs.0.1683212314520; Thu, 04 May 2023 07:58:34 -0700 (PDT) Date: Thu, 4 May 2023 14:57:37 +0000 In-Reply-To: <20230504145737.286444-1-joychakr@google.com> Mime-Version: 1.0 References: <20230504145737.286444-1-joychakr@google.com> X-Mailer: git-send-email 2.40.1.495.gc816e09b53d-goog Message-ID: <20230504145737.286444-8-joychakr@google.com> Subject: [PATCH 7/7] dt-bindings: dmaengine: pl330: Add new quirks From: Joy Chakraborty To: Vinod Koul , Rob Herring , Krzysztof Kozlowski Cc: dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, manugautam@google.com, danielmentz@google.com, sjadavani@google.com, Joy Chakraborty Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add 2 new quirks added to the driver "arm,pl330-optimize-dev2mem-axsize" and "arm,pl330-periph-single-dregs" Signed-off-by: Joy Chakraborty --- Documentation/devicetree/bindings/dma/arm,pl330.yaml | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/Documentation/devicetree/bindings/dma/arm,pl330.yaml b/Documentation/devicetree/bindings/dma/arm,pl330.yaml index 4a3dd6f5309b..0499a7fba88d 100644 --- a/Documentation/devicetree/bindings/dma/arm,pl330.yaml +++ b/Documentation/devicetree/bindings/dma/arm,pl330.yaml @@ -53,6 +53,14 @@ properties: type: boolean description: quirk for performing burst transfer only + arm,pl330-optimize-dev2mem-axsize: + type: boolean + description: quirk for optimizing AxSize used between dev<->mem + + arm,pl330-periph-single-dregs: + type: boolean + description: quirk for using dma-singles for peripherals in _dregs() + dma-coherent: true iommus: