From patchwork Mon May 8 21:28:48 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: dinh.nguyen@linux.intel.com X-Patchwork-Id: 679981 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C6B79C7EE25 for ; Mon, 8 May 2023 21:40:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232904AbjEHVkO (ORCPT ); Mon, 8 May 2023 17:40:14 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51252 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233419AbjEHVkG (ORCPT ); Mon, 8 May 2023 17:40:06 -0400 Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EF5C37ED8; Mon, 8 May 2023 14:39:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1683581985; x=1715117985; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=c0yLqjAEo06WoNbwU3eOWjPeohGtA8deoJ8duhdEEos=; b=C5OtaWG/3yTsLwa8BzPBWaEf6F+q+MXjigwbmzYqerBvXN8aRDGJjcDu H9HyiFNYttm2plzutroYD7mfCR3XxodTR/ayrUTaWpXyObwJvkvj1nlXS VAy3Grrgh6l/raW4LDB7tQSHqX037UScxyvKVF2VNqrzuvtlsrz4XuKMA YBV4kgONfOZiFkQSXhG8oFL0lONTtGrQKdo3SrBrk6lCOGo2jsdqoxzS/ /GmueKfM1i3g+fbpwFHd6Uu1eFoQEUoCri68Fc6tSVPAgnLUCc2AtFX4C tWA0XIAHUGlTBs/sIKAmTQCqcRaD9JunJ+SwhlMZxdinfaoOCzJmjFvnq g==; X-IronPort-AV: E=McAfee;i="6600,9927,10704"; a="349796681" X-IronPort-AV: E=Sophos;i="5.99,259,1677571200"; d="scan'208";a="349796681" Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 May 2023 14:38:57 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10704"; a="945018713" X-IronPort-AV: E=Sophos;i="5.99,259,1677571200"; d="scan'208";a="945018713" Received: from linux-builds1.an.intel.com ([10.122.105.32]) by fmsmga006-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 May 2023 14:38:56 -0700 From: dinh.nguyen@linux.intel.com To: linux-hwmon@vger.kernel.org Cc: dinguyen@kernel.org, devicetree@vger.kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-kernel@vger.kernel.org, jdelvare@suse.com, linux@roeck-us.net, Dinh Nguyen Subject: [PATCHv2 2/6] firmware: stratix10-svc: add method for reading voltage and temperature Date: Mon, 8 May 2023 16:28:48 -0500 Message-Id: <20230508212852.8413-2-dinh.nguyen@linux.intel.com> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230508212852.8413-1-dinh.nguyen@linux.intel.com> References: <20230508212852.8413-1-dinh.nguyen@linux.intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Dinh Nguyen Add support for the hardware monitor driver to use the service driver the ability to read voltage and temperature from the SDM. Signed-off-by: Dinh Nguyen --- drivers/firmware/stratix10-svc.c | 18 +++++++++- include/linux/firmware/intel/stratix10-smc.h | 34 +++++++++++++++++++ .../firmware/intel/stratix10-svc-client.h | 6 ++++ 3 files changed, 57 insertions(+), 1 deletion(-) diff --git a/drivers/firmware/stratix10-svc.c b/drivers/firmware/stratix10-svc.c index bde1f543f529..cc1b8b441c37 100644 --- a/drivers/firmware/stratix10-svc.c +++ b/drivers/firmware/stratix10-svc.c @@ -340,6 +340,8 @@ static void svc_thread_recv_status_ok(struct stratix10_svc_data *p_data, case COMMAND_RSU_MAX_RETRY: case COMMAND_RSU_DCMF_STATUS: case COMMAND_FIRMWARE_VERSION: + case COMMAND_HWMON_READTEMP: + case COMMAND_HWMON_READVOLT: cb_data->status = BIT(SVC_STATUS_OK); cb_data->kaddr1 = &res.a1; break; @@ -517,7 +519,17 @@ static int svc_normal_to_secure_thread(void *data) a1 = (unsigned long)pdata->paddr; a2 = 0; break; - + /* for HWMON */ + case COMMAND_HWMON_READTEMP: + a0 = INTEL_SIP_SMC_HWMON_READTEMP; + a1 = pdata->arg[0]; + a2 = 0; + break; + case COMMAND_HWMON_READVOLT: + a0 = INTEL_SIP_SMC_HWMON_READVOLT; + a1 = pdata->arg[0]; + a2 = 0; + break; /* for polling */ case COMMAND_POLL_SERVICE_STATUS: a0 = INTEL_SIP_SMC_SERVICE_COMPLETED; @@ -1182,6 +1194,10 @@ static int stratix10_svc_drv_probe(struct platform_device *pdev) chans[2].name = SVC_CLIENT_FCS; spin_lock_init(&chans[2].lock); + chans[3].ctrl = controller; + chans[3].name = SVC_CLIENT_HWMON; + spin_lock_init(&chans[3].lock); + list_add_tail(&controller->node, &svc_ctrl); platform_set_drvdata(pdev, controller); diff --git a/include/linux/firmware/intel/stratix10-smc.h b/include/linux/firmware/intel/stratix10-smc.h index a718f853d457..b944ec4b2b2f 100644 --- a/include/linux/firmware/intel/stratix10-smc.h +++ b/include/linux/firmware/intel/stratix10-smc.h @@ -595,4 +595,38 @@ INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_COMPLETED_WRITE) #define INTEL_SIP_SMC_FCS_GET_PROVISION_DATA \ INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FCS_GET_PROVISION_DATA) +/** + * Request INTEL_SIP_SMC_HWMON_READTEMP + * Sync call to request temperature + * + * Call register usage: + * a0 Temperature Channel + * a1-a7 not used + * + * Return status + * a0 INTEL_SIP_SMC_STATUS_OK + * a1 Temperature Value + * a2-a3 not used + */ +#define INTEL_SIP_SMC_FUNCID_HWMON_READTEMP 32 +#define INTEL_SIP_SMC_HWMON_READTEMP \ + INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_HWMON_READTEMP) + +/** + * Request INTEL_SIP_SMC_HWMON_READVOLT + * Sync call to request voltage + * + * Call register usage: + * a0 Voltage Channel + * a1-a7 not used + * + * Return status + * a0 INTEL_SIP_SMC_STATUS_OK + * a1 Voltage Value + * a2-a3 not used + */ +#define INTEL_SIP_SMC_FUNCID_HWMON_READVOLT 33 +#define INTEL_SIP_SMC_HWMON_READVOLT \ + INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_HWMON_READVOLT) + #endif diff --git a/include/linux/firmware/intel/stratix10-svc-client.h b/include/linux/firmware/intel/stratix10-svc-client.h index 0c16037fd08d..343970dcc2d2 100644 --- a/include/linux/firmware/intel/stratix10-svc-client.h +++ b/include/linux/firmware/intel/stratix10-svc-client.h @@ -11,10 +11,12 @@ * * fpga: for FPGA configuration * rsu: for remote status update + * hwmon: for hardware monitoring (voltage and temperature) */ #define SVC_CLIENT_FPGA "fpga" #define SVC_CLIENT_RSU "rsu" #define SVC_CLIENT_FCS "fcs" +#define SVC_CLIENT_HWMON "hwmon" /* * Status of the sent command, in bit number @@ -70,6 +72,7 @@ #define SVC_RSU_REQUEST_TIMEOUT_MS 300 #define SVC_FCS_REQUEST_TIMEOUT_MS 2000 #define SVC_COMPLETED_TIMEOUT_MS 30000 +#define SVC_HWMON_REQUEST_TIMEOUT_MS 300 struct stratix10_svc_chan; @@ -164,6 +167,9 @@ enum stratix10_svc_command_code { COMMAND_FCS_RANDOM_NUMBER_GEN, /* for general status poll */ COMMAND_POLL_SERVICE_STATUS = 40, + /* for HWMON */ + COMMAND_HWMON_READTEMP, + COMMAND_HWMON_READVOLT, /* Non-mailbox SMC Call */ COMMAND_SMC_SVC_VERSION = 200, }; From patchwork Mon May 8 21:28:50 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: dinh.nguyen@linux.intel.com X-Patchwork-Id: 679980 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DD928C7EE26 for ; Mon, 8 May 2023 21:40:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230101AbjEHVkf (ORCPT ); Mon, 8 May 2023 17:40:35 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51270 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230129AbjEHVk2 (ORCPT ); Mon, 8 May 2023 17:40:28 -0400 Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C4653138; Mon, 8 May 2023 14:40:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1683582006; x=1715118006; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=FGV+fdCgw3aBzLM/prNQt4Br3a3O7eyOg7GihjhTucw=; b=GkxsYOMo4McDLCDLjLFy4KwC8C99zeHVfBPnVmVN6y5nHsuSD9Txwn28 qqAmodQIrnASjT1lccWBSid/q+8vG1IdGIBWuaGhvuAaWAcMrVTyJWqCX qGeuzusoeFDzXS6DQumxT73hyB93gf6IvJgXCv2yAgIcjCBo/KzDUQPn+ UenolnCtMw8gokp4fBAvOo2Ob9bmvJXF/jgOLA8nhZOx0vnmckwRQL0Bw qpBPHs+AJCCSqtYg8F2PJv4vIOlQ07Tou05TZ3Ba3ULLXU7eIuK3DryVV DzJgdjBz8563aFxZLZEUQJT5GtwKZ81FYAQZ5WvJHFqYaKr8ozY52jZ6k g==; X-IronPort-AV: E=McAfee;i="6600,9927,10704"; a="349796692" X-IronPort-AV: E=Sophos;i="5.99,259,1677571200"; d="scan'208";a="349796692" Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 May 2023 14:38:59 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10704"; a="945018721" X-IronPort-AV: E=Sophos;i="5.99,259,1677571200"; d="scan'208";a="945018721" Received: from linux-builds1.an.intel.com ([10.122.105.32]) by fmsmga006-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 May 2023 14:38:59 -0700 From: dinh.nguyen@linux.intel.com To: linux-hwmon@vger.kernel.org Cc: dinguyen@kernel.org, devicetree@vger.kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-kernel@vger.kernel.org, jdelvare@suse.com, linux@roeck-us.net, Dinh Nguyen Subject: [PATCHv2 4/6] MAINTAINERS: add Dinh Nguyen for socfpga-hwmon driver Date: Mon, 8 May 2023 16:28:50 -0500 Message-Id: <20230508212852.8413-4-dinh.nguyen@linux.intel.com> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230508212852.8413-1-dinh.nguyen@linux.intel.com> References: <20230508212852.8413-1-dinh.nguyen@linux.intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Dinh Nguyen Add Dinh Nguyen as the maintainer for the SoCFPGA hardware monitor driver. Signed-off-by: Dinh Nguyen --- MAINTAINERS | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 8d5bc223f305..064f9db7ffe1 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2781,6 +2781,12 @@ M: Dinh Nguyen S: Maintained F: drivers/edac/altera_edac.[ch] +ARM/SOCFPGA HARDWARE MONITOR +M: Dinh Nguyen +S: Maintained +F: drivers/hwmon/socfpga-hwmon.c +F: Documentation/devicetree/bindings/hwmon/intel,socfpga-hwmon.yaml + ARM/SPREADTRUM SoC SUPPORT M: Orson Zhai M: Baolin Wang From patchwork Mon May 8 21:28:52 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: dinh.nguyen@linux.intel.com X-Patchwork-Id: 679979 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6022DC7EE22 for ; Mon, 8 May 2023 21:41:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233912AbjEHVlC (ORCPT ); Mon, 8 May 2023 17:41:02 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52470 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234369AbjEHVkn (ORCPT ); Mon, 8 May 2023 17:40:43 -0400 Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 000EE93CB; Mon, 8 May 2023 14:40:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1683582021; x=1715118021; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=hKHsoNGSMMtx6Q9tcu30hatw3LMK0bAjnC3I6pBAw90=; b=kh1TJajYrqqOrsY/bqIBp3yTXEf0fsUSIt2lfh+DsIX5x3IUurUCE0kp OAVgiq7YbAG0+CnNHLSoZSFgswLBlFEdFiEZ+A3Zcqx8VD9FAKDxUgdaY TI6ijfhDu9f/Gnaatzhl/IWfZW2nPYJP/tcJlY8ujAtXvj5FyHGjCHS2Y +jPZAHaOcNKLlrZax/3Cydrrdjse21jhT7Ey8w4QLKsoXLwD+IgmW9js5 i3Sg68mkvlKhY3Zxg9s+aBwN9lpMxXGatVP7O0/qy4b93uq2vrq/cMcgZ GSL8indkKrfNy8Eo6nzTl49r6dj2EzjuPkqTOQJ7/xvaAjnKk0ztxtDmW Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10704"; a="349796708" X-IronPort-AV: E=Sophos;i="5.99,259,1677571200"; d="scan'208";a="349796708" Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 May 2023 14:39:04 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10704"; a="945018727" X-IronPort-AV: E=Sophos;i="5.99,259,1677571200"; d="scan'208";a="945018727" Received: from linux-builds1.an.intel.com ([10.122.105.32]) by fmsmga006-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 May 2023 14:39:00 -0700 From: dinh.nguyen@linux.intel.com To: linux-hwmon@vger.kernel.org Cc: dinguyen@kernel.org, devicetree@vger.kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-kernel@vger.kernel.org, jdelvare@suse.com, linux@roeck-us.net, Dinh Nguyen Subject: [PATCHv2 6/6] arm64: dts: socfpga: add hwmon properties Date: Mon, 8 May 2023 16:28:52 -0500 Message-Id: <20230508212852.8413-6-dinh.nguyen@linux.intel.com> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230508212852.8413-1-dinh.nguyen@linux.intel.com> References: <20230508212852.8413-1-dinh.nguyen@linux.intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Dinh Nguyen Add the hardware monitoring properties for Stratix10 and Agilex. Signed-off-by: Dinh Nguyen --- v2: add platform specific platforms to DTS files --- .../boot/dts/altera/socfpga_stratix10.dtsi | 4 ++ .../dts/altera/socfpga_stratix10_socdk.dts | 31 +++++++++ arch/arm64/boot/dts/intel/socfpga_agilex.dtsi | 4 ++ .../boot/dts/intel/socfpga_agilex_n6000.dts | 66 +++++++++++++++++++ .../boot/dts/intel/socfpga_agilex_socdk.dts | 66 +++++++++++++++++++ .../dts/intel/socfpga_agilex_socdk_nand.dts | 66 +++++++++++++++++++ .../boot/dts/intel/socfpga_n5x_socdk.dts | 47 +++++++++++++ 7 files changed, 284 insertions(+) diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi index 41c9eb51d0ee..2526afa687d6 100644 --- a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi +++ b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi @@ -633,6 +633,10 @@ svc { fpga_mgr: fpga-mgr { compatible = "intel,stratix10-soc-fpga-mgr"; }; + + hwmon: temp-volt { + compatible = "intel,socfpga-stratix10-hwmon", "intel,socfpga-hwmon"; + }; }; }; }; diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts b/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts index 38ae674f2f02..d506dcf8dc7c 100644 --- a/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts +++ b/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts @@ -212,3 +212,34 @@ qspi_rootfs: partition@3FE0000 { }; }; }; + +&hwmon { + voltage { + #address-cells = <1>; + #size-cells = <0>; + input@2 { + label = "0.8V VCC"; + reg = <2>; + }; + + input@3 { + label = "1.0V VCCIO"; + reg = <3>; + }; + + input@6 { + label = "0.9V VCCERAM"; + reg = <6>; + }; + }; + + temperature { + #address-cells = <1>; + #size-cells = <0>; + + input@0 { + label = "Main Die SDM"; + reg = <0x0>; + }; + }; +}; diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi index f9674cc46764..552f9a05d039 100644 --- a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi +++ b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi @@ -666,6 +666,10 @@ svc { fpga_mgr: fpga-mgr { compatible = "intel,agilex-soc-fpga-mgr"; }; + + hwmon: temp-volt { + compatible = "intel,socfpga-agilex-hwmon", "intel,socfpga-hwmon"; + }; }; }; }; diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex_n6000.dts b/arch/arm64/boot/dts/intel/socfpga_agilex_n6000.dts index 6231a69204b1..c0642353b506 100644 --- a/arch/arm64/boot/dts/intel/socfpga_agilex_n6000.dts +++ b/arch/arm64/boot/dts/intel/socfpga_agilex_n6000.dts @@ -64,3 +64,69 @@ &watchdog0 { &fpga_mgr { status = "disabled"; }; + +&hwmon { + voltage { + #address-cells = <1>; + #size-cells = <0>; + input@2 { + label = "0.8V VCC"; + reg = <2>; + }; + + input@3 { + label = "1.8V VCCIO_SDM"; + reg = <3>; + }; + + input@4 { + label = "1.8V VCCPT"; + reg = <4>; + }; + + input@5 { + label = "1.2V VCCCRCORE"; + reg = <5>; + }; + + input@6 { + label = "0.9V VCCH"; + reg = <6>; + }; + + input@7 { + label = "0.8V VCCL"; + reg = <7>; + }; + }; + + temperature { + #address-cells = <1>; + #size-cells = <0>; + + input@0 { + label = "Main Die SDM"; + reg = <0x0>; + }; + + input@10000 { + label = "Main Die corner bottom left max"; + reg = <0x10000>; + }; + + input@20000 { + label = "Main Die corner top left max"; + reg = <0x20000>; + }; + + input@30000 { + label = "Main Die corner bottom right max"; + reg = <0x30000>; + }; + + input@40000 { + label = "Main Die corner top right max"; + reg = <0x40000>; + }; + }; +}; diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts b/arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts index 07c3f8876613..4bd8cdd8a7ca 100644 --- a/arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts +++ b/arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts @@ -138,3 +138,69 @@ qspi_rootfs: partition@3FE0000 { }; }; }; + +&hwmon { + voltage { + #address-cells = <1>; + #size-cells = <0>; + input@2 { + label = "0.8V VCC"; + reg = <2>; + }; + + input@3 { + label = "1.8V VCCIO_SDM"; + reg = <3>; + }; + + input@4 { + label = "1.8V VCCPT"; + reg = <4>; + }; + + input@5 { + label = "1.2V VCCCRCORE"; + reg = <5>; + }; + + input@6 { + label = "0.9V VCCH"; + reg = <6>; + }; + + input@7 { + label = "0.8V VCCL"; + reg = <7>; + }; + }; + + temperature { + #address-cells = <1>; + #size-cells = <0>; + + input@0 { + label = "Main Die SDM"; + reg = <0x0>; + }; + + input@10000 { + label = "Main Die corner bottom left max"; + reg = <0x10000>; + }; + + input@20000 { + label = "Main Die corner top left max"; + reg = <0x20000>; + }; + + input@30000 { + label = "Main Die corner bottom right max"; + reg = <0x30000>; + }; + + input@40000 { + label = "Main Die corner top right max"; + reg = <0x40000>; + }; + }; +}; diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex_socdk_nand.dts b/arch/arm64/boot/dts/intel/socfpga_agilex_socdk_nand.dts index 51f83f96ec65..bfee1ca0bd6e 100644 --- a/arch/arm64/boot/dts/intel/socfpga_agilex_socdk_nand.dts +++ b/arch/arm64/boot/dts/intel/socfpga_agilex_socdk_nand.dts @@ -114,3 +114,69 @@ &usb0 { &watchdog0 { status = "okay"; }; + +&hwmon { + voltage { + #address-cells = <1>; + #size-cells = <0>; + input@2 { + label = "0.8V VCC"; + reg = <2>; + }; + + input@3 { + label = "1.8V VCCIO_SDM"; + reg = <3>; + }; + + input@4 { + label = "1.8V VCCPT"; + reg = <4>; + }; + + input@5 { + label = "1.2V VCCCRCORE"; + reg = <5>; + }; + + input@6 { + label = "0.9V VCCH"; + reg = <6>; + }; + + input@7 { + label = "0.8V VCCL"; + reg = <7>; + }; + }; + + temperature { + #address-cells = <1>; + #size-cells = <0>; + + input@0 { + label = "Main Die SDM"; + reg = <0x0>; + }; + + input@10000 { + label = "Main Die corner bottom left max"; + reg = <0x10000>; + }; + + input@20000 { + label = "Main Die corner top left max"; + reg = <0x20000>; + }; + + input@30000 { + label = "Main Die corner bottom right max"; + reg = <0x30000>; + }; + + input@40000 { + label = "Main Die corner top right max"; + reg = <0x40000>; + }; + }; +}; diff --git a/arch/arm64/boot/dts/intel/socfpga_n5x_socdk.dts b/arch/arm64/boot/dts/intel/socfpga_n5x_socdk.dts index 08c088571270..090b0382db98 100644 --- a/arch/arm64/boot/dts/intel/socfpga_n5x_socdk.dts +++ b/arch/arm64/boot/dts/intel/socfpga_n5x_socdk.dts @@ -129,3 +129,50 @@ &usb0 { &watchdog0 { status = "okay"; }; + +&hwmon { + compatible = "intel,socfpga-n5x-hwmon", "intel,socfpga-hwmon"; + voltage { + #address-cells = <1>; + #size-cells = <0>; + input@2 { + label = "0.8V VDD"; + reg = <2>; + }; + + input@3 { + label = "0.8V VDD_SDM"; + reg = <3>; + }; + + input@4 { + label = "1.8V VCCADC"; + reg = <4>; + }; + + input@5 { + label = "1.8V VCCPD"; + reg = <5>; + }; + + input@6 { + label = "1.8V VCCIO_SDM"; + reg = <6>; + }; + + input@7 { + label = "0.8V VDD_HPS"; + reg = <7>; + }; + }; + + temperature { + #address-cells = <1>; + #size-cells = <0>; + + input@0 { + label = "Main Die SDM"; + reg = <0x0>; + }; + }; +};