From patchwork Fri Jun 7 09:52:36 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cornelia Huck X-Patchwork-Id: 166144 Delivered-To: patch@linaro.org Received: by 2002:a92:9e1a:0:0:0:0:0 with SMTP id q26csp490654ili; Fri, 7 Jun 2019 04:08:35 -0700 (PDT) X-Google-Smtp-Source: APXvYqwvyyRDdMQaMOtkm6VvvcjSxlwY4cMZF6cLWh5LZ0nOYqqfoe5Lg2OTs7XMpUlFmcL3plhV X-Received: by 2002:ac8:1af4:: with SMTP id h49mr37216827qtk.183.1559905715663; Fri, 07 Jun 2019 04:08:35 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1559905715; cv=none; d=google.com; s=arc-20160816; b=b6TtVhCER6b7DocXTwdX2/64CC5nUywa79Fn0+PvvsJ2k0vk/vZ+NQ84JIx2WhASD2 WVN9jf72eLumxDrJisdd5HoAfjAS+lHD9pQfgFvjqxm+DR41QtT8vhAeP4OK2qHuPTUy kOyX1MBgbs4XPlCGY7MawGmHU9U/vmFJzKOX1KrOaKwbtlI3lFsiFYn70JKFaCjPUzOB ROEZlrxcMn2TOyH9n+ys0X+8LPUwWAB9/oDQ0agcJHJt5sWc5bKIC96U78FyWvRfmQw4 d6NoZqSHDBDOW3mMmu/YkBfTX4326SHKpQ8h6hum0aTt/xH6trJgEUaFhoBm1K7IUzqM tyGQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:to:from; bh=BGmopcK3G6gShR/lDwNmyoM3Hd1/wGo6df7lzN+RisQ=; b=oQbdhISzpTTol53VvjbJf/eulCdBUPKWx/qo3MrCa+omk1EEBQGLF93IjBFq3QZq6Z u1nqy+10zhn2VOE7pKKHR21L9FQiq6+ch35LliPIAABt6QBQFojQ8um+ekjSI7Ay+xQx pJUeE49q5dRiuZclNsv6nZoO2OUmzzS3YUXJb3ajPFWeFxBJutRdExFKCGk+IpO0Z8dG eOB6tSJn1z0lvbgSDT0T54W56ZqmYBj+4bEGFNl29C4CA0wbDYv1fDy4Z+PNxh+gpnP4 sKTjTx0TmlFsuj9qDEtbZBYzR0ppt5m+U6EtaY5wFQ1akvJgZLwE9g0IePvA25s+s/kf GSxA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.47 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.47]) by mx.google.com with ESMTPS id o48si979535qvc.68.2019.06.07.04.08.35 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 07 Jun 2019 04:08:35 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.47 as permitted sender) client-ip=209.51.188.47; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.47 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=redhat.com Received: from localhost ([::1]:48440 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hZCjb-0006B4-84 for patch@linaro.org; Fri, 07 Jun 2019 07:08:35 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:55821) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hZBaG-0003cN-2E for qemu-devel@nongnu.org; Fri, 07 Jun 2019 05:54:53 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hZBa9-0003z2-LA for qemu-devel@nongnu.org; Fri, 07 Jun 2019 05:54:49 -0400 Received: from mx1.redhat.com ([209.132.183.28]:59330) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hZBa2-0003l2-2q; Fri, 07 Jun 2019 05:54:41 -0400 Received: from smtp.corp.redhat.com (int-mx02.intmail.prod.int.phx2.redhat.com [10.5.11.12]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id BFADF5F793; Fri, 7 Jun 2019 09:54:34 +0000 (UTC) Received: from localhost (dhcp-192-191.str.redhat.com [10.33.192.191]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 5677E8187D; Fri, 7 Jun 2019 09:54:32 +0000 (UTC) From: Cornelia Huck To: Peter Maydell Date: Fri, 7 Jun 2019 11:52:36 +0200 Message-Id: <20190607095237.11364-35-cohuck@redhat.com> In-Reply-To: <20190607095237.11364-1-cohuck@redhat.com> References: <20190607095237.11364-1-cohuck@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.12 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.39]); Fri, 07 Jun 2019 09:54:34 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PULL 34/35] s390x/tcg: Use tcg_gen_gvec_bitsel for VECTOR SELECT X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, Richard Henderson , qemu-devel@nongnu.org, David Hildenbrand Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson This replaces the target-specific implementations for VSEL. Signed-off-by: Richard Henderson Signed-off-by: David Hildenbrand --- target/s390x/translate_vx.inc.c | 38 ++++++--------------------------- 1 file changed, 6 insertions(+), 32 deletions(-) -- 2.20.1 diff --git a/target/s390x/translate_vx.inc.c b/target/s390x/translate_vx.inc.c index 69c675e41187..7b1d31cba5cf 100644 --- a/target/s390x/translate_vx.inc.c +++ b/target/s390x/translate_vx.inc.c @@ -245,6 +245,9 @@ static void get_vec_element_ptr_i64(TCGv_ptr ptr, uint8_t reg, TCGv_i64 enr, #define gen_gvec_fn_3(fn, es, v1, v2, v3) \ tcg_gen_gvec_##fn(es, vec_full_reg_offset(v1), vec_full_reg_offset(v2), \ vec_full_reg_offset(v3), 16, 16) +#define gen_gvec_fn_4(fn, es, v1, v2, v3, v4) \ + tcg_gen_gvec_##fn(es, vec_full_reg_offset(v1), vec_full_reg_offset(v2), \ + vec_full_reg_offset(v3), vec_full_reg_offset(v4), 16, 16) /* * Helper to carry out a 128 bit vector computation using 2 i64 values per @@ -915,40 +918,11 @@ static DisasJumpType op_vsce(DisasContext *s, DisasOps *o) return DISAS_NEXT; } -static void gen_sel_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b, TCGv_i64 c) -{ - TCGv_i64 t = tcg_temp_new_i64(); - - /* bit in c not set -> copy bit from b */ - tcg_gen_andc_i64(t, b, c); - /* bit in c set -> copy bit from a */ - tcg_gen_and_i64(d, a, c); - /* merge the results */ - tcg_gen_or_i64(d, d, t); - tcg_temp_free_i64(t); -} - -static void gen_sel_vec(unsigned vece, TCGv_vec d, TCGv_vec a, TCGv_vec b, - TCGv_vec c) -{ - TCGv_vec t = tcg_temp_new_vec_matching(d); - - tcg_gen_andc_vec(vece, t, b, c); - tcg_gen_and_vec(vece, d, a, c); - tcg_gen_or_vec(vece, d, d, t); - tcg_temp_free_vec(t); -} - static DisasJumpType op_vsel(DisasContext *s, DisasOps *o) { - static const GVecGen4 gvec_op = { - .fni8 = gen_sel_i64, - .fniv = gen_sel_vec, - .prefer_i64 = TCG_TARGET_REG_BITS == 64, - }; - - gen_gvec_4(get_field(s->fields, v1), get_field(s->fields, v2), - get_field(s->fields, v3), get_field(s->fields, v4), &gvec_op); + gen_gvec_fn_4(bitsel, ES_8, get_field(s->fields, v1), + get_field(s->fields, v4), get_field(s->fields, v2), + get_field(s->fields, v3)); return DISAS_NEXT; }