From patchwork Mon May 15 19:13:18 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Davis X-Patchwork-Id: 683714 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 00176C7EE24 for ; Mon, 15 May 2023 19:14:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244779AbjEOTOE (ORCPT ); Mon, 15 May 2023 15:14:04 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57696 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243499AbjEOTN5 (ORCPT ); Mon, 15 May 2023 15:13:57 -0400 Received: from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C7E2B15EE9; Mon, 15 May 2023 12:13:48 -0700 (PDT) Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 34FJDTNg044477; Mon, 15 May 2023 14:13:29 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1684178009; bh=N8wZAUOz9p7nMkG96hQaSMPHIVuT06B8CLDSE+c1oFA=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=Bsr/wMcGRNt9kOhQlvYdIN9IDpaP1Q4l75qUm/kMQuB2Yy1aaQnJEH6lSgw3IuhLq kHLEOxNjsfoA0AGHthzk3mhMOs6bHcgk7ICuSxPPPDidhtFmopnxzNnSojYoMY5Zwc BEIcUDKoKVPbydUfYEkm7FwE6jtYJQ7szqRNFri8= Received: from DFLE115.ent.ti.com (dfle115.ent.ti.com [10.64.6.36]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 34FJDTTs017693 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 15 May 2023 14:13:29 -0500 Received: from DFLE103.ent.ti.com (10.64.6.24) by DFLE115.ent.ti.com (10.64.6.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Mon, 15 May 2023 14:13:29 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DFLE103.ent.ti.com (10.64.6.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Mon, 15 May 2023 14:13:29 -0500 Received: from lelv0327.itg.ti.com (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 34FJDSK5005699; Mon, 15 May 2023 14:13:28 -0500 From: Andrew Davis To: Lee Jones , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Linus Walleij , Geert Uytterhoeven , Daniel Tang , Fabian Vogt CC: , , , Andrew Davis Subject: [PATCH v7 1/9] ARM: dts: nspire: Use syscon-reboot to handle restart Date: Mon, 15 May 2023 14:13:18 -0500 Message-ID: <20230515191326.608638-2-afd@ti.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230515191326.608638-1-afd@ti.com> References: <20230515191326.608638-1-afd@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Writing this bit can be handled by the syscon-reboot driver. Add this node to DT. Signed-off-by: Andrew Davis Reviewed-by: Linus Walleij Tested-by: Fabian Vogt Reviewed-by: Fabian Vogt --- arch/arm/boot/dts/nspire.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/boot/dts/nspire.dtsi b/arch/arm/boot/dts/nspire.dtsi index bb240e6a3a6f..48fbc9d533c3 100644 --- a/arch/arm/boot/dts/nspire.dtsi +++ b/arch/arm/boot/dts/nspire.dtsi @@ -172,7 +172,14 @@ rtc: rtc@90090000 { }; misc: misc@900a0000 { + compatible = "ti,nspire-misc", "syscon", "simple-mfd"; reg = <0x900a0000 0x1000>; + + reboot { + compatible = "syscon-reboot"; + offset = <0x08>; + value = <0x02>; + }; }; pwr: pwr@900b0000 { From patchwork Mon May 15 19:13:19 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Davis X-Patchwork-Id: 683716 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2652DC7EE25 for ; Mon, 15 May 2023 19:14:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243988AbjEOTN6 (ORCPT ); Mon, 15 May 2023 15:13:58 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57624 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243501AbjEOTNz (ORCPT ); Mon, 15 May 2023 15:13:55 -0400 Received: from fllv0016.ext.ti.com (fllv0016.ext.ti.com [198.47.19.142]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 73C4515EDF; Mon, 15 May 2023 12:13:46 -0700 (PDT) Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 34FJDUrr089385; Mon, 15 May 2023 14:13:30 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1684178010; bh=ZzKVlyCPHyTxRj4e2SffrTyR2DUIDFnjXsjccSjcXd8=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=Cz/n+54sulSrlXCz45tJqjJLnTe5l9kaPmCWhqrytQRBGPsw9TbmrQ0mVZxoG8Vj4 ibWDpBt75+RpQW+e0CWYyfFBICkmb32MY5ACX/+gGPsABVTVKwo5gEYQBtwLpPNPW9 nPGme5klz+sY7UJHF6Fz2HRN454ErBW1JuVQUefs= Received: from DLEE114.ent.ti.com (dlee114.ent.ti.com [157.170.170.25]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 34FJDUw6097259 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 15 May 2023 14:13:30 -0500 Received: from DLEE114.ent.ti.com (157.170.170.25) by DLEE114.ent.ti.com (157.170.170.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Mon, 15 May 2023 14:13:30 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE114.ent.ti.com (157.170.170.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Mon, 15 May 2023 14:13:30 -0500 Received: from lelv0327.itg.ti.com (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 34FJDSK6005699; Mon, 15 May 2023 14:13:29 -0500 From: Andrew Davis To: Lee Jones , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Linus Walleij , Geert Uytterhoeven , Daniel Tang , Fabian Vogt CC: , , , Andrew Davis Subject: [PATCH v7 2/9] ARM: dts: nspire: Fix cpu node to conform with DT binding Date: Mon, 15 May 2023 14:13:19 -0500 Message-ID: <20230515191326.608638-3-afd@ti.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230515191326.608638-1-afd@ti.com> References: <20230515191326.608638-1-afd@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This node does not follow the DT binding schema, correct this. Should result in no functional change. Signed-off-by: Andrew Davis --- arch/arm/boot/dts/nspire.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/boot/dts/nspire.dtsi b/arch/arm/boot/dts/nspire.dtsi index 48fbc9d533c3..cb7237051512 100644 --- a/arch/arm/boot/dts/nspire.dtsi +++ b/arch/arm/boot/dts/nspire.dtsi @@ -11,8 +11,13 @@ / { interrupt-parent = <&intc>; cpus { + #address-cells = <1>; + #size-cells = <0>; + cpu@0 { compatible = "arm,arm926ej-s"; + device_type = "cpu"; + reg = <0>; }; }; From patchwork Mon May 15 19:13:20 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Davis X-Patchwork-Id: 683713 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 64CDBC7EE2E for ; Mon, 15 May 2023 19:14:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243501AbjEOTOG (ORCPT ); Mon, 15 May 2023 15:14:06 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57654 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243816AbjEOTN5 (ORCPT ); Mon, 15 May 2023 15:13:57 -0400 Received: from lelv0142.ext.ti.com (lelv0142.ext.ti.com [198.47.23.249]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 047BE160A1; Mon, 15 May 2023 12:13:48 -0700 (PDT) Received: from fllv0035.itg.ti.com ([10.64.41.0]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 34FJDVRF028528; Mon, 15 May 2023 14:13:31 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1684178011; bh=DrQHO08GzmuLn6kOKALeYvqXK5SaqhyLHlz/PyXfu0k=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=t2g2blj4bPl7yH+DD2F2KonTTKDX4Y32LcMOurBRSEhOKSOJB6WZGpBgOvw+Up7vq 7FhgpVAaD6zk3Ra5VJRnfEs1VsyudbXg8MYCvmlnaPAZe6SI2G7y70YhxoCfdAAHUC eeQWdwNGvUNxbxDN1mJDgF1gHvy+bFAFW7oH77U4= Received: from DLEE114.ent.ti.com (dlee114.ent.ti.com [157.170.170.25]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 34FJDVml097266 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 15 May 2023 14:13:31 -0500 Received: from DLEE115.ent.ti.com (157.170.170.26) by DLEE114.ent.ti.com (157.170.170.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Mon, 15 May 2023 14:13:31 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE115.ent.ti.com (157.170.170.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Mon, 15 May 2023 14:13:30 -0500 Received: from lelv0327.itg.ti.com (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 34FJDSK7005699; Mon, 15 May 2023 14:13:30 -0500 From: Andrew Davis To: Lee Jones , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Linus Walleij , Geert Uytterhoeven , Daniel Tang , Fabian Vogt CC: , , , Andrew Davis Subject: [PATCH v7 3/9] ARM: dts: nspire: Fix sram node to conform with DT binding Date: Mon, 15 May 2023 14:13:20 -0500 Message-ID: <20230515191326.608638-4-afd@ti.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230515191326.608638-1-afd@ti.com> References: <20230515191326.608638-1-afd@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This node does not follow the DT binding schema, correct this. Should result in no functional change. Signed-off-by: Andrew Davis --- arch/arm/boot/dts/nspire.dtsi | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/nspire.dtsi b/arch/arm/boot/dts/nspire.dtsi index cb7237051512..f979b28e2576 100644 --- a/arch/arm/boot/dts/nspire.dtsi +++ b/arch/arm/boot/dts/nspire.dtsi @@ -26,8 +26,15 @@ bootrom: bootrom@0 { }; sram: sram@a4000000 { - device = "memory"; - reg = <0xa4000000 0x20000>; + compatible = "mmio-sram"; + reg = <0xa4000000 0x20000>; /* 128k */ + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0xa4000000 0x20000>; + + sram@0 { + reg = <0x0 0x20000>; + }; }; timer_clk: timer_clk { From patchwork Mon May 15 19:13:21 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Davis X-Patchwork-Id: 682103 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 44389C7EE24 for ; Mon, 15 May 2023 19:14:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244456AbjEOTOB (ORCPT ); Mon, 15 May 2023 15:14:01 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57670 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244470AbjEOTN5 (ORCPT ); Mon, 15 May 2023 15:13:57 -0400 Received: from lelv0143.ext.ti.com (lelv0143.ext.ti.com [198.47.23.248]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E760815608; Mon, 15 May 2023 12:13:47 -0700 (PDT) Received: from fllv0035.itg.ti.com ([10.64.41.0]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 34FJDWVB044553; Mon, 15 May 2023 14:13:32 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1684178012; bh=KkxnDIKZAd5mEV1kw4/83Nnm/NWKIJkuOO6nsAciL/Q=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=ChrKb++4FADOIJWM1kw02TxyUp+gUbTuB0aMujX6jcE0Vt3THGBOgIqTCw24ewspB 2xHTdfbUxNZxMblNgfAXq5blHxgju3g0MluZmOl7wDnus5L6qdg+Hkm574gMgY/Nmm +YvENZCjmD/8sSC8yjQP0Tm90dyQtKvwo2aNlecQ= Received: from DLEE108.ent.ti.com (dlee108.ent.ti.com [157.170.170.38]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 34FJDW0X097270 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 15 May 2023 14:13:32 -0500 Received: from DLEE109.ent.ti.com (157.170.170.41) by DLEE108.ent.ti.com (157.170.170.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Mon, 15 May 2023 14:13:31 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE109.ent.ti.com (157.170.170.41) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Mon, 15 May 2023 14:13:31 -0500 Received: from lelv0327.itg.ti.com (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 34FJDSK8005699; Mon, 15 May 2023 14:13:31 -0500 From: Andrew Davis To: Lee Jones , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Linus Walleij , Geert Uytterhoeven , Daniel Tang , Fabian Vogt CC: , , , Andrew Davis Subject: [PATCH v7 4/9] ARM: dts: nspire: Fix vbus_reg node to conform with DT binding Date: Mon, 15 May 2023 14:13:21 -0500 Message-ID: <20230515191326.608638-5-afd@ti.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230515191326.608638-1-afd@ti.com> References: <20230515191326.608638-1-afd@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This node does not follow the DT binding schema, correct this. All "regulator-fixed" are voltage type, so drop "regulator-type". Should result in no functional change. Signed-off-by: Andrew Davis --- arch/arm/boot/dts/nspire.dtsi | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm/boot/dts/nspire.dtsi b/arch/arm/boot/dts/nspire.dtsi index f979b28e2576..9587e1ebeb93 100644 --- a/arch/arm/boot/dts/nspire.dtsi +++ b/arch/arm/boot/dts/nspire.dtsi @@ -71,7 +71,6 @@ vbus_reg: vbus_reg { compatible = "regulator-fixed"; regulator-name = "USB VBUS output"; - regulator-type = "voltage"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; From patchwork Mon May 15 19:13:22 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Davis X-Patchwork-Id: 682104 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 30863C7EE24 for ; Mon, 15 May 2023 19:13:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243936AbjEOTN5 (ORCPT ); Mon, 15 May 2023 15:13:57 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57370 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244425AbjEOTNs (ORCPT ); Mon, 15 May 2023 15:13:48 -0400 Received: from fllv0016.ext.ti.com (fllv0016.ext.ti.com [198.47.19.142]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7369415523; Mon, 15 May 2023 12:13:46 -0700 (PDT) Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 34FJDWlQ089406; Mon, 15 May 2023 14:13:32 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1684178012; bh=MlU1H/EJkxd5Yso/PQtWoYg7XEQLMPHNdKaWqFC9tSs=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=TllpSyc13qwDjB2OtpX9u61GH9963wk80qBAg5RaxhwClvqTHfsFbKMHG3t41RGNP PnFlvd7wBbWSah15I4rYOPekCeRbPTnutcgeGM8q+Nc7zLpGN90bWYxPFxiS66km0V HfMYgmryW6fsx6kDVWyafEgVk7cdLp8HVSa+Zwvw= Received: from DFLE111.ent.ti.com (dfle111.ent.ti.com [10.64.6.32]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 34FJDWkI017708 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 15 May 2023 14:13:32 -0500 Received: from DFLE102.ent.ti.com (10.64.6.23) by DFLE111.ent.ti.com (10.64.6.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Mon, 15 May 2023 14:13:32 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DFLE102.ent.ti.com (10.64.6.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Mon, 15 May 2023 14:13:32 -0500 Received: from lelv0327.itg.ti.com (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 34FJDSK9005699; Mon, 15 May 2023 14:13:31 -0500 From: Andrew Davis To: Lee Jones , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Linus Walleij , Geert Uytterhoeven , Daniel Tang , Fabian Vogt CC: , , , Andrew Davis Subject: [PATCH v7 5/9] ARM: dts: nspire: Fix uart node to conform with DT binding Date: Mon, 15 May 2023 14:13:22 -0500 Message-ID: <20230515191326.608638-6-afd@ti.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230515191326.608638-1-afd@ti.com> References: <20230515191326.608638-1-afd@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This node does not follow the DT binding schema, correct this. The arm,pl011 binding requires the first clock to be named "uartclk". Should result in no functional change. Signed-off-by: Andrew Davis Reviewed-by: Krzysztof Kozlowski --- arch/arm/boot/dts/nspire-cx.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/nspire-cx.dts b/arch/arm/boot/dts/nspire-cx.dts index 590b7dff6ae5..837dbdd9af55 100644 --- a/arch/arm/boot/dts/nspire-cx.dts +++ b/arch/arm/boot/dts/nspire-cx.dts @@ -24,7 +24,7 @@ &uart { compatible = "arm,pl011", "arm,primecell"; clocks = <&uart_clk>, <&apb_pclk>; - clock-names = "uart_clk", "apb_pclk"; + clock-names = "uartclk", "apb_pclk"; }; &timer0 { From patchwork Mon May 15 19:13:23 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Davis X-Patchwork-Id: 682102 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E3777C7EE2C for ; Mon, 15 May 2023 19:14:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236744AbjEOTOD (ORCPT ); Mon, 15 May 2023 15:14:03 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57694 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244508AbjEOTN5 (ORCPT ); Mon, 15 May 2023 15:13:57 -0400 Received: from fllv0016.ext.ti.com (fllv0016.ext.ti.com [198.47.19.142]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8B79516084; Mon, 15 May 2023 12:13:48 -0700 (PDT) Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 34FJDXln089410; Mon, 15 May 2023 14:13:33 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1684178013; bh=0c4Yf1D4ezENq+KkbcWU0ygzzyav+VN/gibqactG3eA=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=WCgkVff3jWqO4cWkE+QaSmEzdlutL4ICqh373t+He6G4ylIuNkb4j9XuXRC4lLlN9 oO/yRYT7DTH7bS2QZ8Ysg5MunIksi4dAjFJC06brQgWDGWfmLjJjdrD/va14HLlvRQ VaHOEiN4d9T2GPvmEkYl9j5K0LJWg4Se9wAskeWE= Received: from DFLE114.ent.ti.com (dfle114.ent.ti.com [10.64.6.35]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 34FJDXlk017715 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 15 May 2023 14:13:33 -0500 Received: from DFLE106.ent.ti.com (10.64.6.27) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Mon, 15 May 2023 14:13:33 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DFLE106.ent.ti.com (10.64.6.27) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Mon, 15 May 2023 14:13:33 -0500 Received: from lelv0327.itg.ti.com (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 34FJDSKA005699; Mon, 15 May 2023 14:13:32 -0500 From: Andrew Davis To: Lee Jones , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Linus Walleij , Geert Uytterhoeven , Daniel Tang , Fabian Vogt CC: , , , Andrew Davis Subject: [PATCH v7 6/9] ARM: dts: nspire: Use MATRIX_KEY macro for linux,keymap Date: Mon, 15 May 2023 14:13:23 -0500 Message-ID: <20230515191326.608638-7-afd@ti.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230515191326.608638-1-afd@ti.com> References: <20230515191326.608638-1-afd@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This looks better and allows us to see the row and column numbers more easily. Switch to this macro here. Signed-off-by: Andrew Davis --- arch/arm/boot/dts/nspire-clp.dts | 90 ++++++++++++++++++++++++-------- arch/arm/boot/dts/nspire-cx.dts | 90 ++++++++++++++++++++++++-------- arch/arm/boot/dts/nspire-tp.dts | 90 ++++++++++++++++++++++++-------- 3 files changed, 204 insertions(+), 66 deletions(-) diff --git a/arch/arm/boot/dts/nspire-clp.dts b/arch/arm/boot/dts/nspire-clp.dts index f52f38c61588..916ede0c2499 100644 --- a/arch/arm/boot/dts/nspire-clp.dts +++ b/arch/arm/boot/dts/nspire-clp.dts @@ -6,32 +6,78 @@ */ /dts-v1/; +#include + /include/ "nspire-classic.dtsi" &keypad { linux,keymap = < - 0x0000001c 0x0001001c 0x00020039 - 0x0004002c 0x00050034 0x00060015 - 0x0007000b 0x0008002d 0x01000033 - 0x0101004e 0x01020011 0x01030004 - 0x0104002f 0x01050003 0x01060016 - 0x01070002 0x01080014 0x02000062 - 0x0201000c 0x0202001f 0x02030007 - 0x02040013 0x02050006 0x02060010 - 0x02070005 0x02080019 0x03000027 - 0x03010037 0x03020018 0x0303000a - 0x03040031 0x03050009 0x03060032 - 0x03070008 0x03080026 0x04000028 - 0x04010035 0x04020025 0x04040024 - 0x04060017 0x04080023 0x05000028 - 0x05020022 0x0503001b 0x05040021 - 0x0505001a 0x05060012 0x0507006f - 0x05080020 0x0509002a 0x0601001c - 0x0602002e 0x06030068 0x06040030 - 0x0605006d 0x0606001e 0x06070001 - 0x0608002b 0x0609000f 0x07000067 - 0x0702006a 0x0704006c 0x07060069 - 0x0707000e 0x0708001d 0x070a000d + MATRIX_KEY(0, 0, 0x1c) + MATRIX_KEY(0, 1, 0x1c) + MATRIX_KEY(0, 2, 0x39) + MATRIX_KEY(0, 4, 0x2c) + MATRIX_KEY(0, 5, 0x34) + MATRIX_KEY(0, 6, 0x15) + MATRIX_KEY(0, 7, 0x0b) + MATRIX_KEY(0, 8, 0x2d) + MATRIX_KEY(1, 0, 0x33) + MATRIX_KEY(1, 1, 0x4e) + MATRIX_KEY(1, 2, 0x11) + MATRIX_KEY(1, 3, 0x04) + MATRIX_KEY(1, 4, 0x2f) + MATRIX_KEY(1, 5, 0x03) + MATRIX_KEY(1, 6, 0x16) + MATRIX_KEY(1, 7, 0x02) + MATRIX_KEY(1, 8, 0x14) + MATRIX_KEY(2, 0, 0x62) + MATRIX_KEY(2, 1, 0x0c) + MATRIX_KEY(2, 2, 0x1f) + MATRIX_KEY(2, 3, 0x07) + MATRIX_KEY(2, 4, 0x13) + MATRIX_KEY(2, 5, 0x06) + MATRIX_KEY(2, 6, 0x10) + MATRIX_KEY(2, 7, 0x05) + MATRIX_KEY(2, 8, 0x19) + MATRIX_KEY(3, 0, 0x27) + MATRIX_KEY(3, 1, 0x37) + MATRIX_KEY(3, 2, 0x18) + MATRIX_KEY(3, 3, 0x0a) + MATRIX_KEY(3, 4, 0x31) + MATRIX_KEY(3, 5, 0x09) + MATRIX_KEY(3, 6, 0x32) + MATRIX_KEY(3, 7, 0x08) + MATRIX_KEY(3, 8, 0x26) + MATRIX_KEY(4, 0, 0x28) + MATRIX_KEY(4, 1, 0x35) + MATRIX_KEY(4, 2, 0x25) + MATRIX_KEY(4, 4, 0x24) + MATRIX_KEY(4, 6, 0x17) + MATRIX_KEY(4, 8, 0x23) + MATRIX_KEY(5, 0, 0x28) + MATRIX_KEY(5, 2, 0x22) + MATRIX_KEY(5, 3, 0x1b) + MATRIX_KEY(5, 4, 0x21) + MATRIX_KEY(5, 5, 0x1a) + MATRIX_KEY(5, 6, 0x12) + MATRIX_KEY(5, 7, 0x6f) + MATRIX_KEY(5, 8, 0x20) + MATRIX_KEY(5, 9, 0x2a) + MATRIX_KEY(6, 1, 0x1c) + MATRIX_KEY(6, 2, 0x2e) + MATRIX_KEY(6, 3, 0x68) + MATRIX_KEY(6, 4, 0x30) + MATRIX_KEY(6, 5, 0x6d) + MATRIX_KEY(6, 6, 0x1e) + MATRIX_KEY(6, 7, 0x01) + MATRIX_KEY(6, 8, 0x2b) + MATRIX_KEY(6, 9, 0x0f) + MATRIX_KEY(7, 0, 0x67) + MATRIX_KEY(7, 2, 0x6a) + MATRIX_KEY(7, 4, 0x6c) + MATRIX_KEY(7, 6, 0x69) + MATRIX_KEY(7, 7, 0x0e) + MATRIX_KEY(7, 8, 0x1d) + MATRIX_KEY(7, 10, 0x0d) >; }; diff --git a/arch/arm/boot/dts/nspire-cx.dts b/arch/arm/boot/dts/nspire-cx.dts index 837dbdd9af55..96c48fc52203 100644 --- a/arch/arm/boot/dts/nspire-cx.dts +++ b/arch/arm/boot/dts/nspire-cx.dts @@ -6,6 +6,8 @@ */ /dts-v1/; +#include + /include/ "nspire.dtsi" &lcd { @@ -45,28 +47,72 @@ &ahb_clk { &keypad { linux,keymap = < - 0x0000001c 0x0001001c 0x00040039 - 0x0005002c 0x00060015 0x0007000b - 0x0008000f 0x0100002d 0x01010011 - 0x0102002f 0x01030004 0x01040016 - 0x01050014 0x0106001f 0x01070002 - 0x010a006a 0x02000013 0x02010010 - 0x02020019 0x02030007 0x02040018 - 0x02050031 0x02060032 0x02070005 - 0x02080028 0x0209006c 0x03000026 - 0x03010025 0x03020024 0x0303000a - 0x03040017 0x03050023 0x03060022 - 0x03070008 0x03080035 0x03090069 - 0x04000021 0x04010012 0x04020020 - 0x0404002e 0x04050030 0x0406001e - 0x0407000d 0x04080037 0x04090067 - 0x05010038 0x0502000c 0x0503001b - 0x05040034 0x0505001a 0x05060006 - 0x05080027 0x0509000e 0x050a006f - 0x0600002b 0x0602004e 0x06030068 - 0x06040003 0x0605006d 0x06060009 - 0x06070001 0x0609000f 0x0708002a - 0x0709001d 0x070a0033 >; + MATRIX_KEY(0, 0, 0x1c) + MATRIX_KEY(0, 1, 0x1c) + MATRIX_KEY(0, 4, 0x39) + MATRIX_KEY(0, 5, 0x2c) + MATRIX_KEY(0, 6, 0x15) + MATRIX_KEY(0, 7, 0x0b) + MATRIX_KEY(0, 8, 0x0f) + MATRIX_KEY(1, 0, 0x2d) + MATRIX_KEY(1, 1, 0x11) + MATRIX_KEY(1, 2, 0x2f) + MATRIX_KEY(1, 3, 0x04) + MATRIX_KEY(1, 4, 0x16) + MATRIX_KEY(1, 5, 0x14) + MATRIX_KEY(1, 6, 0x1f) + MATRIX_KEY(1, 7, 0x02) + MATRIX_KEY(1, 10, 0x6a) + MATRIX_KEY(2, 0, 0x13) + MATRIX_KEY(2, 1, 0x10) + MATRIX_KEY(2, 2, 0x19) + MATRIX_KEY(2, 3, 0x07) + MATRIX_KEY(2, 4, 0x18) + MATRIX_KEY(2, 5, 0x31) + MATRIX_KEY(2, 6, 0x32) + MATRIX_KEY(2, 7, 0x05) + MATRIX_KEY(2, 8, 0x28) + MATRIX_KEY(2, 9, 0x6c) + MATRIX_KEY(3, 0, 0x26) + MATRIX_KEY(3, 1, 0x25) + MATRIX_KEY(3, 2, 0x24) + MATRIX_KEY(3, 3, 0x0a) + MATRIX_KEY(3, 4, 0x17) + MATRIX_KEY(3, 5, 0x23) + MATRIX_KEY(3, 6, 0x22) + MATRIX_KEY(3, 7, 0x08) + MATRIX_KEY(3, 8, 0x35) + MATRIX_KEY(3, 9, 0x69) + MATRIX_KEY(4, 0, 0x21) + MATRIX_KEY(4, 1, 0x12) + MATRIX_KEY(4, 2, 0x20) + MATRIX_KEY(4, 4, 0x2e) + MATRIX_KEY(4, 5, 0x30) + MATRIX_KEY(4, 6, 0x1e) + MATRIX_KEY(4, 7, 0x0d) + MATRIX_KEY(4, 8, 0x37) + MATRIX_KEY(4, 9, 0x67) + MATRIX_KEY(5, 1, 0x38) + MATRIX_KEY(5, 2, 0x0c) + MATRIX_KEY(5, 3, 0x1b) + MATRIX_KEY(5, 4, 0x34) + MATRIX_KEY(5, 5, 0x1a) + MATRIX_KEY(5, 6, 0x06) + MATRIX_KEY(5, 8, 0x27) + MATRIX_KEY(5, 9, 0x0e) + MATRIX_KEY(5, 10, 0x6f) + MATRIX_KEY(6, 0, 0x2b) + MATRIX_KEY(6, 2, 0x4e) + MATRIX_KEY(6, 3, 0x68) + MATRIX_KEY(6, 4, 0x03) + MATRIX_KEY(6, 5, 0x6d) + MATRIX_KEY(6, 6, 0x09) + MATRIX_KEY(6, 7, 0x01) + MATRIX_KEY(6, 9, 0x0f) + MATRIX_KEY(7, 8, 0x2a) + MATRIX_KEY(7, 9, 0x1d) + MATRIX_KEY(7, 10, 0x33) + >; }; &vbus_reg { diff --git a/arch/arm/boot/dts/nspire-tp.dts b/arch/arm/boot/dts/nspire-tp.dts index f7d0faacd4cc..235cd4264da7 100644 --- a/arch/arm/boot/dts/nspire-tp.dts +++ b/arch/arm/boot/dts/nspire-tp.dts @@ -6,32 +6,78 @@ */ /dts-v1/; +#include + /include/ "nspire-classic.dtsi" &keypad { linux,keymap = < - 0x0000001c 0x0001001c 0x00040039 - 0x0005002c 0x00060015 0x0007000b - 0x0008000f 0x0100002d 0x01010011 - 0x0102002f 0x01030004 0x01040016 - 0x01050014 0x0106001f 0x01070002 - 0x010a006a 0x02000013 0x02010010 - 0x02020019 0x02030007 0x02040018 - 0x02050031 0x02060032 0x02070005 - 0x02080028 0x0209006c 0x03000026 - 0x03010025 0x03020024 0x0303000a - 0x03040017 0x03050023 0x03060022 - 0x03070008 0x03080035 0x03090069 - 0x04000021 0x04010012 0x04020020 - 0x0404002e 0x04050030 0x0406001e - 0x0407000d 0x04080037 0x04090067 - 0x05010038 0x0502000c 0x0503001b - 0x05040034 0x0505001a 0x05060006 - 0x05080027 0x0509000e 0x050a006f - 0x0600002b 0x0602004e 0x06030068 - 0x06040003 0x0605006d 0x06060009 - 0x06070001 0x0609000f 0x0708002a - 0x0709001d 0x070a0033 >; + MATRIX_KEY(0, 0, 0x1c) + MATRIX_KEY(0, 1, 0x1c) + MATRIX_KEY(0, 4, 0x39) + MATRIX_KEY(0, 5, 0x2c) + MATRIX_KEY(0, 6, 0x15) + MATRIX_KEY(0, 7, 0x0b) + MATRIX_KEY(0, 8, 0x0f) + MATRIX_KEY(1, 0, 0x2d) + MATRIX_KEY(1, 1, 0x11) + MATRIX_KEY(1, 2, 0x2f) + MATRIX_KEY(1, 3, 0x04) + MATRIX_KEY(1, 4, 0x16) + MATRIX_KEY(1, 5, 0x14) + MATRIX_KEY(1, 6, 0x1f) + MATRIX_KEY(1, 7, 0x02) + MATRIX_KEY(1, 10, 0x6a) + MATRIX_KEY(2, 0, 0x13) + MATRIX_KEY(2, 1, 0x10) + MATRIX_KEY(2, 2, 0x19) + MATRIX_KEY(2, 3, 0x07) + MATRIX_KEY(2, 4, 0x18) + MATRIX_KEY(2, 5, 0x31) + MATRIX_KEY(2, 6, 0x32) + MATRIX_KEY(2, 7, 0x05) + MATRIX_KEY(2, 8, 0x28) + MATRIX_KEY(2, 9, 0x6c) + MATRIX_KEY(3, 0, 0x26) + MATRIX_KEY(3, 1, 0x25) + MATRIX_KEY(3, 2, 0x24) + MATRIX_KEY(3, 3, 0x0a) + MATRIX_KEY(3, 4, 0x17) + MATRIX_KEY(3, 5, 0x23) + MATRIX_KEY(3, 6, 0x22) + MATRIX_KEY(3, 7, 0x08) + MATRIX_KEY(3, 8, 0x35) + MATRIX_KEY(3, 9, 0x69) + MATRIX_KEY(4, 0, 0x21) + MATRIX_KEY(4, 1, 0x12) + MATRIX_KEY(4, 2, 0x20) + MATRIX_KEY(4, 4, 0x2e) + MATRIX_KEY(4, 5, 0x30) + MATRIX_KEY(4, 6, 0x1e) + MATRIX_KEY(4, 7, 0x0d) + MATRIX_KEY(4, 8, 0x37) + MATRIX_KEY(4, 9, 0x67) + MATRIX_KEY(5, 1, 0x38) + MATRIX_KEY(5, 2, 0x0c) + MATRIX_KEY(5, 3, 0x1b) + MATRIX_KEY(5, 4, 0x34) + MATRIX_KEY(5, 5, 0x1a) + MATRIX_KEY(5, 6, 0x06) + MATRIX_KEY(5, 8, 0x27) + MATRIX_KEY(5, 9, 0x0e) + MATRIX_KEY(5, 10, 0x6f) + MATRIX_KEY(6, 0, 0x2b) + MATRIX_KEY(6, 2, 0x4e) + MATRIX_KEY(6, 3, 0x68) + MATRIX_KEY(6, 4, 0x03) + MATRIX_KEY(6, 5, 0x6d) + MATRIX_KEY(6, 6, 0x09) + MATRIX_KEY(6, 7, 0x01) + MATRIX_KEY(6, 9, 0x0f) + MATRIX_KEY(7, 8, 0x2a) + MATRIX_KEY(7, 9, 0x1d) + MATRIX_KEY(7, 10, 0x33) + >; }; / { From patchwork Mon May 15 19:13:24 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Davis X-Patchwork-Id: 683715 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CD97BC77B7D for ; Mon, 15 May 2023 19:14:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234077AbjEOTOD (ORCPT ); Mon, 15 May 2023 15:14:03 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57622 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243603AbjEOTN5 (ORCPT ); Mon, 15 May 2023 15:13:57 -0400 Received: from lelv0143.ext.ti.com (lelv0143.ext.ti.com [198.47.23.248]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4045915631; Mon, 15 May 2023 12:13:48 -0700 (PDT) Received: from lelv0265.itg.ti.com ([10.180.67.224]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 34FJDYIP044566; Mon, 15 May 2023 14:13:34 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1684178014; bh=FPDiOLulB6xt1ka3uTrtGpykP3pJBjv+PR6PqtoztJ8=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=Q9O6A7kCI4EC2X7FUZurBkL6f7m+/lSJ5zxLX3D/KABTjj42WdYl9aJP1S5U6EXOI DFwBDcLCi0m8+haSoV9hQ+CL/iH++mhT3Q+16ERQR4UOb6/exQv3ZMZjcVTWQISF3S 3mataOc534Dzw5MYmsrj8kJcP4SU/bvY5dSNAu0g= Received: from DLEE114.ent.ti.com (dlee114.ent.ti.com [157.170.170.25]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 34FJDYBA017849 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 15 May 2023 14:13:34 -0500 Received: from DLEE115.ent.ti.com (157.170.170.26) by DLEE114.ent.ti.com (157.170.170.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Mon, 15 May 2023 14:13:33 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE115.ent.ti.com (157.170.170.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Mon, 15 May 2023 14:13:33 -0500 Received: from lelv0327.itg.ti.com (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 34FJDSKB005699; Mon, 15 May 2023 14:13:33 -0500 From: Andrew Davis To: Lee Jones , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Linus Walleij , Geert Uytterhoeven , Daniel Tang , Fabian Vogt CC: , , , Andrew Davis Subject: [PATCH v7 7/9] ARM: dts: nspire: Remove file name from the files themselves Date: Mon, 15 May 2023 14:13:24 -0500 Message-ID: <20230515191326.608638-8-afd@ti.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230515191326.608638-1-afd@ti.com> References: <20230515191326.608638-1-afd@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org File names inside the file does not add much and just makes it difficult to move the files, often the file name is not updated and becomes wrong. Remove them. Signed-off-by: Andrew Davis --- arch/arm/boot/dts/nspire-classic.dtsi | 2 -- arch/arm/boot/dts/nspire-clp.dts | 3 +-- arch/arm/boot/dts/nspire-cx.dts | 3 +-- arch/arm/boot/dts/nspire-tp.dts | 3 +-- arch/arm/boot/dts/nspire.dtsi | 2 -- 5 files changed, 3 insertions(+), 10 deletions(-) diff --git a/arch/arm/boot/dts/nspire-classic.dtsi b/arch/arm/boot/dts/nspire-classic.dtsi index 01e1bb7c3c6c..a6e9cbf51524 100644 --- a/arch/arm/boot/dts/nspire-classic.dtsi +++ b/arch/arm/boot/dts/nspire-classic.dtsi @@ -1,7 +1,5 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * linux/arch/arm/boot/nspire-classic.dts - * * Copyright (C) 2013 Daniel Tang */ diff --git a/arch/arm/boot/dts/nspire-clp.dts b/arch/arm/boot/dts/nspire-clp.dts index 916ede0c2499..c5773f770fd4 100644 --- a/arch/arm/boot/dts/nspire-clp.dts +++ b/arch/arm/boot/dts/nspire-clp.dts @@ -1,9 +1,8 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * linux/arch/arm/boot/nspire-clp.dts - * * Copyright (C) 2013 Daniel Tang */ + /dts-v1/; #include diff --git a/arch/arm/boot/dts/nspire-cx.dts b/arch/arm/boot/dts/nspire-cx.dts index 96c48fc52203..29f0181e5b38 100644 --- a/arch/arm/boot/dts/nspire-cx.dts +++ b/arch/arm/boot/dts/nspire-cx.dts @@ -1,9 +1,8 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * linux/arch/arm/boot/nspire-cx.dts - * * Copyright (C) 2013 Daniel Tang */ + /dts-v1/; #include diff --git a/arch/arm/boot/dts/nspire-tp.dts b/arch/arm/boot/dts/nspire-tp.dts index 235cd4264da7..3f0107f1c2c7 100644 --- a/arch/arm/boot/dts/nspire-tp.dts +++ b/arch/arm/boot/dts/nspire-tp.dts @@ -1,9 +1,8 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * linux/arch/arm/boot/nspire-tp.dts - * * Copyright (C) 2013 Daniel Tang */ + /dts-v1/; #include diff --git a/arch/arm/boot/dts/nspire.dtsi b/arch/arm/boot/dts/nspire.dtsi index 9587e1ebeb93..aecaca5ee1eb 100644 --- a/arch/arm/boot/dts/nspire.dtsi +++ b/arch/arm/boot/dts/nspire.dtsi @@ -1,7 +1,5 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * linux/arch/arm/boot/nspire.dtsi - * * Copyright (C) 2013 Daniel Tang */ From patchwork Mon May 15 19:13:25 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Davis X-Patchwork-Id: 682101 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EA5ABC77B7D for ; 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Mon, 15 May 2023 14:13:34 -0500 Received: from DLEE113.ent.ti.com (157.170.170.24) by DLEE110.ent.ti.com (157.170.170.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Mon, 15 May 2023 14:13:34 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE113.ent.ti.com (157.170.170.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Mon, 15 May 2023 14:13:34 -0500 Received: from lelv0327.itg.ti.com (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 34FJDSKC005699; Mon, 15 May 2023 14:13:33 -0500 From: Andrew Davis To: Lee Jones , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Linus Walleij , Geert Uytterhoeven , Daniel Tang , Fabian Vogt CC: , , , Andrew Davis Subject: [PATCH v7 8/9] ARM: nspire: Use syscon-reboot to handle restart Date: Mon, 15 May 2023 14:13:25 -0500 Message-ID: <20230515191326.608638-9-afd@ti.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230515191326.608638-1-afd@ti.com> References: <20230515191326.608638-1-afd@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Writing this bit can be handled by the DT syscon-reboot driver. Enable that driver and remove the machine_desc version. Signed-off-by: Andrew Davis Reviewed-by: Linus Walleij Tested-by: Fabian Vogt Reviewed-by: Fabian Vogt --- arch/arm/mach-nspire/Kconfig | 2 ++ arch/arm/mach-nspire/mmio.h | 3 --- arch/arm/mach-nspire/nspire.c | 10 ---------- 3 files changed, 2 insertions(+), 13 deletions(-) diff --git a/arch/arm/mach-nspire/Kconfig b/arch/arm/mach-nspire/Kconfig index b7a3871876d7..0ffdcaca1e6b 100644 --- a/arch/arm/mach-nspire/Kconfig +++ b/arch/arm/mach-nspire/Kconfig @@ -9,5 +9,7 @@ config ARCH_NSPIRE select ARM_VIC select ARM_TIMER_SP804 select NSPIRE_TIMER + select POWER_RESET + select POWER_RESET_SYSCON help This enables support for systems using the TI-NSPIRE CPU diff --git a/arch/arm/mach-nspire/mmio.h b/arch/arm/mach-nspire/mmio.h index 48e32f13f311..2ce0656139ec 100644 --- a/arch/arm/mach-nspire/mmio.h +++ b/arch/arm/mach-nspire/mmio.h @@ -5,9 +5,6 @@ * Copyright (C) 2013 Daniel Tang */ -#define NSPIRE_MISC_PHYS_BASE 0x900A0000 -#define NSPIRE_MISC_HWRESET 0x08 - #define NSPIRE_PWR_PHYS_BASE 0x900B0000 #define NSPIRE_PWR_VIRT_BASE 0xFEEB0000 #define NSPIRE_PWR_BUS_DISABLE1 0x18 diff --git a/arch/arm/mach-nspire/nspire.c b/arch/arm/mach-nspire/nspire.c index 2d4abb0288b9..1e13337972dd 100644 --- a/arch/arm/mach-nspire/nspire.c +++ b/arch/arm/mach-nspire/nspire.c @@ -27,16 +27,6 @@ static const char *const nspire_dt_match[] __initconst = { NULL, }; -static void nspire_restart(enum reboot_mode mode, const char *cmd) -{ - void __iomem *base = ioremap(NSPIRE_MISC_PHYS_BASE, SZ_4K); - if (!base) - return; - - writel(2, base + NSPIRE_MISC_HWRESET); -} - DT_MACHINE_START(NSPIRE, "TI-NSPIRE") .dt_compat = nspire_dt_match, - .restart = nspire_restart, MACHINE_END From patchwork Mon May 15 19:13:26 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Davis X-Patchwork-Id: 683712 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 936B7C7EE25 for ; Mon, 15 May 2023 19:14:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244643AbjEOTOH (ORCPT ); Mon, 15 May 2023 15:14:07 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57668 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244625AbjEOTN7 (ORCPT ); Mon, 15 May 2023 15:13:59 -0400 Received: from fllv0016.ext.ti.com (fllv0016.ext.ti.com [198.47.19.142]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 128FF15EE0; Mon, 15 May 2023 12:13:49 -0700 (PDT) Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 34FJDZ50089416; Mon, 15 May 2023 14:13:35 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1684178015; bh=4hxkiIkDEsrqNH3DFrHY3y6iLBIDRC+fqBtSL4tX3e8=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=J+Naiy+j7cPXf1JmfLwF2nGyyKBIosKvbxS9kinUNpkW1EmGQJ4COvRFAxcBgASTj NnJr3Ao5o9lOF1Fepd5binBTaIXr5JtuCJ4ztCr0xWMlsrg/DOvDoOCIXRKn1sjjqg vRsIoRhMT0XCmgaiGIpStaRLcMV8C6O8m/BmehNE= Received: from DFLE115.ent.ti.com (dfle115.ent.ti.com [10.64.6.36]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 34FJDZ5K017859 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 15 May 2023 14:13:35 -0500 Received: from DFLE113.ent.ti.com (10.64.6.34) by DFLE115.ent.ti.com (10.64.6.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Mon, 15 May 2023 14:13:35 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DFLE113.ent.ti.com (10.64.6.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Mon, 15 May 2023 14:13:35 -0500 Received: from lelv0327.itg.ti.com (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 34FJDSKD005699; Mon, 15 May 2023 14:13:34 -0500 From: Andrew Davis To: Lee Jones , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Linus Walleij , Geert Uytterhoeven , Daniel Tang , Fabian Vogt CC: , , , Andrew Davis Subject: [PATCH v7 9/9] ARM: nspire: Remove unused header file mmio.h Date: Mon, 15 May 2023 14:13:26 -0500 Message-ID: <20230515191326.608638-10-afd@ti.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230515191326.608638-1-afd@ti.com> References: <20230515191326.608638-1-afd@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The Nspire boardfile platform drivers have all been converted. None of the definitions in this header are used anymore. Remove it. While here lets remove all the other unused headers and the file name from in the file itself. Signed-off-by: Andrew Davis --- arch/arm/mach-nspire/mmio.h | 13 ------------- arch/arm/mach-nspire/nspire.c | 14 -------------- 2 files changed, 27 deletions(-) delete mode 100644 arch/arm/mach-nspire/mmio.h diff --git a/arch/arm/mach-nspire/mmio.h b/arch/arm/mach-nspire/mmio.h deleted file mode 100644 index 2ce0656139ec..000000000000 --- a/arch/arm/mach-nspire/mmio.h +++ /dev/null @@ -1,13 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * linux/arch/arm/mach-nspire/mmio.h - * - * Copyright (C) 2013 Daniel Tang - */ - -#define NSPIRE_PWR_PHYS_BASE 0x900B0000 -#define NSPIRE_PWR_VIRT_BASE 0xFEEB0000 -#define NSPIRE_PWR_BUS_DISABLE1 0x18 -#define NSPIRE_PWR_BUS_DISABLE2 0x20 - -#define NSPIRE_LCD_PHYS_BASE 0xC0000000 diff --git a/arch/arm/mach-nspire/nspire.c b/arch/arm/mach-nspire/nspire.c index 1e13337972dd..2fbfc23237ff 100644 --- a/arch/arm/mach-nspire/nspire.c +++ b/arch/arm/mach-nspire/nspire.c @@ -1,23 +1,9 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * linux/arch/arm/mach-nspire/nspire.c - * * Copyright (C) 2013 Daniel Tang */ -#include -#include -#include -#include -#include -#include -#include -#include #include -#include -#include - -#include "mmio.h" static const char *const nspire_dt_match[] __initconst = { "ti,nspire",