From patchwork Tue May 16 23:00:45 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shreeya Patel X-Patchwork-Id: 683615 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2CF9FC77B7F for ; Tue, 16 May 2023 23:02:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229456AbjEPXC6 (ORCPT ); Tue, 16 May 2023 19:02:58 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42980 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229475AbjEPXC5 (ORCPT ); Tue, 16 May 2023 19:02:57 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0009F76AF; Tue, 16 May 2023 16:02:54 -0700 (PDT) Received: from localhost.localdomain (unknown [IPv6:2405:201:0:21ea:73f6:2283:f432:3936]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: shreeya) by madras.collabora.co.uk (Postfix) with ESMTPSA id 408CE6605905; Wed, 17 May 2023 00:02:45 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1684278173; bh=qwN88J0Rbr1Da7hiHvEJ/DwurFUZhOrTurH08fXFxNs=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=iSyKsZlJHjDNtWbgK6zTYddhTRMPaoXFGWoFYgaVNp0cCHk0Jt0L1qx+0KOGTcLbB zTwezVjSvDkmPhIuTrJEgaxsfepa1wlGz9ZB80IsFwsiU+hHE8T1ISACNlP6W9tyxQ cZdl/7aXaRXkzYhNDDnLcqnYQDzfp6MXJpgWyuFK7IOrIxxqdWWtNckXazjfgShY5c CpvAFYM3K6W5Usbji2YxIjVXG37pzjZ/imDXPqf+4wpIJdEOvvxY1YHIT9bF+ENcQ5 mfFesaOKIyHAk4l6CpouHfS2ICXXRHMli+b2h0cF2LAU7mtYhkfx2IAUGsHExaCnfD XjhrOItU95aBw== From: Shreeya Patel To: jic23@kernel.org, lars@metafoo.de, heiko@sntech.de, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, sebastian.reichel@collabora.com Cc: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@collabora.com, gustavo.padovan@collabora.com, serge.broslavsky@collabora.com, Shreeya Patel , Simon Xue Subject: [PATCH 1/7] iio: adc: rockchip_saradc: Add support for RK3588 Date: Wed, 17 May 2023 04:30:45 +0530 Message-Id: <20230516230051.14846-2-shreeya.patel@collabora.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20230516230051.14846-1-shreeya.patel@collabora.com> References: <20230516230051.14846-1-shreeya.patel@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Refactor conversion operation to support rk3588 saradc and add separate start, read, powerdown in respective hooks. Signed-off-by: Simon Xue Signed-off-by: Shreeya Patel --- drivers/iio/adc/rockchip_saradc.c | 127 +++++++++++++++++++++++++++--- 1 file changed, 115 insertions(+), 12 deletions(-) diff --git a/drivers/iio/adc/rockchip_saradc.c b/drivers/iio/adc/rockchip_saradc.c index 79448c5ffc2a..ac6fdf8e673b 100644 --- a/drivers/iio/adc/rockchip_saradc.c +++ b/drivers/iio/adc/rockchip_saradc.c @@ -38,10 +38,29 @@ #define SARADC_TIMEOUT msecs_to_jiffies(100) #define SARADC_MAX_CHANNELS 8 +/* v2 registers */ +#define SARADC2_CONV_CON 0x0 +#define SARADC_T_PD_SOC 0x4 +#define SARADC_T_DAS_SOC 0xc +#define SARADC2_END_INT_EN 0x104 +#define SARADC2_ST_CON 0x108 +#define SARADC2_STATUS 0x10c +#define SARADC2_END_INT_ST 0x110 +#define SARADC2_DATA_BASE 0x120 + +#define SARADC2_EN_END_INT BIT(0) +#define SARADC2_START BIT(4) +#define SARADC2_SINGLE_MODE BIT(5) + +struct rockchip_saradc; + struct rockchip_saradc_data { const struct iio_chan_spec *channels; int num_channels; unsigned long clk_rate; + void (*start)(struct rockchip_saradc *info, int chn); + int (*read)(struct rockchip_saradc *info); + void (*power_down)(struct rockchip_saradc *info); }; struct rockchip_saradc { @@ -60,27 +79,77 @@ struct rockchip_saradc { struct notifier_block nb; }; -static void rockchip_saradc_power_down(struct rockchip_saradc *info) +static void rockchip_saradc_reset_controller(struct reset_control *reset); + +static void rockchip_saradc_start_v1(struct rockchip_saradc *info, int chn) +{ + /* 8 clock periods as delay between power up and start cmd */ + writel_relaxed(8, info->regs + SARADC_DLY_PU_SOC); + /* Select the channel to be used and trigger conversion */ + writel(SARADC_CTRL_POWER_CTRL | (chn & SARADC_CTRL_CHN_MASK) | + SARADC_CTRL_IRQ_ENABLE, info->regs + SARADC_CTRL); +} + +static void rockchip_saradc_start_v2(struct rockchip_saradc *info, int chn) +{ + int val; + + if (info->reset) + rockchip_saradc_reset_controller(info->reset); + + writel_relaxed(0xc, info->regs + SARADC_T_DAS_SOC); + writel_relaxed(0x20, info->regs + SARADC_T_PD_SOC); + val = SARADC2_EN_END_INT << 16 | SARADC2_EN_END_INT; + writel_relaxed(val, info->regs + SARADC2_END_INT_EN); + val = SARADC2_START | SARADC2_SINGLE_MODE | chn; + writel(val << 16 | val, info->regs + SARADC2_CONV_CON); +} + +static void rockchip_saradc_start(struct rockchip_saradc *info, int chn) +{ + info->data->start(info, chn); +} + +static int rockchip_saradc_read_v1(struct rockchip_saradc *info) +{ + return readl_relaxed(info->regs + SARADC_DATA); +} + +static int rockchip_saradc_read_v2(struct rockchip_saradc *info) +{ + int offset; + + /* Clear irq */ + writel_relaxed(0x1, info->regs + SARADC2_END_INT_ST); + + offset = SARADC2_DATA_BASE + info->last_chan->channel * 0x4; + + return readl_relaxed(info->regs + offset); +} + +static int rockchip_saradc_read(struct rockchip_saradc *info) +{ + return info->data->read(info); +} + +static void rockchip_saradc_power_down_v1(struct rockchip_saradc *info) { - /* Clear irq & power down adc */ writel_relaxed(0, info->regs + SARADC_CTRL); } +static void rockchip_saradc_power_down(struct rockchip_saradc *info) +{ + if (info->data->power_down) + info->data->power_down(info); +} + static int rockchip_saradc_conversion(struct rockchip_saradc *info, struct iio_chan_spec const *chan) { reinit_completion(&info->completion); - /* 8 clock periods as delay between power up and start cmd */ - writel_relaxed(8, info->regs + SARADC_DLY_PU_SOC); - info->last_chan = chan; - - /* Select the channel to be used and trigger conversion */ - writel(SARADC_CTRL_POWER_CTRL - | (chan->channel & SARADC_CTRL_CHN_MASK) - | SARADC_CTRL_IRQ_ENABLE, - info->regs + SARADC_CTRL); + rockchip_saradc_start(info, chan->channel); if (!wait_for_completion_timeout(&info->completion, SARADC_TIMEOUT)) return -ETIMEDOUT; @@ -123,7 +192,7 @@ static irqreturn_t rockchip_saradc_isr(int irq, void *dev_id) struct rockchip_saradc *info = dev_id; /* Read value */ - info->last_val = readl_relaxed(info->regs + SARADC_DATA); + info->last_val = rockchip_saradc_read(info); info->last_val &= GENMASK(info->last_chan->scan_type.realbits - 1, 0); rockchip_saradc_power_down(info); @@ -163,6 +232,9 @@ static const struct rockchip_saradc_data saradc_data = { .channels = rockchip_saradc_iio_channels, .num_channels = ARRAY_SIZE(rockchip_saradc_iio_channels), .clk_rate = 1000000, + .start = rockchip_saradc_start_v1, + .read = rockchip_saradc_read_v1, + .power_down = rockchip_saradc_power_down_v1, }; static const struct iio_chan_spec rockchip_rk3066_tsadc_iio_channels[] = { @@ -174,6 +246,9 @@ static const struct rockchip_saradc_data rk3066_tsadc_data = { .channels = rockchip_rk3066_tsadc_iio_channels, .num_channels = ARRAY_SIZE(rockchip_rk3066_tsadc_iio_channels), .clk_rate = 50000, + .start = rockchip_saradc_start_v1, + .read = rockchip_saradc_read_v1, + .power_down = rockchip_saradc_power_down_v1, }; static const struct iio_chan_spec rockchip_rk3399_saradc_iio_channels[] = { @@ -189,6 +264,9 @@ static const struct rockchip_saradc_data rk3399_saradc_data = { .channels = rockchip_rk3399_saradc_iio_channels, .num_channels = ARRAY_SIZE(rockchip_rk3399_saradc_iio_channels), .clk_rate = 1000000, + .start = rockchip_saradc_start_v1, + .read = rockchip_saradc_read_v1, + .power_down = rockchip_saradc_power_down_v1, }; static const struct iio_chan_spec rockchip_rk3568_saradc_iio_channels[] = { @@ -206,6 +284,28 @@ static const struct rockchip_saradc_data rk3568_saradc_data = { .channels = rockchip_rk3568_saradc_iio_channels, .num_channels = ARRAY_SIZE(rockchip_rk3568_saradc_iio_channels), .clk_rate = 1000000, + .start = rockchip_saradc_start_v1, + .read = rockchip_saradc_read_v1, + .power_down = rockchip_saradc_power_down_v1, +}; + +static const struct iio_chan_spec rockchip_rk3588_saradc_iio_channels[] = { + SARADC_CHANNEL(0, "adc0", 12), + SARADC_CHANNEL(1, "adc1", 12), + SARADC_CHANNEL(2, "adc2", 12), + SARADC_CHANNEL(3, "adc3", 12), + SARADC_CHANNEL(4, "adc4", 12), + SARADC_CHANNEL(5, "adc5", 12), + SARADC_CHANNEL(6, "adc6", 12), + SARADC_CHANNEL(7, "adc7", 12), +}; + +static const struct rockchip_saradc_data rk3588_saradc_data = { + .channels = rockchip_rk3588_saradc_iio_channels, + .num_channels = ARRAY_SIZE(rockchip_rk3588_saradc_iio_channels), + .clk_rate = 1000000, + .start = rockchip_saradc_start_v2, + .read = rockchip_saradc_read_v2, }; static const struct of_device_id rockchip_saradc_match[] = { @@ -221,6 +321,9 @@ static const struct of_device_id rockchip_saradc_match[] = { }, { .compatible = "rockchip,rk3568-saradc", .data = &rk3568_saradc_data, + }, { + .compatible = "rockchip,rk3588-saradc", + .data = &rk3588_saradc_data, }, {}, }; From patchwork Tue May 16 23:00:46 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shreeya Patel X-Patchwork-Id: 682663 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 337CFC7EE23 for ; Tue, 16 May 2023 23:03:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229785AbjEPXDV (ORCPT ); Tue, 16 May 2023 19:03:21 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43336 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229595AbjEPXDL (ORCPT ); Tue, 16 May 2023 19:03:11 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CB22783C3; Tue, 16 May 2023 16:03:04 -0700 (PDT) Received: from localhost.localdomain (unknown [IPv6:2405:201:0:21ea:73f6:2283:f432:3936]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: shreeya) by madras.collabora.co.uk (Postfix) with ESMTPSA id 1BC756605906; Wed, 17 May 2023 00:02:55 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1684278183; bh=p1G9c4ZZ0z8CwWdi+emrO1to/4AF/8CTX9Ml4RigWEU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=YjsZ4IsUmuOvbFm3+kJRtR/DToroDRMOUlV+7bBqh4nlkSmKs3HOWXTYV+aFMi12B K62bCfS6sHud5Ljdj9zwnT9U31oTw0aCeF6StztEaP2QTZdj0Ziu8vUCYazEcs0yih fMJkJSW8tCIOV3zAj6h8IKAy9ZxsYIccrfGdtdu1ji1KikCXg/ki09rAuPQ/4+fyVZ S9dmAp81e2WUSl+fH/wMDFiWgcME6ltH/W2CqWfbfK+GTSuQCooJX/syZ7mCTjzWgU wetWmBND3XWYBFitf+kGIUYWkv3aFngf7UGMBeyOhwyJhWdGs8MOkCFrUISJYHcaPW qX6Vs3LGcAxQg== From: Shreeya Patel To: jic23@kernel.org, lars@metafoo.de, heiko@sntech.de, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, sebastian.reichel@collabora.com Cc: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@collabora.com, gustavo.padovan@collabora.com, serge.broslavsky@collabora.com, Shreeya Patel Subject: [PATCH 2/7] iio: adc: rockchip_saradc: Make use of devm_clk_get_enabled Date: Wed, 17 May 2023 04:30:46 +0530 Message-Id: <20230516230051.14846-3-shreeya.patel@collabora.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20230516230051.14846-1-shreeya.patel@collabora.com> References: <20230516230051.14846-1-shreeya.patel@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Use devm_clk_get_enabled() to avoid manually disabling the clock. Signed-off-by: Shreeya Patel --- drivers/iio/adc/rockchip_saradc.c | 77 +++++-------------------------- 1 file changed, 11 insertions(+), 66 deletions(-) diff --git a/drivers/iio/adc/rockchip_saradc.c b/drivers/iio/adc/rockchip_saradc.c index ac6fdf8e673b..05b66eff9a44 100644 --- a/drivers/iio/adc/rockchip_saradc.c +++ b/drivers/iio/adc/rockchip_saradc.c @@ -339,20 +339,6 @@ static void rockchip_saradc_reset_controller(struct reset_control *reset) reset_control_deassert(reset); } -static void rockchip_saradc_clk_disable(void *data) -{ - struct rockchip_saradc *info = data; - - clk_disable_unprepare(info->clk); -} - -static void rockchip_saradc_pclk_disable(void *data) -{ - struct rockchip_saradc *info = data; - - clk_disable_unprepare(info->pclk); -} - static void rockchip_saradc_regulator_disable(void *data) { struct rockchip_saradc *info = data; @@ -486,16 +472,6 @@ static int rockchip_saradc_probe(struct platform_device *pdev) return ret; } - info->pclk = devm_clk_get(&pdev->dev, "apb_pclk"); - if (IS_ERR(info->pclk)) - return dev_err_probe(&pdev->dev, PTR_ERR(info->pclk), - "failed to get pclk\n"); - - info->clk = devm_clk_get(&pdev->dev, "saradc"); - if (IS_ERR(info->clk)) - return dev_err_probe(&pdev->dev, PTR_ERR(info->clk), - "failed to get adc clock\n"); - info->vref = devm_regulator_get(&pdev->dev, "vref"); if (IS_ERR(info->vref)) return dev_err_probe(&pdev->dev, PTR_ERR(info->vref), @@ -504,6 +480,16 @@ static int rockchip_saradc_probe(struct platform_device *pdev) if (info->reset) rockchip_saradc_reset_controller(info->reset); + info->pclk = devm_clk_get_enabled(&pdev->dev, "apb_pclk"); + if (IS_ERR(info->pclk)) + return dev_err_probe(&pdev->dev, PTR_ERR(info->pclk), + "failed to get pclk\n"); + + info->clk = devm_clk_get_enabled(&pdev->dev, "saradc"); + if (IS_ERR(info->clk)) + return dev_err_probe(&pdev->dev, PTR_ERR(info->clk), + "failed to get adc clock\n"); + /* * Use a default value for the converter clock. * This may become user-configurable in the future. @@ -533,32 +519,6 @@ static int rockchip_saradc_probe(struct platform_device *pdev) info->uv_vref = ret; - ret = clk_prepare_enable(info->pclk); - if (ret < 0) { - dev_err(&pdev->dev, "failed to enable pclk\n"); - return ret; - } - ret = devm_add_action_or_reset(&pdev->dev, - rockchip_saradc_pclk_disable, info); - if (ret) { - dev_err(&pdev->dev, "failed to register devm action, %d\n", - ret); - return ret; - } - - ret = clk_prepare_enable(info->clk); - if (ret < 0) { - dev_err(&pdev->dev, "failed to enable converter clock\n"); - return ret; - } - ret = devm_add_action_or_reset(&pdev->dev, - rockchip_saradc_clk_disable, info); - if (ret) { - dev_err(&pdev->dev, "failed to register devm action, %d\n", - ret); - return ret; - } - platform_set_drvdata(pdev, indio_dev); indio_dev->name = dev_name(&pdev->dev); @@ -594,8 +554,6 @@ static int rockchip_saradc_suspend(struct device *dev) struct iio_dev *indio_dev = dev_get_drvdata(dev); struct rockchip_saradc *info = iio_priv(indio_dev); - clk_disable_unprepare(info->clk); - clk_disable_unprepare(info->pclk); regulator_disable(info->vref); return 0; @@ -605,21 +563,8 @@ static int rockchip_saradc_resume(struct device *dev) { struct iio_dev *indio_dev = dev_get_drvdata(dev); struct rockchip_saradc *info = iio_priv(indio_dev); - int ret; - - ret = regulator_enable(info->vref); - if (ret) - return ret; - - ret = clk_prepare_enable(info->pclk); - if (ret) - return ret; - - ret = clk_prepare_enable(info->clk); - if (ret) - clk_disable_unprepare(info->pclk); - return ret; + return regulator_enable(info->vref); } static DEFINE_SIMPLE_DEV_PM_OPS(rockchip_saradc_pm_ops, From patchwork Tue May 16 23:00:47 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shreeya Patel X-Patchwork-Id: 683614 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EF34FC77B7F for ; Tue, 16 May 2023 23:03:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230498AbjEPXDe (ORCPT ); Tue, 16 May 2023 19:03:34 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43836 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231219AbjEPXDb (ORCPT ); Tue, 16 May 2023 19:03:31 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7102F76AF; Tue, 16 May 2023 16:03:20 -0700 (PDT) Received: from localhost.localdomain (unknown [IPv6:2405:201:0:21ea:73f6:2283:f432:3936]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: shreeya) by madras.collabora.co.uk (Postfix) with ESMTPSA id CAF2B6605905; Wed, 17 May 2023 00:03:07 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1684278199; bh=RWQQOKamedoTAntnFqnzwlUZr9v/kXvlyH/KIUMibi8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=hJ6hRVnWUNx/wTbz9VOZyhxzThiln65c/Xm2TrwTyUH2C0tP3Ylz44bLicMLiNUrT cTmDCsj8UKc/noPQT0XJZBVrFDIPj2Hpl2Op+CDwKoOlZyaNBjfmz2r7eQniJVLYDs ynNdCPaTmJYEJgpVviA0Q/JnDmfeteD1Q6R5A9r3S+2eug4UpdGXBk24tBIrJf225D dG6THNld5Qep0qTjIGjJ9inELncAWQymF8iYZIaVoxpam+E3SXs1HHe4uRYRZBvNqr dQlGt5KQcFIinGlkHBKeKicP8Qv9Bq8d1D6vgAFS0W0XrD6vNSfo9nDsCcyHpivJnr Rhko8y1Ef7UdA== From: Shreeya Patel To: jic23@kernel.org, lars@metafoo.de, heiko@sntech.de, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, sebastian.reichel@collabora.com Cc: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@collabora.com, gustavo.padovan@collabora.com, serge.broslavsky@collabora.com, Shreeya Patel Subject: [PATCH 3/7] iio: adc: rockchip_saradc: Use of_device_get_match_data Date: Wed, 17 May 2023 04:30:47 +0530 Message-Id: <20230516230051.14846-4-shreeya.patel@collabora.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20230516230051.14846-1-shreeya.patel@collabora.com> References: <20230516230051.14846-1-shreeya.patel@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Use of_device_get_match_data() to simplify the code. Signed-off-by: Shreeya Patel --- drivers/iio/adc/rockchip_saradc.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/iio/adc/rockchip_saradc.c b/drivers/iio/adc/rockchip_saradc.c index 05b66eff9a44..05ea823a8f16 100644 --- a/drivers/iio/adc/rockchip_saradc.c +++ b/drivers/iio/adc/rockchip_saradc.c @@ -408,10 +408,10 @@ static void rockchip_saradc_regulator_unreg_notifier(void *data) static int rockchip_saradc_probe(struct platform_device *pdev) { + const struct rockchip_saradc_data *match_data; struct rockchip_saradc *info = NULL; struct device_node *np = pdev->dev.of_node; struct iio_dev *indio_dev = NULL; - const struct of_device_id *match; int ret; int irq; @@ -425,13 +425,13 @@ static int rockchip_saradc_probe(struct platform_device *pdev) } info = iio_priv(indio_dev); - match = of_match_device(rockchip_saradc_match, &pdev->dev); - if (!match) { + match_data = of_device_get_match_data(&pdev->dev); + if (!match_data) { dev_err(&pdev->dev, "failed to match device\n"); return -ENODEV; } - info->data = match->data; + info->data = match_data; /* Sanity check for possible later IP variants with more channels */ if (info->data->num_channels > SARADC_MAX_CHANNELS) { From patchwork Tue May 16 23:00:48 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shreeya Patel X-Patchwork-Id: 682662 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 38BE3C7EE23 for ; Tue, 16 May 2023 23:03:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229956AbjEPXDx (ORCPT ); Tue, 16 May 2023 19:03:53 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44402 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231250AbjEPXDv (ORCPT ); Tue, 16 May 2023 19:03:51 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8BF727EEC; Tue, 16 May 2023 16:03:35 -0700 (PDT) Received: from localhost.localdomain (unknown [IPv6:2405:201:0:21ea:73f6:2283:f432:3936]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: shreeya) by madras.collabora.co.uk (Postfix) with ESMTPSA id 65656660322D; Wed, 17 May 2023 00:03:22 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1684278214; bh=FVMe/5NMLn43mP7albuxLlvogh9o3Yme9lezj9TaBTo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=DCCDEMjrrn0YouSvTb0b0EFIbk81oW3SvEAMRgraJ72fqcOIZAQoXHYYGtk9kiibk g5lkwzQ/qOyZHv6l/1Ak/BRZvp0SZUHKOYiuwCSw5ZFlUruDk2dtKcWlPu9giDeXC0 gLWWyFyU3dL2i0i4TqZ5r+Ly42Op3pWYgYK94kr7rFgf8BfLk0mWRWbUGy/gdKUtgu DS45rl1rR7LI/YurnE/P4y/34tEq6K4thixMhMnwB9sc4AhPQaEjupBqcmAAQjPgyl LkMK3FffbZzqp8y5AX5MEfq21UEBYRqXdxOluqT1Gz8BcNKXq8x4F1BcmYNG3YUsGn SFzJvdS0fQNHQ== From: Shreeya Patel To: jic23@kernel.org, lars@metafoo.de, heiko@sntech.de, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, sebastian.reichel@collabora.com Cc: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@collabora.com, gustavo.padovan@collabora.com, serge.broslavsky@collabora.com, Shreeya Patel Subject: [PATCH 4/7] iio: adc: rockchip_saradc: Match alignment with open parenthesis Date: Wed, 17 May 2023 04:30:48 +0530 Message-Id: <20230516230051.14846-5-shreeya.patel@collabora.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20230516230051.14846-1-shreeya.patel@collabora.com> References: <20230516230051.14846-1-shreeya.patel@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Match alignment with open parenthesis for improving the code readability. Signed-off-by: Shreeya Patel --- drivers/iio/adc/rockchip_saradc.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/iio/adc/rockchip_saradc.c b/drivers/iio/adc/rockchip_saradc.c index 05ea823a8f16..5e1e8575bc76 100644 --- a/drivers/iio/adc/rockchip_saradc.c +++ b/drivers/iio/adc/rockchip_saradc.c @@ -144,7 +144,7 @@ static void rockchip_saradc_power_down(struct rockchip_saradc *info) } static int rockchip_saradc_conversion(struct rockchip_saradc *info, - struct iio_chan_spec const *chan) + struct iio_chan_spec const *chan) { reinit_completion(&info->completion); @@ -387,8 +387,7 @@ static irqreturn_t rockchip_saradc_trigger_handler(int irq, void *p) } static int rockchip_saradc_volt_notify(struct notifier_block *nb, - unsigned long event, - void *data) + unsigned long event, void *data) { struct rockchip_saradc *info = container_of(nb, struct rockchip_saradc, nb); From patchwork Tue May 16 23:00:49 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shreeya Patel X-Patchwork-Id: 683613 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 43780C7EE24 for ; Tue, 16 May 2023 23:04:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231216AbjEPXEJ (ORCPT ); Tue, 16 May 2023 19:04:09 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44702 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229658AbjEPXEI (ORCPT ); Tue, 16 May 2023 19:04:08 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AE4CA72AA; Tue, 16 May 2023 16:03:44 -0700 (PDT) Received: from localhost.localdomain (unknown [IPv6:2405:201:0:21ea:73f6:2283:f432:3936]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: shreeya) by madras.collabora.co.uk (Postfix) with ESMTPSA id B232E6605905; Wed, 17 May 2023 00:03:36 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1684278223; bh=APUXpv76gAJ+bvr5pL51Y23+mXfXNgygrnteOrO5pJI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=l+Ht+y+fcgjaPk088r5OsjgjFwbFXVgpdc0Nj+zL8zEkWY81HL+LGhORJ/YFLcUC2 DR9xkqjdks0rfhQN13R3eP3pXOMQz1G619FRRKV7BZ3JSuBpS+sZZ8eOypQRHOAxha 1r2ObYvLlzG09yAVsX/rlq1sBz84CjlxYyATNaRTq1vrUqaJhWvmhrfO4ckzXDlScT oUyaRZxtcFqwIQAFOHeQnXRXkltx9N1E2dffYSHdwQpIbv49NLIVDH+M0WGvMN1Bgm Cqa+qBbjL+2BuO5FdpzWjoJ6dXiA5Qf8I6K1Vx8iOobkUdqF2SD4zxxnAhfue8mtVq lwsy+BHDZBJRA== From: Shreeya Patel To: jic23@kernel.org, lars@metafoo.de, heiko@sntech.de, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, sebastian.reichel@collabora.com Cc: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@collabora.com, gustavo.padovan@collabora.com, serge.broslavsky@collabora.com, Shreeya Patel Subject: [PATCH 5/7] iio: adc: rockchip_saradc: Use dev_err_probe Date: Wed, 17 May 2023 04:30:49 +0530 Message-Id: <20230516230051.14846-6-shreeya.patel@collabora.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20230516230051.14846-1-shreeya.patel@collabora.com> References: <20230516230051.14846-1-shreeya.patel@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Use dev_err_probe instead of dev_err in probe function, which simplifies code a little bit and prints the error code. Signed-off-by: Shreeya Patel --- drivers/iio/adc/rockchip_saradc.c | 45 ++++++++++++++----------------- 1 file changed, 20 insertions(+), 25 deletions(-) diff --git a/drivers/iio/adc/rockchip_saradc.c b/drivers/iio/adc/rockchip_saradc.c index 5e1e8575bc76..a52021fd477d 100644 --- a/drivers/iio/adc/rockchip_saradc.c +++ b/drivers/iio/adc/rockchip_saradc.c @@ -418,25 +418,23 @@ static int rockchip_saradc_probe(struct platform_device *pdev) return -ENODEV; indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*info)); - if (!indio_dev) { - dev_err(&pdev->dev, "failed allocating iio device\n"); - return -ENOMEM; - } + if (!indio_dev) + return dev_err_probe(&pdev->dev, -ENOMEM, + "failed allocating iio device\n"); + info = iio_priv(indio_dev); match_data = of_device_get_match_data(&pdev->dev); - if (!match_data) { - dev_err(&pdev->dev, "failed to match device\n"); - return -ENODEV; - } + if (!match_data) + return dev_err_probe(&pdev->dev, -ENODEV, + "failed to match device\n"); info->data = match_data; /* Sanity check for possible later IP variants with more channels */ - if (info->data->num_channels > SARADC_MAX_CHANNELS) { - dev_err(&pdev->dev, "max channels exceeded"); - return -EINVAL; - } + if (info->data->num_channels > SARADC_MAX_CHANNELS) + return dev_err_probe(&pdev->dev, -EINVAL, + "max channels exceeded"); info->regs = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(info->regs)) @@ -494,23 +492,20 @@ static int rockchip_saradc_probe(struct platform_device *pdev) * This may become user-configurable in the future. */ ret = clk_set_rate(info->clk, info->data->clk_rate); - if (ret < 0) { - dev_err(&pdev->dev, "failed to set adc clk rate, %d\n", ret); - return ret; - } + if (ret < 0) + return dev_err_probe(&pdev->dev, ret, + "failed to set adc clk rate\n"); ret = regulator_enable(info->vref); - if (ret < 0) { - dev_err(&pdev->dev, "failed to enable vref regulator\n"); - return ret; - } + if (ret < 0) + return dev_err_probe(&pdev->dev, ret, + "failed to enable vref regulator\n"); + ret = devm_add_action_or_reset(&pdev->dev, rockchip_saradc_regulator_disable, info); - if (ret) { - dev_err(&pdev->dev, "failed to register devm action, %d\n", - ret); - return ret; - } + if (ret) + return dev_err_probe(&pdev->dev, ret, + "failed to register devm action\n"); ret = regulator_get_voltage(info->vref); if (ret < 0) From patchwork Tue May 16 23:00:50 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shreeya Patel X-Patchwork-Id: 682661 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CA99AC77B7F for ; Tue, 16 May 2023 23:04:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229582AbjEPXEZ (ORCPT ); Tue, 16 May 2023 19:04:25 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44916 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229658AbjEPXET (ORCPT ); Tue, 16 May 2023 19:04:19 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E195B7AB2; Tue, 16 May 2023 16:03:54 -0700 (PDT) Received: from localhost.localdomain (unknown [IPv6:2405:201:0:21ea:73f6:2283:f432:3936]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: shreeya) by madras.collabora.co.uk (Postfix) with ESMTPSA id DC69E6605906; Wed, 17 May 2023 00:03:45 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1684278232; bh=lDz/zDew1D+agp77cTWfGbMYmza4eMo3EHXMw7US+9M=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=TwiO4uSHH2bl0609n6yUlQY6/QBubDltJLEdZGoy0Y9KYXrk95H3DtmAhq1XV5m9V rmZmcsvhlXHpjqjn7cr/zKNXkgUs31KNFxdok+0EmMqGjBDa1XMKxqCr8qjFt75z87 IwN4lOtCWV2UHh+NBFM5jOqGYC3sTXAaQKbwF+GJ0wCO4fOf7ZnlBgN4ZooocPDIBO RIf09Gylnz7UbmCVxRYXkDijGZsBjnRjlqeehqnBHjQcJ2N0Nkgu1qyXkBDcFMZSOF Z8BmHBwcjOm2SSOz9Ql8ehIw+Nhpc1sqVVWCQ4UO2dC5zBEzR2sb1UmQlVGIT8/nsA 32VoFv9tLdoAA== From: Shreeya Patel To: jic23@kernel.org, lars@metafoo.de, heiko@sntech.de, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, sebastian.reichel@collabora.com Cc: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@collabora.com, gustavo.padovan@collabora.com, serge.broslavsky@collabora.com, Shreeya Patel Subject: [PATCH 6/7] arm64: dts: rockchip: Add DT node for ADC support in RK3588 Date: Wed, 17 May 2023 04:30:50 +0530 Message-Id: <20230516230051.14846-7-shreeya.patel@collabora.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20230516230051.14846-1-shreeya.patel@collabora.com> References: <20230516230051.14846-1-shreeya.patel@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add DT node for ADC support in RK3588. Signed-off-by: Shreeya Patel Reviewed-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi index 657c019d27fa..6c4424bc4b1b 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi @@ -1825,6 +1825,18 @@ dmac2: dma-controller@fed10000 { #dma-cells = <1>; }; + saradc: saradc@fec10000 { + compatible = "rockchip,rk3588-saradc"; + reg = <0x0 0xfec10000 0x0 0x10000>; + interrupts = ; + #io-channel-cells = <1>; + clocks = <&cru CLK_SARADC>, <&cru PCLK_SARADC>; + clock-names = "saradc", "apb_pclk"; + resets = <&cru SRST_P_SARADC>; + reset-names = "saradc-apb"; + status = "disabled"; + }; + system_sram2: sram@ff001000 { compatible = "mmio-sram"; reg = <0x0 0xff001000 0x0 0xef000>; From patchwork Tue May 16 23:00:51 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shreeya Patel X-Patchwork-Id: 683612 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9CE13C77B7F for ; Tue, 16 May 2023 23:04:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229673AbjEPXEl (ORCPT ); Tue, 16 May 2023 19:04:41 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45538 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231325AbjEPXEj (ORCPT ); Tue, 16 May 2023 19:04:39 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 92A777AA9; Tue, 16 May 2023 16:04:13 -0700 (PDT) Received: from localhost.localdomain (unknown [IPv6:2405:201:0:21ea:73f6:2283:f432:3936]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: shreeya) by madras.collabora.co.uk (Postfix) with ESMTPSA id 4AA25660322D; Wed, 17 May 2023 00:03:56 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1684278248; bh=q7DeK2S2OQkUm9aAia29KELl6k5xzi/Rod0mLsIEALU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=MkvF1OSgSOmsRxfiohHOFcn+geDm17i5fZFWtOQoQF15BxfzDL10xxKK6QJqI02bD hVOps6siX71uu3cI4pa3nr3JNntxP4riYnpF2tDAbGeH392IO3oVhWlq+0lGGfq7YL 6pNS2Dr7F6TvJ1RfqJR51xBWBk12ENkXt0SHLMZrrA9BwjkReWvmwXPl6+opa0bk23 LZxHQqJm3iUI3OaNr/Bv1V9tuCdZwanID8ciLRe62p32nYLn4KBJavIGNxqth3v5tN GpJCTtjgO9j6cCoQ8vzuAmiyU0UCL4sm9vZYrQQ+O0lG+owKPLxWEjF7P3nh5bmswg WISvHFU/BaD8Q== From: Shreeya Patel To: jic23@kernel.org, lars@metafoo.de, heiko@sntech.de, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, sebastian.reichel@collabora.com Cc: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@collabora.com, gustavo.padovan@collabora.com, serge.broslavsky@collabora.com, Shreeya Patel Subject: [PATCH 7/7] dt-bindings: iio: adc: Add rockchip,rk3588-saradc string Date: Wed, 17 May 2023 04:30:51 +0530 Message-Id: <20230516230051.14846-8-shreeya.patel@collabora.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20230516230051.14846-1-shreeya.patel@collabora.com> References: <20230516230051.14846-1-shreeya.patel@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add rockchip,rk3588-saradc compatible string. Signed-off-by: Shreeya Patel --- Documentation/devicetree/bindings/iio/adc/rockchip-saradc.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.yaml b/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.yaml index da50b529c157..11c27ea451c8 100644 --- a/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.yaml +++ b/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.yaml @@ -21,6 +21,7 @@ properties: - rockchip,rk3308-saradc - rockchip,rk3328-saradc - rockchip,rk3568-saradc + - rockchip,rk3588-saradc - rockchip,rv1108-saradc - rockchip,rv1126-saradc - const: rockchip,rk3399-saradc