From patchwork Mon Jun 10 08:42:06 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lee Jones X-Patchwork-Id: 166287 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp758477ilk; Mon, 10 Jun 2019 01:42:19 -0700 (PDT) X-Google-Smtp-Source: APXvYqw0yOqzdBvqfruV+Me8wcxUtylxzabgfTJakPSZIENoCv8T+4tB8P9b6xnHYdKYf/lNphXE X-Received: by 2002:a63:4e10:: with SMTP id c16mr14563691pgb.214.1560156139564; Mon, 10 Jun 2019 01:42:19 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1560156139; cv=none; d=google.com; s=arc-20160816; b=tRrnk3wzyjD/NwkSznKkN+6/lxnyxw0YuBZQ1XudkZZ+FF3X++/Gps1T0u4VShLYQg +C/Mj9VxUSPD0/jz29fXTfcH5WMG0MaEqGzppW/MTl4s8Uy2R6ElT5OKJzpWFGTjmF2t gqc1tQTq783JIBbsRg0089lks2jun1hZRPSha2TYL+2BE5nspo5fLMyi+1uD2d/XGyk2 J0oH0RbAQN8loAdh41BjPCzlfOZCqzJZDh5wd9c3Laaqqtobf8QFNyAiJaRus2D1Vrn2 KuTzWNSKUqqPn+JzlHMzoH7POoam6IIv0FA6Kjg6uLoRc7ytKQPkkXgW0px+d6sBOq+B jUNQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:message-id:date:subject:cc:to:from :dkim-signature; bh=Dg3oC3jeSqKLOMc1HRQAN+HlqdHVv5WaH1kaddbCmVU=; b=R5Olooh7nQHhw7tZ/e1VAbzre3Cz5+r3RHrDXXeadObWwdAujScFWOOUYDWJ8foaPq a7ygMrnZ1/jdSQB9oviB36UHnV/hsan8SeATrMDDzRzaUj7r4l54Icm2++z9IewJFymP cUEUZA0AwqoNNlXaTa6btRsHyG+sBNEhFmeqTjIyxFwk7aI59GNDQplzY9Vyu8MoaS1Q tGbHunuayT7giv8y9a647p05DH/KXN9fGLlEAcUJBNRwYHTliabnIqzrARv3zHvhU2e4 UcHBbBEIFqr0SOKuNF6DxsSQidtkCZsTWvN5/6iqMNI0Q3I+L/NDqVRi6u0s7eQoB2bb nO/g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=N579Ut31; spf=pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-gpio-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id n9si9217939pff.14.2019.06.10.01.42.19; Mon, 10 Jun 2019 01:42:19 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=N579Ut31; spf=pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-gpio-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388310AbfFJImS (ORCPT + 5 others); Mon, 10 Jun 2019 04:42:18 -0400 Received: from mail-wm1-f66.google.com ([209.85.128.66]:52957 "EHLO mail-wm1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2387890AbfFJImS (ORCPT ); Mon, 10 Jun 2019 04:42:18 -0400 Received: by mail-wm1-f66.google.com with SMTP id s3so7604944wms.2 for ; Mon, 10 Jun 2019 01:42:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=Dg3oC3jeSqKLOMc1HRQAN+HlqdHVv5WaH1kaddbCmVU=; b=N579Ut3169MDjhrrsBHmt//MQCwAN9tpPt3Zo1dy964bOck+NE2epVrhRBU1VblB2u argmebVwjEfyM0/+EdEoAX0b5Fq5NxYGpIQuKYxcRm3f6DrXYUp9+3Phnsrs72hPDxLY 9FeO0ZoZfziqPPQ5Sabb6aQTkrkkpKHrgStbDGRScUYfIpJ7xF3SyWOxHQOwYZqwhKcz EniNcgCcFjDzdPD/Gnpf3RA+qXhbvSAs16aNmMS2qJDjp6tBrLfK6Mgb0HZOpg+9qNwL oQ6VHz8UKkO2idUdzyEKI+GrwcIaOp0HZzEmgPvcIdAyT9BdrZ+vROzlL53L0fsTHRCe Amsw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=Dg3oC3jeSqKLOMc1HRQAN+HlqdHVv5WaH1kaddbCmVU=; b=E8cMGdOpXzp1zKG1lZcogIDqXwUV6boEe435RIjkw6WYqCo60dvESbEl0axus3lIFC 7LX7XlkXJdLL8v4mmpotfcAxvNjFrnWtLt0iai01nid9bOWXOLyg23HAECTGIm+S59AR pZ7FXw4tdGkDvfX2eEn5vNtLqFP1cZMTUb0sjgjoSR+Nf4y6CuwDUTp9O2PbzaYRp6VM wXFHB7Dg//cNjOfSUU7DcMhKaQaHJijyBzJxfar7wGJHkRpDLH49w7TnwL/uiL2ix2Iv MmcrhrjbGFraO1Vf3Sa4pbi6Kilu1MdDcdHbKZgzlCLm/tgmqseJncn7FMAGqzrBW9sK XUOg== X-Gm-Message-State: APjAAAUmrXWwoEj0MJ+mkldPT+GLG2/W9SXUPBE8OqN0w6O+DBarnrJA pYZI6mGpDWQqz7o1c2pBRd6nWQ== X-Received: by 2002:a1c:9c8a:: with SMTP id f132mr7642789wme.29.1560156136449; Mon, 10 Jun 2019 01:42:16 -0700 (PDT) Received: from localhost.localdomain ([2.31.167.229]) by smtp.gmail.com with ESMTPSA id a125sm9929670wmf.42.2019.06.10.01.42.15 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 10 Jun 2019 01:42:15 -0700 (PDT) From: Lee Jones To: alokc@codeaurora.org, andy.gross@linaro.org, david.brown@linaro.org, wsa+renesas@sang-engineering.com, bjorn.andersson@linaro.org, linus.walleij@linaro.org, balbi@kernel.org, gregkh@linuxfoundation.org, ard.biesheuvel@linaro.org, jlhugo@gmail.com, linux-i2c@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org, linux-usb@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Lee Jones Subject: [PATCH v3 1/8] i2c: i2c-qcom-geni: Provide support for ACPI Date: Mon, 10 Jun 2019 09:42:06 +0100 Message-Id: <20190610084213.1052-1-lee.jones@linaro.org> X-Mailer: git-send-email 2.17.1 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Add a match table to allow automatic probing of ACPI device QCOM0220. Ignore clock attainment errors. Set default clock frequency value. Signed-off-by: Lee Jones --- drivers/i2c/busses/i2c-qcom-geni.c | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) -- 2.17.1 Reviewed-by: Bjorn Andersson diff --git a/drivers/i2c/busses/i2c-qcom-geni.c b/drivers/i2c/busses/i2c-qcom-geni.c index db075bc0d952..9e3b8a98688d 100644 --- a/drivers/i2c/busses/i2c-qcom-geni.c +++ b/drivers/i2c/busses/i2c-qcom-geni.c @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0 // Copyright (c) 2017-2018, The Linux Foundation. All rights reserved. +#include #include #include #include @@ -483,6 +484,14 @@ static const struct i2c_algorithm geni_i2c_algo = { .functionality = geni_i2c_func, }; +#ifdef CONFIG_ACPI +static const struct acpi_device_id geni_i2c_acpi_match[] = { + { "QCOM0220"}, + { }, +}; +MODULE_DEVICE_TABLE(acpi, geni_i2c_acpi_match); +#endif + static int geni_i2c_probe(struct platform_device *pdev) { struct geni_i2c_dev *gi2c; @@ -502,7 +511,7 @@ static int geni_i2c_probe(struct platform_device *pdev) return PTR_ERR(gi2c->se.base); gi2c->se.clk = devm_clk_get(&pdev->dev, "se"); - if (IS_ERR(gi2c->se.clk)) { + if (IS_ERR(gi2c->se.clk) && !has_acpi_companion(&pdev->dev)) { ret = PTR_ERR(gi2c->se.clk); dev_err(&pdev->dev, "Err getting SE Core clk %d\n", ret); return ret; @@ -516,6 +525,9 @@ static int geni_i2c_probe(struct platform_device *pdev) gi2c->clk_freq_out = KHZ(100); } + if (has_acpi_companion(&pdev->dev)) + ACPI_COMPANION_SET(&gi2c->adap.dev, ACPI_COMPANION(&pdev->dev)); + gi2c->irq = platform_get_irq(pdev, 0); if (gi2c->irq < 0) { dev_err(&pdev->dev, "IRQ error for i2c-geni\n"); @@ -660,6 +672,7 @@ static struct platform_driver geni_i2c_driver = { .name = "geni_i2c", .pm = &geni_i2c_pm_ops, .of_match_table = geni_i2c_dt_match, + .acpi_match_table = ACPI_PTR(geni_i2c_acpi_match), }, }; From patchwork Mon Jun 10 08:42:08 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lee Jones X-Patchwork-Id: 166294 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp759027ilk; Mon, 10 Jun 2019 01:42:58 -0700 (PDT) X-Google-Smtp-Source: APXvYqx6t+A1hK5W+tMxUUkblNf6u4qcmRvjpDaG51fKp9zw4e8VZ9fGD5RJkhQw78ZPQ+pgssON X-Received: by 2002:a63:4185:: with SMTP id o127mr3376084pga.82.1560156177692; Mon, 10 Jun 2019 01:42:57 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1560156177; cv=none; d=google.com; s=arc-20160816; b=cjUBHO4GOjBMwzqs/fNTBrf9/g1LvVCUvBwDv+21wBrqTP9fEJVc1xGATmOuChBAnd pC7JDi/7kg7XYpYdfJJCtNvb9fJRrSnW7LuddMhwNLp8PYB0EDJh8X3W2fucWCKokVt4 3j2A0L21XZJ/xuFglX1qONqOdpdpYYNiBj9d5iHtHi+nWkFPVcPIEgIAC4c44gMWh81w N+AQjExN+kSWkQciSBCHYw++6O66ok4GsgZT+wIeI8QHtELTAigGbW6i7XqTMuOFaaze ZAu3VRd8h5HyadIYcvJ9WEETszo2/nVrlkdaSydFecVxZf5leyPHmE2KbYtGdSiqQ0zj lkDQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=qYq7mFFCoR+D5QhtdnXfa7L63GrDNr+4aaRo7anMzNg=; b=VCCp9THmIPS1mq2PyEBJpDfA9WWc1aFgQQ55SGtxKTTqmgQQ7DogfSpqbsFvNwwV3d 7bPQL4UYFqbVAJC41F4nmMjvXok9qef+PLWkMIHIwj9wLLe6gD8iedBKG9tin2Ii4pXf yXj09qtqaBHTz/Bu+MhUbJNfoaJuBJsz6SyZUbvKhr0O9vXHaWCAqbytYRWUz5VvGruc 6QRwqyZOmBZPHqh5PMCYAhhYbEWUJY8uaotb4ZA69DYneAmchXWbA54M/ABVezulxAHp 4VZu79R55B/1vw58CxL+HGyL2q7GqtdntYWAOSozUQxbAJziGkptHgr0V1ZJ0sb0yLZY tJJw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=HAQGPWUr; spf=pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-gpio-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id w6si2515243pfn.84.2019.06.10.01.42.57; Mon, 10 Jun 2019 01:42:57 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=HAQGPWUr; spf=pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-gpio-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388415AbfFJIm4 (ORCPT + 5 others); Mon, 10 Jun 2019 04:42:56 -0400 Received: from mail-wr1-f66.google.com ([209.85.221.66]:44098 "EHLO mail-wr1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388372AbfFJImU (ORCPT ); Mon, 10 Jun 2019 04:42:20 -0400 Received: by mail-wr1-f66.google.com with SMTP id b17so8236680wrq.11 for ; Mon, 10 Jun 2019 01:42:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=qYq7mFFCoR+D5QhtdnXfa7L63GrDNr+4aaRo7anMzNg=; b=HAQGPWUrBC+m/uOp1ExdylTBwwXMRfgop11L7pNji5XWXcPZW+6ErRLi511mBcytaZ W3UqLkpw33YmjBArJFkiHuEHbOEyKduZ+bAn1mEZaUDLiIz0ME6BhyAqU9BZvH7w4t+c rfxKHG3Vi1cDONkuWZlhKKSyjl21utH0TeuiZXwU6bY4c5DqQm23B1Ij/Kf+CFiZQdZS 1IreLq1aIZRV0ksEv4kfk4qGpXympkIsPxtlWW9qyKWS8h1amE5syenHSK7Z1CX4qH63 7iKFPjYSg8pCpTER+gxm8AcOcrvXC8eg15KcJ/txMHz4kDbhbyfiQ5AM02XS+7GT4M7B 8oMA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=qYq7mFFCoR+D5QhtdnXfa7L63GrDNr+4aaRo7anMzNg=; b=f2T+cFCV7B9nbEJ0XM9/C26peu/GPA3Ihb6wYT1Kt4k87ym1rRkVc4BXcXl0a/FkHQ YW5aYhpkKPpv8VKRKNY9krEHSw0YNLlIjdAjT3lERYQV3WtvSdP8xgDdLk+JMsTrkUlH GeUWrKAT6McnCnfzC8LEF7urXGme0/YLhEAHdCciVXnKV2brnGNLRbG9KSslb8DxutPx FpatZVteTxSCNkAdLQiGdezIGZk8HZ9Ykx5/bQWitpBabjjCfjtljajC+mmhF8LelbK3 25YVB/53rx1pYZt/RUBrdGg2jJd/2jDKF4G6myiedF1RemzZoPpgQphEFr37bXqy2cvr 9NDQ== X-Gm-Message-State: APjAAAVaQLy7na8CHnjC/BYmcqpwc5eXt05tr3J/RoWHHCEwqMO8NFta EeD09/jEoNjGDGv3+Xpi/icpYQ== X-Received: by 2002:adf:ed41:: with SMTP id u1mr28476611wro.162.1560156138478; Mon, 10 Jun 2019 01:42:18 -0700 (PDT) Received: from localhost.localdomain ([2.31.167.229]) by smtp.gmail.com with ESMTPSA id a125sm9929670wmf.42.2019.06.10.01.42.17 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 10 Jun 2019 01:42:18 -0700 (PDT) From: Lee Jones To: alokc@codeaurora.org, andy.gross@linaro.org, david.brown@linaro.org, wsa+renesas@sang-engineering.com, bjorn.andersson@linaro.org, linus.walleij@linaro.org, balbi@kernel.org, gregkh@linuxfoundation.org, ard.biesheuvel@linaro.org, jlhugo@gmail.com, linux-i2c@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org, linux-usb@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Lee Jones Subject: [PATCH v3 3/8] pinctrl: msm: Add ability for drivers to supply a reserved GPIO list Date: Mon, 10 Jun 2019 09:42:08 +0100 Message-Id: <20190610084213.1052-3-lee.jones@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190610084213.1052-1-lee.jones@linaro.org> References: <20190610084213.1052-1-lee.jones@linaro.org> Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org When booting MSM based platforms with Device Tree or some ACPI implementations, it is possible to provide a list of reserved pins via the 'gpio-reserved-ranges' and 'gpios' properties respectively. However some ACPI tables are not populated with this information, thus it has to come from a knowledgable device driver instead. Here we provide the MSM common driver with additional support to parse this informtion and correctly populate the widely used 'valid_mask'. Signed-off-by: Lee Jones Reviewed-by: Bjorn Andersson --- drivers/pinctrl/qcom/pinctrl-msm.c | 18 ++++++++++++++++++ drivers/pinctrl/qcom/pinctrl-msm.h | 1 + 2 files changed, 19 insertions(+) -- 2.17.1 diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c b/drivers/pinctrl/qcom/pinctrl-msm.c index ee8119879c4c..3ac740b36508 100644 --- a/drivers/pinctrl/qcom/pinctrl-msm.c +++ b/drivers/pinctrl/qcom/pinctrl-msm.c @@ -607,8 +607,23 @@ static int msm_gpio_init_valid_mask(struct gpio_chip *chip) int ret; unsigned int len, i; unsigned int max_gpios = pctrl->soc->ngpios; + const int *reserved = pctrl->soc->reserved_gpios; u16 *tmp; + /* Driver provided reserved list overrides DT and ACPI */ + if (reserved) { + bitmap_fill(chip->valid_mask, max_gpios); + for (i = 0; reserved[i] >= 0; i++) { + if (i >= max_gpios || reserved[i] >= max_gpios) { + dev_err(pctrl->dev, "invalid list of reserved GPIOs\n"); + return -EINVAL; + } + clear_bit(reserved[i], chip->valid_mask); + } + + return 0; + } + /* The number of GPIOs in the ACPI tables */ len = ret = device_property_read_u16_array(pctrl->dev, "gpios", NULL, 0); @@ -964,6 +979,9 @@ static void msm_gpio_irq_handler(struct irq_desc *desc) static bool msm_gpio_needs_valid_mask(struct msm_pinctrl *pctrl) { + if (pctrl->soc->reserved_gpios) + return true; + return device_property_read_u16_array(pctrl->dev, "gpios", NULL, 0) > 0; } diff --git a/drivers/pinctrl/qcom/pinctrl-msm.h b/drivers/pinctrl/qcom/pinctrl-msm.h index c12048e54a6f..23b93ae92269 100644 --- a/drivers/pinctrl/qcom/pinctrl-msm.h +++ b/drivers/pinctrl/qcom/pinctrl-msm.h @@ -121,6 +121,7 @@ struct msm_pinctrl_soc_data { bool pull_no_keeper; const char *const *tiles; unsigned int ntiles; + const int *reserved_gpios; }; extern const struct dev_pm_ops msm_pinctrl_dev_pm_ops; From patchwork Mon Jun 10 08:42:11 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lee Jones X-Patchwork-Id: 166289 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp758564ilk; Mon, 10 Jun 2019 01:42:25 -0700 (PDT) X-Google-Smtp-Source: APXvYqxNJGHR5vtAgJ6HMzjzpTMhU98Dam4fDVm7OwSHraxv+dnle3WZOOrzCn/zxrYgKDcy0JUv X-Received: by 2002:a17:90a:216c:: with SMTP id a99mr19327662pje.3.1560156145747; Mon, 10 Jun 2019 01:42:25 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1560156145; cv=none; d=google.com; s=arc-20160816; b=fl2QFJH3jrlHDjxb6FOYWdrXL0CHMYjFQXMlslsG5ArxuF+mJYkPPlTO3VSPjmte9t P2MfmSmb2kK/aEYm15hgE91m/ojhydytp1CdblbZCk0UB49PChIVar3PzZXukCa+/Qf8 XEC7SRl5KumkDqPzTgYe4T7+g4OF7pRNhqzOv31EFqV591VmBVzZNFW0BaLFfLoONesv j8UDGhfRlw7s/QpR8qVcUQDl1L87+QFwi4/HmBWyu836wl7XiByA/S/xpoiRHp7jc6LO idhD3W4vidaei+YHjU3CEUmA8MD7fxsrqtB2k1vE7wav1qevbP9GqK8sgWQSgRL7W2GG A+nw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=iMMvAXzGLsQwSezHyS9OpS4cWeW7/Qz0qZkMusu5eaE=; b=OqHtpl/SI/oqxYW7rJBQnh+vM3KpoLwIIoq/P/dVmAyk7CxwV9cyadj4xujexcRvoM 6yLLKhMwuhYEcWTlHB4K6pIKSnAmWT7SANJccis1an2MsN8dLbOXq7LNx7VC5GfqZzaW PZ5VA04MdptUni2cRUH6uo1aHLjAUlhqCOtsdRt+MP9i0fvZSJlpipLWq33YVREKEzbG Z7B2Hi5JvzeSZAEMYHHV4QeFDcqb3Qf/OPju6XDmN+wNJEnHObvCDeHGj0hSc4znvT4N EcmNh92HWNtWLddaWnlMKlfZkzijG17iYs/o6Z/84fX1mLuSQYZapQuKzGJu+KAmDbtZ yA4w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=fNrlA4zh; spf=pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-gpio-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Thus when describing relationships in Device Tree, the current default boot configuration table option, the DWC3 core often resides as a child of the platform specific node. Both of which are given their own address space descriptions and the drivers can be mostly agnostic to each other. However, other Operating Systems have taken a more monolithic approach, which is evident in the configuration ACPI tables for the Qualcomm Snapdragon SDM850, where all DWC3 (core and platform) components are described under a single IO memory region. To ensure successful booting using the supplied ACPI tables, we need to devise a way to chop up the address regions provided and subsequently register the DWC3 core with the resultant information, which is precisely what this patch aims to achieve. Signed-off-by: Lee Jones --- drivers/usb/dwc3/Kconfig | 2 +- drivers/usb/dwc3/dwc3-qcom.c | 206 ++++++++++++++++++++++++++++++----- 2 files changed, 179 insertions(+), 29 deletions(-) -- 2.17.1 diff --git a/drivers/usb/dwc3/Kconfig b/drivers/usb/dwc3/Kconfig index 2b1494460d0c..6dab3fd1e233 100644 --- a/drivers/usb/dwc3/Kconfig +++ b/drivers/usb/dwc3/Kconfig @@ -116,7 +116,7 @@ config USB_DWC3_ST config USB_DWC3_QCOM tristate "Qualcomm Platform" depends on EXTCON && (ARCH_QCOM || COMPILE_TEST) - depends on OF + depends on (OF || ACPI) default USB_DWC3 help Some Qualcomm SoCs use DesignWare Core IP for USB2/3 diff --git a/drivers/usb/dwc3/dwc3-qcom.c b/drivers/usb/dwc3/dwc3-qcom.c index 184df4daa590..1e1f12b7991d 100644 --- a/drivers/usb/dwc3/dwc3-qcom.c +++ b/drivers/usb/dwc3/dwc3-qcom.c @@ -4,6 +4,7 @@ * Inspired by dwc3-of-simple.c */ +#include #include #include #include @@ -38,6 +39,20 @@ #define PWR_EVNT_LPM_IN_L2_MASK BIT(4) #define PWR_EVNT_LPM_OUT_L2_MASK BIT(5) +#define SDM845_QSCRATCH_BASE_OFFSET 0xf8800 +#define SDM845_QSCRATCH_SIZE 0x400 +#define SDM845_DWC3_CORE_SIZE 0xcd00 + +struct dwc3_acpi_pdata { + u32 qscratch_base_offset; + u32 qscratch_base_size; + u32 dwc3_core_base_size; + int hs_phy_irq_index; + int dp_hs_phy_irq_index; + int dm_hs_phy_irq_index; + int ss_phy_irq_index; +}; + struct dwc3_qcom { struct device *dev; void __iomem *qscratch_base; @@ -56,6 +71,8 @@ struct dwc3_qcom { struct notifier_block vbus_nb; struct notifier_block host_nb; + const struct dwc3_acpi_pdata *acpi_pdata; + enum usb_dr_mode mode; bool is_suspended; bool pm_suspended; @@ -300,12 +317,27 @@ static void dwc3_qcom_select_utmi_clk(struct dwc3_qcom *qcom) PIPE_UTMI_CLK_DIS); } +static int dwc3_qcom_get_irq(struct platform_device *pdev, + const char *name, int num) +{ + struct device_node *np = pdev->dev.of_node; + int ret; + + if (np) + ret = platform_get_irq_byname(pdev, name); + else + ret = platform_get_irq(pdev, num); + + return ret; +} + static int dwc3_qcom_setup_irq(struct platform_device *pdev) { struct dwc3_qcom *qcom = platform_get_drvdata(pdev); + const struct dwc3_acpi_pdata *pdata = qcom->acpi_pdata; int irq, ret; - - irq = platform_get_irq_byname(pdev, "hs_phy_irq"); + irq = dwc3_qcom_get_irq(pdev, "hs_phy_irq", + pdata ? pdata->hs_phy_irq_index : -1); if (irq > 0) { /* Keep wakeup interrupts disabled until suspend */ irq_set_status_flags(irq, IRQ_NOAUTOEN); @@ -320,7 +352,8 @@ static int dwc3_qcom_setup_irq(struct platform_device *pdev) qcom->hs_phy_irq = irq; } - irq = platform_get_irq_byname(pdev, "dp_hs_phy_irq"); + irq = dwc3_qcom_get_irq(pdev, "dp_hs_phy_irq", + pdata ? pdata->dp_hs_phy_irq_index : -1); if (irq > 0) { irq_set_status_flags(irq, IRQ_NOAUTOEN); ret = devm_request_threaded_irq(qcom->dev, irq, NULL, @@ -334,7 +367,8 @@ static int dwc3_qcom_setup_irq(struct platform_device *pdev) qcom->dp_hs_phy_irq = irq; } - irq = platform_get_irq_byname(pdev, "dm_hs_phy_irq"); + irq = dwc3_qcom_get_irq(pdev, "dm_hs_phy_irq", + pdata ? pdata->dm_hs_phy_irq_index : -1); if (irq > 0) { irq_set_status_flags(irq, IRQ_NOAUTOEN); ret = devm_request_threaded_irq(qcom->dev, irq, NULL, @@ -348,7 +382,8 @@ static int dwc3_qcom_setup_irq(struct platform_device *pdev) qcom->dm_hs_phy_irq = irq; } - irq = platform_get_irq_byname(pdev, "ss_phy_irq"); + irq = dwc3_qcom_get_irq(pdev, "ss_phy_irq", + pdata ? pdata->ss_phy_irq_index : -1); if (irq > 0) { irq_set_status_flags(irq, IRQ_NOAUTOEN); ret = devm_request_threaded_irq(qcom->dev, irq, NULL, @@ -371,11 +406,11 @@ static int dwc3_qcom_clk_init(struct dwc3_qcom *qcom, int count) struct device_node *np = dev->of_node; int i; - qcom->num_clocks = count; - - if (!count) + if (!np || !count) return 0; + qcom->num_clocks = count; + qcom->clks = devm_kcalloc(dev, qcom->num_clocks, sizeof(struct clk *), GFP_KERNEL); if (!qcom->clks) @@ -409,12 +444,103 @@ static int dwc3_qcom_clk_init(struct dwc3_qcom *qcom, int count) return 0; } -static int dwc3_qcom_probe(struct platform_device *pdev) +static int dwc3_qcom_acpi_register_core(struct platform_device *pdev) { + struct dwc3_qcom *qcom = platform_get_drvdata(pdev); + struct device *dev = &pdev->dev; + struct resource *res, *child_res = NULL; + int irq; + int ret; + + qcom->dwc3 = platform_device_alloc("dwc3", PLATFORM_DEVID_AUTO); + if (!qcom->dwc3) + return -ENOMEM; + + qcom->dwc3->dev.parent = dev; + qcom->dwc3->dev.type = dev->type; + qcom->dwc3->dev.dma_mask = dev->dma_mask; + qcom->dwc3->dev.dma_parms = dev->dma_parms; + qcom->dwc3->dev.coherent_dma_mask = dev->coherent_dma_mask; + + child_res = kcalloc(2, sizeof(*child_res), GFP_KERNEL); + if (!child_res) + return -ENOMEM; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!res) { + dev_err(&pdev->dev, "failed to get memory resource\n"); + ret = -ENODEV; + goto out; + } + + child_res[0].flags = res->flags; + child_res[0].start = res->start; + child_res[0].end = child_res[0].start + + qcom->acpi_pdata->dwc3_core_base_size; + + irq = platform_get_irq(pdev, 0); + child_res[1].flags = IORESOURCE_IRQ; + child_res[1].start = child_res[1].end = irq; + + ret = platform_device_add_resources(qcom->dwc3, child_res, 2); + if (ret) { + dev_err(&pdev->dev, "failed to add resources\n"); + goto out; + } + + ret = platform_device_add(qcom->dwc3); + if (ret) + dev_err(&pdev->dev, "failed to add device\n"); + +out: + kfree(child_res); + return ret; +} + +static int dwc3_qcom_of_register_core(struct platform_device *pdev) +{ + struct dwc3_qcom *qcom = platform_get_drvdata(pdev); struct device_node *np = pdev->dev.of_node, *dwc3_np; struct device *dev = &pdev->dev; + int ret; + + dwc3_np = of_get_child_by_name(np, "dwc3"); + if (!dwc3_np) { + dev_err(dev, "failed to find dwc3 core child\n"); + return -ENODEV; + } + + ret = of_platform_populate(np, NULL, NULL, dev); + if (ret) { + dev_err(dev, "failed to register dwc3 core - %d\n", ret); + return ret; + } + + qcom->dwc3 = of_find_device_by_node(dwc3_np); + if (!qcom->dwc3) { + dev_err(dev, "failed to get dwc3 platform device\n"); + return -ENODEV; + } + + return 0; +} + +static const struct dwc3_acpi_pdata sdm845_acpi_pdata = { + .qscratch_base_offset = SDM845_QSCRATCH_BASE_OFFSET, + .qscratch_base_size = SDM845_QSCRATCH_SIZE, + .dwc3_core_base_size = SDM845_DWC3_CORE_SIZE, + .hs_phy_irq_index = 1, + .dp_hs_phy_irq_index = 4, + .dm_hs_phy_irq_index = 3, + .ss_phy_irq_index = 2 +}; + +static int dwc3_qcom_probe(struct platform_device *pdev) +{ + struct device_node *np = pdev->dev.of_node; + struct device *dev = &pdev->dev; struct dwc3_qcom *qcom; - struct resource *res; + struct resource *res, *parent_res = NULL; int ret, i; bool ignore_pipe_clk; @@ -425,6 +551,14 @@ static int dwc3_qcom_probe(struct platform_device *pdev) platform_set_drvdata(pdev, qcom); qcom->dev = &pdev->dev; + if (ACPI_HANDLE(dev)) { + qcom->acpi_pdata = acpi_device_get_match_data(dev); + if (!qcom->acpi_pdata) { + dev_err(&pdev->dev, "no supporting ACPI device data\n"); + return -EINVAL; + } + } + qcom->resets = devm_reset_control_array_get_optional_exclusive(dev); if (IS_ERR(qcom->resets)) { ret = PTR_ERR(qcom->resets); @@ -454,7 +588,21 @@ static int dwc3_qcom_probe(struct platform_device *pdev) } res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - qcom->qscratch_base = devm_ioremap_resource(dev, res); + + if (np) { + parent_res = res; + } else { + parent_res = kmemdup(res, sizeof(struct resource), GFP_KERNEL); + if (!parent_res) + return -ENOMEM; + + parent_res->start = res->start + + qcom->acpi_pdata->qscratch_base_offset; + parent_res->end = parent_res->start + + qcom->acpi_pdata->qscratch_base_size; + } + + qcom->qscratch_base = devm_ioremap_resource(dev, parent_res); if (IS_ERR(qcom->qscratch_base)) { dev_err(dev, "failed to map qscratch, err=%d\n", ret); ret = PTR_ERR(qcom->qscratch_base); @@ -462,13 +610,8 @@ static int dwc3_qcom_probe(struct platform_device *pdev) } ret = dwc3_qcom_setup_irq(pdev); - if (ret) - goto clk_disable; - - dwc3_np = of_get_child_by_name(np, "dwc3"); - if (!dwc3_np) { - dev_err(dev, "failed to find dwc3 core child\n"); - ret = -ENODEV; + if (ret) { + dev_err(dev, "failed to setup IRQs, err=%d\n", ret); goto clk_disable; } @@ -481,16 +624,13 @@ static int dwc3_qcom_probe(struct platform_device *pdev) if (ignore_pipe_clk) dwc3_qcom_select_utmi_clk(qcom); - ret = of_platform_populate(np, NULL, NULL, dev); - if (ret) { - dev_err(dev, "failed to register dwc3 core - %d\n", ret); - goto clk_disable; - } + if (np) + ret = dwc3_qcom_of_register_core(pdev); + else + ret = dwc3_qcom_acpi_register_core(pdev); - qcom->dwc3 = of_find_device_by_node(dwc3_np); - if (!qcom->dwc3) { - dev_err(&pdev->dev, "failed to get dwc3 platform device\n"); - ret = -ENODEV; + if (ret) { + dev_err(dev, "failed to register DWC3 Core, err=%d\n", ret); goto depopulate; } @@ -514,7 +654,10 @@ static int dwc3_qcom_probe(struct platform_device *pdev) return 0; depopulate: - of_platform_depopulate(&pdev->dev); + if (np) + of_platform_depopulate(&pdev->dev); + else + platform_device_put(pdev); clk_disable: for (i = qcom->num_clocks - 1; i >= 0; i--) { clk_disable_unprepare(qcom->clks[i]); @@ -601,6 +744,12 @@ static const struct of_device_id dwc3_qcom_of_match[] = { }; MODULE_DEVICE_TABLE(of, dwc3_qcom_of_match); +static const struct acpi_device_id dwc3_qcom_acpi_match[] = { + { "QCOM2430", (unsigned long)&sdm845_acpi_pdata }, + { }, +}; +MODULE_DEVICE_TABLE(acpi, dwc3_qcom_acpi_match); + static struct platform_driver dwc3_qcom_driver = { .probe = dwc3_qcom_probe, .remove = dwc3_qcom_remove, @@ -608,6 +757,7 @@ static struct platform_driver dwc3_qcom_driver = { .name = "dwc3-qcom", .pm = &dwc3_qcom_dev_pm_ops, .of_match_table = dwc3_qcom_of_match, + .acpi_match_table = ACPI_PTR(dwc3_qcom_acpi_match), }, };