From patchwork Wed May 17 10:53:03 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcin Juszkiewicz X-Patchwork-Id: 682921 Delivered-To: patch@linaro.org Received: by 2002:a5d:4e01:0:0:0:0:0 with SMTP id p1csp285022wrt; Wed, 17 May 2023 03:53:36 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ4AeykA2GREQRhw4ogLxh+WuH+eEgTykbzQjtqoZZCBYUq2pDzlxxuQCRuiTBhXoxEBsMUp X-Received: by 2002:a05:6214:5290:b0:5ef:8159:b9a9 with SMTP id kj16-20020a056214529000b005ef8159b9a9mr61848679qvb.21.1684320816504; Wed, 17 May 2023 03:53:36 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1684320816; cv=none; d=google.com; s=arc-20160816; b=mYVNsAJRH+fQ6gtDNZpiEBHqwUQE1P0kM3bL+DbXP/JwJK5hfWh6k5zs0hrcHcm7sw DCIOd4MLQHov1euZfECrzaQtymshJLhxocAouQbLu0rDSCi/m1d8mTkuc94/c4BTJ0s5 kMFIPbQXKAEwz8eWmQFqTA8mEzxvQaTVaIqCzaU22T3xA5abQ4Ov7mMJxE4Z0CC2zNvo x4GAWH2kn+7xEZbbkndILZCPvLS9rxCOXY/o7DDGj2yYWTxa+8zyL34LCxScaN9u2pVa AKWgMN5Yq5RooOvuaoXjj/FWiUAh54yrrb7YxhEt5mkhOhT0O8p96LshlCJr9VDrqmv3 qFLw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:message-id:date:subject:cc:to:from; bh=mO5b/FJXc/pTaAiVtkSQ9MXnSLdPkTIXBd1RX+caGrY=; b=Da1b1NTTVCWD5VtQns7Llu2DGYf/T9EL7YTkuL5mB6tf9f+hFgYobkK0JnwiTjgz4X 1BHz9GFvHZtBSSKH5ODQ0xUQUR8ysN7hSFaveOkRGoBV4m3zTEt6GqVAnKcWjH0vGpz6 dLfrnFEjvV8eJb5IKjEJdFYhLjCN3ThHIiIGYzfBSo49XHIdfZ6tNeSGOx7N7r5N/+07 4ZqIWfcX0DCzSJ99ppTiXA+imgOkb+FEwpOyMb+aAW2laSNceD00exPbj6jDiwPjtHP+ Wm55lAnG9OLXVBVGDDDvEkjNOPZRu6UtV45NkuHYxhEwihrwXs33AClC05r4vso+XLv5 T8uQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id y9-20020a37e309000000b0074fc523b35dsi1147218qki.311.2023.05.17.03.53.36 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 17 May 2023 03:53:36 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pzEmP-0001HQ-QM; Wed, 17 May 2023 06:53:13 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pzEmO-0001HD-6h; Wed, 17 May 2023 06:53:12 -0400 Received: from muminek.juszkiewicz.com.pl ([213.251.184.221]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pzEmM-0002Er-Mx; Wed, 17 May 2023 06:53:11 -0400 Received: from localhost (localhost [127.0.0.1]) by muminek.juszkiewicz.com.pl (Postfix) with ESMTP id C634A260B87; Wed, 17 May 2023 12:53:07 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at juszkiewicz.com.pl Received: from muminek.juszkiewicz.com.pl ([127.0.0.1]) by localhost (muminek.juszkiewicz.com.pl [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id p-Xpu8dioxNR; Wed, 17 May 2023 12:53:06 +0200 (CEST) Received: from applejack.lan (83.11.34.59.ipv4.supernova.orange.pl [83.11.34.59]) by muminek.juszkiewicz.com.pl (Postfix) with ESMTPSA id AFAD92600A3; Wed, 17 May 2023 12:53:05 +0200 (CEST) From: Marcin Juszkiewicz To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, Leif Lindholm , Peter Maydell , Marcin Juszkiewicz Subject: [PATCH v2] hw/arm/sbsa-ref: add GIC node into DT Date: Wed, 17 May 2023 12:53:03 +0200 Message-Id: <20230517105303.453161-1-marcin.juszkiewicz@linaro.org> X-Mailer: git-send-email 2.40.1 MIME-Version: 1.0 Received-SPF: softfail client-ip=213.251.184.221; envelope-from=marcin.juszkiewicz@linaro.org; helo=muminek.juszkiewicz.com.pl X-Spam_score_int: -11 X-Spam_score: -1.2 X-Spam_bar: - X-Spam_report: (-1.2 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_NONE=0.001, SPF_SOFTFAIL=0.665, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Let add GIC information into DeviceTree as part of SBSA-REF versioning. Trusted Firmware will read it and provide to next firmware level. Bumps platform version to 0.1 one so we can check is node is present. Signed-off-by: Marcin Juszkiewicz Reviewed-by: Leif Lindholm --- hw/arm/sbsa-ref.c | 19 ++++++++++++++++++- 1 file changed, 18 insertions(+), 1 deletion(-) diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c index 792371fdce..9204e8605f 100644 --- a/hw/arm/sbsa-ref.c +++ b/hw/arm/sbsa-ref.c @@ -29,6 +29,7 @@ #include "exec/hwaddr.h" #include "kvm_arm.h" #include "hw/arm/boot.h" +#include "hw/arm/fdt.h" #include "hw/arm/smmuv3.h" #include "hw/block/flash.h" #include "hw/boards.h" @@ -168,6 +169,20 @@ static uint64_t sbsa_ref_cpu_mp_affinity(SBSAMachineState *sms, int idx) return arm_cpu_mp_affinity(idx, clustersz); } +static void sbsa_fdt_add_gic_node(SBSAMachineState *sms) +{ + char *nodename; + + nodename = g_strdup_printf("/intc"); + qemu_fdt_add_subnode(sms->fdt, nodename); + qemu_fdt_setprop_sized_cells(sms->fdt, nodename, "reg", + 2, sbsa_ref_memmap[SBSA_GIC_DIST].base, + 2, sbsa_ref_memmap[SBSA_GIC_DIST].size, + 2, sbsa_ref_memmap[SBSA_GIC_REDIST].base, + 2, sbsa_ref_memmap[SBSA_GIC_REDIST].size); + + g_free(nodename); +} /* * Firmware on this machine only uses ACPI table to load OS, these limited * device tree nodes are just to let firmware know the info which varies from @@ -204,7 +219,7 @@ static void create_fdt(SBSAMachineState *sms) * fw compatibility. */ qemu_fdt_setprop_cell(fdt, "/", "machine-version-major", 0); - qemu_fdt_setprop_cell(fdt, "/", "machine-version-minor", 0); + qemu_fdt_setprop_cell(fdt, "/", "machine-version-minor", 1); if (ms->numa_state->have_numa_distance) { int size = nb_numa_nodes * nb_numa_nodes * 3 * sizeof(uint32_t); @@ -260,6 +275,8 @@ static void create_fdt(SBSAMachineState *sms) g_free(nodename); } + + sbsa_fdt_add_gic_node(sms); } #define SBSA_FLASH_SECTOR_SIZE (256 * KiB)