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Thu, 18 May 2023 08:44:41 +0000 From: haibo.chen@nxp.com To: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de Cc: kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com, devicetree@vger.kernel.org, haibo.chen@nxp.com Subject: [PATCH] ARM: dts: imx6sll-evk: add eMMC node support Date: Thu, 18 May 2023 16:47:33 +0800 Message-Id: <20230518084733.344162-1-haibo.chen@nxp.com> X-Mailer: git-send-email 2.34.1 X-ClientProxiedBy: SI2PR01CA0045.apcprd01.prod.exchangelabs.com (2603:1096:4:193::19) To DB7PR04MB4010.eurprd04.prod.outlook.com (2603:10a6:5:21::30) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DB7PR04MB4010:EE_|DB9PR04MB8266:EE_ X-MS-Office365-Filtering-Correlation-Id: fc511dce-73b0-47a8-a836-08db577c1f23 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: wu4qLvtjq1ZhO6lWgeItXmljJOU+ZS7+XQpDtQrvUwZdGpmK8o4xW3oQcRcR5f3C1mh6DlQn1XJlIzRXqqEoAfltqHTR9k+HrgPuy6DAcwHY1qfPIMk1+87RUi19vrcATtj7ULq2rcv/ktMzeZwjDDzi3DTLrEd5p/JDPEaarXdrgqYo6DMNsUmu2yqJCl92TpbgRbMNVNNaryg2CRiNPQnoWbYqXv/jMJpVWlmBrrSzu5Wb5Bc0HX/0yAl5fettxzLgDBsOSBkI39XDU6vSocU1v8WaOQJi+dz7Xe/k+9klICOgWecvwNreXBei5Ax+ttTFac1wX+xglrpI8CboLYMwuWHD6V93xH7y9oFUi2c+6X7aBI0ZBKtdHWEr9eSuVd9wNqvSrIw09fMUOR2WOr9MF1XPF076cmAdrEsk7ozD9HxdW1C7HwMK9gvkowJtVasL6tvx+hyKRCGiP77JXeJfSWIZXfjKevYeEUNTWkHy3M7vpmBfWnEgIUfSSORH/k7hNBpoif9hLQGwojQiH1o1PlR8dDP35EfYQDUvKbI9R79nM2gCtZbxkXk7WxgmkQFb3mp2jwc7nDnb8xxBJF+Zsu2nIggR0RcSCOcRZzkDwMqR0X8DLihcRpCfzdOcIWp+OKIg1vsZIwhNeBiM5A== X-Forefront-Antispam-Report: CIP:255.255.255.255; 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Signed-off-by: Haibo Chen --- arch/arm/boot/dts/imx6sll-evk.dts | 67 +++++++++++++++++++++++++++++++ 1 file changed, 67 insertions(+) diff --git a/arch/arm/boot/dts/imx6sll-evk.dts b/arch/arm/boot/dts/imx6sll-evk.dts index 269092ac881c..a83c133717b9 100644 --- a/arch/arm/boot/dts/imx6sll-evk.dts +++ b/arch/arm/boot/dts/imx6sll-evk.dts @@ -109,6 +109,14 @@ reg_sd1_vmmc: regulator-sd1-vmmc { enable-active-high; }; + reg_sd2_vmmc: regulator-sd2-vmmc { + compatible = "regulator-fixed"; + regulator-name = "eMMC-VCCQ"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + }; + reg_sd3_vmmc: regulator-sd3-vmmc { compatible = "regulator-fixed"; pinctrl-names = "default"; @@ -343,6 +351,17 @@ &usdhc1 { status = "okay"; }; +&usdhc2 { + pinctrl-names = "default", "state_100mhz", "state_200mhz"; + pinctrl-0 = <&pinctrl_usdhc2>; + pinctrl-1 = <&pinctrl_usdhc2_100mhz>; + pinctrl-2 = <&pinctrl_usdhc2_200mhz>; + bus-width = <8>; + non-removable; + vqmmc-supply = <®_sd2_vmmc>; + status = "okay"; +}; + &usbotg1 { vbus-supply = <®_usb_otg1_vbus>; pinctrl-names = "default"; @@ -466,6 +485,54 @@ MX6SLL_PAD_SD1_DATA3__SD1_DATA3 0x170f9 >; }; + pinctrl_usdhc2: usdhc2grp { + fsl,pins = < + MX6SLL_PAD_SD2_CMD__SD2_CMD 0x17059 + MX6SLL_PAD_SD2_CLK__SD2_CLK 0x13059 + MX6SLL_PAD_SD2_DATA0__SD2_DATA0 0x17059 + MX6SLL_PAD_SD2_DATA1__SD2_DATA1 0x17059 + MX6SLL_PAD_SD2_DATA2__SD2_DATA2 0x17059 + MX6SLL_PAD_SD2_DATA3__SD2_DATA3 0x17059 + MX6SLL_PAD_SD2_DATA4__SD2_DATA4 0x17059 + MX6SLL_PAD_SD2_DATA5__SD2_DATA5 0x17059 + MX6SLL_PAD_SD2_DATA6__SD2_DATA6 0x17059 + MX6SLL_PAD_SD2_DATA7__SD2_DATA7 0x17059 + MX6SLL_PAD_GPIO4_IO21__SD2_STROBE 0x13059 + >; + }; + + pinctrl_usdhc2_100mhz: usdhc2grp_100mhz { + fsl,pins = < + MX6SLL_PAD_SD2_CMD__SD2_CMD 0x170b9 + MX6SLL_PAD_SD2_CLK__SD2_CLK 0x130b9 + MX6SLL_PAD_SD2_DATA0__SD2_DATA0 0x170b9 + MX6SLL_PAD_SD2_DATA1__SD2_DATA1 0x170b9 + MX6SLL_PAD_SD2_DATA2__SD2_DATA2 0x170b9 + MX6SLL_PAD_SD2_DATA3__SD2_DATA3 0x170b9 + MX6SLL_PAD_SD2_DATA4__SD2_DATA4 0x170b9 + MX6SLL_PAD_SD2_DATA5__SD2_DATA5 0x170b9 + MX6SLL_PAD_SD2_DATA6__SD2_DATA6 0x170b9 + MX6SLL_PAD_SD2_DATA7__SD2_DATA7 0x170b9 + MX6SLL_PAD_GPIO4_IO21__SD2_STROBE 0x130b9 + >; + }; + + pinctrl_usdhc2_200mhz: usdhc2grp_200mhz { + fsl,pins = < + MX6SLL_PAD_SD2_CMD__SD2_CMD 0x170f9 + MX6SLL_PAD_SD2_CLK__SD2_CLK 0x130f9 + MX6SLL_PAD_SD2_DATA0__SD2_DATA0 0x170f9 + MX6SLL_PAD_SD2_DATA1__SD2_DATA1 0x170f9 + MX6SLL_PAD_SD2_DATA2__SD2_DATA2 0x170f9 + MX6SLL_PAD_SD2_DATA3__SD2_DATA3 0x170f9 + MX6SLL_PAD_SD2_DATA4__SD2_DATA4 0x170f9 + MX6SLL_PAD_SD2_DATA5__SD2_DATA5 0x170f9 + MX6SLL_PAD_SD2_DATA6__SD2_DATA6 0x170f9 + MX6SLL_PAD_SD2_DATA7__SD2_DATA7 0x170f9 + MX6SLL_PAD_GPIO4_IO21__SD2_STROBE 0x130f9 + >; + }; + pinctrl_usbotg1: usbotg1grp { fsl,pins = < MX6SLL_PAD_EPDC_PWR_COM__USB_OTG1_ID 0x17059