From patchwork Mon Jun 10 17:10:48 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Grygorii Strashko X-Patchwork-Id: 166340 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp1272238ilk; Mon, 10 Jun 2019 10:11:52 -0700 (PDT) X-Google-Smtp-Source: APXvYqwek94Iw9zA2j2STxXRJFZ59MZT/Pgu9rB4oLeAWl/KKZ3mBc53Yy0trkh1IFMRfwy6Z9X+ X-Received: by 2002:a17:902:246:: with SMTP id 64mr1369820plc.311.1560186712428; Mon, 10 Jun 2019 10:11:52 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1560186712; cv=none; d=google.com; s=arc-20160816; b=s1jreap1YeqO/jAtF663xxzU2grzudMjr4prKOU7J8m5cMfT1gbSh+qu+pcn6U1vxZ YBL8OwIsjoxb2/D7FimABYJfcivXF+1+J0INmqzo1BIgu4R+8V7HKECSYiScdzk5JBub ag7cS3AxIldoPJ4yFXDX2rmODYvtosDcit+GFG0zrhrrOpbxbXhBdBdJJwGt6tHAx2q8 Z+2OUjQX+4DpxCWJAB3zMU4B2CCSDifRZ4CbiG3lZiHRI+qzyuGKJLsOXtKrP90ZTI0E zNXiBoDKjWzUUtyM2nAP0qTd6/S8hZwO8Q966JCCRi/YSsS3dvSkxDw6lOG2Q2fvm6r7 Nw1A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=z3YzyKVQTJo6QkBGPqZ9gkEZ1EkFSdA9cg7U4o7oZDU=; b=B84OyTYgXuUVlrRDbMaH8kTXc5pf8O/kLcbUq4GvPfmWFOXvndeU/PoDWZM9+M4d0z g8TloouH5/ondC255vBc17VUcFBEkXKl4x5MVHFEbpD0AAsnnQJdE0oI/lnqB4RtYWnM rfCu3xWgJQLOwf5+l+gt/ZaegiwbWOv5qJgWpFKMwQHQaCngxf7q5qbPz1sHD5bIG5iP noQYtx5WIR8zAnIPRkSF6WadkaIBU3LpwqSIqhcxlVF2Cirk9ywGDuafhkeac5oN6h6s 8vLEvO6gIV8wM5s43mHY88FMjrxsb5eOm45qEk12icT9bhNavdiJok0nB2k1cYGfLXA2 8vuQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=tIRRSyB4; spf=pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id r185si9932792pgr.10.2019.06.10.10.11.52; Mon, 10 Jun 2019 10:11:52 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=tIRRSyB4; spf=pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388032AbfFJRLv (ORCPT + 5 others); Mon, 10 Jun 2019 13:11:51 -0400 Received: from fllv0015.ext.ti.com ([198.47.19.141]:47298 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2387415AbfFJRLv (ORCPT ); Mon, 10 Jun 2019 13:11:51 -0400 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id x5AHBjwX069101; Mon, 10 Jun 2019 12:11:45 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1560186705; bh=z3YzyKVQTJo6QkBGPqZ9gkEZ1EkFSdA9cg7U4o7oZDU=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=tIRRSyB4F2qK2E1Re4wYsQI41LQtOjA3HKf0CQx4HixuRI7QXhmY9U0BtmA5gZ+fb YzMPhSDDBU0qT1I/yF0akCKZGooYQ7MRoXaP1/ik+4Kb+6m61TgUytltea3rDAmeR9 4rKQ9Vx4Od9hTCGSinh4Ze/7nOK3xGpxC4tzIHHI= Received: from DFLE109.ent.ti.com (dfle109.ent.ti.com [10.64.6.30]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x5AHBjrJ079893 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 10 Jun 2019 12:11:45 -0500 Received: from DFLE113.ent.ti.com (10.64.6.34) by DFLE109.ent.ti.com (10.64.6.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Mon, 10 Jun 2019 12:11:45 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DFLE113.ent.ti.com (10.64.6.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Mon, 10 Jun 2019 12:11:45 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id x5AHBi5r066791; Mon, 10 Jun 2019 12:11:45 -0500 From: Grygorii Strashko To: Russell King , Linus Walleij , Tony Lindgren CC: Bartosz Golaszewski , , , , Santosh Shilimkar , Russell King , Grygorii Strashko Subject: [PATCH-next 05/20] gpio: gpio-omap: remove irq_ack method Date: Mon, 10 Jun 2019 20:10:48 +0300 Message-ID: <20190610171103.30903-6-grygorii.strashko@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190610171103.30903-1-grygorii.strashko@ti.com> References: <20190610171103.30903-1-grygorii.strashko@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org From: Russell King The irq_ack method does not fit our hardware requirements. Edge interrupts must be cleared before we handle them, and level interrupts must be cleared after handling them. We handle the interrupt clearance in our interrupt handler for edge IRQs and in the unmask method for level IRQs. Replace the irq_ack method with the no-op method from the dummy irq chip. Signed-off-by: Russell King Signed-off-by: Grygorii Strashko --- drivers/gpio/gpio-omap.c | 17 +++-------------- 1 file changed, 3 insertions(+), 14 deletions(-) -- 2.17.1 diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c index 01da1c17bb20..04e3da55e39c 100644 --- a/drivers/gpio/gpio-omap.c +++ b/drivers/gpio/gpio-omap.c @@ -852,14 +852,6 @@ static void gpio_irq_bus_sync_unlock(struct irq_data *data) pm_runtime_put(bank->chip.parent); } -static void omap_gpio_ack_irq(struct irq_data *d) -{ - struct gpio_bank *bank = omap_irq_data_get_bank(d); - unsigned offset = d->hwirq; - - omap_clear_gpio_irqstatus(bank, offset); -} - static void omap_gpio_mask_irq(struct irq_data *d) { struct gpio_bank *bank = omap_irq_data_get_bank(d); @@ -1181,11 +1173,8 @@ static int omap_gpio_chip_init(struct gpio_bank *bank, struct irq_chip *irqc) #endif /* MPUIO is a bit different, reading IRQ status clears it */ - if (bank->is_mpuio) { - irqc->irq_ack = dummy_irq_chip.irq_ack; - if (!bank->regs->wkup_en) - irqc->irq_set_wake = NULL; - } + if (bank->is_mpuio && !bank->regs->wkup_en) + irqc->irq_set_wake = NULL; irq = &bank->chip.irq; irq->chip = irqc; @@ -1531,7 +1520,7 @@ static int omap_gpio_probe(struct platform_device *pdev) irqc->irq_startup = omap_gpio_irq_startup, irqc->irq_shutdown = omap_gpio_irq_shutdown, - irqc->irq_ack = omap_gpio_ack_irq, + irqc->irq_ack = dummy_irq_chip.irq_ack, irqc->irq_mask = omap_gpio_mask_irq, irqc->irq_unmask = omap_gpio_unmask_irq, irqc->irq_set_type = omap_gpio_irq_type, From patchwork Mon Jun 10 17:10:51 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Grygorii Strashko X-Patchwork-Id: 166343 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp1272811ilk; Mon, 10 Jun 2019 10:12:25 -0700 (PDT) X-Google-Smtp-Source: APXvYqzvzdbRlhOg/xqRcYwXAFvDHynedTyYurhO2wzZKbHJHx9tEWF+tMIGhiPbSJWV2c1eloRW X-Received: by 2002:a17:90a:cb81:: with SMTP id a1mr21748432pju.81.1560186745700; Mon, 10 Jun 2019 10:12:25 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1560186745; cv=none; d=google.com; s=arc-20160816; b=fC9g/s0Sx6aVc6sd9/qKVds2LMtECoQMq++jFMknJ0SXHWCNK4S+vs74Cavp6N/Sb4 3/+NvTAbq/VBi+FaV7SsNydD7sjhSE4v77rAhIyAEa7Qe9i5seyr1cp5TDXNBdINfZwI s+oCj8931asq2TAd2kk6rTCPKP5AOW41M8L/LLfLNKtBEovk9I5lURbVdhuJ8QBzhvC8 JgKX+v8MP2/Vd2fwYulDl475eB9UaxZYRO5WRFlpgGIx/K7Ys+8rSMmKN0p1Omko7UGg 57llbj1cPVj4z63KtAXbcjRwHahcOoenS6cfFX9z9bufRKRZ96G6z3RC6Nd3jMiyb2Wk 9YDw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=8miiJXRQL/O8gcf1AHy/TV7t/sY9raPUDixdUMYIf9g=; b=PCw0VQarVTCNTdQcqJJEb3RJVXDI27LNe4RZn8A+Y2CWRDSKzS4CRUlFDUKqYjDgWT XxZWOu2xvIyto5MwhXtJOeApZ9LOQHYlWH62gKwS8aA5VpCalNpCIcIOiOhIGsir33C6 jXMIsLcnBD0no+il0v7FIl4tgIXO4BdJOXwqV/dx/u7tWNTCHsn3Gvwnddl/rBeEgPyw gPkaGpQc96RJuOXxA7cA64+B6K0TX3VjN4jAGzaWGqnIvhAl4Qibo7eCIh6kucd3MAJz 5nrrpP62bWN1+KAdtsf2BN1xiB7uPUgFd5Cu9+ouPE345U11RaTSwmulFI/PfeiRthdN TVmw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=fx+Ma3zC; spf=pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id o20si6237744pgb.561.2019.06.10.10.12.25; Mon, 10 Jun 2019 10:12:25 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=fx+Ma3zC; spf=pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388207AbfFJRMY (ORCPT + 5 others); Mon, 10 Jun 2019 13:12:24 -0400 Received: from lelv0143.ext.ti.com ([198.47.23.248]:57714 "EHLO lelv0143.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2387898AbfFJRMY (ORCPT ); Mon, 10 Jun 2019 13:12:24 -0400 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id x5AHC7UR056957; Mon, 10 Jun 2019 12:12:07 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1560186727; bh=8miiJXRQL/O8gcf1AHy/TV7t/sY9raPUDixdUMYIf9g=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=fx+Ma3zCg0+cpgQg/ubudqf5IMC7ekppCIzWe0Wmi3iQMaH/DdCDAlvTqdBju4rOl /84bmcEkSk3rqPM3R947KYFiBVcLuHPUHgylebfv76PdSLQA3KyDY0hzPhwUD88R1t FDHcMX/X33F+e5k1IAmPalFI2oGXmJhys3ilnHik= Received: from DLEE110.ent.ti.com (dlee110.ent.ti.com [157.170.170.21]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x5AHC6x7010831 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 10 Jun 2019 12:12:07 -0500 Received: from DLEE111.ent.ti.com (157.170.170.22) by DLEE110.ent.ti.com (157.170.170.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Mon, 10 Jun 2019 12:12:05 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DLEE111.ent.ti.com (157.170.170.22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Mon, 10 Jun 2019 12:12:05 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id x5AHC473067224; Mon, 10 Jun 2019 12:12:05 -0500 From: Grygorii Strashko To: Russell King , Linus Walleij , Tony Lindgren CC: Bartosz Golaszewski , , , , Santosh Shilimkar , Russell King , Grygorii Strashko Subject: [PATCH-next 08/20] gpio: gpio-omap: simplify get() method Date: Mon, 10 Jun 2019 20:10:51 +0300 Message-ID: <20190610171103.30903-9-grygorii.strashko@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190610171103.30903-1-grygorii.strashko@ti.com> References: <20190610171103.30903-1-grygorii.strashko@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org From: Russell King omap_gpio_get() calls omap_get_gpio_datain() or omap_get_gpio_dataout() to read the GPIO state. These two functions are only called from this method, so they don't add much value. Move their contents into omap_gpio_get() method and simplify. Signed-off-by: Russell King Signed-off-by: Grygorii Strashko --- drivers/gpio/gpio-omap.c | 25 ++++++------------------- 1 file changed, 6 insertions(+), 19 deletions(-) -- 2.17.1 diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c index 44a4287cce9e..bf1e6f1d0de7 100644 --- a/drivers/gpio/gpio-omap.c +++ b/drivers/gpio/gpio-omap.c @@ -146,20 +146,6 @@ static void omap_set_gpio_dataout_mask(struct gpio_bank *bank, unsigned offset, bank->context.dataout = l; } -static int omap_get_gpio_datain(struct gpio_bank *bank, int offset) -{ - void __iomem *reg = bank->base + bank->regs->datain; - - return (readl_relaxed(reg) & (BIT(offset))) != 0; -} - -static int omap_get_gpio_dataout(struct gpio_bank *bank, int offset) -{ - void __iomem *reg = bank->base + bank->regs->dataout; - - return (readl_relaxed(reg) & (BIT(offset))) != 0; -} - /* set multiple data out values using dedicate set/clear register */ static void omap_set_gpio_dataout_reg_multiple(struct gpio_bank *bank, unsigned long *mask, @@ -973,14 +959,15 @@ static int omap_gpio_input(struct gpio_chip *chip, unsigned offset) static int omap_gpio_get(struct gpio_chip *chip, unsigned offset) { - struct gpio_bank *bank; - - bank = gpiochip_get_data(chip); + struct gpio_bank *bank = gpiochip_get_data(chip); + void __iomem *reg; if (omap_gpio_is_input(bank, offset)) - return omap_get_gpio_datain(bank, offset); + reg = bank->base + bank->regs->datain; else - return omap_get_gpio_dataout(bank, offset); + reg = bank->base + bank->regs->dataout; + + return (readl_relaxed(reg) & BIT(offset)) != 0; } static int omap_gpio_output(struct gpio_chip *chip, unsigned offset, int value) From patchwork Mon Jun 10 17:10:54 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Grygorii Strashko X-Patchwork-Id: 166346 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp1272993ilk; Mon, 10 Jun 2019 10:12:35 -0700 (PDT) X-Google-Smtp-Source: APXvYqw80Z49k8kIIgvnr4jrutF2CK8b8wFWg78hiBN58tUHchQcvFB7bodGUIHrW3t4YYpwLvXs X-Received: by 2002:a62:ed0a:: with SMTP id u10mr42712591pfh.243.1560186755349; Mon, 10 Jun 2019 10:12:35 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1560186755; cv=none; d=google.com; s=arc-20160816; b=E4MyiKtrT8HTLcDzgS3el3sHfJFEdyscwAjdCe+5DJR5QQFFUteZJhryANh7sDmt3c wGaTHifzfrBkQ4bZMNSeLxy4gSpQ9EzTF2YC9EIS0ZpSe6EBKV0gALWsB9pta7SaxaQ6 hkYqECzaYMAdHHoW4pfYygpRHorbTefa4h70eeFsBBKqm3QwLpFfZO0qHWEAi2fqFWjf tM4vavyuofSAUzm02Kw3qetXs4m9r68cqZmvIni1b7SuIl7mVpiullm9MZf8y5bjThyi MIKOJXP25pkQDZ1wW9Rqspg2mxzmBjMADP8z7VKjhpHcqkpKo8DAOgDNNI4tF7PM/y7S Hogg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=Ew1K6dc7XJ3Lz8pVJ6FwwRkOUCloXwI4ODLhOfwKs2A=; b=MFJf7h/czEV/xhPV0Mi3ann5orVik8xUGFfh9zobuAlZ6B50+H/LZoUvDFob5XEX0q gFlXqudu11oqWlt+aqXalnYUwj9gI5ke1o377MBOoTXcEH4bJx5GclQj2Xw1gOdkSWPz /yNS2IWzsdKWrDHcmtLTFwDzMy1cuaTT008MKgBRr35CXbgbb4Le94xa3EIXg4cgh44R LeTSSSZzkr9oN2be8XluxOzNOYpjn8e3R/QxvZAZ1KQoezpbaog041eCB0z776WFgUcv LZt+1kSKtrXggSXN+hzsA3A6BvXj1ofcTwHH/qaoE0Tf3sByzph+jHeWj1I68ebncKNE RjVw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=NHJP3aYQ; spf=pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id a17si21913pjq.31.2019.06.10.10.12.35; Mon, 10 Jun 2019 10:12:35 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=NHJP3aYQ; spf=pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388342AbfFJRMd (ORCPT + 5 others); Mon, 10 Jun 2019 13:12:33 -0400 Received: from lelv0142.ext.ti.com ([198.47.23.249]:58034 "EHLO lelv0142.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388341AbfFJRMc (ORCPT ); Mon, 10 Jun 2019 13:12:32 -0400 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id x5AHCQUD110035; Mon, 10 Jun 2019 12:12:26 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1560186746; bh=Ew1K6dc7XJ3Lz8pVJ6FwwRkOUCloXwI4ODLhOfwKs2A=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=NHJP3aYQ5nFeClYJ+sqWP4MdxtcIfaH7GesHywLvY6k7YAh1v0O80jXr+NlmoGmo2 JhpvOw4f5Uk3hAVUMpt9s8bgdgo1NSTyRWyhh6nTdrbVkEocaCHbZh36ozSUIXZLPG PNlZl1J3aoexuCJAMSvQ4ECvh/lvlR7wGJ9ZEeHw= Received: from DFLE111.ent.ti.com (dfle111.ent.ti.com [10.64.6.32]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x5AHCPxK011206 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 10 Jun 2019 12:12:25 -0500 Received: from DFLE100.ent.ti.com (10.64.6.21) by DFLE111.ent.ti.com (10.64.6.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Mon, 10 Jun 2019 12:12:25 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE100.ent.ti.com (10.64.6.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Mon, 10 Jun 2019 12:12:25 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id x5AHCOJR051660; Mon, 10 Jun 2019 12:12:25 -0500 From: Grygorii Strashko To: Russell King , Linus Walleij , Tony Lindgren CC: Bartosz Golaszewski , , , , Santosh Shilimkar , Russell King , Grygorii Strashko Subject: [PATCH-next 11/20] gpio: gpio-omap: simplify bank->level_mask Date: Mon, 10 Jun 2019 20:10:54 +0300 Message-ID: <20190610171103.30903-12-grygorii.strashko@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190610171103.30903-1-grygorii.strashko@ti.com> References: <20190610171103.30903-1-grygorii.strashko@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org From: Russell King bank->level_mask is merely the bitwise or of the level detection context which we have already read in this function. Rather than repeating additional reads, compute it from the values already read. Signed-off-by: Russell King Signed-off-by: Grygorii Strashko --- drivers/gpio/gpio-omap.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) -- 2.17.1 diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c index 8fdac6e4a929..369ce46e2b09 100644 --- a/drivers/gpio/gpio-omap.c +++ b/drivers/gpio/gpio-omap.c @@ -325,6 +325,9 @@ static inline void omap_set_gpio_trigger(struct gpio_bank *bank, int gpio, bank->context.fallingdetect = readl_relaxed(bank->base + bank->regs->fallingdetect); + bank->level_mask = bank->context.leveldetect0 | + bank->context.leveldetect1; + if (likely(!(bank->non_wakeup_gpios & gpio_bit))) { omap_gpio_rmw(base, bank->regs->wkup_en, gpio_bit, trigger != 0); bank->context.wake_en = @@ -344,10 +347,6 @@ static inline void omap_set_gpio_trigger(struct gpio_bank *bank, int gpio, else bank->enabled_non_wakeup_gpios &= ~gpio_bit; } - - bank->level_mask = - readl_relaxed(bank->base + bank->regs->leveldetect0) | - readl_relaxed(bank->base + bank->regs->leveldetect1); } #ifdef CONFIG_ARCH_OMAP1 From patchwork Mon Jun 10 17:10:55 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Grygorii Strashko X-Patchwork-Id: 166347 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp1273098ilk; Mon, 10 Jun 2019 10:12:40 -0700 (PDT) X-Google-Smtp-Source: APXvYqzeowruYI6oa/J8aLQ8+t09lXBPm2yimwo5dbY+baIhZqgZX2KKsLXPusIb3O1funTShtAn X-Received: by 2002:aa7:97bb:: with SMTP id d27mr8164359pfq.93.1560186760822; Mon, 10 Jun 2019 10:12:40 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1560186760; cv=none; d=google.com; s=arc-20160816; b=HHgp7fUDv/vqu88Dud6DoWF7vTp64hst6HA+AGdDIgpM29o7DBruk67nzyKHQqVZcJ MEbsJhpiUZrR7e2q94RAXwvXF8dqEoAjlldtkUJkP+dMIqktEuc1BkAd58ZbNkxiGBqF ANRvlcuJzXJ1oz7vkwn8TLl16/ZqB4zNszI6sGIli8TuKCEY4CmnsrpuBIy2xAOWexqu gwpIrrgDJd06fHQo2SwDRLTK4enn/HMxUzlzCTQ1ttPfgXa8adGNe5o6n0PjdnLtrMRh 4ljiG2SGebBSlQJfWHE5S73fCUCd97UBwHMc9mhiOBYJLdC6jgmBhdy80hSDbAMBoJh9 Krlw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=5SfKHLCw529kyp6oELk+x6cXgHwfk5Oxq0eDXnkhulU=; b=ltlM3191DQo3MtgJsERqJlWZqSUdJGwYrin5afE73VE+0IR9cbdxYiZuQeYl+rhs56 CR5FhOO4K+LyJXkZsfnQmc5WOfvIYvw+ryIcm/sd+VGN3kAiTibpIeWcjaTUcmcInI4r qwNUmxqr5FOWSf8SIHMictFE+RISMx2mYkM+kCE6fhmw+SqNHoMTYHbK1AOX1Z2guFRO BkHUSUZLvL9eqzCqJuqLiq3eimNVz7t+8oFc9ZzJ7WvYEOiwIl2Y0608ITlFWhDfxkUW ygDheORYBS5AkYdtV+jkJxH5scsp+rN9zD46pOIOjLVuk6yutiN9Ae32/BGHqEQt27mz pOAw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=MUrQlrir; spf=pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Modify the existing helper to return the new value, and arrange for it to take one less argument by having the caller compute the register address. Signed-off-by: Russell King Signed-off-by: Grygorii Strashko --- drivers/gpio/gpio-omap.c | 83 +++++++++++++++------------------------- 1 file changed, 30 insertions(+), 53 deletions(-) -- 2.17.1 diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c index 369ce46e2b09..1a0890586b45 100644 --- a/drivers/gpio/gpio-omap.c +++ b/drivers/gpio/gpio-omap.c @@ -92,20 +92,25 @@ static inline struct gpio_bank *omap_irq_data_get_bank(struct irq_data *d) return gpiochip_get_data(chip); } -static void omap_set_gpio_direction(struct gpio_bank *bank, int gpio, - int is_input) +static inline u32 omap_gpio_rmw(void __iomem *reg, u32 mask, bool set) { - void __iomem *reg = bank->base; - u32 l; + u32 val = readl_relaxed(reg); - reg += bank->regs->direction; - l = readl_relaxed(reg); - if (is_input) - l |= BIT(gpio); + if (set) + val |= mask; else - l &= ~(BIT(gpio)); - writel_relaxed(l, reg); - bank->context.oe = l; + val &= ~mask; + + writel_relaxed(val, reg); + + return val; +} + +static void omap_set_gpio_direction(struct gpio_bank *bank, int gpio, + int is_input) +{ + bank->context.oe = omap_gpio_rmw(bank->base + bank->regs->direction, + BIT(gpio), is_input); } @@ -131,29 +136,8 @@ static void omap_set_gpio_dataout_reg(struct gpio_bank *bank, unsigned offset, static void omap_set_gpio_dataout_mask(struct gpio_bank *bank, unsigned offset, int enable) { - void __iomem *reg = bank->base + bank->regs->dataout; - u32 gpio_bit = BIT(offset); - u32 l; - - l = readl_relaxed(reg); - if (enable) - l |= gpio_bit; - else - l &= ~gpio_bit; - writel_relaxed(l, reg); - bank->context.dataout = l; -} - -static inline void omap_gpio_rmw(void __iomem *base, u32 reg, u32 mask, bool set) -{ - int l = readl_relaxed(base + reg); - - if (set) - l |= mask; - else - l &= ~mask; - - writel_relaxed(l, base + reg); + bank->context.dataout = omap_gpio_rmw(bank->base + bank->regs->dataout, + BIT(offset), enable); } static inline void omap_gpio_dbck_enable(struct gpio_bank *bank) @@ -217,16 +201,9 @@ static int omap2_set_gpio_debounce(struct gpio_bank *bank, unsigned offset, reg = bank->base + bank->regs->debounce; writel_relaxed(debounce, reg); - reg = bank->base + bank->regs->debounce_en; - val = readl_relaxed(reg); - - if (enable) - val |= l; - else - val &= ~l; + val = omap_gpio_rmw(bank->base + bank->regs->debounce_en, l, enable); bank->dbck_enable_mask = val; - writel_relaxed(val, reg); clk_disable(bank->dbck); /* * Enable debounce clock per module. @@ -301,9 +278,9 @@ static inline void omap_set_gpio_trigger(struct gpio_bank *bank, int gpio, void __iomem *base = bank->base; u32 gpio_bit = BIT(gpio); - omap_gpio_rmw(base, bank->regs->leveldetect0, gpio_bit, + omap_gpio_rmw(base + bank->regs->leveldetect0, gpio_bit, trigger & IRQ_TYPE_LEVEL_LOW); - omap_gpio_rmw(base, bank->regs->leveldetect1, gpio_bit, + omap_gpio_rmw(base + bank->regs->leveldetect1, gpio_bit, trigger & IRQ_TYPE_LEVEL_HIGH); /* @@ -311,9 +288,9 @@ static inline void omap_set_gpio_trigger(struct gpio_bank *bank, int gpio, * to be woken from idle state. Set the appropriate edge detection * in addition to the level detection. */ - omap_gpio_rmw(base, bank->regs->risingdetect, gpio_bit, + omap_gpio_rmw(base + bank->regs->risingdetect, gpio_bit, trigger & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_LEVEL_HIGH)); - omap_gpio_rmw(base, bank->regs->fallingdetect, gpio_bit, + omap_gpio_rmw(base + bank->regs->fallingdetect, gpio_bit, trigger & (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_LEVEL_LOW)); bank->context.leveldetect0 = @@ -329,7 +306,7 @@ static inline void omap_set_gpio_trigger(struct gpio_bank *bank, int gpio, bank->context.leveldetect1; if (likely(!(bank->non_wakeup_gpios & gpio_bit))) { - omap_gpio_rmw(base, bank->regs->wkup_en, gpio_bit, trigger != 0); + omap_gpio_rmw(base + bank->regs->wkup_en, gpio_bit, trigger != 0); bank->context.wake_en = readl_relaxed(bank->base + bank->regs->wkup_en); } @@ -414,7 +391,7 @@ static int omap_set_gpio_triggering(struct gpio_bank *bank, int gpio, l |= BIT(gpio << 1); /* Enable wake-up during idle for dynamic tick */ - omap_gpio_rmw(base, bank->regs->wkup_en, BIT(gpio), trigger); + omap_gpio_rmw(base + bank->regs->wkup_en, BIT(gpio), trigger); bank->context.wake_en = readl_relaxed(bank->base + bank->regs->wkup_en); writel_relaxed(l, reg); @@ -451,7 +428,7 @@ static void omap_disable_gpio_module(struct gpio_bank *bank, unsigned offset) !LINE_USED(bank->mod_usage, offset) && !LINE_USED(bank->irq_usage, offset)) { /* Disable wake-up during idle for dynamic tick */ - omap_gpio_rmw(base, bank->regs->wkup_en, BIT(offset), 0); + omap_gpio_rmw(base + bank->regs->wkup_en, BIT(offset), 0); bank->context.wake_en = readl_relaxed(bank->base + bank->regs->wkup_en); } @@ -1046,9 +1023,9 @@ static void omap_gpio_mod_init(struct gpio_bank *bank) return; } - omap_gpio_rmw(base, bank->regs->irqenable, l, + omap_gpio_rmw(base + bank->regs->irqenable, l, bank->regs->irqenable_inv); - omap_gpio_rmw(base, bank->regs->irqstatus, l, + omap_gpio_rmw(base + bank->regs->irqstatus, l, !bank->regs->irqenable_inv); if (bank->regs->debounce_en) writel_relaxed(0, base + bank->regs->debounce_en); @@ -1219,8 +1196,8 @@ static void omap_gpio_idle(struct gpio_bank *bank, bool may_lose_context) */ if (!bank->loses_context && bank->enabled_non_wakeup_gpios) { nowake = bank->enabled_non_wakeup_gpios; - omap_gpio_rmw(base, bank->regs->fallingdetect, nowake, ~nowake); - omap_gpio_rmw(base, bank->regs->risingdetect, nowake, ~nowake); + omap_gpio_rmw(base + bank->regs->fallingdetect, nowake, ~nowake); + omap_gpio_rmw(base + bank->regs->risingdetect, nowake, ~nowake); } update_gpio_context_count: From patchwork Mon Jun 10 17:10:57 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Grygorii Strashko X-Patchwork-Id: 166349 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp1273443ilk; Mon, 10 Jun 2019 10:12:53 -0700 (PDT) X-Google-Smtp-Source: APXvYqyJ0+ntO53OmcZM6pRscpJX2jaPihMkeI+ki9C6iFC6gnVIU9iO58V1UQwFdo0QdpXO2NKu X-Received: by 2002:a17:902:d717:: with SMTP id w23mr28172798ply.275.1560186773837; Mon, 10 Jun 2019 10:12:53 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1560186773; cv=none; d=google.com; s=arc-20160816; b=W3ZnzM/nxcwXxzAh0OBv8ryhpl3QK+T/mf4oci8m9yZLowcvi9h8phMHeTDLms8uhL Z5SxtEoi35LCkyB3PNXDQm8frCzNqjjjJ75TcqxqWvyH1PO61p3iFEv160iAzDPlrpVG JjlQQOz35KRfGZW1oWew9jrVXBlhDO5euNjQJOyCnKTEn8LU/9Qk9JuZrxW4S0XBLl6k FwreCg5uI6NFtZJDPOV3OMGIhZudbBAvKCbgNSKQ2GYvXzS03s5jto9q6rTpHqcuZrqD KjVHoUX4fb9gnmfA2s4Rksg6NQsQrxFfAuAJnLy9CJokw7AzIVm2Mh3UOhkG50UWQQmV Xmbg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=m1ug7LxSUoFk48EY3hMAGYvppWcbpofYoVD/PZeuruc=; b=I3189geq3BmfRKr6HOMjs614iYU0Su4dI1aOoti6l/Bnzclz+Bzhap2nl77Eb7y8n2 JjJpz1QU0lHSYcB0REuFvxwBPuyhhKy8SImyTnWVGRBkvZhq7zYPi3G1h+PTqPtIGMbp /gS0ZnmmFkRHkyDLp3PlOnKg73ud6bPFMNRL+6WoH1dbq2me1VH0sd8NrC65r+aJIx7W gelijZxIMdbI2/U3ZB3tw+5ymlySgsdQ0IUo2Gex2YEhobjycgZzLlV+vuh+AOatzKbS 0U8fHZvZneJOK9Wk1SQf6Lm86XT2DQreYh54zDsc7jKhH9eXQfchrvY2oZOeqU2eiglC K/Sg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=OKBx1JbC; spf=pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id z2si9706299pln.247.2019.06.10.10.12.53; Mon, 10 Jun 2019 10:12:53 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=OKBx1JbC; spf=pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388531AbfFJRMw (ORCPT + 5 others); Mon, 10 Jun 2019 13:12:52 -0400 Received: from fllv0015.ext.ti.com ([198.47.19.141]:47510 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388374AbfFJRMv (ORCPT ); Mon, 10 Jun 2019 13:12:51 -0400 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id x5AHCkoX069441; Mon, 10 Jun 2019 12:12:46 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1560186766; bh=m1ug7LxSUoFk48EY3hMAGYvppWcbpofYoVD/PZeuruc=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=OKBx1JbCRIvUUAwl0OfhB/oCLyh6xK9/RhHeM3DYIdfMPfKMGkkTv+GsRBbtRruz7 CvioOvK6K2DDtA4PlE2k1Aabjtu4i3LdqmgE8bZ0/Gvb4DJZqU6WxzkyuBxXE/U8Vm R9SQgBLC4Pq9rTMk8f+plbVlypoa3n+K5fnxjIak= Received: from DLEE111.ent.ti.com (dlee111.ent.ti.com [157.170.170.22]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x5AHCkUc046510 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 10 Jun 2019 12:12:46 -0500 Received: from DLEE101.ent.ti.com (157.170.170.31) by DLEE111.ent.ti.com (157.170.170.22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Mon, 10 Jun 2019 12:12:45 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE101.ent.ti.com (157.170.170.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Mon, 10 Jun 2019 12:12:45 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id x5AHCiGH067789; Mon, 10 Jun 2019 12:12:45 -0500 From: Grygorii Strashko To: Russell King , Linus Walleij , Tony Lindgren CC: Bartosz Golaszewski , , , , Santosh Shilimkar , Russell King , Grygorii Strashko Subject: [PATCH-next 14/20] gpio: gpio-omap: simplify omap_set_gpio_irqenable() Date: Mon, 10 Jun 2019 20:10:57 +0300 Message-ID: <20190610171103.30903-15-grygorii.strashko@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190610171103.30903-1-grygorii.strashko@ti.com> References: <20190610171103.30903-1-grygorii.strashko@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org From: Russell King omap_set_gpio_irqenable() calls two helpers that are almost the same apart from whether they set or clear bits. We can consolidate these: - in the set/clear bit register case, we can perform the operation on our saved context copy and write the appropriate set/clear register. - otherwise, we can use our read-modify-write helper and invert enable if irqenable_inv is set. Signed-off-by: Russell King Signed-off-by: Grygorii Strashko --- drivers/gpio/gpio-omap.c | 61 ++++++++++------------------------------ 1 file changed, 15 insertions(+), 46 deletions(-) -- 2.17.1 diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c index 097ed8d1a117..a90e27d7ce5e 100644 --- a/drivers/gpio/gpio-omap.c +++ b/drivers/gpio/gpio-omap.c @@ -529,57 +529,26 @@ static u32 omap_get_gpio_irqbank_mask(struct gpio_bank *bank) return l; } -static void omap_enable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask) -{ - void __iomem *reg = bank->base; - u32 l; - - if (bank->regs->set_irqenable) { - reg += bank->regs->set_irqenable; - l = gpio_mask; - bank->context.irqenable1 |= gpio_mask; - } else { - reg += bank->regs->irqenable; - l = readl_relaxed(reg); - if (bank->regs->irqenable_inv) - l &= ~gpio_mask; - else - l |= gpio_mask; - bank->context.irqenable1 = l; - } - - writel_relaxed(l, reg); -} - -static void omap_disable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask) +static inline void omap_set_gpio_irqenable(struct gpio_bank *bank, + unsigned offset, int enable) { void __iomem *reg = bank->base; - u32 l; + u32 gpio_mask = BIT(offset); - if (bank->regs->clr_irqenable) { - reg += bank->regs->clr_irqenable; - l = gpio_mask; - bank->context.irqenable1 &= ~gpio_mask; + if (bank->regs->set_irqenable && bank->regs->clr_irqenable) { + if (enable) { + reg += bank->regs->set_irqenable; + bank->context.irqenable1 |= gpio_mask; + } else { + reg += bank->regs->clr_irqenable; + bank->context.irqenable1 &= ~gpio_mask; + } + writel_relaxed(gpio_mask, reg); } else { - reg += bank->regs->irqenable; - l = readl_relaxed(reg); - if (bank->regs->irqenable_inv) - l |= gpio_mask; - else - l &= ~gpio_mask; - bank->context.irqenable1 = l; + bank->context.irqenable1 = + omap_gpio_rmw(reg + bank->regs->irqenable, gpio_mask, + enable ^ bank->regs->irqenable_inv); } - - writel_relaxed(l, reg); -} - -static inline void omap_set_gpio_irqenable(struct gpio_bank *bank, - unsigned offset, int enable) -{ - if (enable) - omap_enable_gpio_irqbank(bank, BIT(offset)); - else - omap_disable_gpio_irqbank(bank, BIT(offset)); } /* Use disable_irq_wake() and enable_irq_wake() functions from drivers */ From patchwork Mon Jun 10 17:10:58 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Grygorii Strashko X-Patchwork-Id: 166350 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp1273667ilk; Mon, 10 Jun 2019 10:13:03 -0700 (PDT) X-Google-Smtp-Source: APXvYqxfE7KIRorlpeFN8uJaYb96X9xG7/Zm5lR3iMzsl/WqWcymHi8HVoYTVqoRlD3dERatAV4X X-Received: by 2002:a62:1a8e:: with SMTP id a136mr37355703pfa.22.1560186783624; Mon, 10 Jun 2019 10:13:03 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1560186783; cv=none; d=google.com; s=arc-20160816; b=h0NshNS7+asJ320kTmdWFfLpmwFBjgSkjHyn4y9xhoFJH03WtDSBb1kxGsGK4AXkIB xswtW1gw0rnUyzL9KHIr7VwEd5S3rVynSYgE4BoCL/RgX40SvSVdJNscZLp30tUxNqUD nSuGIwPnkcdblun0cKb/YbgmggdzTKsGPvPYB9DsH7yu0pc4heXZ8viySDNLJr2v5QlO 5eAYsDxmVWMrNl5CLetAQVSE0Uc8Z2bDyil+RX7EserCL9h3PBRbBLgcS6HUyfYp68K3 aYEUJ876TW7h5YXjxOAjX53wkeiPPYgNdSZqEZdUJbKtNL9IunsEI8qk91GI5v4A/msz Sg4Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=xjRoLjnZEnJ71XstATMS/Qw07MjkUWg7z73ux8r3eP4=; b=IsKxvnTRj3cnfLRiVZSerOg7q/NcT7yk83Ua3aLPniAVbei1uiJVSom19eIPZVKHlS 3j4je7K9dIDNtTW08Kmy/IuECVnhHhw4dwFJ/+0vpj0hUxn4clzNZBW389jVVVRn9xXK DiP0E1Qox9cgfwZbJoAuFKH/dMABLPHFwgL2OYaHaHdYe8w4TJ3Yi23YhDYAuUjAyinK B/7esUasbUJqgw94Rd11N7tzKz1q/yaRDMtTdVOpLiR09nMeUK/K8B+dG6mpK/ZfXRyy +L7NfVvlZRv1Sklk38nXVhyapQQgarE5OWkPOYfSrukCvsOYbx+xTF1AlauFjsuPhqbD 6V0w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=hKs2ui5x; spf=pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id q65si8334215pga.325.2019.06.10.10.13.03; Mon, 10 Jun 2019 10:13:03 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=hKs2ui5x; spf=pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2387860AbfFJRNC (ORCPT + 5 others); Mon, 10 Jun 2019 13:13:02 -0400 Received: from fllv0016.ext.ti.com ([198.47.19.142]:44568 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2387500AbfFJRNC (ORCPT ); Mon, 10 Jun 2019 13:13:02 -0400 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id x5AHCqad121864; Mon, 10 Jun 2019 12:12:52 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1560186772; bh=xjRoLjnZEnJ71XstATMS/Qw07MjkUWg7z73ux8r3eP4=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=hKs2ui5xVlE0RGBLpR5vSl8TSEXRTmLazxkxMa6607ZggvtbLK+6GpS+rd1qDHsLQ EfxfuJq/2pG+85yrxvFltTycXKGIX0/2MJTDD7VUWCfeIFPlYTT2EZOdJHvIvJa+pU SGB1S2vPr6j/B1YgbMegGZIbaAyQz6/xUc0tAEl8= Received: from DFLE114.ent.ti.com (dfle114.ent.ti.com [10.64.6.35]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x5AHCqSO011507 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 10 Jun 2019 12:12:52 -0500 Received: from DFLE113.ent.ti.com (10.64.6.34) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Mon, 10 Jun 2019 12:12:52 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DFLE113.ent.ti.com (10.64.6.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Mon, 10 Jun 2019 12:12:52 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id x5AHCp2L067873; Mon, 10 Jun 2019 12:12:52 -0500 From: Grygorii Strashko To: Russell King , Linus Walleij , Tony Lindgren CC: Bartosz Golaszewski , , , , Santosh Shilimkar , Russell King , Grygorii Strashko Subject: [PATCH-next 15/20] gpio: gpio-omap: remove dataout variation in context handling Date: Mon, 10 Jun 2019 20:10:58 +0300 Message-ID: <20190610171103.30903-16-grygorii.strashko@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190610171103.30903-1-grygorii.strashko@ti.com> References: <20190610171103.30903-1-grygorii.strashko@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org From: Russell King When a GPIO block has the set/clear dataout registers implemented, it also has the normal dataout register implemented. Reading this register reads the current GPIO output state, and writing it sets the GPIOs to the explicit state. This is the behaviour that we want when saving and restoring the context, so use the dataout register exclusively. Signed-off-by: Russell King Signed-off-by: Grygorii Strashko --- drivers/gpio/gpio-omap.c | 12 ++---------- 1 file changed, 2 insertions(+), 10 deletions(-) -- 2.17.1 diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c index a90e27d7ce5e..c24a91b2df97 100644 --- a/drivers/gpio/gpio-omap.c +++ b/drivers/gpio/gpio-omap.c @@ -1087,11 +1087,7 @@ static void omap_gpio_init_context(struct gpio_bank *p) p->context.fallingdetect = readl_relaxed(base + regs->fallingdetect); p->context.irqenable1 = readl_relaxed(base + regs->irqenable); p->context.irqenable2 = readl_relaxed(base + regs->irqenable2); - - if (regs->set_dataout && p->regs->clr_dataout) - p->context.dataout = readl_relaxed(base + regs->set_dataout); - else - p->context.dataout = readl_relaxed(base + regs->dataout); + p->context.dataout = readl_relaxed(base + regs->dataout); p->context_valid = true; } @@ -1109,11 +1105,7 @@ static void omap_gpio_restore_context(struct gpio_bank *bank) bank->base + bank->regs->risingdetect); writel_relaxed(bank->context.fallingdetect, bank->base + bank->regs->fallingdetect); - if (bank->regs->set_dataout && bank->regs->clr_dataout) - writel_relaxed(bank->context.dataout, - bank->base + bank->regs->set_dataout); - else - writel_relaxed(bank->context.dataout, + writel_relaxed(bank->context.dataout, bank->base + bank->regs->dataout); writel_relaxed(bank->context.oe, bank->base + bank->regs->direction);