From patchwork Wed May 24 13:39:10 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Olivier Moysan X-Patchwork-Id: 685440 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9D528C77B73 for ; Wed, 24 May 2023 13:40:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235207AbjEXNkQ (ORCPT ); Wed, 24 May 2023 09:40:16 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35924 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234203AbjEXNkO (ORCPT ); Wed, 24 May 2023 09:40:14 -0400 Received: from mx07-00178001.pphosted.com (mx07-00178001.pphosted.com [185.132.182.106]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 45BAEA7; Wed, 24 May 2023 06:40:13 -0700 (PDT) Received: from pps.filterd (m0288072.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 34OCgVK1015625; Wed, 24 May 2023 15:39:51 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=selector1; bh=G9vvnWSLJsuNooiWQS7kP00jY9mJ1HLWlugGthqt8l8=; b=kw38mBeXe5RHnnD2GdW+CYW/6+IGkURLioYttckPR+MDBW3baW8s3rkZXsoFR8UxVMKe bVhZVgDacecLIR1WAHvz22378NEpOLJKkSRIz46JHkhpgVCMnYpYW4cpfxVdgOtIdb4l fZy+Qh/MRx7705ZBhsAzXHsg13WAcJNUaNIbPMh7yjxFtHXh0PnuE92PoJ2ljyBXnJRM J8kz2T9/XI6OL5aPlrvRFU1SW+4FQFxdXlSiArbdQhtzXdyiMqZ1DeWPkDMWyeAVmhC/ fmdnjVjuIXFnlkI97++n7159L5+eHXV/II6JjECwjvOqwS77RzWpYJjtDNM141rLXJ8N sw== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 3qrthk930g-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 24 May 2023 15:39:51 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 7B539100034; Wed, 24 May 2023 15:39:49 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node1.st.com [10.75.129.69]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 759CE229A97; Wed, 24 May 2023 15:39:49 +0200 (CEST) Received: from localhost (10.252.20.36) by SHFDAG1NODE1.st.com (10.75.129.69) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.21; Wed, 24 May 2023 15:39:49 +0200 From: Olivier Moysan To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Coquelin , Alexandre Torgue CC: Olivier Moysan , , , , Subject: [PATCH 1/8] ARM: dts: stm32: add adc internal channels to stm32mp15 Date: Wed, 24 May 2023 15:39:10 +0200 Message-ID: <20230524133918.1439516-2-olivier.moysan@foss.st.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230524133918.1439516-1-olivier.moysan@foss.st.com> References: <20230524133918.1439516-1-olivier.moysan@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.252.20.36] X-ClientProxiedBy: EQNCAS1NODE4.st.com (10.75.129.82) To SHFDAG1NODE1.st.com (10.75.129.69) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.957,Hydra:6.0.573,FMLib:17.11.176.26 definitions=2023-05-24_09,2023-05-24_01,2023-05-22_02 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add STM32 ADC2 internal channels VREFINT and VDDCORE to STM32MP15x SoCs. VBAT internal channel is not defined by default in SoC DT, and has be defined in board DT when needed, instead. This avoids unwanted current consumption on battery, when ADC conversions are performed on any other channels. The internal channels are defined in STM32MP15 SoC DT according to the generic IIO channel bindings. The STM32 driver does not support a mixed use of legacy and generic channels. When generic channels are defined, legacy channels are ignored. This involves that the board device trees using legacy bindings for ADC2, have to be reworked. Signed-off-by: Olivier Moysan --- arch/arm/boot/dts/stm32mp151.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm/boot/dts/stm32mp151.dtsi b/arch/arm/boot/dts/stm32mp151.dtsi index a98ae58e2c1c..9c40b5e679f8 100644 --- a/arch/arm/boot/dts/stm32mp151.dtsi +++ b/arch/arm/boot/dts/stm32mp151.dtsi @@ -1093,6 +1093,8 @@ adc: adc@48003000 { adc1: adc@0 { compatible = "st,stm32mp1-adc"; #io-channel-cells = <1>; + #address-cells = <1>; + #size-cells = <0>; reg = <0x0>; interrupt-parent = <&adc>; interrupts = <0>; @@ -1104,12 +1106,22 @@ adc1: adc@0 { adc2: adc@100 { compatible = "st,stm32mp1-adc"; #io-channel-cells = <1>; + #address-cells = <1>; + #size-cells = <0>; reg = <0x100>; interrupt-parent = <&adc>; interrupts = <1>; dmas = <&dmamux1 10 0x400 0x01>; dma-names = "rx"; status = "disabled"; + channel@13 { + reg = <13>; + label = "vrefint"; + }; + channel@14 { + reg = <14>; + label = "vddcore"; + }; }; }; From patchwork Wed May 24 13:39:13 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Olivier Moysan X-Patchwork-Id: 685439 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3D26AC7EE33 for ; Wed, 24 May 2023 13:40:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235272AbjEXNkS (ORCPT ); Wed, 24 May 2023 09:40:18 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35936 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235200AbjEXNkP (ORCPT ); Wed, 24 May 2023 09:40:15 -0400 Received: from mx07-00178001.pphosted.com (mx07-00178001.pphosted.com [185.132.182.106]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7D126B0; Wed, 24 May 2023 06:40:14 -0700 (PDT) Received: from pps.filterd (m0241204.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 34ODYnw4009311; Wed, 24 May 2023 15:39:53 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=selector1; bh=5tr8+koJbahJlh8pGZf1G18j68F+/fl56MXnG8oEP+c=; b=LFU+C6RAtznVJ4PXz1frySK7ptJocWbhoHxNAbBbh4oTvtBY15mbVZ+oTB4Al421tmf8 RJ76A3gFJ2P4mGC2J8zc9MALGAHlAKYauNqoL3pjBuLNvDTGFRntytdfEWW/rOiFD5xu lCoM3coYRak4HYjZwouIMd5Bvo0Ix87Cp6EIj5Bg7X0zj3vgcTsE+cgr9AopnVOJaUFV mdxoeiX820OWZvcMeQFPmWb5ma4tnlHMVIvWLCr7o9MoNE1fK0+qcyg28Lle9qHuUYMv OpieH0R/hd7kCR6vBBKsrvoev3DIMdWzH9+BUsOJ0yPdhkVObs4LMicIFOO5SDxgns7B jQ== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 3qru86gkfr-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 24 May 2023 15:39:52 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 6227610002A; Wed, 24 May 2023 15:39:52 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node1.st.com [10.75.129.69]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 5A85F229A88; Wed, 24 May 2023 15:39:52 +0200 (CEST) Received: from localhost (10.252.20.36) by SHFDAG1NODE1.st.com (10.75.129.69) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.21; Wed, 24 May 2023 15:39:52 +0200 From: Olivier Moysan To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Coquelin , Alexandre Torgue CC: Olivier Moysan , , , , Subject: [PATCH 4/8] ARM: dts: stm32: enable adc on stm32mp15xx-dkx boards Date: Wed, 24 May 2023 15:39:13 +0200 Message-ID: <20230524133918.1439516-5-olivier.moysan@foss.st.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230524133918.1439516-1-olivier.moysan@foss.st.com> References: <20230524133918.1439516-1-olivier.moysan@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.252.20.36] X-ClientProxiedBy: EQNCAS1NODE4.st.com (10.75.129.82) To SHFDAG1NODE1.st.com (10.75.129.69) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.957,Hydra:6.0.573,FMLib:17.11.176.26 definitions=2023-05-24_09,2023-05-24_01,2023-05-22_02 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org U-Boot enables ADC1&2 to support USB power measurement and ADC calibration on STM32MP15x Disco boards. When leaving U-boot the ADCs do not return to power down state to keep ADC linear calibration available for kernel. Enable ADC1&2 by default on STM32MP15xx-DKx boards to align kernel DT with Uboot. This avoids to shutdown the ADCs VDDA, while the ADCs are not in power down. Use STM32 ADC generic bindings instead of legacy bindings on STM32MP15xx-DKx boards. The ADC pins on Arduino connector are not set by default. These pins are added in A7 Disco example DTs only. Signed-off-by: Olivier Moysan --- arch/arm/boot/dts/stm32mp15xx-dkx.dtsi | 29 ++++++++++++++++++-------- 1 file changed, 20 insertions(+), 9 deletions(-) diff --git a/arch/arm/boot/dts/stm32mp15xx-dkx.dtsi b/arch/arm/boot/dts/stm32mp15xx-dkx.dtsi index 0f1110e42c93..ad46f1b1e1ed 100644 --- a/arch/arm/boot/dts/stm32mp15xx-dkx.dtsi +++ b/arch/arm/boot/dts/stm32mp15xx-dkx.dtsi @@ -93,28 +93,39 @@ vin: vin { &adc { pinctrl-names = "default"; - pinctrl-0 = <&adc12_ain_pins_a>, <&adc12_usb_cc_pins_a>; + pinctrl-0 = <&adc12_usb_cc_pins_a>; vdd-supply = <&vdd>; vdda-supply = <&vdd>; vref-supply = <&vrefbuf>; - status = "disabled"; + status = "okay"; adc1: adc@0 { + status = "okay"; /* * Type-C USB_PWR_CC1 & USB_PWR_CC2 on in18 & in19. * Use at least 5 * RC time, e.g. 5 * (Rp + Rd) * C: * 5 * (56 + 47kOhms) * 5pF => 2.5us. * Use arbitrary margin here (e.g. 5us). */ - st,min-sample-time-nsecs = <5000>; - /* AIN connector, USB Type-C CC1 & CC2 */ - st,adc-channels = <0 1 6 13 18 19>; - status = "okay"; + channel@18 { + reg = <18>; + st,min-sample-time-ns = <5000>; + }; + channel@19 { + reg = <19>; + st,min-sample-time-ns = <5000>; + }; }; adc2: adc@100 { - /* AIN connector, USB Type-C CC1 & CC2 */ - st,adc-channels = <0 1 2 6 18 19>; - st,min-sample-time-nsecs = <5000>; status = "okay"; + /* USB Type-C CC1 & CC2 */ + channel@18 { + reg = <18>; + st,min-sample-time-ns = <5000>; + }; + channel@19 { + reg = <19>; + st,min-sample-time-ns = <5000>; + }; }; }; From patchwork Wed May 24 13:39:15 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Olivier Moysan X-Patchwork-Id: 685437 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 64105C77B7A for ; Wed, 24 May 2023 13:41:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235449AbjEXNla (ORCPT ); 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Wed, 24 May 2023 15:40:54 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id E6FEC100034; Wed, 24 May 2023 15:40:53 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node1.st.com [10.75.129.69]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id DF17D229A88; Wed, 24 May 2023 15:40:53 +0200 (CEST) Received: from localhost (10.252.20.36) by SHFDAG1NODE1.st.com (10.75.129.69) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.21; Wed, 24 May 2023 15:40:53 +0200 From: Olivier Moysan To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Coquelin , Alexandre Torgue CC: Olivier Moysan , , , , Subject: [PATCH 6/8] ARM: dts: stm32: adopt generic iio bindings for adc channels on emstamp-argon Date: Wed, 24 May 2023 15:39:15 +0200 Message-ID: <20230524133918.1439516-7-olivier.moysan@foss.st.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230524133918.1439516-1-olivier.moysan@foss.st.com> References: <20230524133918.1439516-1-olivier.moysan@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.252.20.36] X-ClientProxiedBy: EQNCAS1NODE4.st.com (10.75.129.82) To SHFDAG1NODE1.st.com (10.75.129.69) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.957,Hydra:6.0.573,FMLib:17.11.176.26 definitions=2023-05-24_09,2023-05-24_01,2023-05-22_02 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Use STM32 ADC generic bindings instead of legacy bindings on emtrion GmbH Argon boards. The STM32 ADC specific binding to declare channels has been deprecated, hence adopt the generic IIO channels bindings, instead. The STM32MP151 device tree now exposes internal channels using the generic binding. This makes the change mandatory here to avoid a mixed use of legacy and generic binding, which is not supported by the driver. Signed-off-by: Olivier Moysan --- arch/arm/boot/dts/stm32mp157c-emstamp-argon.dtsi | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/stm32mp157c-emstamp-argon.dtsi b/arch/arm/boot/dts/stm32mp157c-emstamp-argon.dtsi index b01470a9a3d5..94e38141af67 100644 --- a/arch/arm/boot/dts/stm32mp157c-emstamp-argon.dtsi +++ b/arch/arm/boot/dts/stm32mp157c-emstamp-argon.dtsi @@ -97,9 +97,11 @@ &adc { adc1: adc@0 { pinctrl-names = "default"; pinctrl-0 = <&adc1_in6_pins_a>; - st,min-sample-time-nsecs = <5000>; - st,adc-channels = <6>; status = "disabled"; + channel@6 { + reg = <6>; + st,min-sample-time-ns = <5000>; + }; }; adc2: adc@100 { From patchwork Wed May 24 13:39:17 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Olivier Moysan X-Patchwork-Id: 685436 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 84FAAC77B7A for ; Wed, 24 May 2023 13:42:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234298AbjEXNmB (ORCPT ); Wed, 24 May 2023 09:42:01 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37614 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234813AbjEXNlw (ORCPT ); Wed, 24 May 2023 09:41:52 -0400 Received: from mx07-00178001.pphosted.com (mx08-00178001.pphosted.com [91.207.212.93]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 17D3913E; Wed, 24 May 2023 06:41:30 -0700 (PDT) Received: from pps.filterd (m0046661.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 34OCYCKp031558; Wed, 24 May 2023 15:40:56 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=selector1; bh=Do0DjikyeIDFZP9oGmyZJjVUwz6VAIDmWXDZg0ApHTI=; b=IkYvi42caGJWSglmsWG2LM+rjKCJtPblzqCJuJb+iZxLN0Nfuhvh4jiR42tW73szWwKc v+LNBzizdEItSevfv2AE8mH3P2pSTm53diEz18E8JRDZOReJ2tQeP5qQGMatvWcpUwUh w61yuhfxu64uu50X/B1iy8QGgeubVti6BNOubPlIOIb64h65F8IAu/PC+oCuRXcDEuaM k80d2wtDhiAOKcEz1v9ACCR8NfrK295b+jQq9+X8Vr3+srcBGz9orCc+EQmkIpno7g6a WpzM/DcjiKRSNeYFKAckCsai30JYGqqz8PM/ZXugibhFirMDYd06PUAn0y25NldN+lhC dQ== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 3qrtgv162j-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 24 May 2023 15:40:56 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 80132100034; Wed, 24 May 2023 15:40:55 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node1.st.com [10.75.129.69]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 78467229A88; Wed, 24 May 2023 15:40:55 +0200 (CEST) Received: from localhost (10.252.20.36) by SHFDAG1NODE1.st.com (10.75.129.69) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.21; Wed, 24 May 2023 15:40:55 +0200 From: Olivier Moysan To: Marek Vasut , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Coquelin , Alexandre Torgue CC: Olivier Moysan , , , , , Subject: [PATCH 8/8] ARM: dts: stm32: adopt generic iio bindings for adc channels on dhcor-testbench Date: Wed, 24 May 2023 15:39:17 +0200 Message-ID: <20230524133918.1439516-9-olivier.moysan@foss.st.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230524133918.1439516-1-olivier.moysan@foss.st.com> References: <20230524133918.1439516-1-olivier.moysan@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.252.20.36] X-ClientProxiedBy: EQNCAS1NODE4.st.com (10.75.129.82) To SHFDAG1NODE1.st.com (10.75.129.69) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.957,Hydra:6.0.573,FMLib:17.11.176.26 definitions=2023-05-24_09,2023-05-24_01,2023-05-22_02 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Use STM32 ADC generic bindings instead of legacy bindings on DHCOR Testbench board. The STM32 ADC specific binding to declare channels has been deprecated, hence adopt the generic IIO channels bindings, instead. The STM32MP151 device tree now exposes internal channels using the generic binding. This makes the change mandatory here to avoid a mixed use of legacy and generic binding, which is not supported by the driver. Signed-off-by: Olivier Moysan --- .../boot/dts/stm32mp15xx-dhcor-testbench.dtsi | 28 ++++++++++++++++--- 1 file changed, 24 insertions(+), 4 deletions(-) diff --git a/arch/arm/boot/dts/stm32mp15xx-dhcor-testbench.dtsi b/arch/arm/boot/dts/stm32mp15xx-dhcor-testbench.dtsi index faed31b6d84a..ab7f0ba49639 100644 --- a/arch/arm/boot/dts/stm32mp15xx-dhcor-testbench.dtsi +++ b/arch/arm/boot/dts/stm32mp15xx-dhcor-testbench.dtsi @@ -41,15 +41,35 @@ &adc { status = "okay"; adc1: adc@0 { - st,adc-channels = <0 1 6>; - st,min-sample-time-nsecs = <5000>; status = "okay"; + channel@0 { + reg = <0>; + st,min-sample-time-ns = <5000>; + }; + channel@1 { + reg = <1>; + st,min-sample-time-ns = <5000>; + }; + channel@6 { + reg = <6>; + st,min-sample-time-ns = <5000>; + }; }; adc2: adc@100 { - st,adc-channels = <0 1 2>; - st,min-sample-time-nsecs = <5000>; status = "okay"; + channel@0 { + reg = <0>; + st,min-sample-time-ns = <5000>; + }; + channel@1 { + reg = <1>; + st,min-sample-time-ns = <5000>; + }; + channel@2 { + reg = <2>; + st,min-sample-time-ns = <5000>; + }; }; };