From patchwork Thu May 25 21:27:05 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shreeya Patel X-Patchwork-Id: 685724 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2E39BC7EE2C for ; Thu, 25 May 2023 21:28:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233384AbjEYV2E (ORCPT ); Thu, 25 May 2023 17:28:04 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36552 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233928AbjEYV2D (ORCPT ); Thu, 25 May 2023 17:28:03 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B5C2819A; Thu, 25 May 2023 14:28:01 -0700 (PDT) Received: from localhost.localdomain (unknown [IPv6:2405:201:0:21ea:e49:10dd:40c0:e842]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: shreeya) by madras.collabora.co.uk (Postfix) with ESMTPSA id 056FD6606E81; Thu, 25 May 2023 22:27:56 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1685050080; bh=jsynsw/ZbWVC0ttTQiwGX9l8Q++CdnsiAIG6M4Z8nRw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=nuCe0J0MsiSf6bFs8VW2iuq7HIenCb9alpkzMD4x6wwVGufdHwvXEYecDAZKz8B0n cVfiAtUDi5x31x6tTBlbUXL8pWVlQkWpPps14DllNKabi4Btrocm+jT1zJi7vKT8q1 XgqsgcAMMXAnodxWdcw9feelnBcLA2fh6SeWCczmgYBwulT9Ni8+Hcpf9Ct0uPqg8u 9bHzc0ALXZ3FqmR+hI8j2q0+ZAgmoAkXo39oz4YhCPb+eyoGnD49aBIc7gknRO+7A0 Edo1XSBUdkcST0SD6LkCKp10Wp1Y46oNd87xeahGmph1jHdJnmgn9tlC70k31VoMTj dAReny5cei1Qw== From: Shreeya Patel To: jic23@kernel.org, lars@metafoo.de, heiko@sntech.de, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, sebastian.reichel@collabora.com Cc: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@collabora.com, gustavo.padovan@collabora.com, serge.broslavsky@collabora.com, Shreeya Patel , Simon Xue Subject: [PATCH v2 1/8] iio: adc: rockchip_saradc: Add callback functions Date: Fri, 26 May 2023 02:57:05 +0530 Message-Id: <20230525212712.255406-2-shreeya.patel@collabora.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20230525212712.255406-1-shreeya.patel@collabora.com> References: <20230525212712.255406-1-shreeya.patel@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Simon Xue Add start, read and power_down callback functions, which will help in adding new rockchip device support cleanly. Signed-off-by: Simon Xue Signed-off-by: Shreeya Patel --- Changes in v2 - Add a from address. - Create a separate patch for changes done in the code for old devices. drivers/iio/adc/rockchip_saradc.c | 64 +++++++++++++++++++++++++------ 1 file changed, 52 insertions(+), 12 deletions(-) diff --git a/drivers/iio/adc/rockchip_saradc.c b/drivers/iio/adc/rockchip_saradc.c index 79448c5ffc2a..21f9d92a6af4 100644 --- a/drivers/iio/adc/rockchip_saradc.c +++ b/drivers/iio/adc/rockchip_saradc.c @@ -38,10 +38,15 @@ #define SARADC_TIMEOUT msecs_to_jiffies(100) #define SARADC_MAX_CHANNELS 8 +struct rockchip_saradc; + struct rockchip_saradc_data { const struct iio_chan_spec *channels; int num_channels; unsigned long clk_rate; + void (*start)(struct rockchip_saradc *info, int chn); + int (*read)(struct rockchip_saradc *info); + void (*power_down)(struct rockchip_saradc *info); }; struct rockchip_saradc { @@ -60,27 +65,50 @@ struct rockchip_saradc { struct notifier_block nb; }; -static void rockchip_saradc_power_down(struct rockchip_saradc *info) +static void rockchip_saradc_reset_controller(struct reset_control *reset); + +static void rockchip_saradc_start_v1(struct rockchip_saradc *info, int chn) +{ + /* 8 clock periods as delay between power up and start cmd */ + writel_relaxed(8, info->regs + SARADC_DLY_PU_SOC); + /* Select the channel to be used and trigger conversion */ + writel(SARADC_CTRL_POWER_CTRL | (chn & SARADC_CTRL_CHN_MASK) | + SARADC_CTRL_IRQ_ENABLE, info->regs + SARADC_CTRL); +} + +static void rockchip_saradc_start(struct rockchip_saradc *info, int chn) +{ + info->data->start(info, chn); +} + +static int rockchip_saradc_read_v1(struct rockchip_saradc *info) +{ + return readl_relaxed(info->regs + SARADC_DATA); +} + +static int rockchip_saradc_read(struct rockchip_saradc *info) +{ + return info->data->read(info); +} + +static void rockchip_saradc_power_down_v1(struct rockchip_saradc *info) { - /* Clear irq & power down adc */ writel_relaxed(0, info->regs + SARADC_CTRL); } +static void rockchip_saradc_power_down(struct rockchip_saradc *info) +{ + if (info->data->power_down) + info->data->power_down(info); +} + static int rockchip_saradc_conversion(struct rockchip_saradc *info, struct iio_chan_spec const *chan) { reinit_completion(&info->completion); - /* 8 clock periods as delay between power up and start cmd */ - writel_relaxed(8, info->regs + SARADC_DLY_PU_SOC); - info->last_chan = chan; - - /* Select the channel to be used and trigger conversion */ - writel(SARADC_CTRL_POWER_CTRL - | (chan->channel & SARADC_CTRL_CHN_MASK) - | SARADC_CTRL_IRQ_ENABLE, - info->regs + SARADC_CTRL); + rockchip_saradc_start(info, chan->channel); if (!wait_for_completion_timeout(&info->completion, SARADC_TIMEOUT)) return -ETIMEDOUT; @@ -123,7 +151,7 @@ static irqreturn_t rockchip_saradc_isr(int irq, void *dev_id) struct rockchip_saradc *info = dev_id; /* Read value */ - info->last_val = readl_relaxed(info->regs + SARADC_DATA); + info->last_val = rockchip_saradc_read(info); info->last_val &= GENMASK(info->last_chan->scan_type.realbits - 1, 0); rockchip_saradc_power_down(info); @@ -163,6 +191,9 @@ static const struct rockchip_saradc_data saradc_data = { .channels = rockchip_saradc_iio_channels, .num_channels = ARRAY_SIZE(rockchip_saradc_iio_channels), .clk_rate = 1000000, + .start = rockchip_saradc_start_v1, + .read = rockchip_saradc_read_v1, + .power_down = rockchip_saradc_power_down_v1, }; static const struct iio_chan_spec rockchip_rk3066_tsadc_iio_channels[] = { @@ -174,6 +205,9 @@ static const struct rockchip_saradc_data rk3066_tsadc_data = { .channels = rockchip_rk3066_tsadc_iio_channels, .num_channels = ARRAY_SIZE(rockchip_rk3066_tsadc_iio_channels), .clk_rate = 50000, + .start = rockchip_saradc_start_v1, + .read = rockchip_saradc_read_v1, + .power_down = rockchip_saradc_power_down_v1, }; static const struct iio_chan_spec rockchip_rk3399_saradc_iio_channels[] = { @@ -189,6 +223,9 @@ static const struct rockchip_saradc_data rk3399_saradc_data = { .channels = rockchip_rk3399_saradc_iio_channels, .num_channels = ARRAY_SIZE(rockchip_rk3399_saradc_iio_channels), .clk_rate = 1000000, + .start = rockchip_saradc_start_v1, + .read = rockchip_saradc_read_v1, + .power_down = rockchip_saradc_power_down_v1, }; static const struct iio_chan_spec rockchip_rk3568_saradc_iio_channels[] = { @@ -206,6 +243,9 @@ static const struct rockchip_saradc_data rk3568_saradc_data = { .channels = rockchip_rk3568_saradc_iio_channels, .num_channels = ARRAY_SIZE(rockchip_rk3568_saradc_iio_channels), .clk_rate = 1000000, + .start = rockchip_saradc_start_v1, + .read = rockchip_saradc_read_v1, + .power_down = rockchip_saradc_power_down_v1, }; static const struct of_device_id rockchip_saradc_match[] = { From patchwork Thu May 25 21:27:06 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shreeya Patel X-Patchwork-Id: 686239 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 26FBAC7EE2C for ; Thu, 25 May 2023 21:28:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241440AbjEYV2R (ORCPT ); Thu, 25 May 2023 17:28:17 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36660 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240106AbjEYV2L (ORCPT ); Thu, 25 May 2023 17:28:11 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9FDC81B4; Thu, 25 May 2023 14:28:07 -0700 (PDT) Received: from localhost.localdomain (unknown [IPv6:2405:201:0:21ea:e49:10dd:40c0:e842]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: shreeya) by madras.collabora.co.uk (Postfix) with ESMTPSA id 1C9016601F54; Thu, 25 May 2023 22:28:02 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1685050086; bh=emZD6NcLmes+iVB0n2kG52Yzxt0u3x947T4LBkuC/yw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=F2JZbgpPrBZQGllj9FVT0KUrhgTIPMlHBfUgL/7/OLQHLT3LLJQKpyN2wSARgRSgT R/V8LERTsy0virz6LpVvuDH3redoSVXs5uRv4yCKLJ9YVJc33QRZqRnAkLaEoNh/sk EMjKzIKgv69Q5eJv0t9sakGU5U/U/H4GimSll6d1XDdWBk1lxkVvbmw0dQK1a4x+kr Hi5KLDLW+T0uBJ9eJhTPPuR5t2/iWhcLj02yVsYbvMqMgI+QLwvGeILi75rHvrvuTq yczIinhIEG/AFQePtTSQypbFuvw5CMD1TQSGcBvywucDArHFIBBsSYzFM8Dd6f7O1n FjDX3pvIcCZHQ== From: Shreeya Patel To: jic23@kernel.org, lars@metafoo.de, heiko@sntech.de, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, sebastian.reichel@collabora.com Cc: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@collabora.com, gustavo.padovan@collabora.com, serge.broslavsky@collabora.com, Shreeya Patel , Simon Xue Subject: [PATCH v2 2/8] iio: adc: rockchip_saradc: Add support for RK3588 Date: Fri, 26 May 2023 02:57:06 +0530 Message-Id: <20230525212712.255406-3-shreeya.patel@collabora.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20230525212712.255406-1-shreeya.patel@collabora.com> References: <20230525212712.255406-1-shreeya.patel@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Simon Xue Add new start and read functions to support rk3588 device. Also, add a device compatible string for the same. Signed-off-by: Simon Xue Signed-off-by: Shreeya Patel --- Changes in v2 - Add a from address. - Create separate patches for adding new device support and changes to the old device code. - Make use of FIELD_PREP. drivers/iio/adc/rockchip_saradc.c | 69 +++++++++++++++++++++++++++++++ 1 file changed, 69 insertions(+) diff --git a/drivers/iio/adc/rockchip_saradc.c b/drivers/iio/adc/rockchip_saradc.c index 21f9d92a6af4..31637440be83 100644 --- a/drivers/iio/adc/rockchip_saradc.c +++ b/drivers/iio/adc/rockchip_saradc.c @@ -38,6 +38,22 @@ #define SARADC_TIMEOUT msecs_to_jiffies(100) #define SARADC_MAX_CHANNELS 8 +/* v2 registers */ +#define SARADC2_CONV_CON 0x0 +#define SARADC_T_PD_SOC 0x4 +#define SARADC_T_DAS_SOC 0xc +#define SARADC2_END_INT_EN 0x104 +#define SARADC2_ST_CON 0x108 +#define SARADC2_STATUS 0x10c +#define SARADC2_END_INT_ST 0x110 +#define SARADC2_DATA_BASE 0x120 + +#define SARADC2_EN_END_INT BIT(0) +#define SARADC2_START BIT(4) +#define SARADC2_SINGLE_MODE BIT(5) + +#define SARADC2_CONV_CHANNELS GENMASK(15, 0) + struct rockchip_saradc; struct rockchip_saradc_data { @@ -76,6 +92,25 @@ static void rockchip_saradc_start_v1(struct rockchip_saradc *info, int chn) SARADC_CTRL_IRQ_ENABLE, info->regs + SARADC_CTRL); } +static void rockchip_saradc_start_v2(struct rockchip_saradc *info, int chn) +{ + int val; + + if (info->reset) + rockchip_saradc_reset_controller(info->reset); + + writel_relaxed(0xc, info->regs + SARADC_T_DAS_SOC); + writel_relaxed(0x20, info->regs + SARADC_T_PD_SOC); + val = FIELD_PREP(SARADC2_EN_END_INT, 1); + val |= val << 16; + writel_relaxed(val, info->regs + SARADC2_END_INT_EN); + val = FIELD_PREP(SARADC2_START, 1) | + FIELD_PREP(SARADC2_SINGLE_MODE, 1) | + FIELD_PREP(SARADC2_CONV_CHANNELS, chn); + val |= val << 16; + writel(val, info->regs + SARADC2_CONV_CON); +} + static void rockchip_saradc_start(struct rockchip_saradc *info, int chn) { info->data->start(info, chn); @@ -86,6 +121,18 @@ static int rockchip_saradc_read_v1(struct rockchip_saradc *info) return readl_relaxed(info->regs + SARADC_DATA); } +static int rockchip_saradc_read_v2(struct rockchip_saradc *info) +{ + int offset; + + /* Clear irq */ + writel_relaxed(0x1, info->regs + SARADC2_END_INT_ST); + + offset = SARADC2_DATA_BASE + info->last_chan->channel * 0x4; + + return readl_relaxed(info->regs + offset); +} + static int rockchip_saradc_read(struct rockchip_saradc *info) { return info->data->read(info); @@ -248,6 +295,25 @@ static const struct rockchip_saradc_data rk3568_saradc_data = { .power_down = rockchip_saradc_power_down_v1, }; +static const struct iio_chan_spec rockchip_rk3588_saradc_iio_channels[] = { + SARADC_CHANNEL(0, "adc0", 12), + SARADC_CHANNEL(1, "adc1", 12), + SARADC_CHANNEL(2, "adc2", 12), + SARADC_CHANNEL(3, "adc3", 12), + SARADC_CHANNEL(4, "adc4", 12), + SARADC_CHANNEL(5, "adc5", 12), + SARADC_CHANNEL(6, "adc6", 12), + SARADC_CHANNEL(7, "adc7", 12), +}; + +static const struct rockchip_saradc_data rk3588_saradc_data = { + .channels = rockchip_rk3588_saradc_iio_channels, + .num_channels = ARRAY_SIZE(rockchip_rk3588_saradc_iio_channels), + .clk_rate = 1000000, + .start = rockchip_saradc_start_v2, + .read = rockchip_saradc_read_v2, +}; + static const struct of_device_id rockchip_saradc_match[] = { { .compatible = "rockchip,saradc", @@ -261,6 +327,9 @@ static const struct of_device_id rockchip_saradc_match[] = { }, { .compatible = "rockchip,rk3568-saradc", .data = &rk3568_saradc_data, + }, { + .compatible = "rockchip,rk3588-saradc", + .data = &rk3588_saradc_data, }, {}, }; From patchwork Thu May 25 21:27:07 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shreeya Patel X-Patchwork-Id: 685723 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 30F37C7EE31 for ; Thu, 25 May 2023 21:28:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241239AbjEYV2U (ORCPT ); Thu, 25 May 2023 17:28:20 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36696 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241377AbjEYV2R (ORCPT ); Thu, 25 May 2023 17:28:17 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 17739E49; Thu, 25 May 2023 14:28:14 -0700 (PDT) Received: from localhost.localdomain (unknown [IPv6:2405:201:0:21ea:e49:10dd:40c0:e842]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: shreeya) by madras.collabora.co.uk (Postfix) with ESMTPSA id 303346606E81; Thu, 25 May 2023 22:28:10 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1685050092; bh=dLuu0SEFNcIqh//QlQCte4G4opm+zXpvYd73IcKTf1s=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=LEKdNo3mLOU+adE2Y7F/aUFFUhZfZ4UXAGvUd2GlJT0kQHuvss+mbsX/O/73C6y6E JabCu7NLEA/RPKe+5vEv5Wvs71PpxdKY0nFiXIfQu6kah/uk8fTlJiFmB8bipNl/SB Xq7EkfAvk7sSkvTZplkeRD0B1yH/9Xt0nVRSG6wEgTkP6xjF35MzQX8NZvFcFMBrVg JPBaude2yN99FKCnjjYqDbOd75/dZofAW4wHFtdUDLuQ2Te6V7D05pWlt8w+N0uqDy /ZEnRHCyETPZlASaBNmn6KKvvGOhkNBMYNShvT0TJ3udbjltyeEZKiwlJfRqVtSfBC iZI6NjMpv2bXA== From: Shreeya Patel To: jic23@kernel.org, lars@metafoo.de, heiko@sntech.de, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, sebastian.reichel@collabora.com Cc: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@collabora.com, gustavo.padovan@collabora.com, serge.broslavsky@collabora.com, Shreeya Patel Subject: [PATCH v2 3/8] iio: adc: rockchip_saradc: Make use of devm_clk_get_enabled Date: Fri, 26 May 2023 02:57:07 +0530 Message-Id: <20230525212712.255406-4-shreeya.patel@collabora.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20230525212712.255406-1-shreeya.patel@collabora.com> References: <20230525212712.255406-1-shreeya.patel@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Use devm_clk_get_enabled() to avoid manually disabling the clock. Signed-off-by: Shreeya Patel --- Changes in v2 - No need to enable the clocks earlier than the original code. Move the enablement of clocks at it's original position. drivers/iio/adc/rockchip_saradc.c | 73 ++++--------------------------- 1 file changed, 9 insertions(+), 64 deletions(-) diff --git a/drivers/iio/adc/rockchip_saradc.c b/drivers/iio/adc/rockchip_saradc.c index 31637440be83..41226b76a995 100644 --- a/drivers/iio/adc/rockchip_saradc.c +++ b/drivers/iio/adc/rockchip_saradc.c @@ -345,20 +345,6 @@ static void rockchip_saradc_reset_controller(struct reset_control *reset) reset_control_deassert(reset); } -static void rockchip_saradc_clk_disable(void *data) -{ - struct rockchip_saradc *info = data; - - clk_disable_unprepare(info->clk); -} - -static void rockchip_saradc_pclk_disable(void *data) -{ - struct rockchip_saradc *info = data; - - clk_disable_unprepare(info->pclk); -} - static void rockchip_saradc_regulator_disable(void *data) { struct rockchip_saradc *info = data; @@ -492,16 +478,6 @@ static int rockchip_saradc_probe(struct platform_device *pdev) return ret; } - info->pclk = devm_clk_get(&pdev->dev, "apb_pclk"); - if (IS_ERR(info->pclk)) - return dev_err_probe(&pdev->dev, PTR_ERR(info->pclk), - "failed to get pclk\n"); - - info->clk = devm_clk_get(&pdev->dev, "saradc"); - if (IS_ERR(info->clk)) - return dev_err_probe(&pdev->dev, PTR_ERR(info->clk), - "failed to get adc clock\n"); - info->vref = devm_regulator_get(&pdev->dev, "vref"); if (IS_ERR(info->vref)) return dev_err_probe(&pdev->dev, PTR_ERR(info->vref), @@ -539,31 +515,15 @@ static int rockchip_saradc_probe(struct platform_device *pdev) info->uv_vref = ret; - ret = clk_prepare_enable(info->pclk); - if (ret < 0) { - dev_err(&pdev->dev, "failed to enable pclk\n"); - return ret; - } - ret = devm_add_action_or_reset(&pdev->dev, - rockchip_saradc_pclk_disable, info); - if (ret) { - dev_err(&pdev->dev, "failed to register devm action, %d\n", - ret); - return ret; - } + info->pclk = devm_clk_get_enabled(&pdev->dev, "apb_pclk"); + if (IS_ERR(info->pclk)) + return dev_err_probe(&pdev->dev, PTR_ERR(info->pclk), + "failed to get pclk\n"); - ret = clk_prepare_enable(info->clk); - if (ret < 0) { - dev_err(&pdev->dev, "failed to enable converter clock\n"); - return ret; - } - ret = devm_add_action_or_reset(&pdev->dev, - rockchip_saradc_clk_disable, info); - if (ret) { - dev_err(&pdev->dev, "failed to register devm action, %d\n", - ret); - return ret; - } + info->clk = devm_clk_get_enabled(&pdev->dev, "saradc"); + if (IS_ERR(info->clk)) + return dev_err_probe(&pdev->dev, PTR_ERR(info->clk), + "failed to get adc clock\n"); platform_set_drvdata(pdev, indio_dev); @@ -600,8 +560,6 @@ static int rockchip_saradc_suspend(struct device *dev) struct iio_dev *indio_dev = dev_get_drvdata(dev); struct rockchip_saradc *info = iio_priv(indio_dev); - clk_disable_unprepare(info->clk); - clk_disable_unprepare(info->pclk); regulator_disable(info->vref); return 0; @@ -611,21 +569,8 @@ static int rockchip_saradc_resume(struct device *dev) { struct iio_dev *indio_dev = dev_get_drvdata(dev); struct rockchip_saradc *info = iio_priv(indio_dev); - int ret; - - ret = regulator_enable(info->vref); - if (ret) - return ret; - - ret = clk_prepare_enable(info->pclk); - if (ret) - return ret; - - ret = clk_prepare_enable(info->clk); - if (ret) - clk_disable_unprepare(info->pclk); - return ret; + return regulator_enable(info->vref); } static DEFINE_SIMPLE_DEV_PM_OPS(rockchip_saradc_pm_ops, From patchwork Thu May 25 21:27:08 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shreeya Patel X-Patchwork-Id: 686238 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2794FC77B7A for ; Thu, 25 May 2023 21:28:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234005AbjEYV2d (ORCPT ); Thu, 25 May 2023 17:28:33 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36656 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232645AbjEYV2c (ORCPT ); Thu, 25 May 2023 17:28:32 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6C877E58; Thu, 25 May 2023 14:28:22 -0700 (PDT) Received: from localhost.localdomain (unknown [IPv6:2405:201:0:21ea:e49:10dd:40c0:e842]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: shreeya) by madras.collabora.co.uk (Postfix) with ESMTPSA id 6140C6601F54; Thu, 25 May 2023 22:28:17 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1685050101; bh=7hciE8XoQj7YqlZBospZkfZLJzFdMH510lvKyu7BdNc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=UF0qvBDPNvxoe16vml3vZK/8BatpX4/GsrtRd3QOH/jD1xufqG2yBD7FFWze7l1NK ngN34u7iM26d6UurhdFCBGS/KtTyUPFVGysd+qIlj9kZH4amPZuReUotzwENmWg08E TQNZAEBHslxP0Xo21v0FoLSiaZiEAUijpZsS+vreK/K1Zvsu6ZVMNvDYRUuUAAJjfJ k9X0Fu4yza4WvjOUY1QhqVanVn06opgwniw7kJ8XywWzzWEu5elkrm2dtrmouvnoNI H1d2Ko6fiLjHtcUOxuGxN0y0sdMFwjRlER9NWtj+fPgbz8F3Yh549tmEnWP6ZSTTZR rQ15X7TtjtufQ== From: Shreeya Patel To: jic23@kernel.org, lars@metafoo.de, heiko@sntech.de, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, sebastian.reichel@collabora.com Cc: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@collabora.com, gustavo.padovan@collabora.com, serge.broslavsky@collabora.com, Shreeya Patel , AngeloGioacchino Del Regno Subject: [PATCH v2 4/8] iio: adc: rockchip_saradc: Use of_device_get_match_data Date: Fri, 26 May 2023 02:57:08 +0530 Message-Id: <20230525212712.255406-5-shreeya.patel@collabora.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20230525212712.255406-1-shreeya.patel@collabora.com> References: <20230525212712.255406-1-shreeya.patel@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Use of_device_get_match_data() to simplify the code. Signed-off-by: Shreeya Patel Reviewed-by: AngeloGioacchino Del Regno --- Changes in v2 - Add a Reviewed-by tag. drivers/iio/adc/rockchip_saradc.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/iio/adc/rockchip_saradc.c b/drivers/iio/adc/rockchip_saradc.c index 41226b76a995..1a5790264ec1 100644 --- a/drivers/iio/adc/rockchip_saradc.c +++ b/drivers/iio/adc/rockchip_saradc.c @@ -414,10 +414,10 @@ static void rockchip_saradc_regulator_unreg_notifier(void *data) static int rockchip_saradc_probe(struct platform_device *pdev) { + const struct rockchip_saradc_data *match_data; struct rockchip_saradc *info = NULL; struct device_node *np = pdev->dev.of_node; struct iio_dev *indio_dev = NULL; - const struct of_device_id *match; int ret; int irq; @@ -431,13 +431,13 @@ static int rockchip_saradc_probe(struct platform_device *pdev) } info = iio_priv(indio_dev); - match = of_match_device(rockchip_saradc_match, &pdev->dev); - if (!match) { + match_data = of_device_get_match_data(&pdev->dev); + if (!match_data) { dev_err(&pdev->dev, "failed to match device\n"); return -ENODEV; } - info->data = match->data; + info->data = match_data; /* Sanity check for possible later IP variants with more channels */ if (info->data->num_channels > SARADC_MAX_CHANNELS) { From patchwork Thu May 25 21:27:09 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shreeya Patel X-Patchwork-Id: 685722 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 08B79C7EE29 for ; Thu, 25 May 2023 21:28:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233236AbjEYV2n (ORCPT ); Thu, 25 May 2023 17:28:43 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37262 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232645AbjEYV2m (ORCPT ); Thu, 25 May 2023 17:28:42 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 41255E66; Thu, 25 May 2023 14:28:28 -0700 (PDT) Received: from localhost.localdomain (unknown [IPv6:2405:201:0:21ea:e49:10dd:40c0:e842]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: shreeya) by madras.collabora.co.uk (Postfix) with ESMTPSA id DB18F6606E81; Thu, 25 May 2023 22:28:23 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1685050107; bh=j2qbhtUEhsYOgwB5yEuSREejgg5NYmlmpVBBc3uuqiU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=LUZxTVmHdiID1uTSssQoOF+AGu9yXAC7WYp7yUjlGKRmfwNX4Zg6P2xW1uEQ9FEIM 0BqfDvFHJj1LfUySw8fmRQh6Hhm3neBnA7/m8QQ1woP/z1WfX2wOsjURNWl94FuiPZ vMQfDNeng/gK2OmVzgpOLjAWNzXMdKPndXMBMJ2NP9M+DCdk6AXvHuwlvLLVC8lXED 1PLba8uIjf5JeMFpF7kvPT6ekxCszbVajbYQYMSU1ksUmQplvtPPDVNwrdyN/qjtx5 0YrHrUq1yprxQwSSIEvQRTsadloOSmVBJ2q/D7eVIjucrotIBJx5x0yfdKeVEIyW/X xllO5CBBuKbYw== From: Shreeya Patel To: jic23@kernel.org, lars@metafoo.de, heiko@sntech.de, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, sebastian.reichel@collabora.com Cc: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@collabora.com, gustavo.padovan@collabora.com, serge.broslavsky@collabora.com, Shreeya Patel , AngeloGioacchino Del Regno Subject: [PATCH v2 5/8] iio: adc: rockchip_saradc: Match alignment with open parenthesis Date: Fri, 26 May 2023 02:57:09 +0530 Message-Id: <20230525212712.255406-6-shreeya.patel@collabora.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20230525212712.255406-1-shreeya.patel@collabora.com> References: <20230525212712.255406-1-shreeya.patel@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Match alignment with open parenthesis for improving the code readability. Signed-off-by: Shreeya Patel Reviewed-by: AngeloGioacchino Del Regno --- Changes in v2 - Add a Reviewed-by tag. drivers/iio/adc/rockchip_saradc.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/iio/adc/rockchip_saradc.c b/drivers/iio/adc/rockchip_saradc.c index 1a5790264ec1..ede929d9bca0 100644 --- a/drivers/iio/adc/rockchip_saradc.c +++ b/drivers/iio/adc/rockchip_saradc.c @@ -150,7 +150,7 @@ static void rockchip_saradc_power_down(struct rockchip_saradc *info) } static int rockchip_saradc_conversion(struct rockchip_saradc *info, - struct iio_chan_spec const *chan) + struct iio_chan_spec const *chan) { reinit_completion(&info->completion); @@ -393,8 +393,7 @@ static irqreturn_t rockchip_saradc_trigger_handler(int irq, void *p) } static int rockchip_saradc_volt_notify(struct notifier_block *nb, - unsigned long event, - void *data) + unsigned long event, void *data) { struct rockchip_saradc *info = container_of(nb, struct rockchip_saradc, nb); From patchwork Thu May 25 21:27:10 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shreeya Patel X-Patchwork-Id: 686237 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A1FBFC77B7A for ; Thu, 25 May 2023 21:29:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241003AbjEYV27 (ORCPT ); Thu, 25 May 2023 17:28:59 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37476 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232645AbjEYV24 (ORCPT ); Thu, 25 May 2023 17:28:56 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DC428E7A; Thu, 25 May 2023 14:28:33 -0700 (PDT) Received: from localhost.localdomain (unknown [IPv6:2405:201:0:21ea:e49:10dd:40c0:e842]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: shreeya) by madras.collabora.co.uk (Postfix) with ESMTPSA id 18DBE6606E83; Thu, 25 May 2023 22:28:28 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1685050112; bh=D27vPfnw18aPYNhUhk1W3Go5MIiPfMAWKC6N6Jt7LbQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=XaWkB4Q6bdKk5tFT+QmLTI/tXYZUPcC3yoopnZZhl5JMMbfcR4y+L2Kv1W7tNHA3i 1GwAVEJTyADTACD3rrAQhL6o5g4WO8s+JIOxNeIt9OTp8Rpldg/IUiWOjwR58F9C1l LameiIfIM7N8HczBy21QKHMRxkbRCJXET1j/WGsvKoD6hFymgsB8hA62ICzm0/BDtI SU2HGUszENEE/NOfysXujpv+Vma2yEKBn+GwS3kNQUsC7Gp2d3zGsp1NXvHxbm9RaR TOvfc2zHz06j13k4KpVwNM8b3mg2vrn7h2JwQkZ3/rEzdm8ipTCkz/rhm5Jmxt1jnX zfe33uZhIUIRA== From: Shreeya Patel To: jic23@kernel.org, lars@metafoo.de, heiko@sntech.de, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, sebastian.reichel@collabora.com Cc: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@collabora.com, gustavo.padovan@collabora.com, serge.broslavsky@collabora.com, Shreeya Patel Subject: [PATCH v2 6/8] iio: adc: rockchip_saradc: Use dev_err_probe Date: Fri, 26 May 2023 02:57:10 +0530 Message-Id: <20230525212712.255406-7-shreeya.patel@collabora.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20230525212712.255406-1-shreeya.patel@collabora.com> References: <20230525212712.255406-1-shreeya.patel@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Use dev_err_probe instead of dev_err in probe function, which simplifies code a little bit and prints the error code. Signed-off-by: Shreeya Patel --- Changes in v2 - No changes drivers/iio/adc/rockchip_saradc.c | 45 ++++++++++++++----------------- 1 file changed, 20 insertions(+), 25 deletions(-) diff --git a/drivers/iio/adc/rockchip_saradc.c b/drivers/iio/adc/rockchip_saradc.c index ede929d9bca0..54c1c2f018a9 100644 --- a/drivers/iio/adc/rockchip_saradc.c +++ b/drivers/iio/adc/rockchip_saradc.c @@ -424,25 +424,23 @@ static int rockchip_saradc_probe(struct platform_device *pdev) return -ENODEV; indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*info)); - if (!indio_dev) { - dev_err(&pdev->dev, "failed allocating iio device\n"); - return -ENOMEM; - } + if (!indio_dev) + return dev_err_probe(&pdev->dev, -ENOMEM, + "failed allocating iio device\n"); + info = iio_priv(indio_dev); match_data = of_device_get_match_data(&pdev->dev); - if (!match_data) { - dev_err(&pdev->dev, "failed to match device\n"); - return -ENODEV; - } + if (!match_data) + return dev_err_probe(&pdev->dev, -ENODEV, + "failed to match device\n"); info->data = match_data; /* Sanity check for possible later IP variants with more channels */ - if (info->data->num_channels > SARADC_MAX_CHANNELS) { - dev_err(&pdev->dev, "max channels exceeded"); - return -EINVAL; - } + if (info->data->num_channels > SARADC_MAX_CHANNELS) + return dev_err_probe(&pdev->dev, -EINVAL, + "max channels exceeded"); info->regs = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(info->regs)) @@ -490,23 +488,20 @@ static int rockchip_saradc_probe(struct platform_device *pdev) * This may become user-configurable in the future. */ ret = clk_set_rate(info->clk, info->data->clk_rate); - if (ret < 0) { - dev_err(&pdev->dev, "failed to set adc clk rate, %d\n", ret); - return ret; - } + if (ret < 0) + return dev_err_probe(&pdev->dev, ret, + "failed to set adc clk rate\n"); ret = regulator_enable(info->vref); - if (ret < 0) { - dev_err(&pdev->dev, "failed to enable vref regulator\n"); - return ret; - } + if (ret < 0) + return dev_err_probe(&pdev->dev, ret, + "failed to enable vref regulator\n"); + ret = devm_add_action_or_reset(&pdev->dev, rockchip_saradc_regulator_disable, info); - if (ret) { - dev_err(&pdev->dev, "failed to register devm action, %d\n", - ret); - return ret; - } + if (ret) + return dev_err_probe(&pdev->dev, ret, + "failed to register devm action\n"); ret = regulator_get_voltage(info->vref); if (ret < 0) From patchwork Thu May 25 21:27:11 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shreeya Patel X-Patchwork-Id: 685721 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 29D07C7EE29 for ; Thu, 25 May 2023 21:29:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235188AbjEYV3W (ORCPT ); Thu, 25 May 2023 17:29:22 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37768 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231397AbjEYV3V (ORCPT ); Thu, 25 May 2023 17:29:21 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7DE74E63; Thu, 25 May 2023 14:28:43 -0700 (PDT) Received: from localhost.localdomain (unknown [IPv6:2405:201:0:21ea:e49:10dd:40c0:e842]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: shreeya) by madras.collabora.co.uk (Postfix) with ESMTPSA id 8A22E6601F54; Thu, 25 May 2023 22:28:37 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1685050120; bh=++O4b/Q8RT0tumJ2kVSeNSDuZ1DIcVjmUFpZkUqRN3U=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=aTpxDm1BBLXlvwmXlmwDb98jxiFzYJMLKkKyRkTpKMGbZIAWai2ybe0nSO4IolJBb gLEgW1GoZZoIhrPeJqMQR7ibC/Jcx+yPTUBGT0t2E4+pXyJbwAHV3pdJFceHi29R2e RhE+E7z0AJZTbxcXHo4z2NTzNrptOg+nW4XR6l/X1olsQR+B1UvV1D39o7YVgLZeJ8 0bAx4zQz5lC/Tv2UyWMfXl0DCGNjVMnsQFv3txaQCuLpgdH8jUEIj4FkE97a0d6798 k/cxl84DKfbXAmEw+jnxlSgvESmWYDbV5NzXyp3QkA41/QyATMBnTIo7hLpxP12cwG zWqVJpMCQTxog== From: Shreeya Patel To: jic23@kernel.org, lars@metafoo.de, heiko@sntech.de, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, sebastian.reichel@collabora.com Cc: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@collabora.com, gustavo.padovan@collabora.com, serge.broslavsky@collabora.com, Shreeya Patel Subject: [PATCH v2 7/8] arm64: dts: rockchip: Add DT node for ADC support in RK3588 Date: Fri, 26 May 2023 02:57:11 +0530 Message-Id: <20230525212712.255406-8-shreeya.patel@collabora.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20230525212712.255406-1-shreeya.patel@collabora.com> References: <20230525212712.255406-1-shreeya.patel@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add DT node for ADC support in RK3588. Signed-off-by: Shreeya Patel --- Changes in v2 - No changes. arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi index 5d010f34a7f7..9cfa7ba97461 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi @@ -1913,6 +1913,18 @@ dmac2: dma-controller@fed10000 { #dma-cells = <1>; }; + saradc: saradc@fec10000 { + compatible = "rockchip,rk3588-saradc"; + reg = <0x0 0xfec10000 0x0 0x10000>; + interrupts = ; + #io-channel-cells = <1>; + clocks = <&cru CLK_SARADC>, <&cru PCLK_SARADC>; + clock-names = "saradc", "apb_pclk"; + resets = <&cru SRST_P_SARADC>; + reset-names = "saradc-apb"; + status = "disabled"; + }; + system_sram2: sram@ff001000 { compatible = "mmio-sram"; reg = <0x0 0xff001000 0x0 0xef000>; From patchwork Thu May 25 21:27:12 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shreeya Patel X-Patchwork-Id: 686236 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 42AD0C7EE29 for ; Thu, 25 May 2023 21:29:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241373AbjEYV3c (ORCPT ); Thu, 25 May 2023 17:29:32 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37908 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241424AbjEYV3b (ORCPT ); Thu, 25 May 2023 17:29:31 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2BC36194; Thu, 25 May 2023 14:28:53 -0700 (PDT) Received: from localhost.localdomain (unknown [IPv6:2405:201:0:21ea:e49:10dd:40c0:e842]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: shreeya) by madras.collabora.co.uk (Postfix) with ESMTPSA id F32BB6606E82; Thu, 25 May 2023 22:28:42 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1685050125; bh=AdgtOiujGdnJQQ340NQqbEudA96I7ryN0UWjDsdCfzY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=lG4FikeQH1NKS/9TgwgyENYkK2aokxl3DxPPZSCqCjLzFRFCna06SITyuIMxFG4tI AyzaapWk/rdI57Rgvow8WBnVNPrFXQ3rVisw4OV+FTJkATQCPK8CDVga6AIr9R9aQ0 Fc+bIBfRy4iszF6xfcxIKOcLcO58NQlR+sXyXT2sYlnMgeleiJvfMjqLsDZraJExF9 SkkK4w/dla7azOKCb4gxGNB1eOAZbeqPUGoJwxYJe89op4udgQoNrW2iJIVXMQt4b+ IpI7THxhIvspfJoEp/6Jqi3nfRSNWtvM8f0/EC2ksfnG1BtgpoJzyaBAQbyDJzE9x5 JykoNe3wXRykA== From: Shreeya Patel To: jic23@kernel.org, lars@metafoo.de, heiko@sntech.de, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, sebastian.reichel@collabora.com Cc: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@collabora.com, gustavo.padovan@collabora.com, serge.broslavsky@collabora.com, Shreeya Patel , Krzysztof Kozlowski Subject: [PATCH v2 8/8] dt-bindings: iio: adc: Add rockchip,rk3588-saradc string Date: Fri, 26 May 2023 02:57:12 +0530 Message-Id: <20230525212712.255406-9-shreeya.patel@collabora.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20230525212712.255406-1-shreeya.patel@collabora.com> References: <20230525212712.255406-1-shreeya.patel@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add rockchip,rk3588-saradc compatible string. Signed-off-by: Shreeya Patel Acked-by: Krzysztof Kozlowski --- Changes in v2 - Add an Acked-by tag. Documentation/devicetree/bindings/iio/adc/rockchip-saradc.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.yaml b/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.yaml index da50b529c157..11c27ea451c8 100644 --- a/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.yaml +++ b/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.yaml @@ -21,6 +21,7 @@ properties: - rockchip,rk3308-saradc - rockchip,rk3328-saradc - rockchip,rk3568-saradc + - rockchip,rk3588-saradc - rockchip,rv1108-saradc - rockchip,rv1126-saradc - const: rockchip,rk3399-saradc