From patchwork Thu May 25 12:29:26 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srinivas Kandagatla X-Patchwork-Id: 685741 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6DD62C7EE33 for ; Thu, 25 May 2023 12:29:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232039AbjEYM3x (ORCPT ); Thu, 25 May 2023 08:29:53 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57056 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241085AbjEYM3s (ORCPT ); Thu, 25 May 2023 08:29:48 -0400 Received: from mail-wr1-x42b.google.com (mail-wr1-x42b.google.com [IPv6:2a00:1450:4864:20::42b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3907B135 for ; Thu, 25 May 2023 05:29:47 -0700 (PDT) Received: by mail-wr1-x42b.google.com with SMTP id ffacd0b85a97d-307d20548adso1376286f8f.0 for ; Thu, 25 May 2023 05:29:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1685017785; x=1687609785; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=WVu9HOtYzHZwvpuN2gTTPEs8228CUSLathJuRQieOBU=; b=FYFUUoDfFC8eDhN6tmFQqkssXETTQaFCFsulLoqLxKzJ9aTnu4Jqi3+pVv4eZGmyuV OaTd6IN2zZw4Z50Rwrjy8vYtNSx+jjEWoYXiw7TXPNcdGZDyW4Y6RVA3R4/XXeaXdZR2 qVoyhem44nKHOo5GsCLPY6B6DleSpLZh77gYEZfuhpj+rcWafLYqtIZRlh2rU7uDyImC yZkIEpX6z89xt/DAPEMO/8SJaO30bNRVrv/wYVob466v2sHIX6TjfXE5SdZzRMb0eW5d s2sE6dZAJg7thq5C2CKeaWWq4vX3Ql0QyRqJ+DpHsZpIv2nXYzs+P88VXApzMY4UC+p7 iP5Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1685017785; x=1687609785; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=WVu9HOtYzHZwvpuN2gTTPEs8228CUSLathJuRQieOBU=; b=XW2EHuhz96G18jbIhAcvXnw+Gm2StxKR8H7mZXXLfjHkQrQ1GiUzfWexlFImIkzoJU mB8ll9OJzlcaBcjY3kPLtD/MtlE5hlglSlljIBww1xFU+2wCLz6ePFPCGqxCXLpbq80Y ZNTjos/EQGAWX9WWZpQhQNVxgRPEKTa25amhpa+4/AEpgFJLleGfHmyPQP2hdjyywC8r M3lJ9kE2aqVBQCfu+1G3PKGUZ8k6xf4Q9KWBdZZ3RGprUjri+lrGBkTt1LrO8De38Adh LFdL+vdCVACdrygEkGJ9i5UKusiV8q2n4ooaIXXhz0219T/Hjx654HagKUqQwGAm2DF5 19rg== X-Gm-Message-State: AC+VfDxRdarS4opzGaNxX/0icMDHB7NYwhABmHbU1Trbe4WTPt44307X gPkm2lnz5VawreYJOL97BfsP1g== X-Google-Smtp-Source: ACHHUZ5HN68fH+D1Pu6OBgTuX6kbLu1MmsCbnS7/Lt81SO83ztw+98yOn5rhMJzCCEj95ibFumMYQg== X-Received: by 2002:a5d:4a92:0:b0:309:43a2:8e9f with SMTP id o18-20020a5d4a92000000b0030943a28e9fmr2173055wrq.27.1685017785708; Thu, 25 May 2023 05:29:45 -0700 (PDT) Received: from localhost.localdomain ([5.133.47.210]) by smtp.gmail.com with ESMTPSA id k7-20020adfe3c7000000b003062b2c5255sm1700227wrm.40.2023.05.25.05.29.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 25 May 2023 05:29:44 -0700 (PDT) From: Srinivas Kandagatla To: andersson@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org Cc: johan+linaro@kernel.org, agross@kernel.org, konrad.dybcio@linaro.org, mturquette@baylibre.com, sboyd@kernel.org, conor+dt@kernel.org, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Srinivas Kandagatla Subject: [PATCH v2 2/6] dt-bindings: clock: Add YAML schemas for LPASS AUDIOCC and reset on SC8280XP Date: Thu, 25 May 2023 13:29:26 +0100 Message-Id: <20230525122930.17141-3-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230525122930.17141-1-srinivas.kandagatla@linaro.org> References: <20230525122930.17141-1-srinivas.kandagatla@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The LPASS (Low Power Audio Subsystem) Audio clock controller provides reset support when it is under the control of Q6DSP. Add support for those resets and adds IDs for clients to request the reset. Signed-off-by: Srinivas Kandagatla --- .../bindings/clock/qcom,sc8280xp-lpasscc.yaml | 11 +++++++++++ include/dt-bindings/clock/qcom,lpasscc-sc8280xp.h | 5 +++++ 2 files changed, 16 insertions(+) diff --git a/Documentation/devicetree/bindings/clock/qcom,sc8280xp-lpasscc.yaml b/Documentation/devicetree/bindings/clock/qcom,sc8280xp-lpasscc.yaml index 08a9ae60a365..0557e74d3c3b 100644 --- a/Documentation/devicetree/bindings/clock/qcom,sc8280xp-lpasscc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,sc8280xp-lpasscc.yaml @@ -21,6 +21,7 @@ properties: compatible: enum: + - qcom,sc8280xp-lpassaudiocc - qcom,sc8280xp-lpasscc qcom,adsp-pil-mode: @@ -45,6 +46,16 @@ required: additionalProperties: false examples: + - | + #include + lpass_audiocc: clock-controller@32a9000 { + compatible = "qcom,sc8280xp-lpassaudiocc"; + reg = <0x032a9000 0x1000>; + qcom,adsp-pil-mode; + #reset-cells = <1>; + #clock-cells = <1>; + }; + - | #include lpasscc: clock-controller@33e0000 { diff --git a/include/dt-bindings/clock/qcom,lpasscc-sc8280xp.h b/include/dt-bindings/clock/qcom,lpasscc-sc8280xp.h index df800ea2741c..d190d57fc81a 100644 --- a/include/dt-bindings/clock/qcom,lpasscc-sc8280xp.h +++ b/include/dt-bindings/clock/qcom,lpasscc-sc8280xp.h @@ -6,6 +6,11 @@ #ifndef _DT_BINDINGS_CLK_QCOM_LPASSCC_SC8280XP_H #define _DT_BINDINGS_CLK_QCOM_LPASSCC_SC8280XP_H +/* LPASS AUDIO CC CSR */ +#define LPASS_AUDIO_SWR_RX_CGCR 0 +#define LPASS_AUDIO_SWR_WSA_CGCR 1 +#define LPASS_AUDIO_SWR_WSA2_CGCR 2 + /* LPASS TCSR */ #define LPASS_AUDIO_SWR_TX_CGCR 0 From patchwork Thu May 25 12:29:29 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srinivas Kandagatla X-Patchwork-Id: 685739 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 095CCC8300C for ; Thu, 25 May 2023 12:29:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241124AbjEYM35 (ORCPT ); Thu, 25 May 2023 08:29:57 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57132 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241073AbjEYM3y (ORCPT ); Thu, 25 May 2023 08:29:54 -0400 Received: from mail-wr1-x431.google.com (mail-wr1-x431.google.com [IPv6:2a00:1450:4864:20::431]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 15C21135 for ; Thu, 25 May 2023 05:29:53 -0700 (PDT) Received: by mail-wr1-x431.google.com with SMTP id ffacd0b85a97d-30957dd7640so1397943f8f.3 for ; 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Signed-off-by: Srinivas Kandagatla Reviewed-by: Johan Hovold --- arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi index 6730349e34f4..39be2e89ce05 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi @@ -6,6 +6,7 @@ #include #include +#include #include #include #include @@ -2560,6 +2561,8 @@ interrupts = ; clocks = <&rxmacro>; clock-names = "iface"; + resets = <&lpass_audiocc LPASS_AUDIO_SWR_RX_CGCR>; + reset-names = "swr_audio_cgcr"; label = "RX"; qcom,din-ports = <0>; @@ -2634,6 +2637,8 @@ interrupts = ; clocks = <&wsamacro>; clock-names = "iface"; + resets = <&lpass_audiocc LPASS_AUDIO_SWR_WSA_CGCR>; + reset-names = "swr_audio_cgcr"; label = "WSA"; qcom,din-ports = <2>; @@ -2656,6 +2661,14 @@ status = "disabled"; }; + lpass_audiocc: clock-controller@32a9000 { + compatible = "qcom,sc8280xp-lpassaudiocc"; + reg = <0 0x032a9000 0 0x1000>; + qcom,adsp-pil-mode; + #clock-cells = <1>; + #reset-cells = <1>; + }; + swr2: soundwire-controller@3330000 { compatible = "qcom,soundwire-v1.6.0"; reg = <0 0x03330000 0 0x2000>; @@ -2665,6 +2678,8 @@ clocks = <&txmacro>; clock-names = "iface"; + resets = <&lpasscc LPASS_AUDIO_SWR_TX_CGCR>; + reset-names = "swr_audio_cgcr"; label = "TX"; #sound-dai-cells = <1>; #address-cells = <2>; @@ -2901,6 +2916,14 @@ }; }; + lpasscc: clock-controller@33e0000 { + compatible = "qcom,sc8280xp-lpasscc"; + reg = <0 0x033e0000 0 0x12000>; + qcom,adsp-pil-mode; + #clock-cells = <1>; + #reset-cells = <1>; + }; + usb_0_qmpphy: phy@88eb000 { compatible = "qcom,sc8280xp-qmp-usb43dp-phy"; reg = <0 0x088eb000 0 0x4000>;