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Reviewed-by: Konrad Dybcio Tested-by: Anders Roxell Tested-by: Linux Kernel Functional Testing Signed-off-by: Bhupesh Sharma --- arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index cdeb05e95674..0d1d7328cd62 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -5221,7 +5221,7 @@ msi-controller@17a40000 { }; slimbam: dma-controller@17184000 { - compatible = "qcom,bam-v1.7.0"; + compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0"; qcom,controlled-remotely; reg = <0 0x17184000 0 0x2a000>; num-channels = <31>; From patchwork Fri May 26 19:22:05 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bhupesh Sharma X-Patchwork-Id: 686166 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 55317C7EE2F for ; Fri, 26 May 2023 19:23:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242622AbjEZTXX (ORCPT ); Fri, 26 May 2023 15:23:23 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42040 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243832AbjEZTXO (ORCPT ); Fri, 26 May 2023 15:23:14 -0400 Received: from mail-pl1-x62b.google.com (mail-pl1-x62b.google.com [IPv6:2607:f8b0:4864:20::62b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 516DBE56 for ; Fri, 26 May 2023 12:23:09 -0700 (PDT) Received: by mail-pl1-x62b.google.com with SMTP id d9443c01a7336-1b024e29657so1137255ad.3 for ; Fri, 26 May 2023 12:23:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1685128988; x=1687720988; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=prFhwvSxBQ/UQ8d4CbWdnfwjRcrN8xUyHXxMGOEWxfk=; b=NZpF0bEaiJ64NKcd0IR9qeUnMib3NkOs5ZN6tMGQtVc6S9eyXNxuLqp36iIypZKrEs t+FAvfflBOhUraeyz5P0Vf/rt2pVio9P3b/l5xFrqajyS5X4L0WBxiZMNLvcARzlW5j4 xvIvJr+U63Ed26XkG5Pfz7Rzy59JuUXNhVA5PGSSNJ70W/OYmgssepxSbYFdtflV9vaZ bZYPxzU0Ia+/zpWxFv1QVbL2QlF24Hi4yUMpxaJD9QmQXt0MW4oY0rWB4dWOzn75jkbU e/BNCajd5h8EByWnBb7qXGp2f4+d8lWKyLjck6LVM2kq8aBWgg1/qJlpy7BH7l41i+EZ Souw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1685128988; x=1687720988; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=prFhwvSxBQ/UQ8d4CbWdnfwjRcrN8xUyHXxMGOEWxfk=; b=WWOGowUV9hMvSQacpiK0n8XxFlwW0nOU5PA4mlOJGn7NTqIY9eIrMSsoYE1G1PXHmH dMKZxCRalonpWt04wEGP6cmvCXcuKHsPLQVo4M6z27QYkwKxwZr2+7BKMcPdfx76+n/v B8R0p2DnhdBS7uF/BcB0A7SnyYekSCNHv9X1WbuVL0c42DfQjMdmsZ01GAlhUhCzJ1rq v+D5YkvQYqBzQnQgbfVhPoh5j5V+J1+X9hTqeW1W5T2gB0UTfe4sqvwnKk3d6TKsQBzi oAtHuuSsECnAlcbC6I1OthHtBtLc57kbUJs3RZxmRMe3WnxwIVzt9i8HjwIO94cVk4GD Eoaw== X-Gm-Message-State: AC+VfDxp/8Mb9LrYnP+rg2fdmp3HtmIqwUWw4B4v43GhdQ8e0D0qSpaq 2IBsAJY9MMSV+/HFxkVpGl8ubw== X-Google-Smtp-Source: ACHHUZ60c6AQTj4K3Aeo78Ha1u4XyOFEb9uQ4viBNyubuHN3rC3+0L5JFqBYaNSBovMUc2Xk8c8C1Q== X-Received: by 2002:a17:902:d483:b0:1b0:12e:3bfd with SMTP id c3-20020a170902d48300b001b0012e3bfdmr4463175plg.7.1685128988620; Fri, 26 May 2023 12:23:08 -0700 (PDT) Received: from localhost.localdomain ([2401:4900:1f3a:6990:1a5c:b29f:f8cf:923c]) by smtp.gmail.com with ESMTPSA id q18-20020a17090311d200b001b008b3dee2sm1955079plh.287.2023.05.26.12.23.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 May 2023 12:23:08 -0700 (PDT) From: Bhupesh Sharma To: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org Cc: agross@kernel.org, linux-kernel@vger.kernel.org, linux-crypto@vger.kernel.org, andersson@kernel.org, bhupesh.sharma@linaro.org, bhupesh.linux@gmail.com, krzysztof.kozlowski@linaro.org, robh+dt@kernel.org, konrad.dybcio@linaro.org, vladimir.zapolskiy@linaro.org, rfoss@kernel.org, neil.armstrong@linaro.org, djakov@kernel.org, stephan@gerhold.net, Anders Roxell , Linux Kernel Functional Testing Subject: [PATCH v8 06/11] dt-bindings: qcom-qce: Add compatibles for SM6115 and QCM2290 Date: Sat, 27 May 2023 00:52:05 +0530 Message-Id: <20230526192210.3146896-7-bhupesh.sharma@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230526192210.3146896-1-bhupesh.sharma@linaro.org> References: <20230526192210.3146896-1-bhupesh.sharma@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The core clock for the Crypto Engine block on Qualcomm SoCs SM6115 and QCM2290 are provided via the RPM block. So mark the compatibles for these SoCs to indicate that only 'core' clock is required for such SoCs. Acked-by: Krzysztof Kozlowski Tested-by: Anders Roxell Tested-by: Linux Kernel Functional Testing Signed-off-by: Bhupesh Sharma --- .../devicetree/bindings/crypto/qcom-qce.yaml | 44 +++++++++++++++---- 1 file changed, 35 insertions(+), 9 deletions(-) diff --git a/Documentation/devicetree/bindings/crypto/qcom-qce.yaml b/Documentation/devicetree/bindings/crypto/qcom-qce.yaml index 90ddf98a6df9..bb828068c3b8 100644 --- a/Documentation/devicetree/bindings/crypto/qcom-qce.yaml +++ b/Documentation/devicetree/bindings/crypto/qcom-qce.yaml @@ -35,7 +35,9 @@ properties: - qcom,ipq6018-qce - qcom,ipq8074-qce - qcom,msm8996-qce + - qcom,qcm2290-qce - qcom,sdm845-qce + - qcom,sm6115-qce - const: qcom,ipq4019-qce - const: qcom,qce @@ -52,16 +54,12 @@ properties: maxItems: 1 clocks: - items: - - description: iface clocks register interface. - - description: bus clocks data transfer interface. - - description: core clocks rest of the crypto block. + minItems: 1 + maxItems: 3 clock-names: - items: - - const: iface - - const: bus - - const: core + minItems: 1 + maxItems: 3 iommus: minItems: 1 @@ -95,9 +93,37 @@ allOf: enum: - qcom,crypto-v5.1 - qcom,crypto-v5.4 - - qcom,ipq4019-qce + - qcom,ipq6018-qce + - qcom,ipq8074-qce + - qcom,msm8996-qce + - qcom,sdm845-qce + then: + properties: + clocks: + maxItems: 3 + clock-names: + items: + - const: iface + - const: bus + - const: core + required: + - clocks + - clock-names + - if: + properties: + compatible: + contains: + enum: + - qcom,qcm2290-qce + - qcom,sm6115-qce then: + properties: + clocks: + maxItems: 1 + clock-names: + items: + - const: core required: - clocks - clock-names From patchwork Fri May 26 19:22:07 2023 Content-Type: text/plain; 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Tested-by: Anders Roxell Tested-by: Linux Kernel Functional Testing Signed-off-by: Bhupesh Sharma --- arch/arm64/boot/dts/qcom/sm8150.dtsi | 30 ++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi index a7f7bbfefa5b..197c016aaeba 100644 --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi @@ -2094,6 +2094,36 @@ ufs_mem_phy_lanes: phy@1d87400 { }; }; + cryptobam: dma-controller@1dc4000 { + compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0"; + reg = <0 0x01dc4000 0 0x24000>; + interrupts = ; + #dma-cells = <1>; + qcom,ee = <0>; + qcom,controlled-remotely; + num-channels = <8>; + qcom,num-ees = <2>; + iommus = <&apps_smmu 0x502 0x0641>, + <&apps_smmu 0x504 0x0011>, + <&apps_smmu 0x506 0x0011>, + <&apps_smmu 0x508 0x0011>, + <&apps_smmu 0x512 0x0000>; + }; + + crypto: crypto@1dfa000 { + compatible = "qcom,sm8150-qce", "qcom,qce"; + reg = <0 0x01dfa000 0 0x6000>; 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Fri, 26 May 2023 12:23:32 -0700 (PDT) From: Bhupesh Sharma To: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org Cc: agross@kernel.org, linux-kernel@vger.kernel.org, linux-crypto@vger.kernel.org, andersson@kernel.org, bhupesh.sharma@linaro.org, bhupesh.linux@gmail.com, krzysztof.kozlowski@linaro.org, robh+dt@kernel.org, konrad.dybcio@linaro.org, vladimir.zapolskiy@linaro.org, rfoss@kernel.org, neil.armstrong@linaro.org, djakov@kernel.org, stephan@gerhold.net, Anders Roxell , Linux Kernel Functional Testing Subject: [PATCH v8 10/11] arm64: dts: qcom: sm8350: Add Crypto Engine support Date: Sat, 27 May 2023 00:52:09 +0530 Message-Id: <20230526192210.3146896-11-bhupesh.sharma@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230526192210.3146896-1-bhupesh.sharma@linaro.org> References: <20230526192210.3146896-1-bhupesh.sharma@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add crypto engine (CE) and CE BAM related nodes and definitions to 'sm8350.dtsi'. Tested-by: Anders Roxell Tested-by: Linux Kernel Functional Testing Co-developed-by and Signed-off-by: Robert Foss [Bhupesh: Switch to '#interconnect-cells = <2>', available since commit 4f287e31ff5f] Signed-off-by: Bhupesh Sharma --- arch/arm64/boot/dts/qcom/sm8350.dtsi | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi index d9aa591dccf8..52afdf26b2bf 100644 --- a/arch/arm64/boot/dts/qcom/sm8350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi @@ -1735,6 +1735,28 @@ ufs_mem_phy_lanes: phy@1d87400 { }; }; + cryptobam: dma-controller@1dc4000 { + compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0"; + reg = <0 0x01dc4000 0 0x24000>; + interrupts = ; + #dma-cells = <1>; + qcom,ee = <0>; + qcom,controlled-remotely; + iommus = <&apps_smmu 0x594 0x0011>, + <&apps_smmu 0x596 0x0011>; + }; + + crypto: crypto@1dfa000 { + compatible = "qcom,sm8350-qce", "qcom,sm8150-qce", "qcom,qce"; + reg = <0 0x01dfa000 0 0x6000>; + dmas = <&cryptobam 4>, <&cryptobam 5>; + dma-names = "rx", "tx"; + iommus = <&apps_smmu 0x594 0x0011>, + <&apps_smmu 0x596 0x0011>; + interconnects = <&aggre2_noc MASTER_CRYPTO 0 &mc_virt SLAVE_EBI1 0>; + interconnect-names = "memory"; + }; + ipa: ipa@1e40000 { compatible = "qcom,sm8350-ipa";