From patchwork Thu Jun 1 14:40:56 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Li X-Patchwork-Id: 687898 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EA836C7EE2E for ; Thu, 1 Jun 2023 14:41:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233948AbjFAOle (ORCPT ); Thu, 1 Jun 2023 10:41:34 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55780 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232425AbjFAOld (ORCPT ); Thu, 1 Jun 2023 10:41:33 -0400 Received: from EUR05-VI1-obe.outbound.protection.outlook.com (mail-vi1eur05on2067.outbound.protection.outlook.com [40.107.21.67]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A9036E7; Thu, 1 Jun 2023 07:41:30 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=G+IdwpboZAo06u7I9rQzYpSVkQyzXmnuITDP6HoW+lm9k7J7nwTt8uRpmpbq+B2OJCw2tJc4ZA0Xt43LY4jGgZKwPOJv2q1Gur4TudWDE8haFZ34nmflxNWU7mvTUWF2ea7RHHO5iN27dFSGIPlCm8lP4vga9O6KQnZ7LydTONHTvLd7OM2W90uYAaHUQNNXB8OKL9ITebeQOEq/fYbWmwKLHcFS753h/TX/3knSYbgeIjQ6u/YpU3yb1jbPS0OfzMJ0zxCs+6h1gGSmzTFpJrVpqTgpddGLWL3UGcLM7sOKuVHlEnJG3IP33TuCpb3p2Jnz6IkIJjYk4Tb065943w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=RKzz/DKQcGPIpSzsnHktT8UhEcS2xeQdpWaKphJia7o=; b=eIP8G87GeBavkI14FyxrmTeQ0S/oagicFPdMZ08p7/jfkSxwuFm0bog34ADJRWjffkTajFqu+BbyEbsxWfweJlmr/k1lyHajQ2m5nLARJOPuIbUqGsi6YJghnPqPKJP+naedYkimLOO1jsFqpPoswPpAcqjHRncsP56x0LXfjYpec7WLNYVT1qpciP7GViLg+GeW6fhvQn6v7Kd4ENmmb1whjJZA+43pHTNveqrvfzpf07/1i8CPdTqgk/qA09WPXJouT9BvcKaAwnW5sowveq1rPG2Jnei7hKcWZ6SAo+t3rGE346Y10EAMdPP7TbQuCC6MqKIbuDLbinGa/k0Ugg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=nxp.com; dmarc=pass action=none header.from=nxp.com; dkim=pass header.d=nxp.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=RKzz/DKQcGPIpSzsnHktT8UhEcS2xeQdpWaKphJia7o=; b=ZlrSDChqVZP5od2nb9vtBm5CVNoMN+a1YBgOf5VBRgnbXC09lowWrOYGhx2kkit/dfO7uaSSfOcDQmEz8JUEZYMSHRPKRpbJdh5BgSyrLB4Z5+zovEsiCF9dUowwcy2P9c0W9qhKli01CELVn0LDQsMEfoKUL5WCDZpvWDAuFI4= Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=nxp.com; Received: from AM6PR04MB4838.eurprd04.prod.outlook.com (2603:10a6:20b:4::16) by AM9PR04MB7603.eurprd04.prod.outlook.com (2603:10a6:20b:2d6::9) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6455.22; Thu, 1 Jun 2023 14:41:28 +0000 Received: from AM6PR04MB4838.eurprd04.prod.outlook.com ([fe80::4a2a:262e:415f:e41c]) by AM6PR04MB4838.eurprd04.prod.outlook.com ([fe80::4a2a:262e:415f:e41c%7]) with mapi id 15.20.6433.024; Thu, 1 Jun 2023 14:41:28 +0000 From: Frank Li To: vkoul@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, dmaengine@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, peng.fan@nxp.com, joy.zou@nxp.com, shenwei.wang@nxp.com, imx@lists.linux.dev Subject: [PATCH v3 01/12] dmaengine: fsl-edma: clean up EXPORT_SYMBOL_GPL in fsl-edma-common.c Date: Thu, 1 Jun 2023 10:40:56 -0400 Message-Id: <20230601144107.1636833-2-Frank.Li@nxp.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230601144107.1636833-1-Frank.Li@nxp.com> References: <20230601144107.1636833-1-Frank.Li@nxp.com> X-ClientProxiedBy: SJ0PR03CA0130.namprd03.prod.outlook.com (2603:10b6:a03:33c::15) To AM6PR04MB4838.eurprd04.prod.outlook.com (2603:10a6:20b:4::16) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: AM6PR04MB4838:EE_|AM9PR04MB7603:EE_ X-MS-Office365-Filtering-Correlation-Id: 41ff20dc-067c-44e4-8fc6-08db62ae486d X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: dLg0EZyhlK3mOJMvDlQjz3XA0kOaii0MM+DGzyHi2RAvjveEhtpX/nu1cPe9u5t2Gwevwvlu5ZFJ2jWLt31EALgyrhANA2Es1Xh5rVYA9x6FnnmGnCL3O9dR/9DiTpaZCdtpzpPvxCAYvCPd/MslObg/Ftr17T5ZZ5/OBZekQqUIn+6jwfH21/nj0zueSdSkDZ+pRI0FPSIYVDQapl2Y7d9CRym6ChWG+kX58pnkRIsW+B3L8SVvoJ2sWXUQ+f8jWz9joHL29iHZYna5fwmMWiHAzwwCQZmot8npDY6QrPEsHYbdRmCfOOE8qvOKAaKLQ6HVK1nzZ+PLY/S2iy0690jkyHbrxiDbnwMcyVhJl3vv4kHTjAZugKxqqvIFyhsZdT4/10UXPHwdhEAffjGfejPQciuD+IcD98AdCnsfAqyKY/hdFtncW6eppUWEWOG4SwlKgTwV3f1b3ve86jewW1iVE1U5wrsVwlROyllOy7P3yxsVKjUIjOBOYsYjVlNK596EpZUTaVDx2Sr4BuIATJountzBV3uWkcOuG9NyV4/jfUdqFqwGFkhuvDvC7CWUZsb7x3iiVX2YGdIEapBDq6L0xAS6kP0R+QQTlG5v/UTTr3nvm+RfAWmBSe6jIiPFiQyGag/yipHz9ONZDM7h3Q== X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:AM6PR04MB4838.eurprd04.prod.outlook.com; PTR:; CAT:NONE; SFS:(13230028)(4636009)(396003)(376002)(346002)(136003)(366004)(39860400002)(451199021)(26005)(36756003)(6506007)(1076003)(6512007)(2616005)(86362001)(186003)(2906002)(478600001)(66946007)(66476007)(66556008)(5660300002)(52116002)(83380400001)(8936002)(6486002)(41300700001)(921005)(38100700002)(8676002)(316002)(38350700002)(6666004); DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 2ICHSWQvsbXQaZOVCIFLSKTD1ZiqoAxHGBNvMOzZFtrtkiNv43Jba2f1i1dyW5W3e3lqkwE0ffmDOfaJTvbu1k7S0eYAOGJtxiVRDhSJl8bAKfXIZm5MYSMLVZ1IZLHXXAtk50RoZyfOGqVPfwvTxQfiO451d6ErS0vT69jDBV/QF8vF0y4AfC/aTzQkBZaAAckoJoneGXbutn8bPDqFSQYZZY4IXM6JlNquqU5qnSvjPM9aV5RqOz6+GDf6YBdd80pVR/GLv3U9VKGR2bspJFi6Jl38vZ3fz28bldm9y5u68xP/zeC/ulGub2EYqhJGrIS+1uDmOB/839R4gnUTAXDhmoXgHWvWBNh55DujQ0jAl3mQ7QbNJz33gtdycdiOLR6chfzGJwOtput+Yw0Rc6PjuZ0ghG8Frpt8t+Uf7Z8LJppzc/WSkwz/yO5lNrkCKjAPmRJr0obLz827t/QLKj0L1wmhtS+hrbj5SxwBbk43PkWKY0/WfQsMLImB0spCLcufBkgKixo95FE1cXsz3AhwxEm0YpNUvbdFlb1R8AOYcs/pNQToufLMIfwvYrG89H3J+8Xqz4v7T7t1PQHbdZtv/5T2V2j/U4TUxUtRS+ap7hkUSPYtQS0qB0omzh9Zm//XNSEJ6mCV4SOTkj4HUgf3KlfR1YAz0jTT+dTshdjz4LvVNmciv6viVdk5LwYw73A6nkyOKtbHg+8IkDkpSm/dyBkGLSeyLDR2Z/qVVNtFSDpewdILfCk+hIsggHlCz/P0MRWfv4IpBDCyC8dVng0NcyHKS87SEzf41a13KO1g/15hhqchSMPkGm3kgzbfgHRB5CykGog9Z/8RbOF6bVehzkb9Dk6q/YM504BpURJhya55t0oYLdJwZaDHvLd8Z1g02wkEHTSJ4O1uGOKwmMchU7juw7/Zwrp2+OCnSh2CacParLtZ1wpvSMWgRAwSZz9tRenqyiWzvYggGlc4fQPTCKaqFv86DCAGdLaenV4+zC5n1tknnzZtbpo5yfAeiVT/G0SSotBCrHpFd6SZMOO7pU6ObFAi6YsC07pDlkga0SqI9L+4isdmYQ5eeyHZp1wkQBWuPWQVTppFoVVSEa/CInifg7PtvluXqRn/Rmcxi0WNHrnzA2aZGrg7CM352YGpQ1LC8VJ0qFcwdTmu+/1/32rzGlNAzFffjPvmDu1zfg6llpY7xEXpA4FHyPqa4B16Q2+jSn0/vjqsoCh3ofD18YlE+mcWlmFLQO5VmLAqkwX7Qh2vsO5XyYDUM+4+K5l92qe63XCMrAgcC3wNB3dy3v5IG2ekX3nAw2lXxNy3t6lG1M1DNbA0/ICyaY6KpsZ3PtQz3H5PAez3q16jUv6k94XVoIE0CBQNey7X2PfCxwk0vsUL+zblC3H1V3eamabQzAqBpQf7yENQe2wDgLqpbVFhstpxn6yth6caR3e19zdsoH7edUo6L0ie1/Xfsb35XXDVtoyd0vZSrHaJaSouT/xdLeDbMdzS1+jCx/x07OTG6AoHWt1QV5PsjV2QqKb8BWCGUuYaG4jJLGLk36sPCmT76F4GKw0rz/YdJ2yUb4F7WpVF189CiZuhZlRh X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 41ff20dc-067c-44e4-8fc6-08db62ae486d X-MS-Exchange-CrossTenant-AuthSource: AM6PR04MB4838.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Jun 2023 14:41:28.3916 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: oJdnXkIBJPIsr0g7Hk/s9c0Y4HFVmQezBCEG5nHBgBFSmtuziBUV37OdC7Jcm+ItwONoPBDH9Rj0YQqd+PTpjw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM9PR04MB7603 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Exported functions in fsl-edma-common.c are only used within fsl-edma.c and mcf-edma.c. Global export is unnecessary. This commit removes all EXPORT_SYMBOL_GPL in fsl-edma-common.c, and renames fsl-edma.c and mcf-edma.c to maintain the same final module names as before, thereby simplifying the codebase. Signed-off-by: Frank Li Reviewed-by: Peng Fan --- drivers/dma/Makefile | 6 ++++-- drivers/dma/fsl-edma-common.c | 18 ------------------ drivers/dma/{fsl-edma.c => fsl-edma-main.c} | 0 drivers/dma/{mcf-edma.c => mcf-edma-main.c} | 0 4 files changed, 4 insertions(+), 20 deletions(-) rename drivers/dma/{fsl-edma.c => fsl-edma-main.c} (100%) rename drivers/dma/{mcf-edma.c => mcf-edma-main.c} (100%) diff --git a/drivers/dma/Makefile b/drivers/dma/Makefile index a4fd1ce29510..7f3d62c9dee2 100644 --- a/drivers/dma/Makefile +++ b/drivers/dma/Makefile @@ -32,8 +32,10 @@ obj-$(CONFIG_DW_DMAC_CORE) += dw/ obj-$(CONFIG_DW_EDMA) += dw-edma/ obj-$(CONFIG_EP93XX_DMA) += ep93xx_dma.o obj-$(CONFIG_FSL_DMA) += fsldma.o -obj-$(CONFIG_FSL_EDMA) += fsl-edma.o fsl-edma-common.o -obj-$(CONFIG_MCF_EDMA) += mcf-edma.o fsl-edma-common.o +fsl-edma-objs := fsl-edma-main.o fsl-edma-common.o +obj-$(CONFIG_FSL_EDMA) += fsl-edma.o +mcf-edma-objs := mcf-edma-main.o fsl-edma-common.o +obj-$(CONFIG_MCF_EDMA) += mcf-edma.o obj-$(CONFIG_FSL_QDMA) += fsl-qdma.o obj-$(CONFIG_FSL_RAID) += fsl_raid.o obj-$(CONFIG_HISI_DMA) += hisi_dma.o diff --git a/drivers/dma/fsl-edma-common.c b/drivers/dma/fsl-edma-common.c index a06a1575a2a5..ce8d7c9eaf77 100644 --- a/drivers/dma/fsl-edma-common.c +++ b/drivers/dma/fsl-edma-common.c @@ -75,7 +75,6 @@ void fsl_edma_disable_request(struct fsl_edma_chan *fsl_chan) iowrite8(EDMA_CEEI_CEEI(ch), regs->ceei); } } -EXPORT_SYMBOL_GPL(fsl_edma_disable_request); static void mux_configure8(struct fsl_edma_chan *fsl_chan, void __iomem *addr, u32 off, u32 slot, bool enable) @@ -126,7 +125,6 @@ void fsl_edma_chan_mux(struct fsl_edma_chan *fsl_chan, else mux_configure8(fsl_chan, muxaddr, ch_off, slot, enable); } -EXPORT_SYMBOL_GPL(fsl_edma_chan_mux); static unsigned int fsl_edma_get_tcd_attr(enum dma_slave_buswidth addr_width) { @@ -155,7 +153,6 @@ void fsl_edma_free_desc(struct virt_dma_desc *vdesc) fsl_desc->tcd[i].ptcd); kfree(fsl_desc); } -EXPORT_SYMBOL_GPL(fsl_edma_free_desc); int fsl_edma_terminate_all(struct dma_chan *chan) { @@ -172,7 +169,6 @@ int fsl_edma_terminate_all(struct dma_chan *chan) vchan_dma_desc_free_list(&fsl_chan->vchan, &head); return 0; } -EXPORT_SYMBOL_GPL(fsl_edma_terminate_all); int fsl_edma_pause(struct dma_chan *chan) { @@ -188,7 +184,6 @@ int fsl_edma_pause(struct dma_chan *chan) spin_unlock_irqrestore(&fsl_chan->vchan.lock, flags); return 0; } -EXPORT_SYMBOL_GPL(fsl_edma_pause); int fsl_edma_resume(struct dma_chan *chan) { @@ -204,7 +199,6 @@ int fsl_edma_resume(struct dma_chan *chan) spin_unlock_irqrestore(&fsl_chan->vchan.lock, flags); return 0; } -EXPORT_SYMBOL_GPL(fsl_edma_resume); static void fsl_edma_unprep_slave_dma(struct fsl_edma_chan *fsl_chan) { @@ -265,7 +259,6 @@ int fsl_edma_slave_config(struct dma_chan *chan, return 0; } -EXPORT_SYMBOL_GPL(fsl_edma_slave_config); static size_t fsl_edma_desc_residue(struct fsl_edma_chan *fsl_chan, struct virt_dma_desc *vdesc, bool in_progress) @@ -340,7 +333,6 @@ enum dma_status fsl_edma_tx_status(struct dma_chan *chan, return fsl_chan->status; } -EXPORT_SYMBOL_GPL(fsl_edma_tx_status); static void fsl_edma_set_tcd_regs(struct fsl_edma_chan *fsl_chan, struct fsl_edma_hw_tcd *tcd) @@ -520,7 +512,6 @@ struct dma_async_tx_descriptor *fsl_edma_prep_dma_cyclic( return vchan_tx_prep(&fsl_chan->vchan, &fsl_desc->vdesc, flags); } -EXPORT_SYMBOL_GPL(fsl_edma_prep_dma_cyclic); struct dma_async_tx_descriptor *fsl_edma_prep_slave_sg( struct dma_chan *chan, struct scatterlist *sgl, @@ -589,7 +580,6 @@ struct dma_async_tx_descriptor *fsl_edma_prep_slave_sg( return vchan_tx_prep(&fsl_chan->vchan, &fsl_desc->vdesc, flags); } -EXPORT_SYMBOL_GPL(fsl_edma_prep_slave_sg); struct dma_async_tx_descriptor *fsl_edma_prep_memcpy(struct dma_chan *chan, dma_addr_t dma_dst, dma_addr_t dma_src, @@ -612,7 +602,6 @@ struct dma_async_tx_descriptor *fsl_edma_prep_memcpy(struct dma_chan *chan, return vchan_tx_prep(&fsl_chan->vchan, &fsl_desc->vdesc, flags); } -EXPORT_SYMBOL_GPL(fsl_edma_prep_memcpy); void fsl_edma_xfer_desc(struct fsl_edma_chan *fsl_chan) { @@ -629,7 +618,6 @@ void fsl_edma_xfer_desc(struct fsl_edma_chan *fsl_chan) fsl_chan->status = DMA_IN_PROGRESS; fsl_chan->idle = false; } -EXPORT_SYMBOL_GPL(fsl_edma_xfer_desc); void fsl_edma_issue_pending(struct dma_chan *chan) { @@ -649,7 +637,6 @@ void fsl_edma_issue_pending(struct dma_chan *chan) spin_unlock_irqrestore(&fsl_chan->vchan.lock, flags); } -EXPORT_SYMBOL_GPL(fsl_edma_issue_pending); int fsl_edma_alloc_chan_resources(struct dma_chan *chan) { @@ -660,7 +647,6 @@ int fsl_edma_alloc_chan_resources(struct dma_chan *chan) 32, 0); return 0; } -EXPORT_SYMBOL_GPL(fsl_edma_alloc_chan_resources); void fsl_edma_free_chan_resources(struct dma_chan *chan) { @@ -683,7 +669,6 @@ void fsl_edma_free_chan_resources(struct dma_chan *chan) fsl_chan->tcd_pool = NULL; fsl_chan->is_sw = false; } -EXPORT_SYMBOL_GPL(fsl_edma_free_chan_resources); void fsl_edma_cleanup_vchan(struct dma_device *dmadev) { @@ -695,7 +680,6 @@ void fsl_edma_cleanup_vchan(struct dma_device *dmadev) tasklet_kill(&chan->vchan.task); } } -EXPORT_SYMBOL_GPL(fsl_edma_cleanup_vchan); /* * On the 32 channels Vybrid/mpc577x edma version (here called "v1"), @@ -743,6 +727,4 @@ void fsl_edma_setup_regs(struct fsl_edma_engine *edma) edma->regs.tcd = edma->membase + EDMA_TCD; } -EXPORT_SYMBOL_GPL(fsl_edma_setup_regs); -MODULE_LICENSE("GPL v2"); diff --git a/drivers/dma/fsl-edma.c b/drivers/dma/fsl-edma-main.c similarity index 100% rename from drivers/dma/fsl-edma.c rename to drivers/dma/fsl-edma-main.c diff --git a/drivers/dma/mcf-edma.c b/drivers/dma/mcf-edma-main.c similarity index 100% rename from drivers/dma/mcf-edma.c rename to drivers/dma/mcf-edma-main.c From patchwork Thu Jun 1 14:40:57 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Li X-Patchwork-Id: 688465 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1A6E5C7EE31 for ; Thu, 1 Jun 2023 14:41:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234276AbjFAOlf (ORCPT ); Thu, 1 Jun 2023 10:41:35 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55798 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233900AbjFAOle (ORCPT ); Thu, 1 Jun 2023 10:41:34 -0400 Received: from EUR05-VI1-obe.outbound.protection.outlook.com (mail-vi1eur05on2067.outbound.protection.outlook.com [40.107.21.67]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 80C16C0; Thu, 1 Jun 2023 07:41:33 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=Av9U5XjAL9TQ7yeTQXAoixuqwfsFXIcRAMDc7nP+HNmV09aMX1KCOk5B0uWVlQgU337C+l4mqXl2v31Ydne82KlGvLCcDfEIBiyg/Ke6SkfVKjCcO96OOhRbTqL7G0s70PsOeS8oRauh9mmCxERr8bbIxX+x96KjkgimRBJkgQT1XhcVa8nETn/KpnB8wTFhp30zOJKYUF4q6nP4tvhPsoFA6R51rnpWQy+cLwlWtABpZhN7UiBfFqEfVR65oBs0pUJmPPnPNei/Encf24S1iwtkFU5h0L3Ggp+hdFQA6aMfpmw3vmeOCz/J7faW9srRJERcNFQERhAJrMCIQjtDdg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=QI8n0XPwXsaaH6UZQG+Zvq7pxrcY++lIzGOz4LgaYtE=; b=EwPHmBuAzrfbg3kylkfc+Pr6k5/6pGVg4ah2ny54tMKIY9DaQbHOlsKKGoDoIx1Ll9fYCHyhCmn0ASZYsnovZ/DcKkaBFdZG06CryCvt8O9Ok5CDguhWsMqsLymRvBP1w6KNmDiS0H4Tp4WJDGz0FAIMKj+KlWS7FN1c36dKQuwFfxhUIqRqsnHKbK5cftKgRpKln6oIq0orC2W9koLFfQp2v+StbIOB0RSK/zKFc0MxtSrXRww1uy/Yw+Je1jGYRYys7K8CGizQsiAJ9OAzp5zEa+O7oBlMSLHK58mHDgP3+J7PGxhOTas6UOL1Qe6zH9a+qVcUca73wqyvT2laPA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=nxp.com; dmarc=pass action=none header.from=nxp.com; dkim=pass header.d=nxp.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=QI8n0XPwXsaaH6UZQG+Zvq7pxrcY++lIzGOz4LgaYtE=; b=TUe0fopyOHfLmDhL3ZskEn1bAB78yUtxRkt7TB+/dA5syqSL1J8xIcb1xHJjCm0qB8h8RprEvYVX/lNEl1lvxO2Tj4KLSOPKIay3kmmHYxUBJqm6enLCAol0k/Xttn9aIBwDXGftiNB76HOJbZtLwYtApe3eOSveW5j7vfj881o= Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=nxp.com; Received: from AM6PR04MB4838.eurprd04.prod.outlook.com (2603:10a6:20b:4::16) by AM9PR04MB7603.eurprd04.prod.outlook.com (2603:10a6:20b:2d6::9) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6455.22; Thu, 1 Jun 2023 14:41:31 +0000 Received: from AM6PR04MB4838.eurprd04.prod.outlook.com ([fe80::4a2a:262e:415f:e41c]) by AM6PR04MB4838.eurprd04.prod.outlook.com ([fe80::4a2a:262e:415f:e41c%7]) with mapi id 15.20.6433.024; Thu, 1 Jun 2023 14:41:31 +0000 From: Frank Li To: vkoul@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, dmaengine@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, peng.fan@nxp.com, joy.zou@nxp.com, shenwei.wang@nxp.com, imx@lists.linux.dev Subject: [PATCH v3 02/12] dmaengine: fsl-edma: clean up fsl_edma_irq_exit() Date: Thu, 1 Jun 2023 10:40:57 -0400 Message-Id: <20230601144107.1636833-3-Frank.Li@nxp.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230601144107.1636833-1-Frank.Li@nxp.com> References: <20230601144107.1636833-1-Frank.Li@nxp.com> X-ClientProxiedBy: SJ0PR03CA0130.namprd03.prod.outlook.com (2603:10b6:a03:33c::15) To AM6PR04MB4838.eurprd04.prod.outlook.com (2603:10a6:20b:4::16) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: AM6PR04MB4838:EE_|AM9PR04MB7603:EE_ X-MS-Office365-Filtering-Correlation-Id: c190c711-9a41-42c9-9a9e-08db62ae4a26 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 3zIphlLERM110gG03puYd+Lud+ysYa0CKzYRvXif1jyrLmOgJ1HkKy//Xns860DyJZ2umCviDADCoqRr+yG9bNNCW0lI6mjh1qD6mF2UWBao9CN8sSm33DXAnlBXD6+PcFQ8LGf9bFie67uJO1b1Khvf7K/ziZqRbnJ5Mg7egM+5Gjd37Sh6lCEQ5aJ3YyKrxu8lt6xyiGU1gKTkUcTuxaecFXEhaOgfNvsYBD2NYiiiTY3HROMMuOmt+MyKgqz/XVL8aWorjDxUoqPLegpyJZ1MnHGslB+WH87KE/d1Nnm2vqMztFq8XkXGjTbdms/GKAnxb9wX2xpgS34HmHyfoNUIEJ22rIWqkmlRVxVrI9k0dhQRPY6HkMo0y/s1SWDaPqVvr7ljHpN0vatw6dacZhgmR4ZiCguzg2JMA2fTFkpnV725oSw0TJLdrx4U7GibWWLRCR/fagDxR4HVKmTPj6J7uYH/DYtKRnxzQ5deQ+PY4d6RySqyiG3YvkqoovL0VmAlYG2pfd+y1OlsTtv9TDOCXWmovnaA6fTCinOtRIxlbPXPU+uaTebDVKT9btVxFQvXp73dQ30bc46A9kEG2EV1bec3HPsNpysMeu50by20sZjju5Gq7oVBggTYjG20bjdLz74qxUzxhe6iR5vcmw== X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:AM6PR04MB4838.eurprd04.prod.outlook.com; PTR:; CAT:NONE; SFS:(13230028)(4636009)(396003)(376002)(346002)(136003)(366004)(39860400002)(451199021)(26005)(36756003)(6506007)(1076003)(6512007)(2616005)(86362001)(186003)(2906002)(478600001)(66946007)(66476007)(66556008)(5660300002)(52116002)(83380400001)(8936002)(6486002)(41300700001)(921005)(38100700002)(8676002)(316002)(38350700002)(6666004); DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: hZPdgNj/aY0SAUCsMVCCO5/zHrgJ+bJgjbg6vXRb5uhxMwUueuTuVNGAqQHYm5AvM5/olLHIKgXOUkJrNOtR8YBpDNOG+ccdGTcWFWdg8QwxHA9vvSXVxq6f2EvE6EUZGsQCe1wj0hO6ZLq1YdsqQptD17sqlT7b0UhmnxiwJRBkTIgQGBuIlZc5BEm1zgArVtzHdAefTDtjEiR+ZzkJt9QQ9KAaqjFDvJmb0yby3XM68PYZwGIFQwx5HTfa0BGnJWXl985aiNTI9l2AMtHkGkVOg+i51s52leO389ikLBcNMHftLASSzOj9E0Ljd/eua8MYa2R4J20rdrRKCKtRJwtNnbcAZJw1TUtHjYkg5Cq8lNJ5JggZx2Ikhbc+7fpXVLz3ZDZTb6VLMqc13sXlwMpqruastxdbo0v9T7sVa1pF7i0mCyuguxJHGXxw0e595uE6aC9KsIL9HLTFIeB5idHDyqwwO1wzya6EgzlaeJSBHR/+MTPatAiaWQeWLZLg514ivj8ToOG3vXgrscVEX6g1cRoDJeYWwLtINbwWjUSXhJT5DgRUGaA5c6f9d6uTeKe8YKMfa6/iypz9TkErPzEjqyfchqm61mUuYlGkLTHl9io+m5wS332dEPADfeDw+RVbEsm9KyCuLWxcdQAv4HjUfURxmlYrH8rVu+470B/68562Hn3GAR4RVeasL9XL2KZQXInAmZ0BKlQv8M1Sk4T3RVZlX3iOzlht484F3mNGnusLtS8byubmToeelCoNlYNm49ox5RKMvwfDAuEzIWoTIgtMiII0JVv8TErhhu9fyt8W2vKNtIgxB9e3X2udv5uzlo4JbzQ4QtsuPRKkxrelCZc6Xnyf0KGw8G8sFpsIq/VSUUrdCFra8E26r2KwLA7E1asA0zBEm8lAVyc6KE1Q5WoFodramfmCWPTL49avaeUQIlTSlcjcqjb7TlRUPwt05vC8/R+wS9fLSuc2k2X4a2pcgguZcWKdNX7YBjbEGkxUE6jZtVLxXcw41mbhXd+ymLQ2Kbx63kI0mlVK2wOKS2oad6hpqEy0BCWPC6WbdS3SD0yHCiYRWQztn3G94Byszdfzh0e6qtc94WICG4ZX509PX9uAnbJ4JSt9Nd+Ms15aFuHu3jl9xsojOHN274E8ySRYFM/UjmqrepMAUR5m3lrc83YtBaxmOzxCqhX55F6wGfGVfRghZFtuVDxS8OAyiWdwfPS0CqX93nTArZgvM2B9IR2OWCl1W9WjnGqrf4/CBIrJIi/Hd58pZG1LAkobpj6ds+rJ9ptbrlJOBVhwUiOSZmLNahORjac2BZAXJDmzJMzXw+PXpmPaZwmAXusk9jVSLbzKaTPLVdFxkQMOWmVZ1c6SQnktIPOasyhjfpPI9qr1jhw7rY5+WhBUErpZ0DB72qz2yOk1shxwG60+s4suIfhBv8i3lfqORI+j4ZF39CjHKJBNxndBLlmA+y8tR4WeG586KS+cwdtfkgIIJ7x/Wt+hsbB5FaEN311R+VstYYK+f9G43viClBxbnv+uB6FBUXf+m5Zqfmjb6PxhCT44Rd1nsUZkFd+9ZZoqEtBqkQjbH0KUEarsDkRy X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: c190c711-9a41-42c9-9a9e-08db62ae4a26 X-MS-Exchange-CrossTenant-AuthSource: AM6PR04MB4838.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Jun 2023 14:41:31.3322 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: AgOiyB12a5hWMfTwwiWO8obtkFpdgpo9tRLtifelhAHZqkyuYwUYQDaDYSajyRCaetz/gfjcGBhTGA/xvgQhjg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM9PR04MB7603 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org In the probe function, devm_request_irq is now being used to automatically manage IRQ. It eliminates the need for manual IRQ freeing during removal. Signed-off-by: Frank Li Reviewed-by: Peng Fan --- drivers/dma/fsl-edma-main.c | 12 ------------ 1 file changed, 12 deletions(-) diff --git a/drivers/dma/fsl-edma-main.c b/drivers/dma/fsl-edma-main.c index e40769666e39..16305bb9a2ef 100644 --- a/drivers/dma/fsl-edma-main.c +++ b/drivers/dma/fsl-edma-main.c @@ -216,17 +216,6 @@ fsl_edma2_irq_init(struct platform_device *pdev, return 0; } -static void fsl_edma_irq_exit( - struct platform_device *pdev, struct fsl_edma_engine *fsl_edma) -{ - if (fsl_edma->txirq == fsl_edma->errirq) { - devm_free_irq(&pdev->dev, fsl_edma->txirq, fsl_edma); - } else { - devm_free_irq(&pdev->dev, fsl_edma->txirq, fsl_edma); - devm_free_irq(&pdev->dev, fsl_edma->errirq, fsl_edma); - } -} - static void fsl_disable_clocks(struct fsl_edma_engine *fsl_edma, int nr_clocks) { int i; @@ -427,7 +416,6 @@ static int fsl_edma_remove(struct platform_device *pdev) struct device_node *np = pdev->dev.of_node; struct fsl_edma_engine *fsl_edma = platform_get_drvdata(pdev); - fsl_edma_irq_exit(pdev, fsl_edma); fsl_edma_cleanup_vchan(&fsl_edma->dma_dev); of_dma_controller_free(np); dma_async_device_unregister(&fsl_edma->dma_dev); From patchwork Thu Jun 1 14:40:58 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Li X-Patchwork-Id: 687897 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 475A6C77B7E for ; Thu, 1 Jun 2023 14:41:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234347AbjFAOlk (ORCPT ); Thu, 1 Jun 2023 10:41:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55872 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234148AbjFAOli (ORCPT ); Thu, 1 Jun 2023 10:41:38 -0400 Received: from EUR05-VI1-obe.outbound.protection.outlook.com (mail-vi1eur05on2046.outbound.protection.outlook.com [40.107.21.46]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EABC718F; Thu, 1 Jun 2023 07:41:36 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=Pgbe1LYuLjl8U/3Bud6Sa0XvaXbqOms0oV0uiG4sa7kN9gvru20Pg5nqcnt0GQ+nImNP5lgh7y6e7bO8qeOED2ZQ7LxgGb8nuE3nYkVz/L8T25UY3JCTGoZqW0yLqhQ5fh0v/cNtuvVkkifIBNFHYpS6XATFXBl0OcUz4viBOLzwWZTuAhkawzfg/vZMHmAqCWzRpoK4/YG9QCC1XhelLisE272BCnAJplRHiG6Ntg67SZbmSPV2pDzBX548T0zqhXG/aWElleyyu1otcwOmXcVUDR2NDkjRYudG9T9ZYylUMxpcWgr02OG/pKRKujjmiZALJic/U9K6yPwp8PaRiQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=w5Juf3kOYMDDqoTfA5YQdmkMKOm31LEp8hl7IUV/jfw=; b=ihoIzifxtisPSFZG93p1uMy0IsBM7EiCjl6F37pcK7iTRbxM2pp7HxSdsCao692E73xfRlSlhs8wIXSE5BsrJ9EHbInOFIJL3cocK8zCzfeG4FD494QHYWDbO9BZ39eztOkY+shyVE+cZBFNiD5Y4SBXDJv59lOi9ODHGPrcCBZZ/LiemqScpSTUW82lEHLdptLfPpaeje3MWVPDxnQbyHs7ycCCvNAhkPRE1lpsjbVk0Pn+lOZlUKgEL9CiBgNk5beOR28q0byD3VN42T687sOwY/9PmCOLmLpFbhOYup2eBDzIUuTh4FyrwOGuxqEXLDvaMCsESSoZIssnff3QzA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=nxp.com; dmarc=pass action=none header.from=nxp.com; dkim=pass header.d=nxp.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=w5Juf3kOYMDDqoTfA5YQdmkMKOm31LEp8hl7IUV/jfw=; b=iShn9RfGTlsN6/f7564ubF7cO8S/dUYZ4dCW/YK+S368NXVxSYHc9SsKvnBxWOFKda6YJiRTwsC0ve8byFqBm0c9AIoPjFGOBo51KvqLyLabIH9VE/m1Vkfcb+AzeMqrJFbwzGpMi64VBOuleRvyvKphgmlkKJEPT16+KTt4qCw= Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=nxp.com; Received: from AM6PR04MB4838.eurprd04.prod.outlook.com (2603:10a6:20b:4::16) by AM9PR04MB7603.eurprd04.prod.outlook.com (2603:10a6:20b:2d6::9) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6455.22; Thu, 1 Jun 2023 14:41:34 +0000 Received: from AM6PR04MB4838.eurprd04.prod.outlook.com ([fe80::4a2a:262e:415f:e41c]) by AM6PR04MB4838.eurprd04.prod.outlook.com ([fe80::4a2a:262e:415f:e41c%7]) with mapi id 15.20.6433.024; Thu, 1 Jun 2023 14:41:34 +0000 From: Frank Li To: vkoul@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, dmaengine@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, peng.fan@nxp.com, joy.zou@nxp.com, shenwei.wang@nxp.com, imx@lists.linux.dev Subject: [PATCH v3 03/12] dmaengine: fsl-edma: transition from bool fields to bitmask flags in drvdata Date: Thu, 1 Jun 2023 10:40:58 -0400 Message-Id: <20230601144107.1636833-4-Frank.Li@nxp.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230601144107.1636833-1-Frank.Li@nxp.com> References: <20230601144107.1636833-1-Frank.Li@nxp.com> X-ClientProxiedBy: SJ0PR03CA0130.namprd03.prod.outlook.com (2603:10b6:a03:33c::15) To AM6PR04MB4838.eurprd04.prod.outlook.com (2603:10a6:20b:4::16) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: AM6PR04MB4838:EE_|AM9PR04MB7603:EE_ X-MS-Office365-Filtering-Correlation-Id: 32650ccf-8192-4a7a-07cc-08db62ae4be2 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 99s7kI6AnmhkDvgDk2+E5bOWDHO5m1zWRZ8Uk7iYUiWqjT2f6GPAZgt19Wkoks+Z28nUegmBmT/Lg6WCD6J5TGN+bCKB6eDMJpFgreBvqxFEjb5Jvc0XdeARKzU3cw7mCBdSjeSiqIomt2Ifx6c9xbG4Wp4jso7xO8xk3Ua+kizkocv+o1fjYRlO50kVwJhBvpZrGCHczSt7z6Fgbk0XL7ge9I3JpcCvd1aEunYNrSNa7FyfqiK8F4Fi9r9R0WpFwrp+f11t7xsVwN5vAOnATJV1nzgqzDyAka/LcqPVUxOH55Q2hryfIYEHXTEsrjVZOXsfgpv4IRBx4M9ichDdyzXxQb1H1cG6fke3vbL/4z8WwTDgvZdpfoIG786X+5A/wf5QiRc651rERtwzc+y1KKESVae9nLYRY2DMhzyYVijmeXi3ReJ4adpjoyhDwoqAs1F6MTxzfywJxTcr/W2ZzNaHOFbfv7IOOehz4WaNvDzM28Q95ivTWKlM8f4HEU8SKVQ5MRIHVSEFzqSpEeHpXGqQK8reGIdj1Bh7iukskcZ8lq047kWQ7bt+5sbnHtVC01YuWK2PqgBN0kuNyU8Ar4pjsXiim0TsHstYuseZhJMpWJogIAXXHP2/cMwAHzGtieNBZDf7npteJ2uW3aYTBg== X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:AM6PR04MB4838.eurprd04.prod.outlook.com; PTR:; CAT:NONE; SFS:(13230028)(4636009)(396003)(376002)(346002)(136003)(366004)(39860400002)(451199021)(26005)(36756003)(6506007)(1076003)(6512007)(2616005)(86362001)(186003)(2906002)(478600001)(66946007)(66476007)(66556008)(5660300002)(52116002)(83380400001)(8936002)(6486002)(41300700001)(921005)(38100700002)(8676002)(316002)(38350700002)(6666004); DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 8baULYf/Boosv/q+nMhkfZ8afi69TWsxJ+SMsO4nOVaMaMTE+dQ/INy0XmqJF5Ne8x0WIPAcbee2TxW3ToBoDkhmAREc6IM4OiS5IW9DHacsoLRBoXucXsEMJZeKDol2Go80Vb3O8kcoBeKM6koimEBjzTdUOEL2R/0cTEcCccr2DsuSmOfDzAu0P7u+PkQlUeVK8e5UNV3cItfb8YULeKNaDpYz2vGajTc6OYfxt5Hk4izhRVxoAzkVXfqD83snpO3GjEuB8ZoS5OOh7llBwFNw4Px3LXJ8t993HVPy+9OMo90IyQRfaSVoP0G2WM/UokFABBunL7Jww5RFuwWpcwsKawy6Lr0n3VrCjSyIb09DzQVXjAqicdGr4WWuW+bDpTcIh11GA0IYogXYLZEyVE+7Rjst7YT+z3X9KMiqHHO2DcrQXMN+qMyunBb33suq1kto0lzc6CwPxs9DfdKP0i9QOjyLPS1dOdmVz2Ry5KSsP6wZL+RDzoVUgi6e9Rwzk6Wl3uoBcEryMB72niaMSXMLszXyoY6N9ITA/m4NKK4kpgwva0gTne33rPSuq+3lm+1JQaDZse8ktOqRrIITes1wAkShIHyOZs5tPt+/Ij/AT889P1FziGqdkPa2hVtEyh53J8+CZ5q4uRZQ5YGx9q1iB06zPa6bcr7iE87KAYbxLv74qC+ij5eSyxZ6z5W9EQY5RUHVk/tcVGPVhzNnlyNaaZifCn9c1SyxrZ4OBRw9+VJrIdwBN0+5JCM0E773cNETtVpheqOunrk9YMTIwwxHNZdboPyCrf22Uolv8agBYFpmEIK3KjKDyRidUkMdF1cuUUeZaV3RLVucA6mlJmt2/hC3xEQ6vqNZnRzMPPb3GSVSyjU3vsYhbrTnRAL5g9dNF/DlDsW1WNAV8eUL1gtbknFTcMzChhEwDwZRwd3RhKW4UEb+zNDFEcynfkG8INalkvKTKQLAe298KZamc5EyfqcPmY7gSifGsPgMhc0ZIRokGe2z/aTv7YlZ6g6tn0qbG5L0eOj7H7/AQK4LXws/bHvrwI4sH+ltg6sle509RPEIlwVD5j73drSCe/otKMYd51TVJfJiO5MSdDUANlwcvIqDZeIC8zRTaayYVZWNrUqUzjDKZKIuhQfGNDP77ENuopT/wSusqM+/FO/CY40xC5tKaJAXPuIVSr96fql5ACVSnCbRu6PPXc6mHXdI0PJpEl0mg1nUx0zqibjpOsDQcctJx1L3XCPs0DcuB3ybLgLaR1S9E9dgGwRP2UuI7UoHyr8FZx/2IPjxgh0ul1t1FcbbCdf02MnDG1Zm80/PHqXe1pDDhF8FNdsFEVSYzNNYY3SNBsgb9K3bse7eH/0wo0lG5pqoNrMEP/SOV9AJ5w3ZbmODUsaGom1jCc1GbDZyOH+ZAzxSWjFXC/iXy0iY/U2HhHuTpGtqgC6cQUiqwXvmh3CO1O0mJ9ubP3assQypoZ7bc9bcNzMsyyxZJSvvflfXE3N4xa02sBlgHL1q0+XZ+6Q0DsuD4GUSHyu8RjLnWnZsjY4CyVj/wiMonvxYBX0yQsQ5B5nMqCk1/bbR0SrmSVUw4dyLrnxzZiQu X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 32650ccf-8192-4a7a-07cc-08db62ae4be2 X-MS-Exchange-CrossTenant-AuthSource: AM6PR04MB4838.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Jun 2023 14:41:34.5210 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: 46lxsmJetZAwDUGfQLDVCL7aSdYSPzTR3+B5dd6zSE30FoigVEc0gHxTy4Y9cLRRtVVIJccAykF+XXIv3bYcjA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM9PR04MB7603 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Replace individual bool fields with bitmask flags within drvdata. This will facilitate future extensions, making it easier to add more flags to accommodate new versions of the edma IP. Signed-off-by: Frank Li Reviewed-by: Peng Fan --- drivers/dma/fsl-edma-common.c | 2 +- drivers/dma/fsl-edma-common.h | 5 +++-- drivers/dma/fsl-edma-main.c | 6 +++--- 3 files changed, 7 insertions(+), 6 deletions(-) diff --git a/drivers/dma/fsl-edma-common.c b/drivers/dma/fsl-edma-common.c index ce8d7c9eaf77..10dcc1435d37 100644 --- a/drivers/dma/fsl-edma-common.c +++ b/drivers/dma/fsl-edma-common.c @@ -114,7 +114,7 @@ void fsl_edma_chan_mux(struct fsl_edma_chan *fsl_chan, chans_per_mux = fsl_chan->edma->n_chans / dmamux_nr; ch_off = fsl_chan->vchan.chan.chan_id % chans_per_mux; - if (fsl_chan->edma->drvdata->mux_swap) + if (fsl_chan->edma->drvdata->flags & FSL_EDMA_DRV_MUX_SWAP) ch_off += endian_diff[ch_off % 4]; muxaddr = fsl_chan->edma->muxbase[ch / chans_per_mux]; diff --git a/drivers/dma/fsl-edma-common.h b/drivers/dma/fsl-edma-common.h index 004ec4a6bc86..db137a8c558d 100644 --- a/drivers/dma/fsl-edma-common.h +++ b/drivers/dma/fsl-edma-common.h @@ -144,11 +144,12 @@ enum edma_version { v3, /* 32ch, i.mx7ulp */ }; +#define FSL_EDMA_DRV_HAS_DMACLK BIT(0) +#define FSL_EDMA_DRV_MUX_SWAP BIT(1) struct fsl_edma_drvdata { enum edma_version version; u32 dmamuxs; - bool has_dmaclk; - bool mux_swap; + u32 flags; int (*setup_irq)(struct platform_device *pdev, struct fsl_edma_engine *fsl_edma); }; diff --git a/drivers/dma/fsl-edma-main.c b/drivers/dma/fsl-edma-main.c index 16305bb9a2ef..f5cf95d185f8 100644 --- a/drivers/dma/fsl-edma-main.c +++ b/drivers/dma/fsl-edma-main.c @@ -233,14 +233,14 @@ static struct fsl_edma_drvdata vf610_data = { static struct fsl_edma_drvdata ls1028a_data = { .version = v1, .dmamuxs = DMAMUX_NR, - .mux_swap = true, + .flags = FSL_EDMA_DRV_MUX_SWAP, .setup_irq = fsl_edma_irq_init, }; static struct fsl_edma_drvdata imx7ulp_data = { .version = v3, .dmamuxs = 1, - .has_dmaclk = true, + .flags = FSL_EDMA_DRV_HAS_DMACLK, .setup_irq = fsl_edma2_irq_init, }; @@ -293,7 +293,7 @@ static int fsl_edma_probe(struct platform_device *pdev) fsl_edma_setup_regs(fsl_edma); regs = &fsl_edma->regs; - if (drvdata->has_dmaclk) { + if (drvdata->flags & FSL_EDMA_DRV_HAS_DMACLK) { fsl_edma->dmaclk = devm_clk_get(&pdev->dev, "dma"); if (IS_ERR(fsl_edma->dmaclk)) { dev_err(&pdev->dev, "Missing DMA block clock.\n"); From patchwork Thu Jun 1 14:40:59 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Li X-Patchwork-Id: 688464 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9FA51C77B7E for ; Thu, 1 Jun 2023 14:41:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234362AbjFAOls (ORCPT ); Thu, 1 Jun 2023 10:41:48 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55918 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234363AbjFAOlk (ORCPT ); Thu, 1 Jun 2023 10:41:40 -0400 Received: from EUR05-VI1-obe.outbound.protection.outlook.com (mail-vi1eur05on2046.outbound.protection.outlook.com [40.107.21.46]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B37F5132; Thu, 1 Jun 2023 07:41:38 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=Z5k2AAUXdsoGR2APoowJG3qShBVA8qzTH0/P8HhFzwFUhBhZgZxD961pj9Sf0ymvRQJBC0xgOniEq0F6oWiUSrPMVLTXvNZiOfK+rwHGHAL4wGaDUpjNoKYuuMQwNtGkahKqxLzz0kYzRNDLgu4E/kP7RmPcZJQ9x7vc2KekIyzzBifCtQGGdsbyNcYyOsXbAqRV1YuAH1AfRyS36md30xYDkaK6h9oBng3jHbYQNZ5a28jHeEceLK6QlJ7+6wdqe92hgpOAyp9GhmnKvivKcaLpkGaWjn2Vl3dvN8UETiClU72vNo4PhVEBf2jhou3qFE0uR6qX1hlccoEd4XVnUw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=8HFIZH3IzsjxftOGBCtFEvNQkNGKfn6DDnuGmj3ibOo=; b=ViznnJcypl+muPqff5BliUmtVcl2/E1zJM8giLkKk3tR9hMbnvMPtNjXUOAGD5LmN1HFhrFIGgerl0MZ+iqkladHCWOsysT8pUsNlpYB2nrKTUX9A+ylY9n3V4vd5HaYoHIuFJusHcnsnzxHxLaFZSJM1EwiuxNPP4I4xyXzdG7wuLharRZMhWeXCidoY22B7D8TAhWB8ev9ZdUQsJaVeCkqnIgnAtYG/pqjQ6nQ4icJvST26C5ofcObKnVQnTH+X3k/JcA9XXgKIHXsfRi6cdsUwCuSuXcHsyVuW2pbuvSgFgGyEF2aCB81kM9VtDqbB8fjNqyEntYuNIGQgxdt1Q== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=nxp.com; dmarc=pass action=none header.from=nxp.com; dkim=pass header.d=nxp.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=8HFIZH3IzsjxftOGBCtFEvNQkNGKfn6DDnuGmj3ibOo=; b=HXryYJpryFj8kQ1tzl3ZnwcMn3p9ec9bfzrKmnP6A9ITMzczV/qmWY+8ORbEhUYLBoyJY+JtZamp9WdCugood7lfx/WRwfgCDindV7NUu4eCtpYDyrAmGz4Vtc5pt5c0dxaCIERUu6M1/vzxpumQRjKD9eULsLyEmo25sHnNTaU= Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=nxp.com; Received: from AM6PR04MB4838.eurprd04.prod.outlook.com (2603:10a6:20b:4::16) by AM9PR04MB7603.eurprd04.prod.outlook.com (2603:10a6:20b:2d6::9) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6455.22; Thu, 1 Jun 2023 14:41:37 +0000 Received: from AM6PR04MB4838.eurprd04.prod.outlook.com ([fe80::4a2a:262e:415f:e41c]) by AM6PR04MB4838.eurprd04.prod.outlook.com ([fe80::4a2a:262e:415f:e41c%7]) with mapi id 15.20.6433.024; Thu, 1 Jun 2023 14:41:37 +0000 From: Frank Li To: vkoul@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, dmaengine@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, peng.fan@nxp.com, joy.zou@nxp.com, shenwei.wang@nxp.com, imx@lists.linux.dev Subject: [PATCH v3 04/12] dmaengine: fsl-edma: Remove enum edma_version Date: Thu, 1 Jun 2023 10:40:59 -0400 Message-Id: <20230601144107.1636833-5-Frank.Li@nxp.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230601144107.1636833-1-Frank.Li@nxp.com> References: <20230601144107.1636833-1-Frank.Li@nxp.com> X-ClientProxiedBy: SJ0PR03CA0130.namprd03.prod.outlook.com (2603:10b6:a03:33c::15) To AM6PR04MB4838.eurprd04.prod.outlook.com (2603:10a6:20b:4::16) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: AM6PR04MB4838:EE_|AM9PR04MB7603:EE_ X-MS-Office365-Filtering-Correlation-Id: ec7ded81-6e39-4321-99e9-08db62ae4dc3 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: AvRF4RrowYtOBB/HU1bjPnT6sCjMkJr/bPTip5Vw6XZKr7Zhv1lyGqHZ7+LQK8jPICRXh1w+7FYe9d5m2O2thkJxeK6xJg0RlOHXBlX+hfCxCWu98cYK+3Sxdnb5eWfalrF2P0Zuhmo8grvCfXgSroSsJSFWSjd07cHIwxTuqh08vJyg6ST3OUIYHFuQYjNifv8DY6ziy+OZr/jVn382v973nSH2slyaryn9SdP6c8RdOqVy2z1XTU932U9osJoiHuL7vqFVgeaULjdv2SorTyUJAGVjYcxntODQ2ht/hsrgbZ6XaxXRehf2lbZgYAVtglzdFaMl1/Jud9rxx7oB1sGNJdZqY5EmDUW6mj/8utS2iELfc7Squ8bjQ2MizojLN49smedjSqGQ//IwWvf5HmZnkZrPIGmbrR9POLlso+J+5fv7fzm2zDVu2sLbidgV686iVaJK37AEJ9lS05Itw4g8xuc/Q7PIOwKES8qA5SeQAKEpH7hWwOokwb62Zst1NWii4i/ypQcr5opDoIo0JPyRwJpfC7UnXAgINSZ2V48XB4N4qdodvDFTjWWGh/CyKVHCPoSnLGlH1KOlfA4z1SW3t17xnOZN6cTTV8LOlT+1jkaJqlW4P0TnnggIAwGsZU5tU4LgWUPhjWNT5O0vAyFglQ7vsNvEcFkrDQu52qI= X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:AM6PR04MB4838.eurprd04.prod.outlook.com; PTR:; CAT:NONE; SFS:(13230028)(4636009)(396003)(376002)(346002)(136003)(366004)(39860400002)(451199021)(26005)(36756003)(6506007)(1076003)(6512007)(2616005)(86362001)(186003)(2906002)(478600001)(66946007)(66476007)(66556008)(5660300002)(52116002)(83380400001)(8936002)(6486002)(41300700001)(921005)(38100700002)(8676002)(316002)(38350700002)(6666004)(21314003); DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 6jlKrYCAkKFob1aSoPBK3JhqQ2nxQRAaIJZtt1Sv+k/6SwJjkDR6bU5Wj+rM309+PVLHtFUaa5G1Pei0FvDsUz0uVLWNU+UiUExg/pj2npSlb8WxBKlKfmyPkLBL6Q+cVjJx9DB79seLV3WqXwEdSblBpT8f+JWIs7p1XCYS6hQ4nZ3PcyD+iDYo2FnXBkA343atnF2azw+gOtdtmNKCXNf5I2qt1v5gX0qlXAOAQmRw8Q5bjB6GArWeCgWGuH9ILijs/wMMmIP5ojfIBBZHv2kymwkp0aTOBMP2oUeWc0LmossvcaKgHbFlYof3V1jsAhcNdpoWY0WF+AmbznNWk9PaRE3pfoYA/12GF2Xyj/AA6jxBTCdEH0rIgZKyeg5St5PqdFUtXgvxomaRgKhY5g8DtFsGoyHkqigjcwgA22iNRUvIHSa0lkSatv2aXluxgokzwqOhadBMsCb618dhcmDazzz2nk9C5Kc1ldz9+wiNtVj8QjVXCu09kq5RWW3GP4LLj3btlNVSmC4JIMJTP4JSMI6y3iOeuB1RGa8Xeq5mE58rW8d6dwtVD5Yxa/sTqXRtQBtzk8F1G8sYpYI9oagEGVYZdreBCqqT9yH1XQ4Uw0/8KP1C6+hK4H/gm2kWO0bVd/RLQDvQ2klcTu1rxBlDeANtng8kD6NNxBJ5QDQWWCVCyjU7Y34nIIjdJMQCecME+L5SanyD5p+2Aff4QfeLUoxE3GXhrgaoeOtE8qKNNlaHDtlvFFK8i5DTQ20ZjI8Wbstm2py9lCfOFh9bZK26VZo25r2CWzU6CGXZJkqEyXH9sfPYvPItnv1tnTEqx1rAMr//K8+9ZkYR+f731PunjiBbdEIDmaajj82ixGJbR4rttYy/NbOcEcr9rFUf+G84YQhynS4gY+74f9GWACAY/HFjjDzb9JyO3SFpGoncRU2d8gtnEmtXO0gwke8FL73b9SJHhglEsr/DZVuJlj+h3c/y9x5Xyjhm8hMZKGodMngY0ybrij3Sz48Y9XIgvLaKvgSmmcT8no5bPk7XgW6jsmdNjMT35+gPmRHUS6EYCIINHF2EqSwe7fNHaVnkbY9vYt79BL//fZrOaJwqZ9Aqh+MKw9lnbHoGnkEItwjFpEGAY+yMuFdwxrI6hb3y01Q/i6G20bwHWHU0U55YF+Too0HPoIeNrZOGOi31MbTB/JxN3eiQ8U/BQt8gBrjRk3wKK3b3riwNKYXdNUOFnLDvYXdwCJJg35bFrmAuQVHC3/tZ1GtG6We4sKsy7DOqZb2PjZn7lE1sZTZKyaMVmBC+LArM1T6FZD5y/aHERXUjEh43JwWt7DFJJRUbWqUReJqld2L16cL9BZgw1ujemr9FpJmDI3ZByPh866VjwA/s/HW03IL0YCWFMqXW8prvAHw/VI64XqKXDfkvvVOyUWVrzEecaPWSNwSexT57ZWmFFHgi6AL6Y5s+J0lgExScodVy2yOphwRTXOFL0saXD7dVMpe1hnc5fABa4E2W7CiGSKXtMzbQD4kGgviALTeRWziitxBChiEZYqLy9FjIkGc51MQU+cgCJCfWZyat6sFNbDh0CwFDe8cnXQZtni80 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: ec7ded81-6e39-4321-99e9-08db62ae4dc3 X-MS-Exchange-CrossTenant-AuthSource: AM6PR04MB4838.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Jun 2023 14:41:37.3642 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: ZE34AHkqZy2m5T+1czPxnyGs+UuAjg2NmaDcheJVw5+0qFb0Q73uc8EY7wOdK/jIw1XhBKQ3QNLGhyM2rvPYJw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM9PR04MB7603 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The enum edma_version, which defines v1, v2, and v3, is a software concept used to distinguish IP differences. However, it is not aligned with the chip reference manual. According to the 7ulp reference manual, it should be edma2. In the future, there will be edma3, edma4, and edma5, which could cause confusion. To avoid this confusion, remove the edma_version and instead use drvdata->flags to distinguish the IP difference. Signed-off-by: Frank Li --- drivers/dma/fsl-edma-common.c | 47 ++++++++++++++--------------------- drivers/dma/fsl-edma-common.h | 10 +++----- drivers/dma/fsl-edma-main.c | 9 +++---- drivers/dma/mcf-edma-main.c | 2 +- 4 files changed, 26 insertions(+), 42 deletions(-) diff --git a/drivers/dma/fsl-edma-common.c b/drivers/dma/fsl-edma-common.c index 10dcc1435d37..9948babcadf6 100644 --- a/drivers/dma/fsl-edma-common.c +++ b/drivers/dma/fsl-edma-common.c @@ -47,7 +47,7 @@ static void fsl_edma_enable_request(struct fsl_edma_chan *fsl_chan) struct edma_regs *regs = &fsl_chan->edma->regs; u32 ch = fsl_chan->vchan.chan.chan_id; - if (fsl_chan->edma->drvdata->version == v1) { + if (fsl_chan->edma->drvdata->flags & FSL_EDMA_DRV_WRAP_IO) { edma_writeb(fsl_chan->edma, EDMA_SEEI_SEEI(ch), regs->seei); edma_writeb(fsl_chan->edma, ch, regs->serq); } else { @@ -64,7 +64,7 @@ void fsl_edma_disable_request(struct fsl_edma_chan *fsl_chan) struct edma_regs *regs = &fsl_chan->edma->regs; u32 ch = fsl_chan->vchan.chan.chan_id; - if (fsl_chan->edma->drvdata->version == v1) { + if (fsl_chan->edma->drvdata->flags & FSL_EDMA_DRV_WRAP_IO) { edma_writeb(fsl_chan->edma, ch, regs->cerq); edma_writeb(fsl_chan->edma, EDMA_CEEI_CEEI(ch), regs->ceei); } else { @@ -120,7 +120,7 @@ void fsl_edma_chan_mux(struct fsl_edma_chan *fsl_chan, muxaddr = fsl_chan->edma->muxbase[ch / chans_per_mux]; slot = EDMAMUX_CHCFG_SOURCE(slot); - if (fsl_chan->edma->drvdata->version == v3) + if (fsl_chan->edma->drvdata->flags & FSL_EDMA_DRV_CONFIG32) mux_configure32(fsl_chan, muxaddr, ch_off, slot, enable); else mux_configure8(fsl_chan, muxaddr, ch_off, slot, enable); @@ -682,9 +682,8 @@ void fsl_edma_cleanup_vchan(struct dma_device *dmadev) } /* - * On the 32 channels Vybrid/mpc577x edma version (here called "v1"), - * register offsets are different compared to ColdFire mcf5441x 64 channels - * edma (here called "v2"). + * On the 32 channels Vybrid/mpc577x edma version, register offsets are + * different compared to ColdFire mcf5441x 64 channels edma. * * This function sets up register offsets as per proper declared version * so must be called in xxx_edma_probe() just after setting the @@ -692,33 +691,25 @@ void fsl_edma_cleanup_vchan(struct dma_device *dmadev) */ void fsl_edma_setup_regs(struct fsl_edma_engine *edma) { + bool is64 = !!(edma->drvdata->flags & FSL_EDMA_DRV_EDMA64); + edma->regs.cr = edma->membase + EDMA_CR; edma->regs.es = edma->membase + EDMA_ES; edma->regs.erql = edma->membase + EDMA_ERQ; edma->regs.eeil = edma->membase + EDMA_EEI; - edma->regs.serq = edma->membase + ((edma->drvdata->version == v2) ? - EDMA64_SERQ : EDMA_SERQ); - edma->regs.cerq = edma->membase + ((edma->drvdata->version == v2) ? - EDMA64_CERQ : EDMA_CERQ); - edma->regs.seei = edma->membase + ((edma->drvdata->version == v2) ? - EDMA64_SEEI : EDMA_SEEI); - edma->regs.ceei = edma->membase + ((edma->drvdata->version == v2) ? - EDMA64_CEEI : EDMA_CEEI); - edma->regs.cint = edma->membase + ((edma->drvdata->version == v2) ? - EDMA64_CINT : EDMA_CINT); - edma->regs.cerr = edma->membase + ((edma->drvdata->version == v2) ? - EDMA64_CERR : EDMA_CERR); - edma->regs.ssrt = edma->membase + ((edma->drvdata->version == v2) ? - EDMA64_SSRT : EDMA_SSRT); - edma->regs.cdne = edma->membase + ((edma->drvdata->version == v2) ? - EDMA64_CDNE : EDMA_CDNE); - edma->regs.intl = edma->membase + ((edma->drvdata->version == v2) ? - EDMA64_INTL : EDMA_INTR); - edma->regs.errl = edma->membase + ((edma->drvdata->version == v2) ? - EDMA64_ERRL : EDMA_ERR); - - if (edma->drvdata->version == v2) { + edma->regs.serq = edma->membase + (is64 ? EDMA64_SERQ : EDMA_SERQ); + edma->regs.cerq = edma->membase + (is64 ? EDMA64_CERQ : EDMA_CERQ); + edma->regs.seei = edma->membase + (is64 ? EDMA64_SEEI : EDMA_SEEI); + edma->regs.ceei = edma->membase + (is64 ? EDMA64_CEEI : EDMA_CEEI); + edma->regs.cint = edma->membase + (is64 ? EDMA64_CINT : EDMA_CINT); + edma->regs.cerr = edma->membase + (is64 ? EDMA64_CERR : EDMA_CERR); + edma->regs.ssrt = edma->membase + (is64 ? EDMA64_SSRT : EDMA_SSRT); + edma->regs.cdne = edma->membase + (is64 ? EDMA64_CDNE : EDMA_CDNE); + edma->regs.intl = edma->membase + (is64 ? EDMA64_INTL : EDMA_INTR); + edma->regs.errl = edma->membase + (is64 ? EDMA64_ERRL : EDMA_ERR); + + if (is64) { edma->regs.erqh = edma->membase + EDMA64_ERQH; edma->regs.eeih = edma->membase + EDMA64_EEIH; edma->regs.errh = edma->membase + EDMA64_ERRH; diff --git a/drivers/dma/fsl-edma-common.h b/drivers/dma/fsl-edma-common.h index db137a8c558d..5f3fcb991b5e 100644 --- a/drivers/dma/fsl-edma-common.h +++ b/drivers/dma/fsl-edma-common.h @@ -138,16 +138,12 @@ struct fsl_edma_desc { struct fsl_edma_sw_tcd tcd[]; }; -enum edma_version { - v1, /* 32ch, Vybrid, mpc57x, etc */ - v2, /* 64ch Coldfire */ - v3, /* 32ch, i.mx7ulp */ -}; - #define FSL_EDMA_DRV_HAS_DMACLK BIT(0) #define FSL_EDMA_DRV_MUX_SWAP BIT(1) +#define FSL_EDMA_DRV_CONFIG32 BIT(2) +#define FSL_EDMA_DRV_WRAP_IO BIT(3) +#define FSL_EDMA_DRV_EDMA64 BIT(4) struct fsl_edma_drvdata { - enum edma_version version; u32 dmamuxs; u32 flags; int (*setup_irq)(struct platform_device *pdev, diff --git a/drivers/dma/fsl-edma-main.c b/drivers/dma/fsl-edma-main.c index f5cf95d185f8..c7f57edd2bb6 100644 --- a/drivers/dma/fsl-edma-main.c +++ b/drivers/dma/fsl-edma-main.c @@ -225,22 +225,19 @@ static void fsl_disable_clocks(struct fsl_edma_engine *fsl_edma, int nr_clocks) } static struct fsl_edma_drvdata vf610_data = { - .version = v1, - .dmamuxs = DMAMUX_NR, + .dmamuxs = DMAMUX_NR | FSL_EDMA_DRV_WRAP_IO, .setup_irq = fsl_edma_irq_init, }; static struct fsl_edma_drvdata ls1028a_data = { - .version = v1, .dmamuxs = DMAMUX_NR, - .flags = FSL_EDMA_DRV_MUX_SWAP, + .flags = FSL_EDMA_DRV_MUX_SWAP | FSL_EDMA_DRV_WRAP_IO, .setup_irq = fsl_edma_irq_init, }; static struct fsl_edma_drvdata imx7ulp_data = { - .version = v3, .dmamuxs = 1, - .flags = FSL_EDMA_DRV_HAS_DMACLK, + .flags = FSL_EDMA_DRV_HAS_DMACLK | FSL_EDMA_DRV_CONFIG32, .setup_irq = fsl_edma2_irq_init, }; diff --git a/drivers/dma/mcf-edma-main.c b/drivers/dma/mcf-edma-main.c index ebd8733f72ad..7b05e303ba51 100644 --- a/drivers/dma/mcf-edma-main.c +++ b/drivers/dma/mcf-edma-main.c @@ -172,7 +172,7 @@ static void mcf_edma_irq_free(struct platform_device *pdev, } static struct fsl_edma_drvdata mcf_data = { - .version = v2, + .flags = FSL_EDMA_DRV_EDMA64, .setup_irq = mcf_edma_irq_init, }; From patchwork Thu Jun 1 14:41:00 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Li X-Patchwork-Id: 687896 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0821DC77B7E for ; Thu, 1 Jun 2023 14:42:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234382AbjFAOmB (ORCPT ); Thu, 1 Jun 2023 10:42:01 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56094 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234356AbjFAOls (ORCPT ); Thu, 1 Jun 2023 10:41:48 -0400 Received: from EUR05-VI1-obe.outbound.protection.outlook.com (mail-vi1eur05on2086.outbound.protection.outlook.com [40.107.21.86]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 971B21B1; Thu, 1 Jun 2023 07:41:43 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=ZKwctUW+OlNYgCIMinDZSuNKs9cTj2nmSJ5mqnn8dkx1k6kUUuIRmEonTXHlpR9zBkuQMC93/vJQeeOnliItLq9GhounSKGTMAxxirnrRXueLw17/wmZrR9a3tv1LNfTfDEwUsjS6KJH8NXPMut7RMJFwWZW/ASv/FETVCPmfwgIXW6nruHcn3lcc3n49dx4tr4Vo8oXRZdI1VygNHKN4884YBoJXiu54n6O5/fnc2oEJyDqpxl6at2YvVW/DUmc96Z09VLygCQLXbWefyZDARSW7LHxfphetiTIjN8hWiLa+DthzFIfkcVFHa1zh0W1Jd5e0nl6dS72wfBslBRmvg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=6IPht6dxRF/kpeNVTtT5w7ymmGtWfKCQH7SKL0OEaWg=; b=T7OJIPktaSNGnj5jn17U1Z2X/pSn8GYNDmEO4/hZmObDqVBsYu3YrKbqTFYKBwz20eV8yu09lUliBinmxbkig1t2KRAOpOv87E60ZS/OxF63VIlw4q2iDdpUjef9XzQA6VRXGTEppgFCIll9y/zAv6kX2859Zkweu4Lu+ZcTIiKFVegAB8x8/n4dnVMpPutI5c7kwYszKcgOuAWPnrI0TuNcyh2cIE99tMkklCxvAuSuXKamccb1obwuHnGzJbKO5fNg8cLJsUbhAD4rCDpNwFkIxJS0Tt7CvH0kKPeBuUV3xsG/MhPv4OyNxqFehJXQACwh5UvMDMXnJtdrqNF91Q== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=nxp.com; dmarc=pass action=none header.from=nxp.com; dkim=pass header.d=nxp.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=6IPht6dxRF/kpeNVTtT5w7ymmGtWfKCQH7SKL0OEaWg=; b=ZMhE7+V8egeTRkFzI3Tq+FpMFjayy2Eg9anii8tcDS6sSJG/vStlbNFWaYhMG8/jQf8d7kuH2hrHy3qHTLt4eeCqn62R6GcdeKKZCmFMpiI49hpG/Tcw7oYJryzuPpznbdQK4O9qdRHw3yG4UKFtKrJf72Qpf5y7W8XGacWHMfI= Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=nxp.com; Received: from AM6PR04MB4838.eurprd04.prod.outlook.com (2603:10a6:20b:4::16) by AM9PR04MB7603.eurprd04.prod.outlook.com (2603:10a6:20b:2d6::9) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6455.22; Thu, 1 Jun 2023 14:41:40 +0000 Received: from AM6PR04MB4838.eurprd04.prod.outlook.com ([fe80::4a2a:262e:415f:e41c]) by AM6PR04MB4838.eurprd04.prod.outlook.com ([fe80::4a2a:262e:415f:e41c%7]) with mapi id 15.20.6433.024; Thu, 1 Jun 2023 14:41:40 +0000 From: Frank Li To: vkoul@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, dmaengine@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, peng.fan@nxp.com, joy.zou@nxp.com, shenwei.wang@nxp.com, imx@lists.linux.dev Subject: [PATCH v3 05/12] dmaengine: fsl-edma: move common IRQ handler to common.c Date: Thu, 1 Jun 2023 10:41:00 -0400 Message-Id: <20230601144107.1636833-6-Frank.Li@nxp.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230601144107.1636833-1-Frank.Li@nxp.com> References: <20230601144107.1636833-1-Frank.Li@nxp.com> X-ClientProxiedBy: SJ0PR03CA0130.namprd03.prod.outlook.com (2603:10b6:a03:33c::15) To AM6PR04MB4838.eurprd04.prod.outlook.com (2603:10a6:20b:4::16) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: AM6PR04MB4838:EE_|AM9PR04MB7603:EE_ X-MS-Office365-Filtering-Correlation-Id: 179d0b79-e719-4184-6570-08db62ae4fbf X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: A/PU4mHYjreWQZ2/9QFr9DTv7DJVm668pT0m0jZJy+Ho6eAn8R7Tfimgtim6JsZ/qr1bfXofnrsQ5Q9lmwm3yEnS9s1TiNSm4OH1C4Q25bYOq3kMhiNHAyTUPw3poV0VvgZRa9T3QuItk/DKONvnsSv9x21fXZ0vc+2dBfPgmDIpQ68127E2aQJA8WwR4fIyQw15FeXS0s/QzyINvpkc3JAVf1DjaLVbceXfJ3ACMfeaOH9ei/B4KgKLWePDi7fFnvmbvO32GMEfoK1BAwTZOp8hR792wVER2UKX/tym3fGxl7xZlRaVpOvsakDIMFgWjE3UIANj3QtaZ7g0axXqbMCPVV9AwE3o/fy4CicWPIbdyvRDwD8UzzXtAfAnDWFiviBtYIgD5/0aiTUR26VHvzNqYW+AO319qDEmG/H/UR2vpBWJqLKSmI/TujEFWzQ6Q542YrTcEd+xPJYnu9CQU5WCyaLBPZqxmY1yhlUU4JlEJcUe12iVT9RCyid0WuLh3mzyqgA4smiuuVAEy9D2rSdAUmMyV7VIVgnrY7DszLAxbuJfi/dEdI4XfoDmkkfKZFYDDywNuJGamC/xQEnxVJe/pA+pEkZ6be+sy/5pcB/inH3fDM89dpMwxuqa5MRWhsZzKiAsynr989boQ6SlFw== X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:AM6PR04MB4838.eurprd04.prod.outlook.com; PTR:; CAT:NONE; SFS:(13230028)(4636009)(396003)(376002)(346002)(136003)(366004)(39860400002)(451199021)(26005)(36756003)(6506007)(1076003)(6512007)(2616005)(86362001)(186003)(2906002)(478600001)(66946007)(66476007)(66556008)(5660300002)(52116002)(83380400001)(8936002)(6486002)(41300700001)(921005)(38100700002)(8676002)(316002)(38350700002)(6666004); DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: FO9HyvZj5skDvurTAsyCYrh61HEr6Z+4jaTGAkY/+CwJxgJlZBZwaqpJSJWJ3z8f8cimr/aR79fVyPiMGHYNJ64JbZL3rRlLiptH9lU6ytvFocq9/AqLbzNvQxT+JQdiAvV5l+/XWq+LgsgpoXVQX2/SS7eubfei4pfIB9VPF62RUzgZn/wX07bFN1PUCDWvT/wa/lTLY+r2NPf7ZQH34TEk1TRhY2rFhCR9ucT66WRcJuaaP5l2+ENyHWsHJiUdi/ZFJMbcNu6cMzEsyZjfmWXDcasz97eSX7RlZM8D3+aj/c6enhm9M2mfWHFJ3OUSCW7PXOr+GbDmixx0eGotHQGmrGUmM63i85ToSBPsAuUu0G31XXUN9q92pP+gwsp5qVVA2I8XrZuJH5kob2q/mjEujL2Lr8kzX4bVIn5Z+0GB2XFC1CjDBOBdg9NZJwFs+0fP91RJE9xjQRT9nNvhdJgiBVopso64NJmXnTMKWf7h8WMnmKiFXaA6saL4+9ls60Cq15GT1QpIdpQR0p4MynFSM49XiWMMBwFX7ZRurM+PK1zaNj+ckIjuuBLTwFm/YqJP9x1RvtdqJnVZIHTsXVo3zpcrRS2v4YXGkvHFpfkCnsmIyTiO9KszaSTy1bzmsI8a1MsIBkiSmWAFPxiz15KLdDjDrAKW2q0TAkzUTg4ZBOiP3RdI+fvUNRgENtuXui11csLzh66PL/DZf/nr7ZG+IV6sXr4elxsfWE5OB9JGX4z5aRyIHdIDLMMYkep3QBTtoc4d6FGniU9WyFkVPKkW9leYmr9uVtaHRDKupUeDcOOAgKkytIjOQ44pZNuz+S0t+cvvmc5vIlNEL7j0iqkUvcZ6O2VLS+WgArTjhZXfRrQoIy4vO3QzF5ZThxoBxRltraeSgpLjmki+PtCoxOAoXTKRxBB7cct0/8nRWh3myukqhTjDO5DTwvNxBZzdCxZ6PLzCMtMQLAdp7I3fsaabypVrHJ4nlhPxF2M9p3WqbPAopAExsrSC+tdM/lN3YwQ5TIco4R/RpExKX5ZufRR8mOxbwBMAs+X/3J/DHV/1VAg7PjlPdj313Lsacp/yN/1sx0rJdTYFMeypBeGUP8SpNHzup8P2x0zDa/6Lmb1kK9R7K4tr1v41/0kvqgNPsWUpbLcRlmxEGz0kPOaorbjmx8LpE/t+tOf9ibkibxVFxvf6eteVfhxhgUTWXCtOiHlhOvabE/qhFydygbk58hyNtu1rCEf5+yto1DwtkYjtkQa0Gzfx0TP3mgSx1ZhX6BRlB+SXnxerhzUhGuIE1ew0LzMxgAfL/y+9Mxn7Kz2dDoC1or0JsPTbVHFv8GTBBclIBxutjoUz+75FS1CaD73+rJ0jaXWv2m4SJBLzZQJ2gt41iTF/dsJlkuFUmXC4P2AQ17pQzN1zzccGmvXgelM9zTQcUAxgP/HWO9P0ANNvPmBtHVLSxQCd2C66mziDau3Wz1gsnsSx6G+2+2Raon4jVtFJ5+C0sHjnX0iGxz7Q2HU1nIGClewFn8EpZalHB2B/lNk32XEQU8qTMUe37NjvAdzEVXQZBTcBYOyKNE94/sw/xcW1gxlbRAgNnkhI X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 179d0b79-e719-4184-6570-08db62ae4fbf X-MS-Exchange-CrossTenant-AuthSource: AM6PR04MB4838.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Jun 2023 14:41:40.6519 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: N4jv9U6zh2BbYoouou9ll4HtVWLMhXHnFdvbcN9XmI6MifBm1YbdP0oMMTJvAldRUgrwMpZ+ka1cpwfUpC00pA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM9PR04MB7603 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Move the common part of IRQ handler from fsl-edma-main.c and mcf-edma-main.c to fsl-edma-common.c. This eliminates redundant code, as the both files contains mostly identical code. Signed-off-by: Frank Li --- drivers/dma/fsl-edma-common.c | 26 ++++++++++++++++++++++++++ drivers/dma/fsl-edma-common.h | 7 +++++++ drivers/dma/fsl-edma-main.c | 30 ++---------------------------- drivers/dma/mcf-edma-main.c | 30 ++---------------------------- 4 files changed, 37 insertions(+), 56 deletions(-) diff --git a/drivers/dma/fsl-edma-common.c b/drivers/dma/fsl-edma-common.c index 9948babcadf6..a9d17cf142fc 100644 --- a/drivers/dma/fsl-edma-common.c +++ b/drivers/dma/fsl-edma-common.c @@ -42,6 +42,32 @@ #define EDMA_TCD 0x1000 +void fsl_edma_tx_chan_handler(struct fsl_edma_chan *fsl_chan) +{ + spin_lock(&fsl_chan->vchan.lock); + + if (!fsl_chan->edesc) { + /* terminate_all called before */ + spin_unlock(&fsl_chan->vchan.lock); + return; + } + + if (!fsl_chan->edesc->iscyclic) { + list_del(&fsl_chan->edesc->vdesc.node); + vchan_cookie_complete(&fsl_chan->edesc->vdesc); + fsl_chan->edesc = NULL; + fsl_chan->status = DMA_COMPLETE; + fsl_chan->idle = true; + } else { + vchan_cyclic_callback(&fsl_chan->edesc->vdesc); + } + + if (!fsl_chan->edesc) + fsl_edma_xfer_desc(fsl_chan); + + spin_unlock(&fsl_chan->vchan.lock); +} + static void fsl_edma_enable_request(struct fsl_edma_chan *fsl_chan) { struct edma_regs *regs = &fsl_chan->edma->regs; diff --git a/drivers/dma/fsl-edma-common.h b/drivers/dma/fsl-edma-common.h index 5f3fcb991b5e..242ab7df8993 100644 --- a/drivers/dma/fsl-edma-common.h +++ b/drivers/dma/fsl-edma-common.h @@ -219,6 +219,13 @@ static inline struct fsl_edma_desc *to_fsl_edma_desc(struct virt_dma_desc *vd) return container_of(vd, struct fsl_edma_desc, vdesc); } +static inline void fsl_edma_err_chan_handler(struct fsl_edma_chan *fsl_chan) +{ + fsl_chan->status = DMA_ERROR; + fsl_chan->idle = true; +} + +void fsl_edma_tx_chan_handler(struct fsl_edma_chan *fsl_chan); void fsl_edma_disable_request(struct fsl_edma_chan *fsl_chan); void fsl_edma_chan_mux(struct fsl_edma_chan *fsl_chan, unsigned int slot, bool enable); diff --git a/drivers/dma/fsl-edma-main.c b/drivers/dma/fsl-edma-main.c index c7f57edd2bb6..73178f250d0a 100644 --- a/drivers/dma/fsl-edma-main.c +++ b/drivers/dma/fsl-edma-main.c @@ -33,7 +33,6 @@ static irqreturn_t fsl_edma_tx_handler(int irq, void *dev_id) struct fsl_edma_engine *fsl_edma = dev_id; unsigned int intr, ch; struct edma_regs *regs = &fsl_edma->regs; - struct fsl_edma_chan *fsl_chan; intr = edma_readl(fsl_edma, regs->intl); if (!intr) @@ -42,31 +41,7 @@ static irqreturn_t fsl_edma_tx_handler(int irq, void *dev_id) for (ch = 0; ch < fsl_edma->n_chans; ch++) { if (intr & (0x1 << ch)) { edma_writeb(fsl_edma, EDMA_CINT_CINT(ch), regs->cint); - - fsl_chan = &fsl_edma->chans[ch]; - - spin_lock(&fsl_chan->vchan.lock); - - if (!fsl_chan->edesc) { - /* terminate_all called before */ - spin_unlock(&fsl_chan->vchan.lock); - continue; - } - - if (!fsl_chan->edesc->iscyclic) { - list_del(&fsl_chan->edesc->vdesc.node); - vchan_cookie_complete(&fsl_chan->edesc->vdesc); - fsl_chan->edesc = NULL; - fsl_chan->status = DMA_COMPLETE; - fsl_chan->idle = true; - } else { - vchan_cyclic_callback(&fsl_chan->edesc->vdesc); - } - - if (!fsl_chan->edesc) - fsl_edma_xfer_desc(fsl_chan); - - spin_unlock(&fsl_chan->vchan.lock); + fsl_edma_tx_chan_handler(&fsl_edma->chans[ch]); } } return IRQ_HANDLED; @@ -86,8 +61,7 @@ static irqreturn_t fsl_edma_err_handler(int irq, void *dev_id) if (err & (0x1 << ch)) { fsl_edma_disable_request(&fsl_edma->chans[ch]); edma_writeb(fsl_edma, EDMA_CERR_CERR(ch), regs->cerr); - fsl_edma->chans[ch].status = DMA_ERROR; - fsl_edma->chans[ch].idle = true; + fsl_edma_err_chan_handler(&fsl_edma->chans[ch]); } } return IRQ_HANDLED; diff --git a/drivers/dma/mcf-edma-main.c b/drivers/dma/mcf-edma-main.c index 7b05e303ba51..316e637b00c4 100644 --- a/drivers/dma/mcf-edma-main.c +++ b/drivers/dma/mcf-edma-main.c @@ -19,7 +19,6 @@ static irqreturn_t mcf_edma_tx_handler(int irq, void *dev_id) struct fsl_edma_engine *mcf_edma = dev_id; struct edma_regs *regs = &mcf_edma->regs; unsigned int ch; - struct fsl_edma_chan *mcf_chan; u64 intmap; intmap = ioread32(regs->inth); @@ -31,31 +30,7 @@ static irqreturn_t mcf_edma_tx_handler(int irq, void *dev_id) for (ch = 0; ch < mcf_edma->n_chans; ch++) { if (intmap & BIT(ch)) { iowrite8(EDMA_MASK_CH(ch), regs->cint); - - mcf_chan = &mcf_edma->chans[ch]; - - spin_lock(&mcf_chan->vchan.lock); - - if (!mcf_chan->edesc) { - /* terminate_all called before */ - spin_unlock(&mcf_chan->vchan.lock); - continue; - } - - if (!mcf_chan->edesc->iscyclic) { - list_del(&mcf_chan->edesc->vdesc.node); - vchan_cookie_complete(&mcf_chan->edesc->vdesc); - mcf_chan->edesc = NULL; - mcf_chan->status = DMA_COMPLETE; - mcf_chan->idle = true; - } else { - vchan_cyclic_callback(&mcf_chan->edesc->vdesc); - } - - if (!mcf_chan->edesc) - fsl_edma_xfer_desc(mcf_chan); - - spin_unlock(&mcf_chan->vchan.lock); + fsl_edma_tx_chan_handler(&mcf_edma->chans[ch]); } } @@ -76,8 +51,7 @@ static irqreturn_t mcf_edma_err_handler(int irq, void *dev_id) if (err & BIT(ch)) { fsl_edma_disable_request(&mcf_edma->chans[ch]); iowrite8(EDMA_CERR_CERR(ch), regs->cerr); - mcf_edma->chans[ch].status = DMA_ERROR; - mcf_edma->chans[ch].idle = true; + fsl_edma_err_chan_handler(&mcf_edma->chans[ch]); } } From patchwork Thu Jun 1 14:41:01 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Li X-Patchwork-Id: 688463 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 14448C7EE2E for ; Thu, 1 Jun 2023 14:42:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234401AbjFAOmE (ORCPT ); Thu, 1 Jun 2023 10:42:04 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56240 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234399AbjFAOly (ORCPT ); Thu, 1 Jun 2023 10:41:54 -0400 Received: from EUR05-VI1-obe.outbound.protection.outlook.com (mail-vi1eur05on2086.outbound.protection.outlook.com [40.107.21.86]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A8A3AE43; Thu, 1 Jun 2023 07:41:46 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=QtaPChwAYjJbXIfjvBAK1kvL9gwIo+2tw3+pWppF5MyIxSVp1fm9nS24qjgzV3ggEjGDC6q8XO6wvcfk0PS0kXBM4/g1//LxTOrAS9pq/bNpKp6ZDUutTfu7annQem2tDeAVhGuW1+UIAmwBQ8jVAefZ5be03ZxkpKfqvNbf2nu0zG53ykzuvYLQJVptSyfT5vCHsjC2H4ihDA5OHB1qM8NKT2T6uvK9Nm56KCngHFa/tzsCHr5DAhRwqn5NV+gSl57a6uFMbRv0CKO8PqGtKvcYoMhkkYjCiWBSrXfe5cWC6e6WLTaSwlizcgBHZdIuroV2Jh7b5pU4yLp5YOnvYw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=s1+6nOaISVZ89Qy4+Cr3cnXLzqMpnDganBMJUwxpjWY=; b=d5Z8oBrj8YoTTOVE4XX4DDdIW5pH044qc3zjnqtxAzYqhws9qB6QOgbwSaF/ZVanC6YnD9VKGMZ1PRDKw/QYSbOyi8lzNHHbrsOrv3Bd5YjwZYChlaDKQd2gsAH115bgyag2YkPFU5diGvm2GLrw0dhD7oavURG/GnteoHM2NtPWvucVdJ4f4DpqoDoK9gxHEyz9tHZz72g/3scnZGB23ckxYtAXcCqlgStwtkN7iyMJ+fp3O1braOsN4g2kBoeHEug2Sa/5u+m2sUKIg2qMoTjhmXvvbYUeks9E04fC+XmNU71+MEPUa47Zw8OuFZbVCVOQtqUNhXJMhzUUD4fnQg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=nxp.com; dmarc=pass action=none header.from=nxp.com; dkim=pass header.d=nxp.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=s1+6nOaISVZ89Qy4+Cr3cnXLzqMpnDganBMJUwxpjWY=; b=qVnXomP/gOPSv0W1Whp+1VTWvJv1/tzMwmwgpbTRzlS76sly+I55pDg4t218Ja/ZZ2wiwZxBLAZd/Qt1nYfgeDtVCHi+sRq/yeL3TyNM0oUGFpawmvTBazpQpNU8Pk7Ef3hWA7ychEeCMgehsYBulbLrLQybV7dNUY1kaBCkm/8= Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=nxp.com; Received: from AM6PR04MB4838.eurprd04.prod.outlook.com (2603:10a6:20b:4::16) by AM9PR04MB7603.eurprd04.prod.outlook.com (2603:10a6:20b:2d6::9) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6455.22; Thu, 1 Jun 2023 14:41:43 +0000 Received: from AM6PR04MB4838.eurprd04.prod.outlook.com ([fe80::4a2a:262e:415f:e41c]) by AM6PR04MB4838.eurprd04.prod.outlook.com ([fe80::4a2a:262e:415f:e41c%7]) with mapi id 15.20.6433.024; Thu, 1 Jun 2023 14:41:43 +0000 From: Frank Li To: vkoul@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, dmaengine@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, peng.fan@nxp.com, joy.zou@nxp.com, shenwei.wang@nxp.com, imx@lists.linux.dev Subject: [PATCH v3 06/12] dmaengine: fsl-edma: simply ATTR_DSIZE and ATTR_SSIZE by using ffs() Date: Thu, 1 Jun 2023 10:41:01 -0400 Message-Id: <20230601144107.1636833-7-Frank.Li@nxp.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230601144107.1636833-1-Frank.Li@nxp.com> References: <20230601144107.1636833-1-Frank.Li@nxp.com> X-ClientProxiedBy: SJ0PR03CA0130.namprd03.prod.outlook.com (2603:10b6:a03:33c::15) To AM6PR04MB4838.eurprd04.prod.outlook.com (2603:10a6:20b:4::16) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: AM6PR04MB4838:EE_|AM9PR04MB7603:EE_ X-MS-Office365-Filtering-Correlation-Id: d73337f7-8a27-4944-84ca-08db62ae516c X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 5OAlNqX8wM0ocGCLTCxv5FaFRpnKkAU2jWAuW0xMXZSqqlZgI5xfE1XsEfwOsgjXmCF9uf8eTMHDEy9GhuGyu2U6HqSlh+6++FyOmUbYKglEV4uO1LVZ5WCsWx311dxX8BpuV2RKI7jpIOhwIWcHeZBFoxRfgRJElMBjwPMoCd/SJQrEeKrKDUSjLrxbBXcSvfZo7bz3xVpge19T8c+TUkMOn8lMtpASledclHJdZGw4TlOu/T7ODnlfEAB/eGS1uj25OEQi44Dy9JO0TyNSTIbWqH8YvMRgc+g5zJ04WCoYMeO8hForpWqcVCre1dCVDuDGcZZKfxr1acLiVgfIcSIAESfTb9JF3c+WRX8/PjFO9uiGzLK6EuP+QAY6HIXqO9IaUCS8ou3Wrewb/tuI4tGXWElus2Rc68p18BrenGHpL3ud6HahPFEQRZOOJk/HmmhEOG0yRrQ8wpSB2ec7373gSB4KJUjHHbXnzLVQwltn/2vukhkEkDrWPS7vnzqFdfjc3HG/Ijgi7vkYYof28vTm0eSQXXQQcBG0BNLo0zNy9t7s6anj20rf0bJKMHloWj7wh6DjacPe6asLi2Fe56zQKYe92c5D9cU2hHm8TX1U1Z/XMGn6/BXy16mI1/7R X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:AM6PR04MB4838.eurprd04.prod.outlook.com; PTR:; CAT:NONE; SFS:(13230028)(4636009)(396003)(376002)(346002)(136003)(366004)(39860400002)(451199021)(26005)(36756003)(6506007)(1076003)(6512007)(2616005)(86362001)(186003)(2906002)(478600001)(66946007)(66476007)(66556008)(5660300002)(52116002)(83380400001)(8936002)(6486002)(41300700001)(921005)(38100700002)(8676002)(316002)(38350700002)(6666004); DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: gueSlR4RHslqOv7Td2DoiVR41S02EjSaXSdIa4vDxbs2aToJCmc7JGeEUJyhnt4qnabPM7gIevQ9cFn2CaNlK6y/sHxbOBGlSZyYMg1dm+/Fj31AXycXMXXYsIYtatX9FtGgw1eEuAlmFxC/lQcCUTkD6ugoWvOmxYWuOsSDGOdwoarM6ijvuEoL569rM2VCvjLoQ9DwgcpvOLZ/iy+X90fyfRGCjEOGxxfk3nzib6xecfu1Y8gn6wlszBTS5raGtqqCe1vmPw2cH8fggkdQvUgFEne33FgRvjg1Ma7RY3Pabn5bFFjioZQq0z8/35duiehNbp/yKQm/iJUtaLfgH996XZshxXqtlsCa4YTHey4Ge7xFdCo+DnsOhR4fsTkZQwrZXvy+m3Trke3ilfvbH2AB5uioccNNoIkp6q8GAB7Lj6RLre/K98FtZtnojapSCPVvMq8SvBCrxhZDioaHCYI0MqS0QfcZTsoKm2wZ7PFrgnlzvz6PXR10Sg2lKbUuD1yFIt/T+ymPyEgYcJ5ZGzCp1zTO7XgdOJ+lbURGjjLr/07G8SaFZyPv8eJtsob7SZlkKtGG2KNN1GtSo6/IAUhtYwajHj/R6qQjBvGWb27cWWExD9Go7X9fwOtpu/px5Wujr3HWMNk16REGOP2bnqmtj3032YsK9b3HhXtCxIiS5jo6gubneNL2a5GuHbI8qipBTA8KRzoIsivFXbUnMBb7C3qUj1KrdD1FX0s5m+Pb0mV52Q28F9lDDuUBsqHFokNSyIRUkrHM6bhDkzU2wbyk1mtdjpAmC75EegWeCKHHsAmM9TfwtkgBKgA8jCnQpbnQfFBbj2gcWhYbS/wIhqQx7ZR8sCEx/YQeQEaLjt2FLI96O9FK3PqJinck1fZqGussak7yx2Pj3XmEIMD3m2HhRGGwijwx7SHYImnWPTdqRvSWCoRBNrK3xC5jpa02QyLPabOPiauS0EILHF/vOkKwUjxHPL/q21l0LgUcA1UhGrlp1txTGRWWU/8yjTcnf8xfS9ICBZrBAy91GPVhqWgJT7K1BRO+Dph9sblg0gi6Ui52YqUe0zCxAtFiMYY1HNSRx4cGN6UBqRFpVY73ZI0u5rdj3b5xK84vO+h6cBkKxx4T0wHmRn99lHggmGnbte7Abq5zzzJwXS3FLjmomZG7kroFrizqBD01c4OV9z7mnTma+TNI4z8YJjskXWZsUAXOQCV5InhVj0N2Y6M1FfwqGR/txCxdxYSpJxnwCYT/LcLYVDXTWd7SImdczdSsQTtkKzkH6/rQzQ3wwmKI6A+MfFwZ2x1OhgQEWJeWIJhIloo6jbEOxxsTGLolPr99InESKK0DHNFFbL0CIwX5ZeuGRVI0uIhzDdBFiqAzrHdWeXlcf7FTWG0yQiEN+jewyjlZIYU59FrlYhNErrWlfrzpMgD8nYe4NslzmD5N6l0QmWpwpHosgP5xqxySbopNymLxktsE0EVixv8wLkA1fn/rMHgvRQFpDCD6V4Xs8I8df2QBvdJxO/9Rsw4kJRrPHJaoK/ARWrqlGIYRs6W+twnPsmGnft6aOlY45KVU6qFc/TSV9H5ZW17CnKgr222i X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: d73337f7-8a27-4944-84ca-08db62ae516c X-MS-Exchange-CrossTenant-AuthSource: AM6PR04MB4838.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Jun 2023 14:41:43.4693 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: HaqY4S0uXzuLc4xukcYu/Yqn3FKQ4mkpvzIJAlzC7GNJgkMBQGFeEFIO+gVDltbBLTjlyeTiBCYs4W3VCApS1A== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM9PR04MB7603 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Removes all ATTR_DSIZE_*BIT(BYTE) and ATTR_SSIZE_*BIT(BYTE) definitions in edma. Uses ffs() instead, as it gives identical results. This simplifies the code and avoids adding more similar definitions in future V3 version. Signed-off-by: Frank Li --- drivers/dma/fsl-edma-common.c | 21 ++++++++------------- drivers/dma/fsl-edma-common.h | 10 ---------- 2 files changed, 8 insertions(+), 23 deletions(-) diff --git a/drivers/dma/fsl-edma-common.c b/drivers/dma/fsl-edma-common.c index a9d17cf142fc..51fbd7531c74 100644 --- a/drivers/dma/fsl-edma-common.c +++ b/drivers/dma/fsl-edma-common.c @@ -154,18 +154,13 @@ void fsl_edma_chan_mux(struct fsl_edma_chan *fsl_chan, static unsigned int fsl_edma_get_tcd_attr(enum dma_slave_buswidth addr_width) { - switch (addr_width) { - case 1: - return EDMA_TCD_ATTR_SSIZE_8BIT | EDMA_TCD_ATTR_DSIZE_8BIT; - case 2: - return EDMA_TCD_ATTR_SSIZE_16BIT | EDMA_TCD_ATTR_DSIZE_16BIT; - case 4: - return EDMA_TCD_ATTR_SSIZE_32BIT | EDMA_TCD_ATTR_DSIZE_32BIT; - case 8: - return EDMA_TCD_ATTR_SSIZE_64BIT | EDMA_TCD_ATTR_DSIZE_64BIT; - default: - return EDMA_TCD_ATTR_SSIZE_32BIT | EDMA_TCD_ATTR_DSIZE_32BIT; - } + u32 val; + + if (addr_width == DMA_SLAVE_BUSWIDTH_UNDEFINED) + addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; + + val = ffs(addr_width) - 1; + return val | (val << 8); } void fsl_edma_free_desc(struct virt_dma_desc *vdesc) @@ -623,7 +618,7 @@ struct dma_async_tx_descriptor *fsl_edma_prep_memcpy(struct dma_chan *chan, /* To match with copy_align and max_seg_size so 1 tcd is enough */ fsl_edma_fill_tcd(fsl_desc->tcd[0].vtcd, dma_src, dma_dst, - EDMA_TCD_ATTR_SSIZE_32BYTE | EDMA_TCD_ATTR_DSIZE_32BYTE, + fsl_edma_get_tcd_attr(DMA_SLAVE_BUSWIDTH_32_BYTES), 32, len, 0, 1, 1, 32, 0, true, true, false); return vchan_tx_prep(&fsl_chan->vchan, &fsl_desc->vdesc, flags); diff --git a/drivers/dma/fsl-edma-common.h b/drivers/dma/fsl-edma-common.h index 242ab7df8993..521b79fc3828 100644 --- a/drivers/dma/fsl-edma-common.h +++ b/drivers/dma/fsl-edma-common.h @@ -29,16 +29,6 @@ #define EDMA_TCD_ATTR_DMOD(x) (((x) & GENMASK(4, 0)) << 3) #define EDMA_TCD_ATTR_SSIZE(x) (((x) & GENMASK(2, 0)) << 8) #define EDMA_TCD_ATTR_SMOD(x) (((x) & GENMASK(4, 0)) << 11) -#define EDMA_TCD_ATTR_DSIZE_8BIT 0 -#define EDMA_TCD_ATTR_DSIZE_16BIT BIT(0) -#define EDMA_TCD_ATTR_DSIZE_32BIT BIT(1) -#define EDMA_TCD_ATTR_DSIZE_64BIT (BIT(0) | BIT(1)) -#define EDMA_TCD_ATTR_DSIZE_32BYTE (BIT(2) | BIT(0)) -#define EDMA_TCD_ATTR_SSIZE_8BIT 0 -#define EDMA_TCD_ATTR_SSIZE_16BIT (EDMA_TCD_ATTR_DSIZE_16BIT << 8) -#define EDMA_TCD_ATTR_SSIZE_32BIT (EDMA_TCD_ATTR_DSIZE_32BIT << 8) -#define EDMA_TCD_ATTR_SSIZE_64BIT (EDMA_TCD_ATTR_DSIZE_64BIT << 8) -#define EDMA_TCD_ATTR_SSIZE_32BYTE (EDMA_TCD_ATTR_DSIZE_32BYTE << 8) #define EDMA_TCD_CITER_CITER(x) ((x) & GENMASK(14, 0)) #define EDMA_TCD_BITER_BITER(x) ((x) & GENMASK(14, 0)) From patchwork Thu Jun 1 14:41:02 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Li X-Patchwork-Id: 687895 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1753FC77B7E for ; Thu, 1 Jun 2023 14:42:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234404AbjFAOmR (ORCPT ); Thu, 1 Jun 2023 10:42:17 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55914 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234460AbjFAOmJ (ORCPT ); Thu, 1 Jun 2023 10:42:09 -0400 Received: from EUR05-VI1-obe.outbound.protection.outlook.com (mail-vi1eur05on2086.outbound.protection.outlook.com [40.107.21.86]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4278AE71; Thu, 1 Jun 2023 07:41:53 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=Qf37H4tFRoOrZ/yefhdabbcktJmbRUiKJdi0RyNaDV3UpotB47+/Nm7vM7S39HSXGGXTNHAEjf4vLs/KoxePfxmhnXzS0GWdjgHqNjLSbswTwsq/j2s+hi3m8nYqwBFhstdkQwIKnzTuXjiYXhUWyw+IzwT/GCcN4upoQuore3UDBsvWdm0KQlydh0Bc+baxB1Bg4ahBiIIZi7UAiShVOsMIHhEMuwPy3drrtUwl/Vixr0vBCdIEwB5hD3BlirQ08B1tTtlgRyB3B5ZS2qlZYuE/Wa3gZkmhneFf2THUXgUAicelHWYR6nYwlIuEYgQVnUVdRv1y92IqIohT8XzTUg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=WTnuy2oiZIXFuP4CJwEXIDJopDToYbLMOYN1F/PnZAI=; b=dO8Zk8wZJ0wGDWLbpxOn1wTAhmcaTHRk6eGyNWw5MJFFoLtyGo6wydKY6eXuYAh5lXMyFHor/hmptFHGymJYuZ1L0LHKnyYagiEP3f7Zl0bw/dP+83n3NNSAxIMKD7/Aj7GbAL93B0AQ7DZ/s+Q+NcVwlbdLFKred4GzlS3z3cOEIRRzHLYqwLBe+AZgWCk1UAW9GsZ6T3oBDvlV/DAdkd8XbF5HjCWrqttxGpLojdYwFZtIUq12ib1zIniXtG1sZYNvSNosTQhNRK2B6kIK7aCML88LJK3g9VNc8Kevx9Pt7IIP5COIRZvA0FcYJ6rr1IXiw591s49nHkKe8ylUEQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=nxp.com; dmarc=pass action=none header.from=nxp.com; dkim=pass header.d=nxp.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=WTnuy2oiZIXFuP4CJwEXIDJopDToYbLMOYN1F/PnZAI=; b=cxifqw25GwBadMMYZQz6DuzGfGUfM1mryakGx3pMlkN793l4jbYbK/o/Bq04gj5gkmAF3oxhPw5C7gZBiQyf/cBWRjmAbNpQc1TX9SHhF0JKMMh6L32zccZAVjJ1gB39BSrpwkAc4oPWXDEbbfAqGmdw1SNWxbS3tDp28xvbGIQ= Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=nxp.com; Received: from AM6PR04MB4838.eurprd04.prod.outlook.com (2603:10a6:20b:4::16) by AM9PR04MB7603.eurprd04.prod.outlook.com (2603:10a6:20b:2d6::9) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6455.22; Thu, 1 Jun 2023 14:41:46 +0000 Received: from AM6PR04MB4838.eurprd04.prod.outlook.com ([fe80::4a2a:262e:415f:e41c]) by AM6PR04MB4838.eurprd04.prod.outlook.com ([fe80::4a2a:262e:415f:e41c%7]) with mapi id 15.20.6433.024; Thu, 1 Jun 2023 14:41:46 +0000 From: Frank Li To: vkoul@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, dmaengine@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, peng.fan@nxp.com, joy.zou@nxp.com, shenwei.wang@nxp.com, imx@lists.linux.dev Subject: [PATCH v3 07/12] dmaengine: fsl-edma: refactor using devm_clk_get_enabled Date: Thu, 1 Jun 2023 10:41:02 -0400 Message-Id: <20230601144107.1636833-8-Frank.Li@nxp.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230601144107.1636833-1-Frank.Li@nxp.com> References: <20230601144107.1636833-1-Frank.Li@nxp.com> X-ClientProxiedBy: SJ0PR03CA0130.namprd03.prod.outlook.com (2603:10b6:a03:33c::15) To AM6PR04MB4838.eurprd04.prod.outlook.com (2603:10a6:20b:4::16) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: AM6PR04MB4838:EE_|AM9PR04MB7603:EE_ X-MS-Office365-Filtering-Correlation-Id: 1e7c8465-8d4d-4b7c-68b3-08db62ae531e X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: uYQo+hfUfgQ18+5M8dxey5uWHjIEgr0bBqdOOJgZFWUN+V5TY2POt7Gq5MYNDm2QuMJ9dayEPc4EpSqlZDeNRMXhxR3iVlzJVv0SCm9WEwhK0q+VcckpwiRqBLX0fDBi3QfeokHj5Xc3OcgjNh9Z1PnIbYoX4S4Op4G08Ddst5fWP32urov/aX3/NipjiAP1CWKM80Ctw5ze9zvoiJnalDNX7ZbrisyFakEk/n2RDvuX1tyyybJ0iIoQp3+Stnkta7fyTEtcbQxvrgH7B+LTiQuQkm6sWMhLTaWTK/jwre7WrLLuPZ8u3MBRgmpES7lknKhpkSOSlrBN2q3eh8MCVS2ujkFoAZpKTCdhUQZ2ld7PAHirYLlpVdXPqCY1IXjh5IfTXo1o1YZU++itGNYpxAgVzF0wPxbSWDP5HB6nNvz0p+iNEImqfQi+0vIdgQhmnrEg/CELHvuFtXQJcXqirP3iKbgvWmLC5MFfrfKFRJTrhOKQYE+yoD34td36f/YwbxPXkBo5fYjAJXgdA5JU/Df4j4SExpRPTu8WVCVEHjhhj+mkSFUkmZRWH0M2N80E3S1GKuDSyZLMqceDQaOkHQxWjiVLJ0mXE/YUwODpINfDSUFNwBCZw8IKvqGSPEEFsVNLu1MPkWbSvaK8qxa11A== X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:AM6PR04MB4838.eurprd04.prod.outlook.com; PTR:; CAT:NONE; SFS:(13230028)(4636009)(396003)(376002)(346002)(136003)(366004)(39860400002)(451199021)(26005)(36756003)(6506007)(1076003)(6512007)(2616005)(86362001)(186003)(2906002)(478600001)(66946007)(66476007)(66556008)(5660300002)(52116002)(83380400001)(8936002)(6486002)(41300700001)(921005)(38100700002)(8676002)(316002)(38350700002)(6666004); DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 7JT98iJNEEkMHKSAGQmEG6HWDJZKrbzlob66/fR1HcZfqTfi0SBhs0r1Qi86BzObt4bCcoK5la0nRlvCqr9UzOoCUKm61a0xfMUPcnzq7da2+Yv2aXzK3rYD9CwBsRnmWggwk40eGCL/B7MD0vfbTWUcxceytmAkGQBnowTsP50I0VJxaECHA1Y9h9ClvKjE5Pv1kZxrX788cV4VozX0VB9PorNO7g+Hgn6qZzqxOBbZ+rTTAaFANUz1giHrzb+LhVp1IGUN2mO/M0PSbW99FaWXPb2eTjXjiSl7Hlprjd3J4JeUOVRjwc8mQn/Uv7J2efKNDJj1bSsNQ4859EwOM/v7b0SrQu+oL8tIFWWugrkA/LVcM2pdObKvlKLMnFRjSE9ktc7EPpZBodmqKX5dOLYKwTnqhpWCQ24G5To+N/MHTrXKe2LRJXwTS4MyJkWFEMhjHSAbMPJcPqnXe7/JpbsYUqG9iNBV1AsZLQ2eryRYDprdM7hU3O25Gah5Xql6RP5bGEtN8aHMCenKg6B2dDO8kCcZGvP7WTxY+ictU9pUDU0kqJlj7uVy2CAEcCfBOc8JBvbO9BJT1cJciWtW7MAofU8Lwrwzi+4Kzeo9riHbsayydOgrQA8rSPV8j0txQmV5uZqGg0wlHH9HBsWMLctKWqHUy1i4hcwqGSCNfuQp86zMacX3YHBoIxFyNNU0HzprxjNhQFX2Ni3k2EhixLCwiV4uwn7pCJYStf9AE4HQk/I85hP4ovTqhncfByypeudnqeqGtlDUvzmBBS4KVoF3zVamM5UM5UPdigYjHGLdDT//ukpVa8JRtrrah8sKeAhOmCN22JVQ8gG0DeaJeBoELG6JnyHA3w5n/6HZCHovee3/8Jz5Tv/dXIEeXLOSTMVxD0mZBgum7n4njHR8vhZEqZsX/ZMqOkVUmyZfhuaXylGFxp/Dr2FAghjN8gko55hBhwUA8kdkoZaIW4XMeTlnwyToOyoPKx/F7qaBMElMw+v56KMlSZJqZEuhDmO1IxLqAzwK8AuerSlNyI3LvYJeULUccxhfCjx3W1Fz0gC8ZzRo1M2zc6qd3+SHV4XOeIEgI0zpm3YNBh3Tu2yy73g9hAaLc58RK8BqPlIqn3Eo3zTWDpho8RYnZAmsgyhWMAZ7iQtuUFXyoZRAwaOIMvnsv88OVe2gzbCQEKXn+GVtsoxwjYGtp8Kcj/fBm5Mtz1cXy25mgMXXNIrdKpuh21QlBvp6N7R/qlwDrTIbN6UN3HboDbxqxLNRoWq/hlUU8Tu7ks21Z2QZWOI0ik4fqwLkzTieaHviKoytpSjWCjtbn+4nd2T6E55u1iKh7db2ITtmY9yZaWLtcU3ChqV8tscgRjhfkFvF3zh8VyW7kU/pRWoDSCu7GicUjI+hrEQt1UnPrZWG7DMNZdsoWk91AZ0DROH9ql3LWsXA4ENQyoOWL8EWGSbcr73HC07yIc8dnWVny+DCwnU7oFIb9kNXz0GdDtyoHiikP8se9x4AnBCVzgEZ29ZHmx8P5pWfE1oaBnNbH/aceNWAmWoQYJa3UbQ3J3WL79vH14Fxc/gGshy01HGlNWVaaKOOYz/3qpIe X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 1e7c8465-8d4d-4b7c-68b3-08db62ae531e X-MS-Exchange-CrossTenant-AuthSource: AM6PR04MB4838.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Jun 2023 14:41:46.3572 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: U5tD9ZvD11vKTNLKVjEswxsmVWhbkkpbE+QbpqeEFKfy+4sihQH59AVYoiDA/DLSxuN0x23ALtPrGU5vXUqmeA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM9PR04MB7603 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Use devm_clk_get_enabled in probe code to reduce error checks, thereby enhancing readability Signed-off-by: Frank Li --- drivers/dma/fsl-edma-main.c | 19 ++----------------- 1 file changed, 2 insertions(+), 17 deletions(-) diff --git a/drivers/dma/fsl-edma-main.c b/drivers/dma/fsl-edma-main.c index 73178f250d0a..70e1a0605025 100644 --- a/drivers/dma/fsl-edma-main.c +++ b/drivers/dma/fsl-edma-main.c @@ -265,17 +265,11 @@ static int fsl_edma_probe(struct platform_device *pdev) regs = &fsl_edma->regs; if (drvdata->flags & FSL_EDMA_DRV_HAS_DMACLK) { - fsl_edma->dmaclk = devm_clk_get(&pdev->dev, "dma"); + fsl_edma->dmaclk = devm_clk_get_enabled(&pdev->dev, "dma"); if (IS_ERR(fsl_edma->dmaclk)) { dev_err(&pdev->dev, "Missing DMA block clock.\n"); return PTR_ERR(fsl_edma->dmaclk); } - - ret = clk_prepare_enable(fsl_edma->dmaclk); - if (ret) { - dev_err(&pdev->dev, "DMA clk block failed.\n"); - return ret; - } } for (i = 0; i < fsl_edma->drvdata->dmamuxs; i++) { @@ -290,19 +284,12 @@ static int fsl_edma_probe(struct platform_device *pdev) } sprintf(clkname, "dmamux%d", i); - fsl_edma->muxclk[i] = devm_clk_get(&pdev->dev, clkname); + fsl_edma->muxclk[i] = devm_clk_get_enabled(&pdev->dev, clkname); if (IS_ERR(fsl_edma->muxclk[i])) { dev_err(&pdev->dev, "Missing DMAMUX block clock.\n"); /* on error: disable all previously enabled clks */ - fsl_disable_clocks(fsl_edma, i); return PTR_ERR(fsl_edma->muxclk[i]); } - - ret = clk_prepare_enable(fsl_edma->muxclk[i]); - if (ret) - /* on error: disable all previously enabled clks */ - fsl_disable_clocks(fsl_edma, i); - } fsl_edma->big_endian = of_property_read_bool(np, "big-endian"); @@ -363,7 +350,6 @@ static int fsl_edma_probe(struct platform_device *pdev) if (ret) { dev_err(&pdev->dev, "Can't register Freescale eDMA engine. (%d)\n", ret); - fsl_disable_clocks(fsl_edma, fsl_edma->drvdata->dmamuxs); return ret; } @@ -372,7 +358,6 @@ static int fsl_edma_probe(struct platform_device *pdev) dev_err(&pdev->dev, "Can't register Freescale eDMA of_dma. (%d)\n", ret); dma_async_device_unregister(&fsl_edma->dma_dev); - fsl_disable_clocks(fsl_edma, fsl_edma->drvdata->dmamuxs); return ret; } From patchwork Thu Jun 1 14:41:03 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Li X-Patchwork-Id: 687894 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D92D3C7EE2A for ; Thu, 1 Jun 2023 14:42:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234328AbjFAOmn (ORCPT ); Thu, 1 Jun 2023 10:42:43 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56986 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234148AbjFAOml (ORCPT ); Thu, 1 Jun 2023 10:42:41 -0400 Received: from EUR05-VI1-obe.outbound.protection.outlook.com (mail-vi1eur05on2086.outbound.protection.outlook.com [40.107.21.86]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C3BD7E41; Thu, 1 Jun 2023 07:42:09 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=hUTUR3qgxQtrn00snvHJECx7Dy5MlnLnPC4WZPk4dF3ycGyhmSkXh11Xkp3avwKZECt+hsa5r9nZAGlqOWWqSYLa7R6tZ/lUZ9NKPeDGZVXfCSFuOGhoccoVFE5rIKdF4ygaQZWT9cc+vcWidPVQ12kkFjPYQmS9r1TFk8JGb0HwVc/9UQZroep2EGlwTxBC0Mvog4CJHKxlJjh8nsWRU/4Ipur/iXi/ncveM61fspebfd+JwIB5eCMD/HVG9eKQrRu2ju9ydc7dZ9cSvodurJKhNMlnqZPqdH9UESC8F4LiZF1vGmX7OjrhKjhbV0Hd/dXm0jtRIdNMjHk83ueHXw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=t3pVZDzGCH6yRgcJJkbuIt9c+z+Kd/ZTbsElZ6w0CA8=; b=iSJwrw2iTklk8YNFrF7ii36keODPSODGBt4HQs8JkFV9RpdOMdsE8QzdmhkYYT2s4UuZoQwlmlQCAJoQD1lsqHc+j+UrjfU4ejxAsRkeT+zXNKKjPlGB7AX7KkAwqiBNOZ2rVOv3mbvqH45CZs0vHn/eQo4AAdgXeiGoyPYJtdaLVq01aCrtutlbwTIo8u+YMvfqy8JSki7uZO8fCHhNYIVVMizsyuvU8utrELTl0dc+UCTOiXy2z5kZ8MMjwRapYew9cdC9oIpyHsJlqUsYMr+jSTes7LMBDv/d6o9qLDhqmV1kjbm0u5uumAopED1i8LQXES8qcVbLNjNMGvP+Rw== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=nxp.com; dmarc=pass action=none header.from=nxp.com; dkim=pass header.d=nxp.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=t3pVZDzGCH6yRgcJJkbuIt9c+z+Kd/ZTbsElZ6w0CA8=; b=ZnjEnUGmqDma4/ublPP8M8JEWi/PUYnWyZJj4gvTEHO3njsqm4yW7+nh4qEGDKwtRt+V6uCW8bDFHrBPP5eTENC8NM2zUO+pYF6w7poSeIMepaPpLsygWJ51I35h2vU71Irt1dGMRWcjYzK5nLropUBQdg1mkQshEyKNqy18Q2Y= Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=nxp.com; Received: from AM6PR04MB4838.eurprd04.prod.outlook.com (2603:10a6:20b:4::16) by AM9PR04MB7603.eurprd04.prod.outlook.com (2603:10a6:20b:2d6::9) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6455.22; Thu, 1 Jun 2023 14:41:49 +0000 Received: from AM6PR04MB4838.eurprd04.prod.outlook.com ([fe80::4a2a:262e:415f:e41c]) by AM6PR04MB4838.eurprd04.prod.outlook.com ([fe80::4a2a:262e:415f:e41c%7]) with mapi id 15.20.6433.024; Thu, 1 Jun 2023 14:41:49 +0000 From: Frank Li To: vkoul@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, dmaengine@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, peng.fan@nxp.com, joy.zou@nxp.com, shenwei.wang@nxp.com, imx@lists.linux.dev Subject: [PATCH v3 08/12] dmaengine: fsl-edma: move clearing of register interrupt into setup_irq function Date: Thu, 1 Jun 2023 10:41:03 -0400 Message-Id: <20230601144107.1636833-9-Frank.Li@nxp.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230601144107.1636833-1-Frank.Li@nxp.com> References: <20230601144107.1636833-1-Frank.Li@nxp.com> X-ClientProxiedBy: SJ0PR03CA0130.namprd03.prod.outlook.com (2603:10b6:a03:33c::15) To AM6PR04MB4838.eurprd04.prod.outlook.com (2603:10a6:20b:4::16) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: AM6PR04MB4838:EE_|AM9PR04MB7603:EE_ X-MS-Office365-Filtering-Correlation-Id: a5cedc8c-5689-417a-fcdb-08db62ae54e0 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: fq7PuFMrqVgiJnQRWAGHZtrLpk/OiAmnu9XDSftzzzzUMZUsuu+4KAqlrw9fvprpyY1kNMWIfhpUa9dGFrcmbf8+ymKRRQ/lGsaxvejR7QkcRWEkom/DqQLk5DDbON7JEPKf1gKAguJ/Z6wN53k/2V87rIuDzbGJxbUxjo1U0exJFzf9Usuz+NZB/uKPftN+8HhOLYHwSh2CaxCySpRpKXd5mpDCl5ntLq0oYN2NV2nms9LnRX1iJttbMbg9+wx1hI55X2mammM+Vrokv1f5zComcmYNQHGxtZpS1IfftASANJXNHdRyT7OdTjUIyzlklwXRTi/y0DMgwGuzQ/aOcCLKluMyVf7KZladh2Gem11uIkcIdE0vAV1NahgHahBujgmumCraUT5OT9rbC6n4zw00YxNPAxP0AEOy4nhVbmnhU7oYw+3p4KXUkqZ7PNru9PQG3lrhgCJTL5Qjb6B8u7JOPXJDal63R1p1KYfbFxVLRnLsWxwhrGQPTXB/5ya7RpbOF4UE3nXm2Knnnojmft//l3DXkYpOgE5/MDauxDs9iqLsOx3C/JlNtpqEPMpuhmbTP2Y4NZo/DbXGwyw0H9x3dv6vqlOFkOSPwj7LRtqvvB+Soc4sNczKnbhpUSZsryLcS2zkqy/Mymv0vfmyCw== X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:AM6PR04MB4838.eurprd04.prod.outlook.com; PTR:; CAT:NONE; SFS:(13230028)(4636009)(396003)(376002)(346002)(136003)(366004)(39860400002)(451199021)(26005)(36756003)(6506007)(1076003)(6512007)(2616005)(86362001)(186003)(2906002)(478600001)(66946007)(66476007)(66556008)(5660300002)(52116002)(83380400001)(8936002)(6486002)(41300700001)(921005)(38100700002)(8676002)(316002)(38350700002)(6666004); DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 0DygTG4HzEGAR+lcIWbFrlQ0SOa/vt5n/64B15hCIEcKNyQSv533SLMbNx5VqCyvZig2gbr8QVkjCPhDISH5hkaFnP2LUBSmveUnlOPwmjLa2p8ZLUrkDf6KrsstjO94PFKD3ID0eo8HtRagaLajdOhoNoBZEaesaiutSTsTcYNJG2PTFZZsvw5WseAO/EJ7QWuda3kMdgdo1wBhTZiZ3kaqTgv4IBjUGpWqVm3ka6WUaRl9QXFAUbOJToCfjDITAWXLZOzU0MN50rw6kRisuA6YF2dq4SmxQxTHmkB/LzbpVBq1YaQN0GloyfcJajqVeO2VIP+txGrDc9YCRlsxbuGyT8jOB4iRtZ09Mt4wGiakgZFUHoceXTdaFp8QF0Qjv8Xlx0pU2sFdQsMjaAt08XC52r5ZattHHRtKoaR4Uupw3OnIZotmJRKzWMajr0a6bQIFxYJctKDihunMQRb59AB/geBWUIs3v50Hs+0mAwlTFFWud+S24O4H7msFEmiPatrjQvAN8F1mBrNBYZGuvBfNPdq9RdxDaDTQaEuxC9A5vQodrzkZzU5KY2ficxt6KZ/3E8HWygB8T6QrRNqtKunqRCaBqpdzdOAVLVnmX08FReHYtpZdVCo35EBF9FOjUyodyrGauGx3F0dfd9q7dG8M8MvAV3BZbQk7WTOKRbatYiZ0PaKET+O55RdYRh3IWo9xpGrjbfiAffikJlML77bjX6nN8KCmLYLVryT/cQ6yHaTtGwBzX+T4+KzSfMo+hG57Wnxv46ApoLU84vPDLYAwUnOft5RmpLRBqys7kCk/ow+OMHWGP9gNivJaIJezhbdNZjdiUHJAZ1EGTrgiFqCNamhQ1KAbdtvPVcLeY0kMjfAaBjIH+nrAOY3Oln64OuHfmzIQVIeTUZM/v3z1+zvYMPA3PRDqJUIO+NVQOsgk350F3PAsIliYsTaXh7pZEPWGIrR9tYQU10c5B5NRe87gIkkf7z3NTgGsenvxdWC/xGlTca9Xm9yXCEQGj9jkGK1IE+QDnFPJci3gYxr2kove1lnJjuQFSvnsfnVCMjvVsZuodeaD2ZcIv+7LUCIKOCGceqaLCFSUrFjCz6xpCHRpv1sB7PHXA3/WA7CEMqyriD2xMf5TDe9HLB5bah/dg2XQ92y47Ho9cKGTNPuIhhrJkvgGIn9BM5ucd5PSb5Yr5LOGwnRiVQSMBwgjMzyEOfXQ7yjNDWUtTBrsRasbysTHqbYftIUMnntcxI8aIf5yN+Ym0gR/P1aeqMd8GUrZLzCabTj0nSbWylg6LBYBVUOFvujl3gHkw2StS/olX4Z+v/ynwtsCERkU8kUHOGEPc00IolsQBzO5wuhShO2an1PjaTVTLs/Q01qM4lFu7zfUWp9xQQYJf0kH1gWWsNnIp71c2gefEHBgSWBZICvIcRIsSuPWT9pVCaK4hUpNrPpBFnmjHHINSF11HoZcPzGMggx5w2NvFYcZf1sxoNMVvqIDZDd+EspBxtnUqTpu0uxOy2k2wJ82GGxKohEpXuurGAnGlXdUKXtsIxtX8Eslv+DUCUk7iO1R1zNQSPM/XSvuKcOxdOg6kfLpl23ZwbIh X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: a5cedc8c-5689-417a-fcdb-08db62ae54e0 X-MS-Exchange-CrossTenant-AuthSource: AM6PR04MB4838.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Jun 2023 14:41:49.4392 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: 2R0/qELwoyF/y8Yejv74G6klGF+HYe1vyBVitHI9V400DiopHOGvwzEl4lRRfe6JCfhMkn+xhPcurTSttohVzw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM9PR04MB7603 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This accommodates differences in the register layout of EDMA v3 by moving the clearing of register interrupts into the platform-specific set_irq function. This should ensure better compatibility with EDMA v3. Signed-off-by: Frank Li --- drivers/dma/fsl-edma-main.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/dma/fsl-edma-main.c b/drivers/dma/fsl-edma-main.c index 70e1a0605025..f7f3373989f8 100644 --- a/drivers/dma/fsl-edma-main.c +++ b/drivers/dma/fsl-edma-main.c @@ -113,6 +113,8 @@ fsl_edma_irq_init(struct platform_device *pdev, struct fsl_edma_engine *fsl_edma { int ret; + edma_writel(fsl_edma, ~0, fsl_edma->regs.intl); + fsl_edma->txirq = platform_get_irq_byname(pdev, "edma-tx"); if (fsl_edma->txirq < 0) return fsl_edma->txirq; @@ -154,6 +156,8 @@ fsl_edma2_irq_init(struct platform_device *pdev, int i, ret, irq; int count; + edma_writel(fsl_edma, ~0, fsl_edma->regs.intl); + count = platform_irq_count(pdev); dev_dbg(&pdev->dev, "%s Found %d interrupts\r\n", __func__, count); if (count <= 2) { @@ -310,7 +314,6 @@ static int fsl_edma_probe(struct platform_device *pdev) fsl_edma_chan_mux(fsl_chan, 0, false); } - edma_writel(fsl_edma, ~0, regs->intl); ret = fsl_edma->drvdata->setup_irq(pdev, fsl_edma); if (ret) return ret; From patchwork Thu Jun 1 14:41:04 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Li X-Patchwork-Id: 688461 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AD5FBC7EE2A for ; Thu, 1 Jun 2023 14:43:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233850AbjFAOnM (ORCPT ); Thu, 1 Jun 2023 10:43:12 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57396 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234148AbjFAOnK (ORCPT ); Thu, 1 Jun 2023 10:43:10 -0400 Received: from EUR05-VI1-obe.outbound.protection.outlook.com (mail-vi1eur05on2086.outbound.protection.outlook.com [40.107.21.86]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 31089188; Thu, 1 Jun 2023 07:42:41 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=VV6//Rab8ZhASDImpl43pTgj9cPXVy8uiUzRoh+t//l8s5YZzifrQOGz2ngoQjnW2M9+KsuCO29wiGOL1iDcIM/60zEfbK9RuL6aicQI/yX+KHOMxDDNNlnBa7YMLjLYn30K6I8qo/wzfVGxGfwl2rH+ArdRDKs8dCFZLykpCPRipS2M5ao64GeyO7ukVbgIxmfG3O+sDhmPtX7QsZBdo+RWDAy/iADLSs3RSqWdRfXvh/SCrhv4LTi1Q5PMFUqMlkUDeOvGsjU2seZy42IBm8wE8sFKU4sk/rsb8q3PQwennChSIcYosqzpk/EPtBDErJ2tkaXl3NvponHz2n5amA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=9wJsdg/NqRQlFvlWBJlH67UCBQiAEPaUs7/XAYIYc78=; b=C2P58tExdAvpzFEFzLtd/JoRYQ6kAgVyXIh0EcXQSw7DTGlRgaT5YprlZDFyStV5NCijy5d7/XNDT5JICE2/yjJADXt/lGnJN7JqCJv8gf71FO3BHjKvXPedTxh4MLik87VeRADW/AqrbqWckgKPMDrZFpAt7pQFl4XVGpvFALTWFFIk3WOzPUzmcmnUH+y3S1sQkLSwebc63TWi/NzEqW1Whwu+0yQ9iSaK23fWqFU9ici7p/bLY5jJUIc3Cuv/ej2ZuytVaazaXap9OmkZsd02lf4ZhsUH0xIHAsM8r9MHAMGwSYJRQ7xS4HY3fGLxJqvpqLxsVwWcipdNuIsHeg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=nxp.com; dmarc=pass action=none header.from=nxp.com; dkim=pass header.d=nxp.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=9wJsdg/NqRQlFvlWBJlH67UCBQiAEPaUs7/XAYIYc78=; b=TWSoT8L0s+zx/o9AR87rbRWJ/hRtaOd9MZLqOfXjddRZiQtD+8S1hEse1spV2qxSNPNMVGx+r6MF42qzIrro0cV0Hg9r+gXT9rAjSngu361kY4CrPvbdR+vosuxdb+vEtpYjYIvt3SHxz0V48YnufmnZ9PZiz26tFfGclD4jBUI= Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=nxp.com; Received: from AM6PR04MB4838.eurprd04.prod.outlook.com (2603:10a6:20b:4::16) by AM9PR04MB7603.eurprd04.prod.outlook.com (2603:10a6:20b:2d6::9) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6455.22; Thu, 1 Jun 2023 14:41:52 +0000 Received: from AM6PR04MB4838.eurprd04.prod.outlook.com ([fe80::4a2a:262e:415f:e41c]) by AM6PR04MB4838.eurprd04.prod.outlook.com ([fe80::4a2a:262e:415f:e41c%7]) with mapi id 15.20.6433.024; Thu, 1 Jun 2023 14:41:52 +0000 From: Frank Li To: vkoul@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, dmaengine@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, peng.fan@nxp.com, joy.zou@nxp.com, shenwei.wang@nxp.com, imx@lists.linux.dev Subject: [PATCH v3 09/12] dmaengine: fsl-edma: refactor chan_name setup and safety Date: Thu, 1 Jun 2023 10:41:04 -0400 Message-Id: <20230601144107.1636833-10-Frank.Li@nxp.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230601144107.1636833-1-Frank.Li@nxp.com> References: <20230601144107.1636833-1-Frank.Li@nxp.com> X-ClientProxiedBy: SJ0PR03CA0130.namprd03.prod.outlook.com (2603:10b6:a03:33c::15) To AM6PR04MB4838.eurprd04.prod.outlook.com (2603:10a6:20b:4::16) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: AM6PR04MB4838:EE_|AM9PR04MB7603:EE_ X-MS-Office365-Filtering-Correlation-Id: 474e7cb0-dff7-42a5-9101-08db62ae56a3 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: gzf4TSuheQK1Q/FKtpULXavaz1IIIaIJkFi6hmPJ/lsVQehG7ZduNS3F8dFMkl4tnnYBg5U4gWQbG+kdsDvZK4CKnMpQbLy1BUiOhCeKDiiu0k6WE29flFUkiBiGDmhOyIt8PJBEfVDCbaI34bGJpcbJ+9hNHL/sI9M7L6V07QpEQkGuUPvA+QVRLd8493UOjTgxJdFc5v6ZnkW5DPWHH1gxr/dQ2umNxlJ54KWwW2ztyow9fz2CLeNQh+7IC+8I7kDXURRj8Xk3Ux8KoCw7IOpETfn/DmVrVNue4ZqkO1mxJG+UvqU4tFQrVGJS8nERIvgaXvql5yztKAQILD3O9Ac96o6PyC7rlDWK/5v6StdZf+Yn1gjLBzRe/zoTR+XO84HxmRVG8TynKd+ECDQq1rWgmAoC4JHmnfkyyeHLn1S2ZSOlCITCzEO+Jz2Zic1yIw3Y+yJ+iYhjyLVa89vIkcAa1mCGCDOBUTbQHZFb+7wY0ZnipDrYAPLOiyhqrnLc5XW97gs9Q6ec4qVp1sPiuesrieVcelinwzMTmk/xkP/LM82PXuBummiduLXOAVBpPwR6AbwEv31vfBpgHWrRGH/jyXbFUzVnYe/gzAoA7maM+OPme+WACfJ9fPEkGKE/mO9uepLMQV4Sf/nvwx5ZTg== X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:AM6PR04MB4838.eurprd04.prod.outlook.com; PTR:; CAT:NONE; SFS:(13230028)(4636009)(396003)(376002)(346002)(136003)(366004)(39860400002)(451199021)(26005)(36756003)(6506007)(1076003)(6512007)(2616005)(86362001)(186003)(2906002)(478600001)(66946007)(66476007)(66556008)(5660300002)(52116002)(83380400001)(8936002)(6486002)(41300700001)(921005)(38100700002)(8676002)(316002)(38350700002)(6666004); DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: J1wbOBCGWe+x7GGM1fewp2lMdlyNMVEZ9q2D5msEMtbH2UUKxmq83izZMs14gYoAGEmEftE8/cH+ADb7fqQfbLRVGX+nEuPbQE8fKSQgPjX2oNp0HsBoX4oED6xcZtTG7CSqL5pWBkBVj6zdOJ5dc+SQO3fcADwvive6UMmCtop8oHiuh0CsfeBbsmpdoc+fFYBGheNDp3s+pSqg/t9wTxEXJgrksejRZJi6i0wPN5gpUTac/6MPpeFBmHK5IU+YjHYY2nTJUeNELCXnvtRrpeKq6m4dPEAFF7hlvwTNoBDxPOeYOLdqaXTI4FCVUN0j09wXQPlGaHKW6EVXc4DUr1y5ML5rgy8AS7trv+TRu2lT/EEpjDfyXp72BI4QFf65yzNWz8yR1JNHTCF1SlnKSepItNZzSpyW0nUJygGfS4zOH+0yZK6tpfBm6isl6Kw8tTyeeDZLBxA4qz+B6aDZK9Bu8zJpNYXs1RTDLPLblJhTSpaPwCLRicK2qvCz55XWGyDJPLsEC2yv/7hvPydyHk4JDlUq/xUeaNh2k0R5nOE3Hx5vseCkCFrQwrrRn1CgHGQQddUSa1Pg6Ll1+4oRimEQk02/+F9n2ACM6HYV6e85H+0+BJoYCvWWjOGBFUgA+5ogA0GPm8BoK31rXadHhUvAoAxuXCu1T7BudWO/PlaRNv+zQq1PHisA3fWP05ud+L4Nl/U2QLojyUVHjLxkbOlA8OI4SqC8OfBg04f3NzDrAXORO6Goit1VPwt/j/dKutkKEqVasSdCUuGV0qzkp40ZALu1FSGi/3T+v56k3bFGDFP8lj4t8lOImQB84XVnxJbPdIyaGpxHHGWG+zKhMYk71anHMTRHuM2mAQ++pH2yzQE5cXVf0ECOxhJDQsqCO9dCpAQagVlDyKSC07ZNaCyL7n2+mVeaLNKX6ENUcJbbyzubd5p8FbjE2S0mNuPZYI/eRyUfxpEaSlrPH7jUq7GmB/5cUziQYWFpRe1DwEMrmKFv6rsiBEVqpq+0Yw7RJcpjCpHEQf5aZhjjdi1lCQiZ/m45h9S/6V0ML8+pvEC1Y6x6ejMmF1qQnUpaWhM3/NgfD9Mf5N+JXZaqzUj8hPqogiWkP1lUlZ/M3LB+G9p2IG5RZCzGwtRlZ/+rI0gQu/4xucVGRE4pR0Hi56rLdqbMotql/LpHQVVnfoOUw0MXxwm+d5cjkinDV1B9sCzXLrAymIG6fP47A20n2D6E+FsXzEOdYNZgxB3TpbY5dl8P6Ji/4Khp7Is4FNyQDCKD0nIwadVuos+fKSECQHJmbaAh3WyObOKZjuI2uiZKj9aD2V18E0YBChje027/QRpGOXt4jz85W54/jfLC7CUnHRVuMiWAI3pTPLCYy4YgVvy2r6Cb/VRPfJ7ZYdKGnkCjX4vMaMd4VvUbsz1RzzPj/DNeuP2au8KJw4l/Ud3yBzhoufL/G0ZdsZs7AXaHM4gdLHYSI7swuNkK47fFOcO4zbiz75fhK5IBxXUVdoUavrA2PTvYLVO93l/PYLBB9ye5gt+NcF6+LKNDnJJ8rs1zDH499P2cBk/VmkNpltjabIEMaHYSzmm0WECrbKqwWY85 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 474e7cb0-dff7-42a5-9101-08db62ae56a3 X-MS-Exchange-CrossTenant-AuthSource: AM6PR04MB4838.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Jun 2023 14:41:52.2548 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: vLsvzEYSTLrx94VjDnVdz9GvLt1Kib1g1NrOt1ljCnveMG2s3NmdF29hhm4OlOWcDxM26PmidJSYz0wPMfrIUg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM9PR04MB7603 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Relocated the setup of chan_name from setup_irq() to fsl_chan init. This change anticipates its future use in various locations. For increased safety, sprintf has been replaced with snprintf. In addition, The size of the fsl_chan->name[] array was expanded from 16 to 32. Signed-off-by: Frank Li --- drivers/dma/fsl-edma-common.h | 2 +- drivers/dma/fsl-edma-main.c | 5 +++-- 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/dma/fsl-edma-common.h b/drivers/dma/fsl-edma-common.h index 521b79fc3828..316df42ae5cb 100644 --- a/drivers/dma/fsl-edma-common.h +++ b/drivers/dma/fsl-edma-common.h @@ -116,7 +116,7 @@ struct fsl_edma_chan { dma_addr_t dma_dev_addr; u32 dma_dev_size; enum dma_data_direction dma_dir; - char chan_name[16]; + char chan_name[32]; }; struct fsl_edma_desc { diff --git a/drivers/dma/fsl-edma-main.c b/drivers/dma/fsl-edma-main.c index f7f3373989f8..6bbf9c2cea2f 100644 --- a/drivers/dma/fsl-edma-main.c +++ b/drivers/dma/fsl-edma-main.c @@ -175,8 +175,6 @@ fsl_edma2_irq_init(struct platform_device *pdev, if (irq < 0) return -ENXIO; - sprintf(fsl_edma->chans[i].chan_name, "eDMA2-CH%02d", i); - /* The last IRQ is for eDMA err */ if (i == count - 1) ret = devm_request_irq(&pdev->dev, irq, @@ -302,6 +300,9 @@ static int fsl_edma_probe(struct platform_device *pdev) for (i = 0; i < fsl_edma->n_chans; i++) { struct fsl_edma_chan *fsl_chan = &fsl_edma->chans[i]; + snprintf(fsl_chan->chan_name, sizeof(fsl_chan->chan_name), "%s-CH%02d", + dev_name(&pdev->dev), i); + fsl_chan->edma = fsl_edma; fsl_chan->pm_state = RUNNING; fsl_chan->slave_id = 0; From patchwork Thu Jun 1 14:41:05 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Li X-Patchwork-Id: 687893 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E96A4C7EE23 for ; Thu, 1 Jun 2023 14:43:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234442AbjFAOnh (ORCPT ); Thu, 1 Jun 2023 10:43:37 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57864 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234381AbjFAOng (ORCPT ); Thu, 1 Jun 2023 10:43:36 -0400 Received: from EUR05-VI1-obe.outbound.protection.outlook.com (mail-vi1eur05on2086.outbound.protection.outlook.com [40.107.21.86]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6F87E1AE; Thu, 1 Jun 2023 07:43:10 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=Cvgiv3ChNF6e7RrA6v+Y12PwtHq+fgNiUKg3zqYSUainFcCiKdRZqByBK3NbjuSiB9W0bUPMjCG/kRN6WXdyVlvfLEe2bjHBzaioIMOp6mZKMqM4jj68Xo1/qtE0D0vHtO3njuVCojCU7GM2ngV3O+qw1bJAq2pU9mbOcWMZVn5Xw0PiY1t9AjrAEvwpgMxcHVHzJSjb2n65ceJsnEPTy9HI/4NQRGRAmw72brKmZbH/a49NVzMEkrrOie+DgW1at5Bscxw1bsyUGZuxLHUHuMg9dFvWWw5V3eoJ07WlzH0dYou+YlnBlWB9xN9p/4Jw8xeKkmgc8DoDdvrTctnsoQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=vS59yURE7KxXX2D7ahF4xGEuJ/fXbFVmDbviscoKnY8=; b=bmhdObmP6zEhxMpOYEvj5yyialnQrjoHRKxUs0HM4jHC3b4dGnpDSwDAP0n3JwjWyIbL1RR/myouX6AMVVi6IALJdeNmrUz2feULQwg80Y6e0jpA+sVtJ7zfZwZ0FMtZKFIdR5NaodWOCz6n8uzYkJv4jldqlTgLjmV9S8yXidcgcvxNCK9x70e5p+4qkuZLYWZ0Lu3FwgHlNMg9jwh+bPHynjEm+lUKBUU74qlqkvqf7YdJsgDEpH8I/e97SFet2SQQeqsT6/w84TnbEjvQWEVTKwZL4GsvUC1pyJHPReu5qGKHDOAYmzp+qzapGb3AYEXi08uXg0B3Vl3rnLxzaQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=nxp.com; dmarc=pass action=none header.from=nxp.com; dkim=pass header.d=nxp.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=vS59yURE7KxXX2D7ahF4xGEuJ/fXbFVmDbviscoKnY8=; b=dhGXaT6jMPaLJiQZZXB7EpoawrIGkFAETW6cXPS6+qMA0l6b4B9LJSma2V5Fd+KYq8ow+LP8pxIjsTJkfBiPyyASQMDpQkjauF2T61AYYcZHW8usOzzvURhhXwgADr1F8MEuuFNf2K5WGX8zr2mju+Lja15J8azWd998yemxcRs= Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=nxp.com; Received: from AM6PR04MB4838.eurprd04.prod.outlook.com (2603:10a6:20b:4::16) by AM9PR04MB7603.eurprd04.prod.outlook.com (2603:10a6:20b:2d6::9) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6455.22; Thu, 1 Jun 2023 14:41:55 +0000 Received: from AM6PR04MB4838.eurprd04.prod.outlook.com ([fe80::4a2a:262e:415f:e41c]) by AM6PR04MB4838.eurprd04.prod.outlook.com ([fe80::4a2a:262e:415f:e41c%7]) with mapi id 15.20.6433.024; Thu, 1 Jun 2023 14:41:55 +0000 From: Frank Li To: vkoul@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, dmaengine@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, peng.fan@nxp.com, joy.zou@nxp.com, shenwei.wang@nxp.com, imx@lists.linux.dev Subject: [PATCH v3 10/12] dmaengine: fsl-edma: move tcd into struct fsl_dma_chan Date: Thu, 1 Jun 2023 10:41:05 -0400 Message-Id: <20230601144107.1636833-11-Frank.Li@nxp.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230601144107.1636833-1-Frank.Li@nxp.com> References: <20230601144107.1636833-1-Frank.Li@nxp.com> X-ClientProxiedBy: SJ0PR03CA0130.namprd03.prod.outlook.com (2603:10b6:a03:33c::15) To AM6PR04MB4838.eurprd04.prod.outlook.com (2603:10a6:20b:4::16) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: AM6PR04MB4838:EE_|AM9PR04MB7603:EE_ X-MS-Office365-Filtering-Correlation-Id: 719c6dff-2baf-4553-c0c4-08db62ae5882 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: b9sWS2JTLPtMF2xart1by+VLUl8cTj9Ds1hgoF2VcAN05KD2QpOHIN9iRT8H1EfESpx9g51RGkOr+ftOOroMARxMNoLHhB4CTcv9ekuMM7UXqlcIm8YjYQcLTKtW2NXeWxQHyAAyG37repAHzrsyPQW5V1MR59N5ds6B7knBuPx+YGholS7e2AxVbSUC1aCDSMkBEB6JSZU/qTxUOcG5uKdWXti6vBq9wcjBec/xYYMmX2v5dCGYWEzUDfmQBPzMSrmBy5jIVX8+8n/09GapolbgidkujQBjvJ6dITVJhSmV62zJKcTsF9eSGiHpPBDq73OEGqU74vSVaALhEHBHYYL9Zfgg1sqqVKqDQJ+SgQE+Nw7rm/1o7DI0pKStsV1cdL1SKj4YpsE9aYDqypNHctgJJSRaxLEcaiWB2y/F251it6ZpVrAD9Amvp3ImHAE2S3FI887VC3hXocTRtOAE1kVjD9ut/bXVUT7Zq/n8DoOBJ3AOH5TnmL8soPl+QUqy5nsRyJQdx5NiA3GHh4oLx8TqKBr2eW992RAcl+rmuwmtWSTlqfjJIuiVGFp6+oFb6hF8/XfqLdFv2VIAgcOebOaw1bnNLkXenKtg/b4nCYkRvKakhN8wEz8X2Tl57DZ5 X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:AM6PR04MB4838.eurprd04.prod.outlook.com; PTR:; CAT:NONE; SFS:(13230028)(4636009)(396003)(376002)(346002)(136003)(366004)(39860400002)(451199021)(26005)(36756003)(6506007)(1076003)(6512007)(2616005)(86362001)(186003)(2906002)(478600001)(66946007)(66476007)(66556008)(5660300002)(52116002)(83380400001)(8936002)(966005)(6486002)(41300700001)(921005)(38100700002)(8676002)(316002)(38350700002)(6666004); DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: wbClvcTN19EQy0i12vDF0vvYF6rBQOMUdvbCtSCS3KXs1DQkeU7zM0XQeaYtOZLzCF86oGf2dXzsoiO8jPU/F3mcoEjAQTVesojyjNzzgXWdjxFIzdN1320aXhv+jhk9D1G8TNie2Eo6I6S4wnfD9v4TiDfgBWlvALNjAb2Uog1vp3cigXfoDPQVKVO9iBJnCeWSEBlSuWPC/OE6X3Osh6Jqs2iLGxvuyi++hZiiUnj7w4k7GrBFAYOW6tthwmbpXwL1OOkbnMIYGK5//ZwFbwEQOHhvWN91RPBbqlLEk04S7B3ph7GUzwTFdC3PITkrv2DH+7QufK+TPMISixC9EgzLiA763tsav5As8THCCSU8hthcYCz/IJieWGLP6eUpHpVKWboR9LqNG3MseT2k93rLuYNdTfccwd14nj3EUZyPdfXIobCHiiW295/GMMA/vQWfAZLC1PZ+4XI05TBGa4WEntpAGrD9ehGMjPs68AonB+DQeZLOVbuM9BxQluRY5puHWpigqJEylD9I3+2V1l7NhenDqxZGlv+N+64Lpg2Ff06FA8lknvvTGAohkgVTatGEVpj+AO+uECTSo/pM0iowd4e564gtbamszdy3uRHhg2EWFFiTZ9ekGLz71+FFk3vTqkEMftKOg5Aj/fnKPELkF/L401m0qhm9Y9zYrxyn7u8fFowkXbIILVpkQO4ko/yw8T55rGeQFBm8gv1S533oR100c5r6XNzkLH3gcnxhZYc4BoxQLWNZYbdbFfFiAaVTGOiix/wIZfPDFuBz5GdG2wzDj59MyzRiCK5S/VgvJo3FiNovzfa7Q92u/KQeNhG44JYwMTti8ehlfmkxpis8nr6+EbbXQVlnPBB088NTAoLv/PfznotsaevDV230/W396MZsbm4itLACHsDfnxWn8zjVf5CycnzRtPVEd1Hr0/nHQ3UluV12thAPRqZHTPOlM3EskXJMu3Jz+6zpfjLN9dQDWZAwwIDt9CAT/6ANfQ4aB0BGezOb53ajyGjhKZZpYqVH8pe6OxODgrSn3Pu3dC1F9DzcZ91sck700pzYDskRcwAkdtyAT7LE+rIy2/AruJy92m7EGhupDNnzjqHT7vWVTJCzYGdEwQPGNcPtRlb3COcE1E82+3fJ+GY3iVWryO9C0PzTxPmdB0ABalH9IKk4+qhoNQSDaA9r6CgkEJxuuOyMkGEEEEdeVLSl9+eElipAZXhKjPDq5kC3imTTuXTs+wiZlUk/jh3m+TK52gw/VCw2OFEvdbKnqccyt7pg+Yd5E1UpDoSJAnDNweIN/lbpZuZODnqwZabMZF+REwjMy9AIGjJwYcs0TWZZ+AWxCnmF4+WFRncTQk9Wf8Dl0gU/zyqdUqiJ52g8GMtiQE+SwfISm390n0BmZ6qopba4bLRYt3HQ56GORWPVFm1vwURf3+yBAX6VCNdRhFLN7l1szd31vlJb9ZMzXFRCBx5+vXTwh+5hCzbjZDvPbf7UvaEajKPqZPZErXUfm8PAgVO7KIjuqyBIglaols2p1lqOh1EtL6pRl2XwUr2kO2ROhADkQZoo2V/HG+NXvKBruvKsmfwpm0/V5dcfHN6q X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 719c6dff-2baf-4553-c0c4-08db62ae5882 X-MS-Exchange-CrossTenant-AuthSource: AM6PR04MB4838.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Jun 2023 14:41:55.3366 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: OnjySRGMPFYruMYdG/Z3pdnlXGV2G3AX0a/33bc20zXRyVmdIdu5KbTzmFBX9qRGjdGoVTtHIs0BznrZb01Z1w== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM9PR04MB7603 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Relocates the tcd into the fsl_dma_chan structure. This adjustment reduces the need to reference back to fsl_edma_engine, paving the way for EDMA V3 support. Unified the edma_writel and edma_writew functions for accessing TCD (Transfer Control Descriptor) registers. A new macro is added that can automatically detect whether a 32-bit or 16-bit access should be used based on the structure field definition. This provide better support 64-bit TCD with future v5 version. Reported-by: kernel test robot Closes: https://lore.kernel.org/oe-kbuild-all/202305271951.gmRobs3a-lkp@intel.com/ Signed-off-by: Frank Li --- drivers/dma/fsl-edma-common.c | 38 +++++++++++++---------------------- drivers/dma/fsl-edma-common.h | 22 +++++++++++++++++++- drivers/dma/fsl-edma-main.c | 6 ++++-- drivers/dma/mcf-edma-main.c | 4 +++- 4 files changed, 42 insertions(+), 28 deletions(-) diff --git a/drivers/dma/fsl-edma-common.c b/drivers/dma/fsl-edma-common.c index 51fbd7531c74..eead6a4765f7 100644 --- a/drivers/dma/fsl-edma-common.c +++ b/drivers/dma/fsl-edma-common.c @@ -40,8 +40,6 @@ #define EDMA64_ERRH 0x28 #define EDMA64_ERRL 0x2c -#define EDMA_TCD 0x1000 - void fsl_edma_tx_chan_handler(struct fsl_edma_chan *fsl_chan) { spin_lock(&fsl_chan->vchan.lock); @@ -285,8 +283,6 @@ static size_t fsl_edma_desc_residue(struct fsl_edma_chan *fsl_chan, struct virt_dma_desc *vdesc, bool in_progress) { struct fsl_edma_desc *edesc = fsl_chan->edesc; - struct edma_regs *regs = &fsl_chan->edma->regs; - u32 ch = fsl_chan->vchan.chan.chan_id; enum dma_transfer_direction dir = edesc->dirn; dma_addr_t cur_addr, dma_addr; size_t len, size; @@ -301,9 +297,9 @@ static size_t fsl_edma_desc_residue(struct fsl_edma_chan *fsl_chan, return len; if (dir == DMA_MEM_TO_DEV) - cur_addr = edma_readl(fsl_chan->edma, ®s->tcd[ch].saddr); + cur_addr = edma_read_tcdreg(fsl_chan, saddr); else - cur_addr = edma_readl(fsl_chan->edma, ®s->tcd[ch].daddr); + cur_addr = edma_read_tcdreg(fsl_chan, daddr); /* figure out the finished and calculate the residue */ for (i = 0; i < fsl_chan->edesc->n_tcds; i++) { @@ -358,9 +354,6 @@ enum dma_status fsl_edma_tx_status(struct dma_chan *chan, static void fsl_edma_set_tcd_regs(struct fsl_edma_chan *fsl_chan, struct fsl_edma_hw_tcd *tcd) { - struct fsl_edma_engine *edma = fsl_chan->edma; - struct edma_regs *regs = &fsl_chan->edma->regs; - u32 ch = fsl_chan->vchan.chan.chan_id; u16 csr = 0; /* @@ -369,23 +362,22 @@ static void fsl_edma_set_tcd_regs(struct fsl_edma_chan *fsl_chan, * big- or little-endian obeying the eDMA engine model endian, * and this is performed from specific edma_write functions */ - edma_writew(edma, 0, ®s->tcd[ch].csr); + edma_write_tcdreg(fsl_chan, 0, csr); - edma_writel(edma, (s32)tcd->saddr, ®s->tcd[ch].saddr); - edma_writel(edma, (s32)tcd->daddr, ®s->tcd[ch].daddr); + edma_write_tcdreg(fsl_chan, tcd->saddr, saddr); + edma_write_tcdreg(fsl_chan, tcd->daddr, daddr); - edma_writew(edma, (s16)tcd->attr, ®s->tcd[ch].attr); - edma_writew(edma, tcd->soff, ®s->tcd[ch].soff); + edma_write_tcdreg(fsl_chan, tcd->attr, attr); + edma_write_tcdreg(fsl_chan, tcd->soff, soff); - edma_writel(edma, (s32)tcd->nbytes, ®s->tcd[ch].nbytes); - edma_writel(edma, (s32)tcd->slast, ®s->tcd[ch].slast); + edma_write_tcdreg(fsl_chan, tcd->nbytes, nbytes); + edma_write_tcdreg(fsl_chan, tcd->slast, slast); - edma_writew(edma, (s16)tcd->citer, ®s->tcd[ch].citer); - edma_writew(edma, (s16)tcd->biter, ®s->tcd[ch].biter); - edma_writew(edma, (s16)tcd->doff, ®s->tcd[ch].doff); + edma_write_tcdreg(fsl_chan, tcd->citer, citer); + edma_write_tcdreg(fsl_chan, tcd->biter, biter); + edma_write_tcdreg(fsl_chan, tcd->doff, doff); - edma_writel(edma, (s32)tcd->dlast_sga, - ®s->tcd[ch].dlast_sga); + edma_write_tcdreg(fsl_chan, tcd->dlast_sga, dlast_sga); if (fsl_chan->is_sw) { csr = le16_to_cpu(tcd->csr); @@ -393,7 +385,7 @@ static void fsl_edma_set_tcd_regs(struct fsl_edma_chan *fsl_chan, tcd->csr = cpu_to_le16(csr); } - edma_writew(edma, (s16)tcd->csr, ®s->tcd[ch].csr); + edma_write_tcdreg(fsl_chan, tcd->csr, csr); } static inline @@ -736,7 +728,5 @@ void fsl_edma_setup_regs(struct fsl_edma_engine *edma) edma->regs.errh = edma->membase + EDMA64_ERRH; edma->regs.inth = edma->membase + EDMA64_INTH; } - - edma->regs.tcd = edma->membase + EDMA_TCD; } diff --git a/drivers/dma/fsl-edma-common.h b/drivers/dma/fsl-edma-common.h index 316df42ae5cb..cfc41915eaa1 100644 --- a/drivers/dma/fsl-edma-common.h +++ b/drivers/dma/fsl-edma-common.h @@ -48,6 +48,8 @@ #define DMAMUX_NR 2 +#define EDMA_TCD 0x1000 + #define FSL_EDMA_BUSWIDTHS (BIT(DMA_SLAVE_BUSWIDTH_1_BYTE) | \ BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) | \ BIT(DMA_SLAVE_BUSWIDTH_4_BYTES) | \ @@ -93,7 +95,6 @@ struct edma_regs { void __iomem *intl; void __iomem *errh; void __iomem *errl; - struct fsl_edma_hw_tcd __iomem *tcd; }; struct fsl_edma_sw_tcd { @@ -117,6 +118,7 @@ struct fsl_edma_chan { u32 dma_dev_size; enum dma_data_direction dma_dir; char chan_name[32]; + struct fsl_edma_hw_tcd __iomem *tcd; }; struct fsl_edma_desc { @@ -156,6 +158,16 @@ struct fsl_edma_engine { struct fsl_edma_chan chans[]; }; +#define edma_read_tcdreg(chan, __name) \ +(sizeof(chan->tcd->__name) == sizeof(u32) ? \ + edma_readl(chan->edma, &chan->tcd->__name) : \ + edma_readw(chan->edma, &chan->tcd->__name)) + +#define edma_write_tcdreg(chan, val, __name) \ +(sizeof(chan->tcd->__name) == sizeof(u32) ? \ + edma_writel(chan->edma, (u32 __force)val, &chan->tcd->__name) : \ + edma_writew(chan->edma, (u16 __force)val, &chan->tcd->__name)) + /* * R/W functions for big- or little-endian registers: * The eDMA controller's endian is independent of the CPU core's endian. @@ -170,6 +182,14 @@ static inline u32 edma_readl(struct fsl_edma_engine *edma, void __iomem *addr) return ioread32(addr); } +static inline u16 edma_readw(struct fsl_edma_engine *edma, void __iomem *addr) +{ + if (edma->big_endian) + return ioread16be(addr); + else + return ioread16(addr); +} + static inline void edma_writeb(struct fsl_edma_engine *edma, u8 val, void __iomem *addr) { diff --git a/drivers/dma/fsl-edma-main.c b/drivers/dma/fsl-edma-main.c index 6bbf9c2cea2f..e5f42dd974e8 100644 --- a/drivers/dma/fsl-edma-main.c +++ b/drivers/dma/fsl-edma-main.c @@ -309,9 +309,11 @@ static int fsl_edma_probe(struct platform_device *pdev) fsl_chan->idle = true; fsl_chan->dma_dir = DMA_NONE; fsl_chan->vchan.desc_free = fsl_edma_free_desc; + fsl_chan->tcd = fsl_edma->membase + EDMA_TCD + + i * sizeof(struct fsl_edma_hw_tcd); vchan_init(&fsl_chan->vchan, &fsl_edma->dma_dev); - edma_writew(fsl_edma, 0x0, ®s->tcd[i].csr); + edma_write_tcdreg(fsl_chan, 0, csr); fsl_edma_chan_mux(fsl_chan, 0, false); } @@ -418,7 +420,7 @@ static int fsl_edma_resume_early(struct device *dev) for (i = 0; i < fsl_edma->n_chans; i++) { fsl_chan = &fsl_edma->chans[i]; fsl_chan->pm_state = RUNNING; - edma_writew(fsl_edma, 0x0, ®s->tcd[i].csr); + edma_write_tcdreg(fsl_chan, 0, csr); if (fsl_chan->slave_id != 0) fsl_edma_chan_mux(fsl_chan, fsl_chan->slave_id, true); } diff --git a/drivers/dma/mcf-edma-main.c b/drivers/dma/mcf-edma-main.c index 316e637b00c4..bccb5448e492 100644 --- a/drivers/dma/mcf-edma-main.c +++ b/drivers/dma/mcf-edma-main.c @@ -200,7 +200,9 @@ static int mcf_edma_probe(struct platform_device *pdev) mcf_chan->dma_dir = DMA_NONE; mcf_chan->vchan.desc_free = fsl_edma_free_desc; vchan_init(&mcf_chan->vchan, &mcf_edma->dma_dev); - iowrite32(0x0, ®s->tcd[i].csr); + mcf_chan->tcd = mcf_edma->membase + EDMA_TCD + + i * sizeof(struct fsl_edma_hw_tcd); + iowrite32(0x0, &mcf_chan->tcd->csr); } iowrite32(~0, regs->inth); From patchwork Thu Jun 1 14:41:06 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Li X-Patchwork-Id: 688462 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7879EC7EE23 for ; Thu, 1 Jun 2023 14:42:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233532AbjFAOml (ORCPT ); Thu, 1 Jun 2023 10:42:41 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56980 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229589AbjFAOmk (ORCPT ); Thu, 1 Jun 2023 10:42:40 -0400 Received: from EUR05-DB8-obe.outbound.protection.outlook.com (mail-db8eur05on2043.outbound.protection.outlook.com [40.107.20.43]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 19F8D188; Thu, 1 Jun 2023 07:42:08 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=GQg7rFA01VmkUwGmNjvNQ+e16gzbL8ZlrpaN32704Uks4ZbJEjjycPw7EkIYfktotx+SS6hRyeNjzRtysKmUb+lI7TBZqw+FTc6ctIFJZDTvnsc3+orlkFb5PBsd72Upfytat3V357QxC9pJI7PZcaHk7F1zISp5ScZesDSIBXa1L5ksCtzk1VMVa9ytOF0+qVqKC5wvJFlwvN3GwIVomVOFf8CuD0eBX95vs5TKmENK7utRLtq0F+PqS8iJfuslts1llgoL0RzdmQ6DDv6V0StBk0s4YRzGQCxkbd2ONdG8Ur4aXjRx2EYEQzNXiSz04D2cvwVzrtRUx+unrR/5kQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=Tpl7/c7aWnAUe19Gaf4KwWH9vWeekocZ3GBd+z5uqmE=; b=nt2gGdl/3blCsbyQTf/Hy/Mvb8yc5X7OI/YUpmKLtCZVaLnO2WXvHnM3NuT6P1wRhFJxQYGKtN104jLfSAz3xhozfEhlmPkTb48eh0I8tc33S56IzGFV/xyWxKxZtOMitXrDS0jYZL8y5GJrRA0AXM+PE6RT5PZKxL8J4+uhuOWlh6aBesjcoOmo2Y3au7h/fcYlpcC59wFY6v+zB617jQ91NECqumHgZ8ErQ5dRcXgRq92EAWlF9furTcEBbG4MBfNZnIyC4P7CoqA4aDErCXBoAy/axsUH0ZvYakrPblZLCuOdQZ2IsWzm1MH3blK0UxzpkDOtjbKIw6JJaQPnpA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=nxp.com; dmarc=pass action=none header.from=nxp.com; dkim=pass header.d=nxp.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=Tpl7/c7aWnAUe19Gaf4KwWH9vWeekocZ3GBd+z5uqmE=; b=ZTXw5IqDy4WmSSWav+pkCNFblRJKg5SVN+pNEYD3JHstEzDHZrdZLSbNAxvPt0Gf4YJWzsLx8up3tm6DikylXRJsB8H5qexpoNDVwjm7WyAZGMI35S7gCNXBg1884faY27QH5bycbvFs7XCna+JtVRnqX2JJ3ufZpe4pzD7zGco= Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=nxp.com; Received: from AM6PR04MB4838.eurprd04.prod.outlook.com (2603:10a6:20b:4::16) by VI1PR04MB6944.eurprd04.prod.outlook.com (2603:10a6:803:133::14) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6433.24; Thu, 1 Jun 2023 14:41:58 +0000 Received: from AM6PR04MB4838.eurprd04.prod.outlook.com ([fe80::4a2a:262e:415f:e41c]) by AM6PR04MB4838.eurprd04.prod.outlook.com ([fe80::4a2a:262e:415f:e41c%7]) with mapi id 15.20.6433.024; Thu, 1 Jun 2023 14:41:58 +0000 From: Frank Li To: vkoul@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, dmaengine@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, peng.fan@nxp.com, joy.zou@nxp.com, shenwei.wang@nxp.com, imx@lists.linux.dev Subject: [PATCH v3 11/12] dmaengine: fsl-edma: integrate v3 support Date: Thu, 1 Jun 2023 10:41:06 -0400 Message-Id: <20230601144107.1636833-12-Frank.Li@nxp.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230601144107.1636833-1-Frank.Li@nxp.com> References: <20230601144107.1636833-1-Frank.Li@nxp.com> X-ClientProxiedBy: SJ0PR03CA0130.namprd03.prod.outlook.com (2603:10b6:a03:33c::15) To AM6PR04MB4838.eurprd04.prod.outlook.com (2603:10a6:20b:4::16) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: AM6PR04MB4838:EE_|VI1PR04MB6944:EE_ X-MS-Office365-Filtering-Correlation-Id: b1f48e9e-4e5a-4f30-b530-08db62ae5a66 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: Lp4IT8mVtVsAzBVfZAJOShJyW+W+aUDdiS/i8N5+Q+AA6CwLG0pZ1/Xwnbm8pg5hQgbdY4ft0B7c8s+ZfUGxWCjdb+OgZ9CyTUU//89dDdxSXVu6YPo5E6iyA6TTwZ2h0GS10Pb3y5PeMBnhFUdcXVNSYf1HIr8b/MQVYfkcu5oWV3TqVs7PshP+WLRJwL8RYo5ZFBVLNw4Ol8iSuBNlB21mDh9E610L5Ay584rSFjdQ0npIaB4iFsEoT/WcY0Pb4iiyAtW9Z09x1rkXpwdkEWTGecVIznZJ3sewsPvYINvv+X2UGCLGp5kbS8cv76t4zUs0PCZQqpJgELk6VXyTf74pdfoZ2lj9B6K31x5Zlmpjc1aSIaWWYEUGcbXjRQngu3D+g6b2a/Qdear4tdvvVwMh/mEKUt7GoJI2Pj6fuZrCwhowgfZTpF58ww7+CWW/ImPY/wEBvE0JlUP9lLOXC5HL/iM7NGSDf0GhLXw0McV9jcMtZFIrkPk4PRzhJ+d78CmhQl9rgtJLSjoL/MRnoafCUX+o5gGm2gG3npqyIvrk/gHLaAqu1PdGwaSMyZiBMJoY8lELpcUrn/8Smyf5Fj1caqdckPAHpvTdVaE/tg7EhX9za8QtiCsrB4m5X/Yh2QzCiv8vpCAzptLXes5DWQ== X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:AM6PR04MB4838.eurprd04.prod.outlook.com; PTR:; CAT:NONE; SFS:(13230028)(4636009)(376002)(346002)(396003)(39860400002)(136003)(366004)(451199021)(8936002)(83380400001)(2616005)(30864003)(6666004)(186003)(66476007)(316002)(52116002)(6486002)(66946007)(478600001)(66556008)(1076003)(6512007)(26005)(6506007)(5660300002)(8676002)(41300700001)(2906002)(921005)(38100700002)(38350700002)(36756003)(86362001); DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: Sfxgk/SA6mU+RM10R5wFd/YKIAwG724FKIfz04KfiKCp33F/Jzsuw3mBF+gRjggLsooKYePyafUBPF930wWfmEubL7CMlDBpyOCwJgK7DF2o4ib5EWx+9EPqOhMvFvviZPFukINWdPokGjq9ccfkTcHRSd3VEs6UJiJThg5zERXUkaDxvJiCkiYy8cnhox6bV+rYw4qPqUCpxSuFgtU86/W6U8TCm+Iy6RXE1Tnb9Rx8FwfdWeQDpvtXNcoWuFlHkxFhKLMJaGZiukyrF6SPx1nugNxWHexxOWatOwQB4vx00MFcsqFfFQzkPDwiZK5prs6EkX9w+w0VvxmtNOMmXCzmtefdpeLR8kPiU3BKbeudgKENI8nwYrmFlflOB1xOm6ZNdmUH/9b2cpirYmsBqtPmZVwxJa4nycjkKskUDIJf8nl2vJuQtUxxoTPiy4NbL9W8d+tmAV95jvR3NfbiboIIZ+xdPlxieecZ7vG8Q60tHV6FN3/z3KL6+wLv3lbpEfVHjevxBICxCv3c1s4VJIELE/nIGG6EhKRozZWeW1k06SU8atYWE0Y7GMeaUoDtxha3SODFHpgDiaSVCNL0jmrQrDsYuUsERM9K3mW3L+bfyPEfvAvIHC9ey0/Uk4LtdopCRiS1yrsh9EfZSQI5JltHSK75T6ux8P0EH0ApHV/S2CoxdJ/810OeuN6T2JzP05uBGeT0ebqUd3UucXLRCDNDAoNBCMlH4yb5AWxMacMj5JqdaOe7+m1hkJb87afPUeL1a7ODQ+X6zAYH/pA7WSsc4SWkfaz9rPa0mA54X3ORaV+Nr5mPmZwAUJzWn66SLARQZWsGyxohARH1eA5EmMoGaan++0deC9bURrY/fbjplmvhbQY5G4Epa+OUmFRXMW5G/43v4sZDMFrWcMf77WNIpNTyEBTBfcXVkE2xAnZKKUUs+Wa7QYKIFYe3OxgrZvTtDA8PsIRhIcFd2eZKQu1Qk9b1wvrHSP5bn8R3hEK3/YfBwWd15VnAdSgSu8Yb3qk6HOEwQoJx5fhjEJ5zpavjJ9F51SyJo8pbZ6mTLFVwOwfRNWgVcogQfecDz7UAQk0lSJCf8CbWZp41EBJpojAnorjMjrN2ui6R2M4ttbj77W4tKrXO6WDOVil9eUNJ+klabqxg4Nyzv/azIxAPIZQ5AoIjc2NRa4a5+ce71zpT9rT+ooqoW2B82tOq+Jy5ZjcFd6SMAfjOzvWOlbFJbM+0YrFrEH5NTdnY3K9vtNq1sjMAyiki+wdzZiG3fMnqHF6JDenPkXKhePvAnYd13JhTL3T0gpJYQoQA6h/HROYdfBq90SkwsPVoL+0+prcXZHPgm7r1gxelt92ZoLUhUryHX9PeVQN80kR6OC6eNDL/lExWHZKK3AKUAF2KkbvFOEa98qGSGWYs+ZcJmZOF2x0bW5tzpUDGsGIyCHkm3Vi3TXL9zTm+FNIrFn1f1dHUtUAwtXlSiMDd71KTT+Ei3LcjCsEsxD67izQs9SRaCInokJlEseydauJFvmwI0XMEtWCZhucRwniQyXakw7o9fI6dk7no6B4fiCobXL5+V+0dHCsZV6HmA+U1P70cnuNq X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: b1f48e9e-4e5a-4f30-b530-08db62ae5a66 X-MS-Exchange-CrossTenant-AuthSource: AM6PR04MB4838.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Jun 2023 14:41:58.7230 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: fGmQMsUqWUJgqVVWbmjtv7QLNofPsgT7ATDMQ13IfKJ0sB18ey7Aybx8eONm0xuXXXVU6XH44o1+Pvoks1RxwQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR04MB6944 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Significant alterations have been made to the EDMA v3's register layout. Now, each channel possesses a separate address space, encapsulating all channel-related controls and statuses, including IRQs. There are changes in bit position definitions as well. However, the fundamental control flow remains analogous to the previous versions. EDMA v3 was utilized in imx8qm, imx93, and will be in forthcoming chips. Signed-off-by: Frank Li --- drivers/dma/fsl-edma-common.c | 158 +++++++++++++++++++--- drivers/dma/fsl-edma-common.h | 75 ++++++++++ drivers/dma/fsl-edma-main.c | 248 ++++++++++++++++++++++++++++++++-- 3 files changed, 456 insertions(+), 25 deletions(-) diff --git a/drivers/dma/fsl-edma-common.c b/drivers/dma/fsl-edma-common.c index eead6a4765f7..dbfc9d80e2ed 100644 --- a/drivers/dma/fsl-edma-common.c +++ b/drivers/dma/fsl-edma-common.c @@ -7,6 +7,8 @@ #include #include #include +#include +#include #include "fsl-edma-common.h" @@ -66,11 +68,47 @@ void fsl_edma_tx_chan_handler(struct fsl_edma_chan *fsl_chan) spin_unlock(&fsl_chan->vchan.lock); } +static void fsl_edma3_enable_request(struct fsl_edma_chan *fsl_chan) +{ + u32 val, flags; + + flags = fsl_edma_drvflags(fsl_chan); + val = edma_readl_chreg(fsl_chan, ch_sbr); + /* Remote/local swapped wrongly on iMX8 QM Audio edma */ + if (flags & FSL_EDMA_DRV_QUIRK_SWAPPED) { + if (!fsl_chan->is_rxchan) + val |= EDMA_V3_CH_SBR_RD; + else + val |= EDMA_V3_CH_SBR_WR; + } else { + if (fsl_chan->is_rxchan) + val |= EDMA_V3_CH_SBR_RD; + else + val |= EDMA_V3_CH_SBR_WR; + } + + if (fsl_chan->is_remote) + val &= ~(EDMA_V3_CH_SBR_RD | EDMA_V3_CH_SBR_WR); + + edma_writel_chreg(fsl_chan, val, ch_sbr); + + if ((flags & (FSL_EDMA_DRV_AXI | FSL_EDMA_DRV_HAS_CHMUX)) && + fsl_chan->srcid && !edma_readl_chreg(fsl_chan, ch_mux)) + edma_writel_chreg(fsl_chan, fsl_chan->srcid, ch_mux); + + val = edma_readl_chreg(fsl_chan, ch_csr); + val |= EDMA_V3_CH_CSR_ERQ; + edma_writel_chreg(fsl_chan, val, ch_csr); +} + static void fsl_edma_enable_request(struct fsl_edma_chan *fsl_chan) { struct edma_regs *regs = &fsl_chan->edma->regs; u32 ch = fsl_chan->vchan.chan.chan_id; + if (fsl_edma_drvflags(fsl_chan) & FSL_EDMA_DRV_SPLIT_REG) + return fsl_edma3_enable_request(fsl_chan); + if (fsl_chan->edma->drvdata->flags & FSL_EDMA_DRV_WRAP_IO) { edma_writeb(fsl_chan->edma, EDMA_SEEI_SEEI(ch), regs->seei); edma_writeb(fsl_chan->edma, ch, regs->serq); @@ -83,11 +121,29 @@ static void fsl_edma_enable_request(struct fsl_edma_chan *fsl_chan) } } +static void fsl_edma3_disable_request(struct fsl_edma_chan *fsl_chan) +{ + u32 val = edma_readl_chreg(fsl_chan, ch_csr); + u32 flags; + + flags = fsl_edma_drvflags(fsl_chan); + + if ((flags & (FSL_EDMA_DRV_AXI | FSL_EDMA_DRV_HAS_CHMUX)) && + fsl_chan->srcid) + edma_writel_chreg(fsl_chan, 0, ch_mux); + + val &= ~EDMA_V3_CH_CSR_ERQ; + edma_writel_chreg(fsl_chan, val, ch_csr); +} + void fsl_edma_disable_request(struct fsl_edma_chan *fsl_chan) { struct edma_regs *regs = &fsl_chan->edma->regs; u32 ch = fsl_chan->vchan.chan.chan_id; + if (fsl_edma_drvflags(fsl_chan) & FSL_EDMA_DRV_SPLIT_REG) + return fsl_edma3_disable_request(fsl_chan); + if (fsl_chan->edma->drvdata->flags & FSL_EDMA_DRV_WRAP_IO) { edma_writeb(fsl_chan->edma, ch, regs->cerq); edma_writeb(fsl_chan->edma, EDMA_CEEI_CEEI(ch), regs->ceei); @@ -186,6 +242,10 @@ int fsl_edma_terminate_all(struct dma_chan *chan) vchan_get_all_descriptors(&fsl_chan->vchan, &head); spin_unlock_irqrestore(&fsl_chan->vchan.lock, flags); vchan_dma_desc_free_list(&fsl_chan->vchan, &head); + + if (fsl_edma_drvflags(fsl_chan) & FSL_EDMA_DRV_HAS_PD) + pm_runtime_allow(fsl_chan->pd_dev); + return 0; } @@ -286,12 +346,16 @@ static size_t fsl_edma_desc_residue(struct fsl_edma_chan *fsl_chan, enum dma_transfer_direction dir = edesc->dirn; dma_addr_t cur_addr, dma_addr; size_t len, size; + u32 nbytes = 0; int i; /* calculate the total size in this desc */ - for (len = i = 0; i < fsl_chan->edesc->n_tcds; i++) - len += le32_to_cpu(edesc->tcd[i].vtcd->nbytes) - * le16_to_cpu(edesc->tcd[i].vtcd->biter); + for (len = i = 0; i < fsl_chan->edesc->n_tcds; i++) { + nbytes = le32_to_cpu(edesc->tcd[i].vtcd->nbytes); + if (nbytes & (EDMA_V3_TCD_NBYTES_DMLOE | EDMA_V3_TCD_NBYTES_SMLOE)) + nbytes = EDMA_V3_TCD_NBYTES_MLOFF_NBYTES(nbytes); + len += nbytes * le16_to_cpu(edesc->tcd[i].vtcd->biter); + } if (!in_progress) return len; @@ -303,8 +367,12 @@ static size_t fsl_edma_desc_residue(struct fsl_edma_chan *fsl_chan, /* figure out the finished and calculate the residue */ for (i = 0; i < fsl_chan->edesc->n_tcds; i++) { - size = le32_to_cpu(edesc->tcd[i].vtcd->nbytes) - * le16_to_cpu(edesc->tcd[i].vtcd->biter); + nbytes = le32_to_cpu(edesc->tcd[i].vtcd->nbytes); + if (nbytes & (EDMA_V3_TCD_NBYTES_DMLOE | EDMA_V3_TCD_NBYTES_SMLOE)) + nbytes = EDMA_V3_TCD_NBYTES_MLOFF_NBYTES(nbytes); + + size = nbytes * le16_to_cpu(edesc->tcd[i].vtcd->biter); + if (dir == DMA_MEM_TO_DEV) dma_addr = le32_to_cpu(edesc->tcd[i].vtcd->saddr); else @@ -389,13 +457,15 @@ static void fsl_edma_set_tcd_regs(struct fsl_edma_chan *fsl_chan, } static inline -void fsl_edma_fill_tcd(struct fsl_edma_hw_tcd *tcd, u32 src, u32 dst, +void fsl_edma_fill_tcd(struct fsl_edma_chan *fsl_chan, + struct fsl_edma_hw_tcd *tcd, u32 src, u32 dst, u16 attr, u16 soff, u32 nbytes, u32 slast, u16 citer, u16 biter, u16 doff, u32 dlast_sga, bool major_int, bool disable_req, bool enable_sg) { + struct dma_slave_config *cfg = &fsl_chan->cfg; u16 csr = 0; - + u32 burst; /* * eDMA hardware SGs require the TCDs to be stored in little * endian format irrespective of the register endian model. @@ -409,6 +479,21 @@ void fsl_edma_fill_tcd(struct fsl_edma_hw_tcd *tcd, u32 src, u32 dst, tcd->soff = cpu_to_le16(soff); + if (fsl_chan->is_multi_fifo) { + /* set mloff to support multiple fifo */ + burst = cfg->direction == DMA_DEV_TO_MEM ? + cfg->src_addr_width : cfg->dst_addr_width; + nbytes |= EDMA_V3_TCD_NBYTES_MLOFF(-(burst * 4)); + /* enable DMLOE/SMLOE */ + if (cfg->direction == DMA_MEM_TO_DEV) { + nbytes |= EDMA_V3_TCD_NBYTES_DMLOE; + nbytes &= ~EDMA_V3_TCD_NBYTES_SMLOE; + } else { + nbytes |= EDMA_V3_TCD_NBYTES_SMLOE; + nbytes &= ~EDMA_V3_TCD_NBYTES_DMLOE; + } + } + tcd->nbytes = cpu_to_le32(nbytes); tcd->slast = cpu_to_le32(slast); @@ -427,6 +512,12 @@ void fsl_edma_fill_tcd(struct fsl_edma_hw_tcd *tcd, u32 src, u32 dst, if (enable_sg) csr |= EDMA_TCD_CSR_E_SG; + if (fsl_chan->is_rxchan) + csr |= EDMA_TCD_CSR_ACTIVE; + + if (fsl_chan->is_sw) + csr |= EDMA_TCD_CSR_START; + tcd->csr = cpu_to_le16(csr); } @@ -466,6 +557,7 @@ struct dma_async_tx_descriptor *fsl_edma_prep_dma_cyclic( struct fsl_edma_chan *fsl_chan = to_fsl_edma_chan(chan); struct fsl_edma_desc *fsl_desc; dma_addr_t dma_buf_next; + bool major_int = true; int sg_len, i; u32 src_addr, dst_addr, last_sg, nbytes; u16 soff, doff, iter; @@ -509,17 +601,23 @@ struct dma_async_tx_descriptor *fsl_edma_prep_dma_cyclic( src_addr = dma_buf_next; dst_addr = fsl_chan->dma_dev_addr; soff = fsl_chan->cfg.dst_addr_width; - doff = 0; - } else { + doff = fsl_chan->is_multi_fifo ? 4 : 0; + } else if (direction == DMA_DEV_TO_MEM) { src_addr = fsl_chan->dma_dev_addr; dst_addr = dma_buf_next; - soff = 0; + soff = fsl_chan->is_multi_fifo ? 4 : 0; doff = fsl_chan->cfg.src_addr_width; + } else { + /* DMA_DEV_TO_DEV */ + src_addr = fsl_chan->cfg.src_addr; + dst_addr = fsl_chan->cfg.dst_addr; + soff = doff = 0; + major_int = false; } - fsl_edma_fill_tcd(fsl_desc->tcd[i].vtcd, src_addr, dst_addr, + fsl_edma_fill_tcd(fsl_chan, fsl_desc->tcd[i].vtcd, src_addr, dst_addr, fsl_chan->attr, soff, nbytes, 0, iter, - iter, doff, last_sg, true, false, true); + iter, doff, last_sg, major_int, false, true); dma_buf_next += period_len; } @@ -568,23 +666,51 @@ struct dma_async_tx_descriptor *fsl_edma_prep_slave_sg( dst_addr = fsl_chan->dma_dev_addr; soff = fsl_chan->cfg.dst_addr_width; doff = 0; - } else { + } else if (direction == DMA_DEV_TO_MEM) { src_addr = fsl_chan->dma_dev_addr; dst_addr = sg_dma_address(sg); soff = 0; doff = fsl_chan->cfg.src_addr_width; + } else { + /* DMA_DEV_TO_DEV */ + src_addr = fsl_chan->cfg.src_addr; + dst_addr = fsl_chan->cfg.dst_addr; + soff = 0; + doff = 0; } + /* + * Choose the suitable burst length if sg_dma_len is not + * multiple of burst length so that the whole transfer length is + * multiple of minor loop(burst length). + */ + if (sg_dma_len(sg) % nbytes) { + u32 width = (direction == DMA_DEV_TO_MEM) ? doff : soff; + u32 burst = (direction == DMA_DEV_TO_MEM) ? + fsl_chan->cfg.src_maxburst : + fsl_chan->cfg.dst_maxburst; + int j; + + for (j = burst; j > 1; j--) { + if (!(sg_dma_len(sg) % (j * width))) { + nbytes = j * width; + break; + } + } + /* Set burst size as 1 if there's no suitable one */ + if (j == 1) + nbytes = width; + } iter = sg_dma_len(sg) / nbytes; if (i < sg_len - 1) { last_sg = fsl_desc->tcd[(i + 1)].ptcd; - fsl_edma_fill_tcd(fsl_desc->tcd[i].vtcd, src_addr, + fsl_edma_fill_tcd(fsl_chan, fsl_desc->tcd[i].vtcd, src_addr, dst_addr, fsl_chan->attr, soff, nbytes, 0, iter, iter, doff, last_sg, false, false, true); } else { last_sg = 0; - fsl_edma_fill_tcd(fsl_desc->tcd[i].vtcd, src_addr, + fsl_edma_fill_tcd(fsl_chan, fsl_desc->tcd[i].vtcd, src_addr, dst_addr, fsl_chan->attr, soff, nbytes, 0, iter, iter, doff, last_sg, true, true, false); @@ -609,7 +735,7 @@ struct dma_async_tx_descriptor *fsl_edma_prep_memcpy(struct dma_chan *chan, fsl_chan->is_sw = true; /* To match with copy_align and max_seg_size so 1 tcd is enough */ - fsl_edma_fill_tcd(fsl_desc->tcd[0].vtcd, dma_src, dma_dst, + fsl_edma_fill_tcd(fsl_chan, fsl_desc->tcd[0].vtcd, dma_src, dma_dst, fsl_edma_get_tcd_attr(DMA_SLAVE_BUSWIDTH_32_BYTES), 32, len, 0, 1, 1, 32, 0, true, true, false); diff --git a/drivers/dma/fsl-edma-common.h b/drivers/dma/fsl-edma-common.h index cfc41915eaa1..d4ac2644654e 100644 --- a/drivers/dma/fsl-edma-common.h +++ b/drivers/dma/fsl-edma-common.h @@ -42,6 +42,11 @@ #define EDMA_TCD_CSR_ACTIVE BIT(6) #define EDMA_TCD_CSR_DONE BIT(7) +#define EDMA_V3_TCD_NBYTES_MLOFF_NBYTES(x) ((x) & GENMASK(9, 0)) +#define EDMA_V3_TCD_NBYTES_MLOFF(x) (x << 10) +#define EDMA_V3_TCD_NBYTES_DMLOE (1 << 30) +#define EDMA_V3_TCD_NBYTES_SMLOE (1 << 31) + #define EDMAMUX_CHCFG_DIS 0x0 #define EDMAMUX_CHCFG_ENBL 0x80 #define EDMAMUX_CHCFG_SOURCE(n) ((n) & 0x3F) @@ -54,6 +59,15 @@ BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) | \ BIT(DMA_SLAVE_BUSWIDTH_4_BYTES) | \ BIT(DMA_SLAVE_BUSWIDTH_8_BYTES)) + +#define EDMA_V3_CH_SBR_RD BIT(22) +#define EDMA_V3_CH_SBR_WR BIT(21) +#define EDMA_V3_CH_CSR_ERQ BIT(0) +#define EDMA_V3_CH_CSR_EARQ BIT(1) +#define EDMA_V3_CH_CSR_EEI BIT(2) +#define EDMA_V3_CH_CSR_DONE BIT(30) +#define EDMA_V3_CH_CSR_ACTIVE BIT(31) + enum fsl_edma_pm_state { RUNNING = 0, SUSPENDED, @@ -73,6 +87,18 @@ struct fsl_edma_hw_tcd { __le16 biter; }; +struct fsl_edma3_ch_reg { + __le32 ch_csr; + __le32 ch_es; + __le32 ch_int; + __le32 ch_sbr; + __le32 ch_pri; + __le32 ch_mux; + __le32 ch_mattr; /* edma4, reserved for edma3 */ + __le32 ch_reserved; + struct fsl_edma_hw_tcd tcd; +} __packed; + /* * These are iomem pointers, for both v32 and v64. */ @@ -119,6 +145,18 @@ struct fsl_edma_chan { enum dma_data_direction dma_dir; char chan_name[32]; struct fsl_edma_hw_tcd __iomem *tcd; + u32 real_count; + struct work_struct issue_worker; + struct platform_device *pdev; + struct device *pd_dev; + u32 srcid; + struct clk *clk; + int priority; + int hw_chanid; + int txirq; + bool is_rxchan; + bool is_remote; + bool is_multi_fifo; }; struct fsl_edma_desc { @@ -135,8 +173,30 @@ struct fsl_edma_desc { #define FSL_EDMA_DRV_CONFIG32 BIT(2) #define FSL_EDMA_DRV_WRAP_IO BIT(3) #define FSL_EDMA_DRV_EDMA64 BIT(4) +#define FSL_EDMA_DRV_HAS_PD BIT(5) +#define FSL_EDMA_DRV_HAS_CHCLK BIT(6) +#define FSL_EDMA_DRV_HAS_CHMUX BIT(7) +/* imx8 QM audio edma remote local swapped */ +#define FSL_EDMA_DRV_QUIRK_SWAPPED BIT(8) +/* imx93 edma4 is AXI master */ +#define FSL_EDMA_DRV_AXI BIT(9) +/* control and status register is in tcd address space, edma3 reg layout */ +#define FSL_EDMA_DRV_SPLIT_REG BIT(10) +#define FSL_EDMA_DRV_BUS_8BYTE BIT(11) +#define FSL_EDMA_DRV_DEV_TO_DEV BIT(12) +#define FSL_EDMA_DRV_ALIGN_64BYTE BIT(13) + +#define FSL_EDMA_DRV_EDMA3 (FSL_EDMA_DRV_SPLIT_REG | \ + FSL_EDMA_DRV_BUS_8BYTE | \ + FSL_EDMA_DRV_DEV_TO_DEV | \ + FSL_EDMA_DRV_ALIGN_64BYTE) + +#define FSL_EDMA_DRV_EDMA4 (FSL_EDMA_DRV_EDMA3 | \ + FSL_EDMA_DRV_AXI) struct fsl_edma_drvdata { u32 dmamuxs; + u32 chreg_off; + u32 chreg_space_sz; u32 flags; int (*setup_irq)(struct platform_device *pdev, struct fsl_edma_engine *fsl_edma); @@ -148,6 +208,7 @@ struct fsl_edma_engine { void __iomem *muxbase[DMAMUX_NR]; struct clk *muxclk[DMAMUX_NR]; struct clk *dmaclk; + struct clk *chclk; struct mutex fsl_edma_mutex; const struct fsl_edma_drvdata *drvdata; u32 n_chans; @@ -155,6 +216,7 @@ struct fsl_edma_engine { int errirq; bool big_endian; struct edma_regs regs; + u64 chan_masked; struct fsl_edma_chan chans[]; }; @@ -168,6 +230,14 @@ struct fsl_edma_engine { edma_writel(chan->edma, (u32 __force)val, &chan->tcd->__name) : \ edma_writew(chan->edma, (u16 __force)val, &chan->tcd->__name)) +#define edma_readl_chreg(chan, __name) \ + edma_readl(chan->edma, \ + (void __iomem *)&(container_of(chan->tcd, struct fsl_edma3_ch_reg, tcd)->__name)) + +#define edma_writel_chreg(chan, val, __name) \ + edma_writel(chan->edma, val, \ + (void __iomem *)&(container_of(chan->tcd, struct fsl_edma3_ch_reg, tcd)->__name)) + /* * R/W functions for big- or little-endian registers: * The eDMA controller's endian is independent of the CPU core's endian. @@ -224,6 +294,11 @@ static inline struct fsl_edma_chan *to_fsl_edma_chan(struct dma_chan *chan) return container_of(chan, struct fsl_edma_chan, vchan.chan); } +static inline u32 fsl_edma_drvflags(struct fsl_edma_chan *fsl_chan) +{ + return fsl_chan->edma->drvdata->flags; +} + static inline struct fsl_edma_desc *to_fsl_edma_desc(struct virt_dma_desc *vd) { return container_of(vd, struct fsl_edma_desc, vdesc); diff --git a/drivers/dma/fsl-edma-main.c b/drivers/dma/fsl-edma-main.c index e5f42dd974e8..33339ade79a4 100644 --- a/drivers/dma/fsl-edma-main.c +++ b/drivers/dma/fsl-edma-main.c @@ -18,9 +18,15 @@ #include #include #include +#include +#include #include "fsl-edma-common.h" +#define ARGS_RX BIT(0) +#define ARGS_REMOTE BIT(1) +#define ARGS_MULTI_FIFO BIT(2) + static void fsl_edma_synchronize(struct dma_chan *chan) { struct fsl_edma_chan *fsl_chan = to_fsl_edma_chan(chan); @@ -47,6 +53,22 @@ static irqreturn_t fsl_edma_tx_handler(int irq, void *dev_id) return IRQ_HANDLED; } +static irqreturn_t fsl_edma3_tx_handler(int irq, void *dev_id) +{ + struct fsl_edma_chan *fsl_chan = dev_id; + unsigned int intr; + + intr = edma_readl_chreg(fsl_chan, ch_int); + if (!intr) + return IRQ_HANDLED; + + edma_writel_chreg(fsl_chan, 1, ch_int); + + fsl_edma_tx_chan_handler(fsl_chan); + + return IRQ_HANDLED; +} + static irqreturn_t fsl_edma_err_handler(int irq, void *dev_id) { struct fsl_edma_engine *fsl_edma = dev_id; @@ -108,6 +130,52 @@ static struct dma_chan *fsl_edma_xlate(struct of_phandle_args *dma_spec, return NULL; } +static struct dma_chan *fsl_edma3_xlate(struct of_phandle_args *dma_spec, + struct of_dma *ofdma) +{ + struct fsl_edma_engine *fsl_edma = ofdma->of_dma_data; + struct dma_chan *chan, *_chan; + struct fsl_edma_chan *fsl_chan; + int i; + + if (dma_spec->args_count != 3) + return NULL; + + mutex_lock(&fsl_edma->fsl_edma_mutex); + list_for_each_entry_safe(chan, _chan, &fsl_edma->dma_dev.channels, + device_node) { + + if (chan->client_count) + continue; + + fsl_chan = to_fsl_edma_chan(chan); + i = fsl_chan - fsl_edma->chans; + if (fsl_edma->drvdata->dmamuxs == 0 && i == dma_spec->args[0]) { + chan = dma_get_slave_channel(chan); + chan->device->privatecnt++; + fsl_chan->priority = dma_spec->args[1]; + fsl_chan->is_rxchan = dma_spec->args[2] & ARGS_RX; + fsl_chan->is_remote = dma_spec->args[2] & ARGS_REMOTE; + fsl_chan->is_multi_fifo = dma_spec->args[2] & ARGS_MULTI_FIFO; + mutex_unlock(&fsl_edma->fsl_edma_mutex); + return chan; + } else if ((fsl_edma->drvdata->dmamuxs || + (fsl_edma->drvdata->flags & FSL_EDMA_DRV_AXI)) && !fsl_chan->srcid) { + chan = dma_get_slave_channel(chan); + chan->device->privatecnt++; + fsl_chan->priority = dma_spec->args[1]; + fsl_chan->srcid = dma_spec->args[0]; + fsl_chan->is_rxchan = dma_spec->args[2] & ARGS_RX; + fsl_chan->is_remote = dma_spec->args[2] & ARGS_REMOTE; + fsl_chan->is_multi_fifo = dma_spec->args[2] & ARGS_MULTI_FIFO; + mutex_unlock(&fsl_edma->fsl_edma_mutex); + return chan; + } + } + mutex_unlock(&fsl_edma->fsl_edma_mutex); + return NULL; +} + static int fsl_edma_irq_init(struct platform_device *pdev, struct fsl_edma_engine *fsl_edma) { @@ -149,6 +217,37 @@ fsl_edma_irq_init(struct platform_device *pdev, struct fsl_edma_engine *fsl_edma return 0; } +static int fsl_edma3_irq_init(struct platform_device *pdev, struct fsl_edma_engine *fsl_edma) +{ + int ret; + int i; + + for (i = 0; i < fsl_edma->n_chans; i++) { + + struct fsl_edma_chan *fsl_chan = &fsl_edma->chans[i]; + + if (fsl_edma->chan_masked & BIT(i)) + continue; + + /* request channel irq */ + fsl_chan->txirq = platform_get_irq(pdev, i); + if (fsl_chan->txirq < 0) { + dev_err(&pdev->dev, "Can't get chan %d's irq.\n", i); + return -EINVAL; + } + + ret = devm_request_irq(&pdev->dev, fsl_chan->txirq, + fsl_edma3_tx_handler, IRQF_SHARED, + fsl_chan->chan_name, fsl_chan); + if (ret) { + dev_err(&pdev->dev, "Can't register chan%d's IRQ.\n", i); + return -EINVAL; + } + } + + return 0; +} + static int fsl_edma2_irq_init(struct platform_device *pdev, struct fsl_edma_engine *fsl_edma) @@ -202,29 +301,115 @@ static void fsl_disable_clocks(struct fsl_edma_engine *fsl_edma, int nr_clocks) static struct fsl_edma_drvdata vf610_data = { .dmamuxs = DMAMUX_NR | FSL_EDMA_DRV_WRAP_IO, + .dmamuxs = DMAMUX_NR, + .chreg_off = EDMA_TCD, + .chreg_space_sz = sizeof(struct fsl_edma_hw_tcd), .setup_irq = fsl_edma_irq_init, }; static struct fsl_edma_drvdata ls1028a_data = { .dmamuxs = DMAMUX_NR, .flags = FSL_EDMA_DRV_MUX_SWAP | FSL_EDMA_DRV_WRAP_IO, + .chreg_off = EDMA_TCD, + .chreg_space_sz = sizeof(struct fsl_edma_hw_tcd), .setup_irq = fsl_edma_irq_init, }; static struct fsl_edma_drvdata imx7ulp_data = { .dmamuxs = 1, + .chreg_off = EDMA_TCD, + .chreg_space_sz = sizeof(struct fsl_edma_hw_tcd), .flags = FSL_EDMA_DRV_HAS_DMACLK | FSL_EDMA_DRV_CONFIG32, .setup_irq = fsl_edma2_irq_init, }; +static struct fsl_edma_drvdata imx8qm_data = { + .flags = FSL_EDMA_DRV_HAS_CHMUX | FSL_EDMA_DRV_HAS_PD + | FSL_EDMA_DRV_EDMA3, + .chreg_space_sz = 0x10000, + .chreg_off = 0x10000, + .setup_irq = fsl_edma3_irq_init, +}; + +static struct fsl_edma_drvdata imx8qm_audio_data = { + .flags = FSL_EDMA_DRV_HAS_CHMUX | FSL_EDMA_DRV_QUIRK_SWAPPED | + FSL_EDMA_DRV_HAS_PD | FSL_EDMA_DRV_EDMA3, + .chreg_space_sz = 0x10000, + .chreg_off = 0x10000, + .setup_irq = fsl_edma3_irq_init, +}; + +static struct fsl_edma_drvdata imx93_data3 = { + .flags = FSL_EDMA_DRV_HAS_CHMUX | FSL_EDMA_DRV_HAS_DMACLK + | FSL_EDMA_DRV_EDMA3, + .chreg_space_sz = 0x10000, + .chreg_off = 0x10000, + .setup_irq = fsl_edma3_irq_init, +}; + +static struct fsl_edma_drvdata imx93_data4 = { + .flags = FSL_EDMA_DRV_HAS_CHMUX | FSL_EDMA_DRV_HAS_DMACLK + | FSL_EDMA_DRV_EDMA4, + .chreg_space_sz = 0x8000, + .chreg_off = 0x10000, + .setup_irq = fsl_edma3_irq_init, +}; + static const struct of_device_id fsl_edma_dt_ids[] = { { .compatible = "fsl,vf610-edma", .data = &vf610_data}, { .compatible = "fsl,ls1028a-edma", .data = &ls1028a_data}, { .compatible = "fsl,imx7ulp-edma", .data = &imx7ulp_data}, + { .compatible = "fsl,imx8qm-edma", .data = &imx8qm_data}, + { .compatible = "fsl,imx8qm-adma", .data = &imx8qm_audio_data}, + { .compatible = "fsl,imx93-edma3", .data = &imx93_data3}, + { .compatible = "fsl,imx93-edma4", .data = &imx93_data4}, { /* sentinel */ } }; + MODULE_DEVICE_TABLE(of, fsl_edma_dt_ids); +static int fsl_edma3_attach_pd(struct platform_device *pdev, struct fsl_edma_engine *fsl_edma) +{ + struct fsl_edma_chan *fsl_chan; + struct device_link *link; + struct device *pd_chan; + struct device *dev; + int i; + + dev = &pdev->dev; + + for (i = 0; i < fsl_edma->n_chans; i++) { + if (fsl_edma->chan_masked & BIT(i)) + continue; + + fsl_chan = &fsl_edma->chans[i]; + + pd_chan = dev_pm_domain_attach_by_id(dev, i); + if (IS_ERR_OR_NULL(pd_chan)) { + dev_err(dev, "Failed attach pd %d\n", i); + return -EINVAL; + } + + link = device_link_add(dev, pd_chan, DL_FLAG_STATELESS | + DL_FLAG_PM_RUNTIME | + DL_FLAG_RPM_ACTIVE); + if (IS_ERR(link)) { + dev_err(dev, "Failed to add device_link to %d: %ld\n", i, + PTR_ERR(link)); + return -EINVAL; + } + + fsl_chan->pd_dev = pd_chan; + + pm_runtime_use_autosuspend(fsl_chan->pd_dev); + pm_runtime_set_autosuspend_delay(fsl_chan->pd_dev, 200); + pm_runtime_set_active(fsl_chan->pd_dev); + //pm_runtime_put_sync_suspend(fsl_chan->pd_dev); + } + + return 0; +} + static int fsl_edma_probe(struct platform_device *pdev) { const struct of_device_id *of_id = @@ -263,8 +448,10 @@ static int fsl_edma_probe(struct platform_device *pdev) if (IS_ERR(fsl_edma->membase)) return PTR_ERR(fsl_edma->membase); - fsl_edma_setup_regs(fsl_edma); - regs = &fsl_edma->regs; + if (!(drvdata->flags & FSL_EDMA_DRV_SPLIT_REG)) { + fsl_edma_setup_regs(fsl_edma); + regs = &fsl_edma->regs; + } if (drvdata->flags & FSL_EDMA_DRV_HAS_DMACLK) { fsl_edma->dmaclk = devm_clk_get_enabled(&pdev->dev, "dma"); @@ -274,6 +461,17 @@ static int fsl_edma_probe(struct platform_device *pdev) } } + if (drvdata->flags & FSL_EDMA_DRV_HAS_CHCLK) { + fsl_edma->chclk = devm_clk_get_enabled(&pdev->dev, "mp"); + if (IS_ERR(fsl_edma->chclk)) { + dev_err(&pdev->dev, "Missing MP block clock.\n"); + return PTR_ERR(fsl_edma->chclk); + } + } + + if (of_property_read_u64(np, "fsl,channel-mask", &fsl_edma->chan_masked)) + fsl_edma->chan_masked = 0; + for (i = 0; i < fsl_edma->drvdata->dmamuxs; i++) { char clkname[32]; @@ -296,9 +494,18 @@ static int fsl_edma_probe(struct platform_device *pdev) fsl_edma->big_endian = of_property_read_bool(np, "big-endian"); + if (drvdata->flags & FSL_EDMA_DRV_HAS_PD) { + ret = fsl_edma3_attach_pd(pdev, fsl_edma); + if (ret) + return ret; + } + INIT_LIST_HEAD(&fsl_edma->dma_dev.channels); for (i = 0; i < fsl_edma->n_chans; i++) { - struct fsl_edma_chan *fsl_chan = &fsl_edma->chans[i]; + fsl_chan = &fsl_edma->chans[i]; + + if (fsl_edma->chan_masked & BIT(i)) + continue; snprintf(fsl_chan->chan_name, sizeof(fsl_chan->chan_name), "%s-CH%02d", dev_name(&pdev->dev), i); @@ -309,12 +516,19 @@ static int fsl_edma_probe(struct platform_device *pdev) fsl_chan->idle = true; fsl_chan->dma_dir = DMA_NONE; fsl_chan->vchan.desc_free = fsl_edma_free_desc; - fsl_chan->tcd = fsl_edma->membase + EDMA_TCD - + i * sizeof(struct fsl_edma_hw_tcd); + + len = (drvdata->flags & FSL_EDMA_DRV_SPLIT_REG) ? + offsetof(struct fsl_edma3_ch_reg, tcd) : 0; + fsl_chan->tcd = fsl_edma->membase + + i * drvdata->chreg_space_sz + drvdata->chreg_off + len; + + fsl_chan->pdev = pdev; vchan_init(&fsl_chan->vchan, &fsl_edma->dma_dev); edma_write_tcdreg(fsl_chan, 0, csr); - fsl_edma_chan_mux(fsl_chan, 0, false); + + if (drvdata->dmamuxs) + fsl_edma_chan_mux(fsl_chan, 0, false); } ret = fsl_edma->drvdata->setup_irq(pdev, fsl_edma); @@ -344,12 +558,25 @@ static int fsl_edma_probe(struct platform_device *pdev) fsl_edma->dma_dev.src_addr_widths = FSL_EDMA_BUSWIDTHS; fsl_edma->dma_dev.dst_addr_widths = FSL_EDMA_BUSWIDTHS; + + if (drvdata->flags & FSL_EDMA_DRV_BUS_8BYTE) { + fsl_edma->dma_dev.src_addr_widths |= BIT(DMA_SLAVE_BUSWIDTH_8_BYTES); + fsl_edma->dma_dev.dst_addr_widths |= BIT(DMA_SLAVE_BUSWIDTH_8_BYTES); + } + fsl_edma->dma_dev.directions = BIT(DMA_DEV_TO_MEM) | BIT(DMA_MEM_TO_DEV); + if (drvdata->flags & FSL_EDMA_DRV_DEV_TO_DEV) + fsl_edma->dma_dev.directions |= BIT(DMA_DEV_TO_DEV); + + fsl_edma->dma_dev.copy_align = drvdata->flags & FSL_EDMA_DRV_ALIGN_64BYTE ? + DMAENGINE_ALIGN_64_BYTES : + DMAENGINE_ALIGN_32_BYTES; - fsl_edma->dma_dev.copy_align = DMAENGINE_ALIGN_32_BYTES; /* Per worst case 'nbytes = 1' take CITER as the max_seg_size */ dma_set_max_seg_size(fsl_edma->dma_dev.dev, 0x3fff); + fsl_edma->dma_dev.residue_granularity = DMA_RESIDUE_GRANULARITY_SEGMENT; + platform_set_drvdata(pdev, fsl_edma); ret = dma_async_device_register(&fsl_edma->dma_dev); @@ -359,7 +586,9 @@ static int fsl_edma_probe(struct platform_device *pdev) return ret; } - ret = of_dma_controller_register(np, fsl_edma_xlate, fsl_edma); + ret = of_dma_controller_register(np, + drvdata->flags & FSL_EDMA_DRV_SPLIT_REG ? fsl_edma3_xlate : fsl_edma_xlate, + fsl_edma); if (ret) { dev_err(&pdev->dev, "Can't register Freescale eDMA of_dma. (%d)\n", ret); @@ -368,7 +597,8 @@ static int fsl_edma_probe(struct platform_device *pdev) } /* enable round robin arbitration */ - edma_writel(fsl_edma, EDMA_CR_ERGA | EDMA_CR_ERCA, regs->cr); + if (!(drvdata->flags & FSL_EDMA_DRV_SPLIT_REG)) + edma_writel(fsl_edma, EDMA_CR_ERGA | EDMA_CR_ERCA, regs->cr); return 0; } From patchwork Thu Jun 1 14:41:07 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Li X-Patchwork-Id: 688460 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2C5A1C7EE2A for ; Thu, 1 Jun 2023 14:43:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234474AbjFAOnu (ORCPT ); Thu, 1 Jun 2023 10:43:50 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58026 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233644AbjFAOnt (ORCPT ); Thu, 1 Jun 2023 10:43:49 -0400 Received: from EUR02-AM0-obe.outbound.protection.outlook.com (mail-am0eur02on2066.outbound.protection.outlook.com [40.107.247.66]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7ACBCE69; Thu, 1 Jun 2023 07:43:19 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=MjHF3pkxJjjFXUwlqB3mtrKj7zPwfrbIFRxiod5mNT5dDI80ga2Dkjt2tY36yp6Z1+O/tEOGNf1D1bwSg4f6tE15NsbQQKIsZY4JvDbLFuStmMWcuFfuMG5kRsR++HgrxO2FtEiEZcv+l/1XkLo1/LFyT/4g5Y9Cqudq6uUjz6EO4HJvPgaUP7bB9DmLj8DsQNda+JQnN8jZI+XhfRrHhwB9ceMO8qDz8k8Ufn2PpKALhtvC1S6biObLOIOgBjppCfZvVm3M+9jlvSbgtNNQ6Kvjov5yg737amiryVYnAZ1cqWZMR/9KbtRU4BZl9Blpoxv2VfkQ5Zp6ptTWWOd3vA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=aexRpy1zCiiR3f+59/SC3MzOraIeaGk0ihwt86WSIcs=; b=ahQM+2UftlkPtQR/++hmneBlB1Eu+Xx/9RARtNq9KMhK/5CjpExQEJDnqHXNQLZBaS10IRI57Dot/Foe7P6tv7plHPZYNkexeIx4UbvJXtTyNgU+3PjYkRAC9SZ8YxHZiTdSJvD1yiiI8i6rfxF3rMXcjvF/gXSYQqWIY+AwMpaAaSGkCzBYz2026ANKIqDC7k/kNUKE2FxO1iSQuiYJcwzYFblqV8lHQf46PEpL49oOk68Y760dtQTNeWmNszlGvRGRYVJtR1kfxMbqW26MQyuZnKWTWdsJjGitV2AH2U1Wp1e6YGj4GZPo+efO5K9uCi0J7bLgkf5nWLQlBzhzsw== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=nxp.com; dmarc=pass action=none header.from=nxp.com; dkim=pass header.d=nxp.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=aexRpy1zCiiR3f+59/SC3MzOraIeaGk0ihwt86WSIcs=; b=V0TBWnaAW9fxAc2JpmOxr/VYIK4BDPvpHqCM8tObkExAErQ5hll6ClF7j11oyIbn19kZgLpp4OtpOyyN4bijpnWOTrKJUjgvxMgc2/UcAoRX4WGOq1Vd86AnFK6s6yK4P0NBLtd3iycpCd0gPMiBZJYzIsNF3RqmkgS13qEi5Mo= Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=nxp.com; Received: from AM6PR04MB4838.eurprd04.prod.outlook.com (2603:10a6:20b:4::16) by VI1PR04MB6944.eurprd04.prod.outlook.com (2603:10a6:803:133::14) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6433.24; Thu, 1 Jun 2023 14:42:01 +0000 Received: from AM6PR04MB4838.eurprd04.prod.outlook.com ([fe80::4a2a:262e:415f:e41c]) by AM6PR04MB4838.eurprd04.prod.outlook.com ([fe80::4a2a:262e:415f:e41c%7]) with mapi id 15.20.6433.024; Thu, 1 Jun 2023 14:42:01 +0000 From: Frank Li To: vkoul@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, dmaengine@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, peng.fan@nxp.com, joy.zou@nxp.com, shenwei.wang@nxp.com, imx@lists.linux.dev Subject: [PATCH v3 12/12] dt-bindings: fsl-dma: fsl-edma: add edma3 compatible string Date: Thu, 1 Jun 2023 10:41:07 -0400 Message-Id: <20230601144107.1636833-13-Frank.Li@nxp.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230601144107.1636833-1-Frank.Li@nxp.com> References: <20230601144107.1636833-1-Frank.Li@nxp.com> X-ClientProxiedBy: SJ0PR03CA0130.namprd03.prod.outlook.com (2603:10b6:a03:33c::15) To AM6PR04MB4838.eurprd04.prod.outlook.com (2603:10a6:20b:4::16) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: AM6PR04MB4838:EE_|VI1PR04MB6944:EE_ X-MS-Office365-Filtering-Correlation-Id: 6d118bb7-75c3-40d2-d290-08db62ae5c32 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 9lFZnhMsm2V9eDvW3rcyb57J2mNaGOm9T2SVn8Fr+w4aB1+AQ1NvaqrHlIdXhqIxHMCosAgUJmy1L/V6a5XCmiJZqYzdf1OJafsKjbbRimR1aGZxsBbhN6+FqVTj+IRjEe1cih7zRL/FKGmM7LKpVrRMpkUtR29x61VQSvLvlBxbX0Rx2kD1icPDcgjBTYUVxE0gZmCai7hX74qEg333wxlbMdHuYoaun5CZuju6lwfL70XF0uu9dqAd5GaFrVlEEp6kvI9VToz1wPZNBffF8hUzAFYMTyLBEXRTJH5LGi4+RxLe/dKJ5VcImO5aVCdPVRJ3n9jBtvCc3UWtCtvGr4YMs2D4OlLhbU0HHrveKLnnewBSwDvtAEWU5Bj14AmJ0/PlYxALsU8R1tGIbhsDsp9iOiPY3POA6GHq1y0CePXWu6+AD50z6eXwwAwHJT52uSfMKa+1eZnVBEp6XLKb3h+gNyevsFT+MCLQ4JtRWFzkEcEQPQRJyLjo5vVFdA7ggJahyGrOV1jbhCayLAT8GSkx48K0DI2y5JLSMxF4TbinO6/YfY0Zpz8UGN9x6qyYjQ8tF4gn8+30KujG+2zMIrUJBmqu6Gjsrdnfnm43iYuTAJZW48mWUnDNAeTiAKADI70ZNMkkW0cbNWT9sedTQQ== X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:AM6PR04MB4838.eurprd04.prod.outlook.com; PTR:; CAT:NONE; SFS:(13230028)(4636009)(376002)(346002)(396003)(39860400002)(136003)(366004)(451199021)(8936002)(83380400001)(2616005)(186003)(66476007)(316002)(52116002)(6486002)(66946007)(478600001)(66556008)(1076003)(6512007)(26005)(6506007)(5660300002)(8676002)(41300700001)(2906002)(921005)(38100700002)(38350700002)(36756003)(86362001); DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: MIDdam+q76H03la6vpJwHjzi3nQ+W5Sg7ZS4h5bS9xPpZ36mJRL9Tgh3/z0e2P8DRJt47nfytuWBe5p3PmLC+oXsk3x3Gmgfr3G1N+qtlGLoSTI5bMw/DZNYqNfs8/nlktirPYfD5C58dVMQ8Uy7tChIboucStw2nx2lDqeYp7ocalEAbyoCWb79EEFhUDAfl9lROwAk48GvuOvNWIddFzqHQVJUx9USezEjH9IMuX1Kq83Ou0HZmvlPDoOJz0aZshWxJ+M74Khl7ZDPEdhe2uOBC11c0UF9ForHnvYK1uJv0mzfmD0HigvPLWjGypldJv+B836iGmUGpEuGN3AGYXyC9+AoYPbTRsiBx3ZU1wm1cxUipDCUCUXkgo3Fa2MI86jHTZwPuiZVeODBQRWHNH8f5E5reCNJnxIuxxX3udnm0Og48qosNdrzARYxdDHG2e6peZY1gO/HfqfOUlZ5c31Ovyp+gixMKeHcP2syxVjWZbeXXda7XqHXpBxll2Vj7813CItt2/xh7R9S74+eLfZ2yq3Y/Xdc6TtGsF1Jo0PRerGLxnxR6FW0PdczYFeznrqpdFH5jVp9S6j6mzXYMXMHXZ0Awf5vy4iepcVAwhm/yHQKVMsWNLIIVEzTzaidSvq5SQQeMcR80+ZkTJdjrhm49Cl+JeLCcmo5/IIUZUKplDVoj33IgItS0dC4mi+iCUJIXJAccTMIlZ1EiHCZp23zmnV/qX02N54Nv3MLE4jjjZyKgp9hXQm5+gFA7vvOu+ZkFkjIpc+TUjB3zN13akoRnVoIse90sj2Ec/leFYYijpavnpLoPrkdDaNAPxNol1GNDsbeQD0VzmYLWm/gUoCfSvK3T0nBOm3PC69yflqd44qoQnAYW+lA/TnAu0wuYc/Z+dY+Lob2uOfdSAO6NAdjQgpeRAwFK8tVnfE4s2lRxQHgVG7KX6iAkFiB57NoI5S2GyPPam3/OpK6Y2fezlbtUF+3YeTkt1m5yQzMdpT9XPRbdD4uzDi+EL2oFcZfdXQv8H/xKWVMxkaaLHaioZ+tVefLyoeaCpthO1b7PrYnIi8SvqJHy90eoEBQoam3xB+FvMuZstoWuKQ8GgM6gSZangC96SMTex3NHWUYHiJHwy9iakhcy6aBwTrZSN4kj4SNFbSzJrrHbGoDSOeHKbkcG/fs0uNRBeRPxmL4JfzGrrff10HicDq1EWNN40osIbANbYKM5xE5dZv1kntjQtWyVk5Eg9SfSYlr92hiOotBI6TxO46g3/A+n63VWAdLmIsDK1ThwtOmw9zezj1/UCoVVjoIBseOjFIrFg9L8oIqDM/v3Z5Lre62URtd8STgELkI3QKF7VcclwTgxbYXGNte5ZYODMvrqpp8ycy5eV/6N6q2Pxk2JgD2rFhqmJWUd/yOwQNRgPI2QHhgP9Tz5gu9xNBog5ukNW93wwZOPVA1SSVijEWYIDBUFCEYdDeehZ3Ks4QaUFXSlgRAngfCJz5UaJH92FjkQl1DemjUUARjgfvLL1Awk/u1gv9F274mkhPP+q8moh+1qhZr+nOxg1wuVc59pMfS/z7TMBSPFaplAei4lfSTu4mXNh9+iDZ6 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 6d118bb7-75c3-40d2-d290-08db62ae5c32 X-MS-Exchange-CrossTenant-AuthSource: AM6PR04MB4838.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Jun 2023 14:42:01.6598 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: QXBPf3oA9b6qCYiEsArpNjOZlP0tgHPvWrmyYpcx52dRY4zjp/83uVp/h1da5y/bavlkZ8wynwW1kHDsemPFRg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR04MB6944 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Extend Freescale eDMA driver bindings to support eDMA3 IP blocks in i.MX8QM and i.MX8QXP SoCs. In i.MX93, both eDMA3 and eDMA4 are now. Signed-off-by: Frank Li --- .../devicetree/bindings/dma/fsl,edma.yaml | 28 +++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/Documentation/devicetree/bindings/dma/fsl,edma.yaml b/Documentation/devicetree/bindings/dma/fsl,edma.yaml index 5fd8fc604261..ec0fe8735ec7 100644 --- a/Documentation/devicetree/bindings/dma/fsl,edma.yaml +++ b/Documentation/devicetree/bindings/dma/fsl,edma.yaml @@ -21,6 +21,10 @@ properties: - enum: - fsl,vf610-edma - fsl,imx7ulp-edma + - fsl,imx8qm-edma + - fsl,imx8qm-adma + - fsl,imx93-edma3 + - fsl,imx93-edma4 - items: - const: fsl,ls1028a-edma - const: fsl,vf610-edma @@ -49,6 +53,10 @@ properties: clock-names: maxItems: 2 + fsl,channel-mask: + $ref: /schemas/types.yaml#/definitions/uint64 + description: A bitmask lets you skip certain channel. + big-endian: description: | If present registers and hardware scatter/gather descriptors of the @@ -101,6 +109,26 @@ allOf: reg: maxItems: 2 + - if: + properties: + compatible: + contains: + anyOf: + - const: fsl,imx8qm-edma + - const: fsl,imx8qm-adma + - const: fsl,imx93-edma3 + - const: fsl,imx93-edma4 + then: + properties: + reg: + maxItems: 1 + interrupts: + minItems: 1 + maxItems: 64 + interrupt-names: + minItems: 1 + maxItems: 64 + unevaluatedProperties: false examples: