From patchwork Fri Jun 2 18:26:57 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Detlev Casanova X-Patchwork-Id: 688364 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 27E6DC7EE2A for ; Fri, 2 Jun 2023 18:27:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236644AbjFBS1M (ORCPT ); Fri, 2 Jun 2023 14:27:12 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41742 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236128AbjFBS1L (ORCPT ); Fri, 2 Jun 2023 14:27:11 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0ED1018C; Fri, 2 Jun 2023 11:27:10 -0700 (PDT) Received: from arisu.hitronhub.home (unknown [23.233.251.139]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: detlev) by madras.collabora.co.uk (Postfix) with ESMTPSA id 442146606ED9; Fri, 2 Jun 2023 19:27:07 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1685730428; bh=Bhe0llT4DF8ZqHEPdTT4fQ2FZEjkEvA9p05FaGSuRXs=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=O6YWzhwuoHa0va1FR4AvEuwCw7FFiMWU9MoNvKXcKDqu80zNoLdWl3i8xSDl0Vf4S 0B3K8Ccml1Ures4OmFJA+w70k88KLkaRG3ZNlXpxezTY+AHzOzWhyIYkIDZDSA6h8u 0molKGU8pboV1HaXp2jME9vmrJ2EG2ySAoqlaTGDNVRSDJVZ9jLadn1Ot2mYm5Sz1g nV94/UlyPf9Nx2lxU1o54WQTAKn/MCCviN3jarDSbd8he4PHUTT038Vwwh3iwAA7nV /mJWENaNJScN+jc9+ZVUOBjXrmEqNvyMDbcGrDa9uS1hK3vlSfa/2nPGT0Rd1OWoo6 jlHL3lQ2Gi2Tw== From: Detlev Casanova To: linux-kernel@vger.kernel.org Cc: Andrew Lunn , Heiner Kallweit , Russell King , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Florian Fainelli , netdev@vger.kernel.org, devicetree@vger.kernel.org, Detlev Casanova Subject: [PATCH v2 1/3] net: phy: realtek: Add optional external PHY clock Date: Fri, 2 Jun 2023 14:26:57 -0400 Message-Id: <20230602182659.307876-2-detlev.casanova@collabora.com> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20230602182659.307876-1-detlev.casanova@collabora.com> References: <20230602182659.307876-1-detlev.casanova@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org In some cases, the PHY can use an external clock source instead of a crystal. Add an optional clock in the phy node to make sure that the clock source is enabled, if specified, before probing. Signed-off-by: Detlev Casanova Reviewed-by: Andrew Lunn Reviewed-by: Florian Fainelli --- drivers/net/phy/realtek.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c index 3d99fd6664d7..b13dd0b3c99e 100644 --- a/drivers/net/phy/realtek.c +++ b/drivers/net/phy/realtek.c @@ -12,6 +12,7 @@ #include #include #include +#include #define RTL821x_PHYSR 0x11 #define RTL821x_PHYSR_DUPLEX BIT(13) @@ -80,6 +81,7 @@ struct rtl821x_priv { u16 phycr1; u16 phycr2; bool has_phycr2; + struct clk *clk; }; static int rtl821x_read_page(struct phy_device *phydev) @@ -103,6 +105,11 @@ static int rtl821x_probe(struct phy_device *phydev) if (!priv) return -ENOMEM; + priv->clk = devm_clk_get_optional_enabled(dev, NULL); + if (IS_ERR(priv->clk)) + return dev_err_probe(dev, PTR_ERR(priv->clk), + "failed to get phy clock\n"); + ret = phy_read_paged(phydev, 0xa43, RTL8211F_PHYCR1); if (ret < 0) return ret; From patchwork Fri Jun 2 18:26:58 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Detlev Casanova X-Patchwork-Id: 688848 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 91D59C77B7A for ; Fri, 2 Jun 2023 18:27:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236922AbjFBS1Q (ORCPT ); Fri, 2 Jun 2023 14:27:16 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41790 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236683AbjFBS1P (ORCPT ); Fri, 2 Jun 2023 14:27:15 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 64514197; Fri, 2 Jun 2023 11:27:14 -0700 (PDT) Received: from arisu.hitronhub.home (unknown [23.233.251.139]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: detlev) by madras.collabora.co.uk (Postfix) with ESMTPSA id A496E6606EDB; Fri, 2 Jun 2023 19:27:11 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1685730433; bh=REGo3CnEZr8k3Pj3f3Ta8sWqzV48U3ofkXaqmmNacG0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=WDs2E0+bFDhWw3ZV2myS9tqjwM9WlcLQivKYCKidl34qu6k8NeF7Iwfg1+LEomvpG aBEJRh4aKGLEKk6lK5UlYr1HWmKhsZNkL5CAAHggpwx+LZVS7CSvL5mRX7wBuhQfvi eGJmim4+YaMYR7ve5IMHyeUAPvcFYA/bNRnCrNGZ98y0nEE2pKT1L02210ttPdGO4A 8hV7/2gtauAxPnP66F9hoqFmeWap7qq+3qWwbi8Tb3T0Z72quusuk2DpquvarXIBcZ UEOPUuHzx1+9QajLEmPSYDeHO0FIZPsPVmmU0yProAUBf+c1U4QewaLIcmZu1Ll7C9 BN+/TYuUwoNCA== From: Detlev Casanova To: linux-kernel@vger.kernel.org Cc: Andrew Lunn , Heiner Kallweit , Russell King , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Florian Fainelli , netdev@vger.kernel.org, devicetree@vger.kernel.org, Detlev Casanova Subject: [PATCH v2 2/3] dt-bindings: net: phy: Document support for external PHY clk Date: Fri, 2 Jun 2023 14:26:58 -0400 Message-Id: <20230602182659.307876-3-detlev.casanova@collabora.com> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20230602182659.307876-1-detlev.casanova@collabora.com> References: <20230602182659.307876-1-detlev.casanova@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Ethern PHYs can have external an clock that needs to be activated before probing the PHY. Signed-off-by: Detlev Casanova Acked-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/net/ethernet-phy.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/net/ethernet-phy.yaml b/Documentation/devicetree/bindings/net/ethernet-phy.yaml index 4f574532ee13..c1241c8a3b77 100644 --- a/Documentation/devicetree/bindings/net/ethernet-phy.yaml +++ b/Documentation/devicetree/bindings/net/ethernet-phy.yaml @@ -93,6 +93,12 @@ properties: the turn around line low at end of the control phase of the MDIO transaction. + clocks: + maxItems: 1 + description: + External clock connected to the PHY. If not specified it is assumed + that the PHY uses a fixed crystal or an internal oscillator. + enet-phy-lane-swap: $ref: /schemas/types.yaml#/definitions/flag description: From patchwork Fri Jun 2 18:26:59 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Detlev Casanova X-Patchwork-Id: 688363 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 054A1C77B7A for ; Fri, 2 Jun 2023 18:27:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236683AbjFBS1Z (ORCPT ); Fri, 2 Jun 2023 14:27:25 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41928 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236979AbjFBS1U (ORCPT ); Fri, 2 Jun 2023 14:27:20 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E166F1A1; Fri, 2 Jun 2023 11:27:17 -0700 (PDT) Received: from arisu.hitronhub.home (unknown [23.233.251.139]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: detlev) by madras.collabora.co.uk (Postfix) with ESMTPSA id 948CA66066EC; Fri, 2 Jun 2023 19:27:14 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1685730436; bh=ZLEeIR50lMA4Zexpu6tsdlrk0GQ6B9wGBAwmZZ5+nBU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=cHFb6YigBps31nHN8ucOR8VffHmwPLTr74QCMlVGEABblrqUzMl6VQr6IkbQ/iCWY vvAYul+ZgiV4CSD2mu0/meAgNSa0X5rXVxV6VBOyFnLotq7yrlkjuDkRTPE7sEY0JB OE27nIMIgEfCgLBthRBfvWegwyaXbQdhRf1xVb1gjlyGM+f7FyW69AN7Nd3XYbjwHo AC5i3xOxycajsKV1U9hsFezlU90YJEZ7SK9oq43FO7+SGQvUkyM0e/Bdz4cJSSvyL4 26eOi14gAx1ZCLotL5ATwT+KJBV57ps7ZJGpnNQE7L3vvRCF/ghsDucj/Yv/Hq2N+q 6/5UJ0QqaTA7Q== From: Detlev Casanova To: linux-kernel@vger.kernel.org Cc: Andrew Lunn , Heiner Kallweit , Russell King , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Florian Fainelli , netdev@vger.kernel.org, devicetree@vger.kernel.org, Detlev Casanova Subject: [PATCH v2 3/3] net: phy: realtek: Disable clock on suspend Date: Fri, 2 Jun 2023 14:26:59 -0400 Message-Id: <20230602182659.307876-4-detlev.casanova@collabora.com> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20230602182659.307876-1-detlev.casanova@collabora.com> References: <20230602182659.307876-1-detlev.casanova@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org For PHYs that call rtl821x_probe() where an external clock can be configured, make sure that the clock is disabled when ->suspend() is called and enabled on resume. The PHY_ALWAYS_CALL_SUSPEND is added to ensure that the suspend function is actually always called. Signed-off-by: Detlev Casanova --- drivers/net/phy/realtek.c | 24 ++++++++++++++++++++++-- 1 file changed, 22 insertions(+), 2 deletions(-) diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c index b13dd0b3c99e..62eac4835def 100644 --- a/drivers/net/phy/realtek.c +++ b/drivers/net/phy/realtek.c @@ -426,10 +426,28 @@ static int rtl8211f_config_init(struct phy_device *phydev) return genphy_soft_reset(phydev); } +static int rtl821x_suspend(struct phy_device *phydev) +{ + struct rtl821x_priv *priv = phydev->priv; + int ret = genphy_suspend(phydev); + + if (ret) + return ret; + + if (!phydev->wol_enabled) + clk_disable_unprepare(priv->clk); + + return ret; +} + static int rtl821x_resume(struct phy_device *phydev) { + struct rtl821x_priv *priv = phydev->priv; int ret; + if (!phydev->wol_enabled) + clk_prepare_enable(priv->clk); + ret = genphy_resume(phydev); if (ret < 0) return ret; @@ -934,10 +952,11 @@ static struct phy_driver realtek_drvs[] = { .read_status = rtlgen_read_status, .config_intr = &rtl8211f_config_intr, .handle_interrupt = rtl8211f_handle_interrupt, - .suspend = genphy_suspend, + .suspend = rtl821x_suspend, .resume = rtl821x_resume, .read_page = rtl821x_read_page, .write_page = rtl821x_write_page, + .flags = PHY_ALWAYS_CALL_SUSPEND, }, { PHY_ID_MATCH_EXACT(RTL_8211FVD_PHYID), .name = "RTL8211F-VD Gigabit Ethernet", @@ -946,10 +965,11 @@ static struct phy_driver realtek_drvs[] = { .read_status = rtlgen_read_status, .config_intr = &rtl8211f_config_intr, .handle_interrupt = rtl8211f_handle_interrupt, - .suspend = genphy_suspend, + .suspend = rtl821x_suspend, .resume = rtl821x_resume, .read_page = rtl821x_read_page, .write_page = rtl821x_write_page, + .flags = PHY_ALWAYS_CALL_SUSPEND, }, { .name = "Generic FE-GE Realtek PHY", .match_phy_device = rtlgen_match_phy_device,