From patchwork Fri Jun 2 14:24:17 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Biju Das X-Patchwork-Id: 688861 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AF037C7EE3A for ; Fri, 2 Jun 2023 14:25:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235457AbjFBOY7 (ORCPT ); Fri, 2 Jun 2023 10:24:59 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33916 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235797AbjFBOYs (ORCPT ); Fri, 2 Jun 2023 10:24:48 -0400 Received: from relmlie5.idc.renesas.com (relmlor1.renesas.com [210.160.252.171]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 542399F; Fri, 2 Jun 2023 07:24:47 -0700 (PDT) X-IronPort-AV: E=Sophos;i="6.00,213,1681138800"; d="scan'208";a="161964793" Received: from unknown (HELO relmlir5.idc.renesas.com) ([10.200.68.151]) by relmlie5.idc.renesas.com with ESMTP; 02 Jun 2023 23:24:46 +0900 Received: from localhost.localdomain (unknown [10.226.93.55]) by relmlir5.idc.renesas.com (Postfix) with ESMTP id 3950D4001B46; Fri, 2 Jun 2023 23:24:42 +0900 (JST) From: Biju Das To: Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Biju Das , Liam Girdwood , Mark Brown , Geert Uytterhoeven , Magnus Damm , devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Fabrizio Castro , Conor Dooley Subject: [PATCH v6 02/11] regulator: dt-bindings: Add Renesas RAA215300 PMIC bindings Date: Fri, 2 Jun 2023 15:24:17 +0100 Message-Id: <20230602142426.438375-3-biju.das.jz@bp.renesas.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230602142426.438375-1-biju.das.jz@bp.renesas.com> References: <20230602142426.438375-1-biju.das.jz@bp.renesas.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Document Renesas RAA215300 PMIC bindings. The RAA215300 is a high Performance 9-Channel PMIC supporting DDR Memory, with Built-In Charger and RTC. It supports DDR3, DDR3L, DDR4, and LPDDR4 memory power requirements. The internally compensated regulators, built-in Real-Time Clock (RTC), 32kHz crystal oscillator, and coin cell battery charger provide a highly integrated, small footprint power solution ideal for System-On-Module (SOM) applications. A spread spectrum feature provides an ease-of-use solution for noise-sensitive audio or RF applications. Signed-off-by: Biju Das Reviewed-by: Conor Dooley Reviewed-by: Geert Uytterhoeven --- v5->v6: * Added Rb tag from Geert. * Updated the example with replacing node name "clock-xtal"->"x2-clock". v4->v5: * Added description for clocks. * Replaced Oneof->enum in clock-names as it is simpler. * Added Rb tag from Conor. v3->v4: * Moved bindings from mfd->regulator. * Dropped minItems from reg. * Dropped renesas,rtc-enabled property and instead used clock-names property to find RTC is enabled or not. * Added reg-names in required property. * Updated the example. v2->v3: * Added more detailed description for renesas,rtc-enabled property. RFC->v2: * Updated reg property * Added optional reg-names, interrupts and renesas,rtc-enabled properties. * Fixed the node name in the example * Dropped the cross link property renesas,raa215300-rtc. * Updated the example --- .../bindings/regulator/renesas,raa215300.yaml | 85 +++++++++++++++++++ 1 file changed, 85 insertions(+) create mode 100644 Documentation/devicetree/bindings/regulator/renesas,raa215300.yaml diff --git a/Documentation/devicetree/bindings/regulator/renesas,raa215300.yaml b/Documentation/devicetree/bindings/regulator/renesas,raa215300.yaml new file mode 100644 index 000000000000..97cff71d2967 --- /dev/null +++ b/Documentation/devicetree/bindings/regulator/renesas,raa215300.yaml @@ -0,0 +1,85 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/regulator/renesas,raa215300.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas RAA215300 Power Management Integrated Circuit (PMIC) + +maintainers: + - Biju Das + +description: | + The RAA215300 is a high-performance, low-cost 9-channel PMIC designed for + 32-bit and 64-bit MCU and MPU applications. It supports DDR3, DDR3L, DDR4, + and LPDDR4 memory power requirements. The internally compensated regulators, + built-in Real-Time Clock (RTC), 32kHz crystal oscillator, and coin cell + battery charger provide a highly integrated, small footprint power solution + ideal for System-On-Module (SOM) applications. A spread spectrum feature + provides an ease-of-use solution for noise-sensitive audio or RF applications. + + This device exposes two devices via I2C. One for the integrated RTC IP, and + one for everything else. + + Link to datasheet: + https://www.renesas.com/in/en/products/power-power-management/multi-channel-power-management-ics-pmics/ssdsoc-power-management-ics-pmic-and-pmus/raa215300-high-performance-9-channel-pmic-supporting-ddr-memory-built-charger-and-rtc + +properties: + compatible: + enum: + - renesas,raa215300 + + reg: + maxItems: 2 + + reg-names: + items: + - const: main + - const: rtc + + interrupts: + maxItems: 1 + + clocks: + description: | + The clocks are optional. The RTC is disabled, if no clocks are + provided(either xin or clkin). + maxItems: 1 + + clock-names: + description: | + Use xin, if connected to an external crystal. + Use clkin, if connected to an external clock signal. + enum: + - xin + - clkin + +required: + - compatible + - reg + - reg-names + +additionalProperties: false + +examples: + - | + /* 32.768kHz crystal */ + x2: x2-clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <32768>; + }; + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + raa215300: pmic@12 { + compatible = "renesas,raa215300"; + reg = <0x12>, <0x6f>; + reg-names = "main", "rtc"; + + clocks = <&x2>; + clock-names = "xin"; + }; + }; From patchwork Fri Jun 2 14:24:19 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Biju Das X-Patchwork-Id: 688377 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 700A3C7EE37 for ; Fri, 2 Jun 2023 14:25:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235843AbjFBOY7 (ORCPT ); Fri, 2 Jun 2023 10:24:59 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33938 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235813AbjFBOYz (ORCPT ); Fri, 2 Jun 2023 10:24:55 -0400 Received: from relmlie6.idc.renesas.com (relmlor2.renesas.com [210.160.252.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 6CB2519B; Fri, 2 Jun 2023 07:24:53 -0700 (PDT) X-IronPort-AV: E=Sophos;i="6.00,213,1681138800"; d="scan'208";a="165498994" Received: from unknown (HELO relmlir5.idc.renesas.com) ([10.200.68.151]) by relmlie6.idc.renesas.com with ESMTP; 02 Jun 2023 23:24:52 +0900 Received: from localhost.localdomain (unknown [10.226.93.55]) by relmlir5.idc.renesas.com (Postfix) with ESMTP id 20C1C40065BD; Fri, 2 Jun 2023 23:24:49 +0900 (JST) From: Biju Das To: Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Biju Das , Geert Uytterhoeven , Magnus Damm , linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, Fabrizio Castro Subject: [PATCH v6 04/11] arm64: dts: renesas: rzg2l-smarc-som: Enable PMIC and built-in RTC Date: Fri, 2 Jun 2023 15:24:19 +0100 Message-Id: <20230602142426.438375-5-biju.das.jz@bp.renesas.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230602142426.438375-1-biju.das.jz@bp.renesas.com> References: <20230602142426.438375-1-biju.das.jz@bp.renesas.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Enable PMIC RAA215300 and the built-in RTC on the RZ/{G2L,V2L} SMARC EVK. Signed-off-by: Biju Das --- v5->v6: * Replaced "clock-xtal"->"x2-clock" for x2 node. * Sorted nodes in alphabetical order. v4->v5: * No change. v3->v4: * Added clock nodes. v2->v3: * No change. RFC->V2: * Updated pmic device node based on the bindings. --- .../boot/dts/renesas/rzg2l-smarc-som.dtsi | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi b/arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi index fbbb4f03440b..aed0a9ca7f29 100644 --- a/arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi +++ b/arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi @@ -73,6 +73,13 @@ vccq_sdhi0: regulator-vccq-sdhi0 { gpios = <&pinctrl RZG2L_GPIO(39, 0) GPIO_ACTIVE_HIGH>; regulator-always-on; }; + + /* 32.768kHz crystal */ + x2: x2-clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <32768>; + }; }; &adc { @@ -148,6 +155,17 @@ &gpu { mali-supply = <®_1p1v>; }; +&i2c3 { + raa215300: pmic@12 { + compatible = "renesas,raa215300"; + reg = <0x12>, <0x6f>; + reg-names = "main", "rtc"; + + clocks = <&x2>; + clock-names = "xin"; + }; +}; + &ostm1 { status = "okay"; }; From patchwork Fri Jun 2 14:24:20 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Biju Das X-Patchwork-Id: 688376 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 62505C7EE2D for ; Fri, 2 Jun 2023 14:26:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235284AbjFBOZ3 (ORCPT ); Fri, 2 Jun 2023 10:25:29 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33952 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235604AbjFBOY7 (ORCPT ); Fri, 2 Jun 2023 10:24:59 -0400 Received: from relmlie6.idc.renesas.com (relmlor2.renesas.com [210.160.252.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 7BB0019B; Fri, 2 Jun 2023 07:24:57 -0700 (PDT) X-IronPort-AV: E=Sophos;i="6.00,213,1681138800"; d="scan'208";a="165498998" Received: from unknown (HELO relmlir5.idc.renesas.com) ([10.200.68.151]) by relmlie6.idc.renesas.com with ESMTP; 02 Jun 2023 23:24:57 +0900 Received: from localhost.localdomain (unknown [10.226.93.55]) by relmlir5.idc.renesas.com (Postfix) with ESMTP id 6BB8640065BD; Fri, 2 Jun 2023 23:24:53 +0900 (JST) From: Biju Das To: Alessandro Zummo , Alexandre Belloni , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Biju Das , Trent Piepho , linux-rtc@vger.kernel.org, devicetree@vger.kernel.org, Geert Uytterhoeven , Fabrizio Castro , linux-renesas-soc@vger.kernel.org, Krzysztof Kozlowski Subject: [PATCH v6 05/11] dt-bindings: rtc: isl1208: Convert to json-schema Date: Fri, 2 Jun 2023 15:24:20 +0100 Message-Id: <20230602142426.438375-6-biju.das.jz@bp.renesas.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230602142426.438375-1-biju.das.jz@bp.renesas.com> References: <20230602142426.438375-1-biju.das.jz@bp.renesas.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Convert the isl1208 RTC device tree binding documentation to json-schema. Update the example to match reality. Signed-off-by: Biju Das Reviewed-by: Krzysztof Kozlowski --- v5->v6: * No change v4_new->v5: * No change. v4->v4_new: * Moved this patch to PMIC series * Added minItems to interrupt-names. * Added interrupt-names in conditional schema check. v3->v4: * Added Rb tag from Krzysztof Kozlowski. * Dropped | from description * Replaced the pin name #EVDET->EVDET in description. * Dropped oneOf from compatible. v2->v3: * Updated interrupt-names property by keeping the list of names. * Removed Interrupts from required property as it may not be wired. * Removed isil,ev-evienb from required property. RFC->v2: * Updated maintainers list * Updated description from original bindings * removed default from isil,ev-evienb properties to match with the original bindings. * Added conditional check for interrupts. --- .../devicetree/bindings/rtc/isil,isl1208.txt | 38 -------- .../devicetree/bindings/rtc/isil,isl1208.yaml | 89 +++++++++++++++++++ 2 files changed, 89 insertions(+), 38 deletions(-) delete mode 100644 Documentation/devicetree/bindings/rtc/isil,isl1208.txt create mode 100644 Documentation/devicetree/bindings/rtc/isil,isl1208.yaml diff --git a/Documentation/devicetree/bindings/rtc/isil,isl1208.txt b/Documentation/devicetree/bindings/rtc/isil,isl1208.txt deleted file mode 100644 index 51f003006f04..000000000000 --- a/Documentation/devicetree/bindings/rtc/isil,isl1208.txt +++ /dev/null @@ -1,38 +0,0 @@ -Intersil ISL1209/19 I2C RTC/Alarm chip with event in - -ISL12X9 have additional pins EVIN and #EVDET for tamper detection, while the -ISL1208 and ISL1218 do not. They are all use the same driver with the bindings -described here, with chip specific properties as noted. - -Required properties supported by the device: - - "compatible": Should be one of the following: - - "isil,isl1208" - - "isil,isl1209" - - "isil,isl1218" - - "isil,isl1219" - - "reg": I2C bus address of the device - -Optional properties: - - "interrupt-names": list which may contains "irq" and "evdet" - evdet applies to isl1209 and isl1219 only - - "interrupts": list of interrupts for "irq" and "evdet" - evdet applies to isl1209 and isl1219 only - - "isil,ev-evienb": Enable or disable internal pull on EVIN pin - Applies to isl1209 and isl1219 only - Possible values are 0 and 1 - Value 0 enables internal pull-up on evin pin, 1 disables it. - Default will leave the non-volatile configuration of the pullup - as is. - -Example isl1219 node with #IRQ pin connected to SoC gpio1 pin12 and #EVDET pin -connected to SoC gpio2 pin 24 and internal pull-up enabled in EVIN pin. - - isl1219: rtc@68 { - compatible = "isil,isl1219"; - reg = <0x68>; - interrupt-names = "irq", "evdet"; - interrupts-extended = <&gpio1 12 IRQ_TYPE_EDGE_FALLING>, - <&gpio2 24 IRQ_TYPE_EDGE_FALLING>; - isil,ev-evienb = <1>; - }; - diff --git a/Documentation/devicetree/bindings/rtc/isil,isl1208.yaml b/Documentation/devicetree/bindings/rtc/isil,isl1208.yaml new file mode 100644 index 000000000000..565965147ce6 --- /dev/null +++ b/Documentation/devicetree/bindings/rtc/isil,isl1208.yaml @@ -0,0 +1,89 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/rtc/isil,isl1208.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Intersil ISL1209/19 I2C RTC/Alarm chip with event in + +maintainers: + - Biju Das + - Trent Piepho + +description: + ISL12X9 have additional pins EVIN and EVDET for tamper detection, while the + ISL1208 and ISL1218 do not. + +properties: + compatible: + enum: + - isil,isl1208 + - isil,isl1209 + - isil,isl1218 + - isil,isl1219 + + reg: + maxItems: 1 + + interrupts: + minItems: 1 + maxItems: 2 + + interrupt-names: + minItems: 1 + items: + - const: irq + - const: evdet + + isil,ev-evienb: + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [ 0, 1 ] + description: | + Enable or disable internal pull on EVIN pin + Default will leave the non-volatile configuration of the pullup + as is. + <0> : Enables internal pull-up on evin pin + <1> : Disables internal pull-up on evin pin + +required: + - compatible + - reg + +allOf: + - $ref: rtc.yaml# + - if: + properties: + compatible: + contains: + enum: + - isil,isl1209 + - isil,isl1219 + then: + properties: + interrupts: + maxItems: 2 + interrupt-names: + items: + - const: irq + - const: evdet + else: + properties: + interrupts: + maxItems: 1 + interrupt-names: + items: + - const: irq + +unevaluatedProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + rtc_twi: rtc@6f { + compatible = "isil,isl1208"; + reg = <0x6f>; + }; + }; From patchwork Fri Jun 2 14:24:21 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Biju Das X-Patchwork-Id: 688860 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8DB2FC7EE2F for ; Fri, 2 Jun 2023 14:26:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235044AbjFBOZb (ORCPT ); Fri, 2 Jun 2023 10:25:31 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33966 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235813AbjFBOZE (ORCPT ); Fri, 2 Jun 2023 10:25:04 -0400 Received: from relmlie5.idc.renesas.com (relmlor1.renesas.com [210.160.252.171]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 5387D9F; Fri, 2 Jun 2023 07:25:02 -0700 (PDT) X-IronPort-AV: E=Sophos;i="6.00,213,1681138800"; d="scan'208";a="161964815" Received: from unknown (HELO relmlir5.idc.renesas.com) ([10.200.68.151]) by relmlie5.idc.renesas.com with ESMTP; 02 Jun 2023 23:25:01 +0900 Received: from localhost.localdomain (unknown [10.226.93.55]) by relmlir5.idc.renesas.com (Postfix) with ESMTP id D404640065BD; Fri, 2 Jun 2023 23:24:57 +0900 (JST) From: Biju Das To: Alessandro Zummo , Alexandre Belloni , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Biju Das , Trent Piepho , linux-rtc@vger.kernel.org, devicetree@vger.kernel.org, Geert Uytterhoeven , Fabrizio Castro , linux-renesas-soc@vger.kernel.org, Conor Dooley Subject: [PATCH v6 06/11] dt-bindings: rtc: isil,isl1208: Document clock and clock-names properties Date: Fri, 2 Jun 2023 15:24:21 +0100 Message-Id: <20230602142426.438375-7-biju.das.jz@bp.renesas.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230602142426.438375-1-biju.das.jz@bp.renesas.com> References: <20230602142426.438375-1-biju.das.jz@bp.renesas.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org As per the HW manual, XTOSCB bit setting is as follows If using an external clock signal, set the XTOSCB bit as 1 to disable the crystal oscillator. If using an external crystal, the XTOSCB bit needs to be set at 0 to enable the crystal oscillator. Document clock and clock-names properties. Signed-off-by: Biju Das Reviewed-by: Conor Dooley Reviewed-by: Geert Uytterhoeven --- v5->v6: * Added Rb tag from Geert. v4->v5: * Replaced oneOf->enum for clock-names as it is simpler. * Added Rb tag from Conor. v4: * New patch --- .../devicetree/bindings/rtc/isil,isl1208.yaml | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/Documentation/devicetree/bindings/rtc/isil,isl1208.yaml b/Documentation/devicetree/bindings/rtc/isil,isl1208.yaml index 565965147ce6..11f7378d4997 100644 --- a/Documentation/devicetree/bindings/rtc/isil,isl1208.yaml +++ b/Documentation/devicetree/bindings/rtc/isil,isl1208.yaml @@ -25,6 +25,17 @@ properties: reg: maxItems: 1 + clocks: + maxItems: 1 + + clock-names: + description: | + Use xin, if connected to an external crystal. + Use clkin, if connected to an external clock signal. + enum: + - xin + - clkin + interrupts: minItems: 1 maxItems: 2