From patchwork Sat Jun 3 18:53:33 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shreeya Patel X-Patchwork-Id: 689120 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 05766C7EE2D for ; Sat, 3 Jun 2023 18:54:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229686AbjFCSyb (ORCPT ); Sat, 3 Jun 2023 14:54:31 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35472 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229451AbjFCSyb (ORCPT ); Sat, 3 Jun 2023 14:54:31 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 67EBB198; Sat, 3 Jun 2023 11:54:29 -0700 (PDT) Received: from localhost.localdomain (unknown [IPv6:2405:201:0:21ea:e49:10dd:40c0:e842]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: shreeya) by madras.collabora.co.uk (Postfix) with ESMTPSA id 36CE96603050; Sat, 3 Jun 2023 19:54:24 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1685818467; bh=s0knw9g56xErdj6HY2ztw8nwc0RbT2i6V9fQmN13s8c=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=hS44CBZD9HbmnAspm0slwe7dyCmm5DqVNWXlXmT0Sh27q/fXwSOaxf7LDE4eLFKJO RfW6Tl0q5zPvA/zsPEbbJfDE01sFwUuSRszGXZu53l7HaQGNwgytLohXd+bQGzFx+5 URtyNScJElrhlWa1HdD6lbJJ6JMZun1zA42Q/wiGgjS4eoFAtat5T+fuCjXnHf+Tur 4Ax/3lpDZfDiBYvwgZ+11p2BSDu5/s5upoUOOLYsu3hE+MSmJ2FDshgiknBJUdCFdn ZJpZC4OxIENHIk9dydvxWXQbfX7gswEFxZcVI4uyh8M3zDMXZPl8Aax46M/WG+E4HE 2Nq2B6X6k3wiw== From: Shreeya Patel To: jic23@kernel.org, lars@metafoo.de, heiko@sntech.de, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, sebastian.reichel@collabora.com Cc: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, gustavo.padovan@collabora.com, kernel@collabora.com, serge.broslavsky@collabora.com, Shreeya Patel , Simon Xue Subject: [PATCH v3 1/8] iio: adc: rockchip_saradc: Add callback functions Date: Sun, 4 Jun 2023 00:23:33 +0530 Message-Id: <20230603185340.13838-2-shreeya.patel@collabora.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20230603185340.13838-1-shreeya.patel@collabora.com> References: <20230603185340.13838-1-shreeya.patel@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Simon Xue Add start, read and power_down callback functions, which will help in adding new rockchip device support cleanly. Signed-off-by: Simon Xue Signed-off-by: Shreeya Patel --- Changes in v3 - no change Changes in v2 - Add a from address. - Create a separate patch for changes done in the code for old devices. drivers/iio/adc/rockchip_saradc.c | 64 +++++++++++++++++++++++++------ 1 file changed, 52 insertions(+), 12 deletions(-) diff --git a/drivers/iio/adc/rockchip_saradc.c b/drivers/iio/adc/rockchip_saradc.c index 79448c5ffc2a..21f9d92a6af4 100644 --- a/drivers/iio/adc/rockchip_saradc.c +++ b/drivers/iio/adc/rockchip_saradc.c @@ -38,10 +38,15 @@ #define SARADC_TIMEOUT msecs_to_jiffies(100) #define SARADC_MAX_CHANNELS 8 +struct rockchip_saradc; + struct rockchip_saradc_data { const struct iio_chan_spec *channels; int num_channels; unsigned long clk_rate; + void (*start)(struct rockchip_saradc *info, int chn); + int (*read)(struct rockchip_saradc *info); + void (*power_down)(struct rockchip_saradc *info); }; struct rockchip_saradc { @@ -60,27 +65,50 @@ struct rockchip_saradc { struct notifier_block nb; }; -static void rockchip_saradc_power_down(struct rockchip_saradc *info) +static void rockchip_saradc_reset_controller(struct reset_control *reset); + +static void rockchip_saradc_start_v1(struct rockchip_saradc *info, int chn) +{ + /* 8 clock periods as delay between power up and start cmd */ + writel_relaxed(8, info->regs + SARADC_DLY_PU_SOC); + /* Select the channel to be used and trigger conversion */ + writel(SARADC_CTRL_POWER_CTRL | (chn & SARADC_CTRL_CHN_MASK) | + SARADC_CTRL_IRQ_ENABLE, info->regs + SARADC_CTRL); +} + +static void rockchip_saradc_start(struct rockchip_saradc *info, int chn) +{ + info->data->start(info, chn); +} + +static int rockchip_saradc_read_v1(struct rockchip_saradc *info) +{ + return readl_relaxed(info->regs + SARADC_DATA); +} + +static int rockchip_saradc_read(struct rockchip_saradc *info) +{ + return info->data->read(info); +} + +static void rockchip_saradc_power_down_v1(struct rockchip_saradc *info) { - /* Clear irq & power down adc */ writel_relaxed(0, info->regs + SARADC_CTRL); } +static void rockchip_saradc_power_down(struct rockchip_saradc *info) +{ + if (info->data->power_down) + info->data->power_down(info); +} + static int rockchip_saradc_conversion(struct rockchip_saradc *info, struct iio_chan_spec const *chan) { reinit_completion(&info->completion); - /* 8 clock periods as delay between power up and start cmd */ - writel_relaxed(8, info->regs + SARADC_DLY_PU_SOC); - info->last_chan = chan; - - /* Select the channel to be used and trigger conversion */ - writel(SARADC_CTRL_POWER_CTRL - | (chan->channel & SARADC_CTRL_CHN_MASK) - | SARADC_CTRL_IRQ_ENABLE, - info->regs + SARADC_CTRL); + rockchip_saradc_start(info, chan->channel); if (!wait_for_completion_timeout(&info->completion, SARADC_TIMEOUT)) return -ETIMEDOUT; @@ -123,7 +151,7 @@ static irqreturn_t rockchip_saradc_isr(int irq, void *dev_id) struct rockchip_saradc *info = dev_id; /* Read value */ - info->last_val = readl_relaxed(info->regs + SARADC_DATA); + info->last_val = rockchip_saradc_read(info); info->last_val &= GENMASK(info->last_chan->scan_type.realbits - 1, 0); rockchip_saradc_power_down(info); @@ -163,6 +191,9 @@ static const struct rockchip_saradc_data saradc_data = { .channels = rockchip_saradc_iio_channels, .num_channels = ARRAY_SIZE(rockchip_saradc_iio_channels), .clk_rate = 1000000, + .start = rockchip_saradc_start_v1, + .read = rockchip_saradc_read_v1, + .power_down = rockchip_saradc_power_down_v1, }; static const struct iio_chan_spec rockchip_rk3066_tsadc_iio_channels[] = { @@ -174,6 +205,9 @@ static const struct rockchip_saradc_data rk3066_tsadc_data = { .channels = rockchip_rk3066_tsadc_iio_channels, .num_channels = ARRAY_SIZE(rockchip_rk3066_tsadc_iio_channels), .clk_rate = 50000, + .start = rockchip_saradc_start_v1, + .read = rockchip_saradc_read_v1, + .power_down = rockchip_saradc_power_down_v1, }; static const struct iio_chan_spec rockchip_rk3399_saradc_iio_channels[] = { @@ -189,6 +223,9 @@ static const struct rockchip_saradc_data rk3399_saradc_data = { .channels = rockchip_rk3399_saradc_iio_channels, .num_channels = ARRAY_SIZE(rockchip_rk3399_saradc_iio_channels), .clk_rate = 1000000, + .start = rockchip_saradc_start_v1, + .read = rockchip_saradc_read_v1, + .power_down = rockchip_saradc_power_down_v1, }; static const struct iio_chan_spec rockchip_rk3568_saradc_iio_channels[] = { @@ -206,6 +243,9 @@ static const struct rockchip_saradc_data rk3568_saradc_data = { .channels = rockchip_rk3568_saradc_iio_channels, .num_channels = ARRAY_SIZE(rockchip_rk3568_saradc_iio_channels), .clk_rate = 1000000, + .start = rockchip_saradc_start_v1, + .read = rockchip_saradc_read_v1, + .power_down = rockchip_saradc_power_down_v1, }; static const struct of_device_id rockchip_saradc_match[] = { From patchwork Sat Jun 3 18:53:34 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shreeya Patel X-Patchwork-Id: 688839 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8BE62C7EE2D for ; Sat, 3 Jun 2023 18:54:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229451AbjFCSyj (ORCPT ); Sat, 3 Jun 2023 14:54:39 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35560 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229711AbjFCSyh (ORCPT ); Sat, 3 Jun 2023 14:54:37 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8E9C81A8; Sat, 3 Jun 2023 11:54:35 -0700 (PDT) Received: from localhost.localdomain (unknown [IPv6:2405:201:0:21ea:e49:10dd:40c0:e842]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: shreeya) by madras.collabora.co.uk (Postfix) with ESMTPSA id 1E84D6603147; Sat, 3 Jun 2023 19:54:29 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1685818474; bh=5qal4yReBLe0r8IINy7OGXm+hpHMLxOtRFTpvqe4d8o=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=mpZaRIylG+JEVf4lXivK3l3Y2PgZQLThn9aewLTwnggkUKqVX2+/ms9MAn+EXm87G 1jcUNMeBXCmRO+HJoH41W67jPPrth3d1aTY3gNbuOF2pm5k6UmHlMfSnfi/UaHU244 nof49j+6GwwhuYH4tpD8jtMqRxaYVvDldSNraj+/JbMQZwgDi06f1PcFCpltxMZhie fGDXXGRw3IqX4UakQB3cG4Z6IghptSHb4Yl8H5O85k8gyex3P3QFaqNkvRkaidyFMG qWWoHq5t8D6FBvBeox5xLifhulAkkdOWM4Duc8kwQzpebMLMzCeb1Er+/LdU2Q8yPJ 5QWAQRIOVuJIg== From: Shreeya Patel To: jic23@kernel.org, lars@metafoo.de, heiko@sntech.de, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, sebastian.reichel@collabora.com Cc: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, gustavo.padovan@collabora.com, kernel@collabora.com, serge.broslavsky@collabora.com, Shreeya Patel , Simon Xue , AngeloGioacchino Del Regno Subject: [PATCH v3 2/8] iio: adc: rockchip_saradc: Add support for RK3588 Date: Sun, 4 Jun 2023 00:23:34 +0530 Message-Id: <20230603185340.13838-3-shreeya.patel@collabora.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20230603185340.13838-1-shreeya.patel@collabora.com> References: <20230603185340.13838-1-shreeya.patel@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Simon Xue Add new start and read functions to support rk3588 device. Also, add a device compatible string for the same. Signed-off-by: Simon Xue Signed-off-by: Shreeya Patel Reviewed-by: AngeloGioacchino Del Regno --- Changes in v3 - Add bitfield.h header file. - Add a Reviewed-by tag. Changes in v2 - Add a from address. - Create separate patches for adding new device support and changes to the old device code. - Make use of FIELD_PREP. drivers/iio/adc/rockchip_saradc.c | 70 +++++++++++++++++++++++++++++++ 1 file changed, 70 insertions(+) diff --git a/drivers/iio/adc/rockchip_saradc.c b/drivers/iio/adc/rockchip_saradc.c index 21f9d92a6af4..312286ec91dc 100644 --- a/drivers/iio/adc/rockchip_saradc.c +++ b/drivers/iio/adc/rockchip_saradc.c @@ -4,6 +4,7 @@ * Copyright (C) 2014 ROCKCHIP, Inc. */ +#include #include #include #include @@ -38,6 +39,22 @@ #define SARADC_TIMEOUT msecs_to_jiffies(100) #define SARADC_MAX_CHANNELS 8 +/* v2 registers */ +#define SARADC2_CONV_CON 0x0 +#define SARADC_T_PD_SOC 0x4 +#define SARADC_T_DAS_SOC 0xc +#define SARADC2_END_INT_EN 0x104 +#define SARADC2_ST_CON 0x108 +#define SARADC2_STATUS 0x10c +#define SARADC2_END_INT_ST 0x110 +#define SARADC2_DATA_BASE 0x120 + +#define SARADC2_EN_END_INT BIT(0) +#define SARADC2_START BIT(4) +#define SARADC2_SINGLE_MODE BIT(5) + +#define SARADC2_CONV_CHANNELS GENMASK(15, 0) + struct rockchip_saradc; struct rockchip_saradc_data { @@ -76,6 +93,25 @@ static void rockchip_saradc_start_v1(struct rockchip_saradc *info, int chn) SARADC_CTRL_IRQ_ENABLE, info->regs + SARADC_CTRL); } +static void rockchip_saradc_start_v2(struct rockchip_saradc *info, int chn) +{ + int val; + + if (info->reset) + rockchip_saradc_reset_controller(info->reset); + + writel_relaxed(0xc, info->regs + SARADC_T_DAS_SOC); + writel_relaxed(0x20, info->regs + SARADC_T_PD_SOC); + val = FIELD_PREP(SARADC2_EN_END_INT, 1); + val |= val << 16; + writel_relaxed(val, info->regs + SARADC2_END_INT_EN); + val = FIELD_PREP(SARADC2_START, 1) | + FIELD_PREP(SARADC2_SINGLE_MODE, 1) | + FIELD_PREP(SARADC2_CONV_CHANNELS, chn); + val |= val << 16; + writel(val, info->regs + SARADC2_CONV_CON); +} + static void rockchip_saradc_start(struct rockchip_saradc *info, int chn) { info->data->start(info, chn); @@ -86,6 +122,18 @@ static int rockchip_saradc_read_v1(struct rockchip_saradc *info) return readl_relaxed(info->regs + SARADC_DATA); } +static int rockchip_saradc_read_v2(struct rockchip_saradc *info) +{ + int offset; + + /* Clear irq */ + writel_relaxed(0x1, info->regs + SARADC2_END_INT_ST); + + offset = SARADC2_DATA_BASE + info->last_chan->channel * 0x4; + + return readl_relaxed(info->regs + offset); +} + static int rockchip_saradc_read(struct rockchip_saradc *info) { return info->data->read(info); @@ -248,6 +296,25 @@ static const struct rockchip_saradc_data rk3568_saradc_data = { .power_down = rockchip_saradc_power_down_v1, }; +static const struct iio_chan_spec rockchip_rk3588_saradc_iio_channels[] = { + SARADC_CHANNEL(0, "adc0", 12), + SARADC_CHANNEL(1, "adc1", 12), + SARADC_CHANNEL(2, "adc2", 12), + SARADC_CHANNEL(3, "adc3", 12), + SARADC_CHANNEL(4, "adc4", 12), + SARADC_CHANNEL(5, "adc5", 12), + SARADC_CHANNEL(6, "adc6", 12), + SARADC_CHANNEL(7, "adc7", 12), +}; + +static const struct rockchip_saradc_data rk3588_saradc_data = { + .channels = rockchip_rk3588_saradc_iio_channels, + .num_channels = ARRAY_SIZE(rockchip_rk3588_saradc_iio_channels), + .clk_rate = 1000000, + .start = rockchip_saradc_start_v2, + .read = rockchip_saradc_read_v2, +}; + static const struct of_device_id rockchip_saradc_match[] = { { .compatible = "rockchip,saradc", @@ -261,6 +328,9 @@ static const struct of_device_id rockchip_saradc_match[] = { }, { .compatible = "rockchip,rk3568-saradc", .data = &rk3568_saradc_data, + }, { + .compatible = "rockchip,rk3588-saradc", + .data = &rk3588_saradc_data, }, {}, }; From patchwork Sat Jun 3 18:53:35 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shreeya Patel X-Patchwork-Id: 689119 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E5108C7EE2D for ; Sat, 3 Jun 2023 18:54:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229621AbjFCSys (ORCPT ); Sat, 3 Jun 2023 14:54:48 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35734 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229752AbjFCSyp (ORCPT ); Sat, 3 Jun 2023 14:54:45 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 08A8F197; Sat, 3 Jun 2023 11:54:40 -0700 (PDT) Received: from localhost.localdomain (unknown [IPv6:2405:201:0:21ea:e49:10dd:40c0:e842]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: shreeya) by madras.collabora.co.uk (Postfix) with ESMTPSA id 8C15766031BB; Sat, 3 Jun 2023 19:54:36 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1685818479; bh=3LQsZ14e2cVfHZN107KymnzFhYRU0E11A9f45uJB4io=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=JNQThkngO8TEScja0x+PQ1s5ANOp1fLarmN/MuzK+NSb75MwFkKNmnGuvlHSnXeLh q2eC2f/EwWMhxNlxkFxmHAiKvm5E0xC34bSQ6tbqWo7ua0FHHbbK+NKwuakSATjY5B kHnSZO3DSF1TQ7ZxbNOhCWRU2bAtvXwZT63AThAK/XtV1KkxnvbyY39aQi0sP4wE/Z S+078He6GqEcg+isBGtt5Mj/+4Tjdm1nVSo+dwDmBkNkr61ogWA9HHBzgBlCaubtG1 8UHKzF/6a3tSetMJc4acVKEyVs6XLdWj+imYjSK4mAX+aaLY8mFTHnQmAzAvWrvqBM OLVPtmQP9G5yw== From: Shreeya Patel To: jic23@kernel.org, lars@metafoo.de, heiko@sntech.de, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, sebastian.reichel@collabora.com Cc: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, gustavo.padovan@collabora.com, kernel@collabora.com, serge.broslavsky@collabora.com, Shreeya Patel Subject: [PATCH v3 3/8] iio: adc: rockchip_saradc: Make use of devm_clk_get_enabled Date: Sun, 4 Jun 2023 00:23:35 +0530 Message-Id: <20230603185340.13838-4-shreeya.patel@collabora.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20230603185340.13838-1-shreeya.patel@collabora.com> References: <20230603185340.13838-1-shreeya.patel@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Use devm_clk_get_enabled() to avoid manually disabling the clock. Signed-off-by: Shreeya Patel --- Changes in v3 - Do not remove clock enabling and disabling from the suspend and resume functions respectively. Changes in v2 - No need to enable the clocks earlier than the original code. Move the enablement of clocks at it's original position. drivers/iio/adc/rockchip_saradc.c | 56 +++++-------------------------- 1 file changed, 8 insertions(+), 48 deletions(-) diff --git a/drivers/iio/adc/rockchip_saradc.c b/drivers/iio/adc/rockchip_saradc.c index 312286ec91dc..ac424ea50787 100644 --- a/drivers/iio/adc/rockchip_saradc.c +++ b/drivers/iio/adc/rockchip_saradc.c @@ -346,20 +346,6 @@ static void rockchip_saradc_reset_controller(struct reset_control *reset) reset_control_deassert(reset); } -static void rockchip_saradc_clk_disable(void *data) -{ - struct rockchip_saradc *info = data; - - clk_disable_unprepare(info->clk); -} - -static void rockchip_saradc_pclk_disable(void *data) -{ - struct rockchip_saradc *info = data; - - clk_disable_unprepare(info->pclk); -} - static void rockchip_saradc_regulator_disable(void *data) { struct rockchip_saradc *info = data; @@ -493,16 +479,6 @@ static int rockchip_saradc_probe(struct platform_device *pdev) return ret; } - info->pclk = devm_clk_get(&pdev->dev, "apb_pclk"); - if (IS_ERR(info->pclk)) - return dev_err_probe(&pdev->dev, PTR_ERR(info->pclk), - "failed to get pclk\n"); - - info->clk = devm_clk_get(&pdev->dev, "saradc"); - if (IS_ERR(info->clk)) - return dev_err_probe(&pdev->dev, PTR_ERR(info->clk), - "failed to get adc clock\n"); - info->vref = devm_regulator_get(&pdev->dev, "vref"); if (IS_ERR(info->vref)) return dev_err_probe(&pdev->dev, PTR_ERR(info->vref), @@ -540,31 +516,15 @@ static int rockchip_saradc_probe(struct platform_device *pdev) info->uv_vref = ret; - ret = clk_prepare_enable(info->pclk); - if (ret < 0) { - dev_err(&pdev->dev, "failed to enable pclk\n"); - return ret; - } - ret = devm_add_action_or_reset(&pdev->dev, - rockchip_saradc_pclk_disable, info); - if (ret) { - dev_err(&pdev->dev, "failed to register devm action, %d\n", - ret); - return ret; - } + info->pclk = devm_clk_get_enabled(&pdev->dev, "apb_pclk"); + if (IS_ERR(info->pclk)) + return dev_err_probe(&pdev->dev, PTR_ERR(info->pclk), + "failed to get pclk\n"); - ret = clk_prepare_enable(info->clk); - if (ret < 0) { - dev_err(&pdev->dev, "failed to enable converter clock\n"); - return ret; - } - ret = devm_add_action_or_reset(&pdev->dev, - rockchip_saradc_clk_disable, info); - if (ret) { - dev_err(&pdev->dev, "failed to register devm action, %d\n", - ret); - return ret; - } + info->clk = devm_clk_get_enabled(&pdev->dev, "saradc"); + if (IS_ERR(info->clk)) + return dev_err_probe(&pdev->dev, PTR_ERR(info->clk), + "failed to get adc clock\n"); platform_set_drvdata(pdev, indio_dev); From patchwork Sat Jun 3 18:53:36 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shreeya Patel X-Patchwork-Id: 688838 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 42187C7EE2E for ; Sat, 3 Jun 2023 18:54:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229652AbjFCSyz (ORCPT ); Sat, 3 Jun 2023 14:54:55 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35874 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229769AbjFCSyw (ORCPT ); Sat, 3 Jun 2023 14:54:52 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 257541BB; Sat, 3 Jun 2023 11:54:47 -0700 (PDT) Received: from localhost.localdomain (unknown [IPv6:2405:201:0:21ea:e49:10dd:40c0:e842]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: shreeya) by madras.collabora.co.uk (Postfix) with ESMTPSA id C34646606EBA; Sat, 3 Jun 2023 19:54:41 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1685818485; bh=VNGGZRi4A9Mnt5jeD15aqWDciGe58NwxbjwHqV5hKJY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=DHHO5hadMuUConDV8846JqFF0fEN4sAW4K7ZCgLW6LZWp+8WyoG24cTXNJbQLacZ1 0dfcHQ8V9cTbYNz2h0bKmouSVvohMYfSOD33ZKCuh7uE+3swL2Ce9F1A1zIiYe4GMz e0/x8jwu4qm9LDAyOZq/AZDaHWs1znkt+fR/9sS/tfSpFIIpcjSd1Ma8Io0cn2xm7C KgDtdboWl2RGlg5HAt2JIff7gB2A5rp7BakXcsf6ha7HsdkSw30+FXsYVllZWOMgpy uSihtW6RhfM0ziXzfj9e502/HYHCrYSx36U648Z7OZhyzIlK5T61sUC2LamtTPc7R3 OkXPGJm/ygVTA== From: Shreeya Patel To: jic23@kernel.org, lars@metafoo.de, heiko@sntech.de, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, sebastian.reichel@collabora.com Cc: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, gustavo.padovan@collabora.com, kernel@collabora.com, serge.broslavsky@collabora.com, Shreeya Patel , AngeloGioacchino Del Regno Subject: [PATCH v3 4/8] iio: adc: rockchip_saradc: Use of_device_get_match_data Date: Sun, 4 Jun 2023 00:23:36 +0530 Message-Id: <20230603185340.13838-5-shreeya.patel@collabora.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20230603185340.13838-1-shreeya.patel@collabora.com> References: <20230603185340.13838-1-shreeya.patel@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Use of_device_get_match_data() to simplify the code. Signed-off-by: Shreeya Patel Reviewed-by: AngeloGioacchino Del Regno --- Changes in v3 - No change Changes in v2 - Add a Reviewed-by tag. drivers/iio/adc/rockchip_saradc.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/iio/adc/rockchip_saradc.c b/drivers/iio/adc/rockchip_saradc.c index ac424ea50787..cbe347fe8df7 100644 --- a/drivers/iio/adc/rockchip_saradc.c +++ b/drivers/iio/adc/rockchip_saradc.c @@ -415,10 +415,10 @@ static void rockchip_saradc_regulator_unreg_notifier(void *data) static int rockchip_saradc_probe(struct platform_device *pdev) { + const struct rockchip_saradc_data *match_data; struct rockchip_saradc *info = NULL; struct device_node *np = pdev->dev.of_node; struct iio_dev *indio_dev = NULL; - const struct of_device_id *match; int ret; int irq; @@ -432,13 +432,13 @@ static int rockchip_saradc_probe(struct platform_device *pdev) } info = iio_priv(indio_dev); - match = of_match_device(rockchip_saradc_match, &pdev->dev); - if (!match) { + match_data = of_device_get_match_data(&pdev->dev); + if (!match_data) { dev_err(&pdev->dev, "failed to match device\n"); return -ENODEV; } - info->data = match->data; + info->data = match_data; /* Sanity check for possible later IP variants with more channels */ if (info->data->num_channels > SARADC_MAX_CHANNELS) { From patchwork Sat Jun 3 18:53:37 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shreeya Patel X-Patchwork-Id: 689118 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 897B2C77B7A for ; Sat, 3 Jun 2023 18:55:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229506AbjFCSzD (ORCPT ); Sat, 3 Jun 2023 14:55:03 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35946 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229769AbjFCSzC (ORCPT ); Sat, 3 Jun 2023 14:55:02 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2467FE5A; Sat, 3 Jun 2023 11:54:52 -0700 (PDT) Received: from localhost.localdomain (unknown [IPv6:2405:201:0:21ea:e49:10dd:40c0:e842]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: shreeya) by madras.collabora.co.uk (Postfix) with ESMTPSA id 88EDE6603050; Sat, 3 Jun 2023 19:54:47 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1685818490; bh=wVq893NVcRnivMhnQm6Wl7GqGpgPC12kHSLJwuPQ3s0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=XhWJ/UCyNf8cioxQiwkBtM+o4dXTOVoviZmYCWOAqGvgKnnIorApx+GnguSDCFr/5 XWRPJ3nQ30nahJchgfH3UgUcRtr9VWCmclm4oh5Gs9EeQP+DRhs8HC+HUpIb0muSg5 3HB71E4URO0yhob73lpwftRmfJc9zEbkm2tAv6Mf/ctOAjeAPqWCpFphzSiS3lqPvp FmdsA4sOUNfR/YD1aWXI/lVziyz4YHbogTGbKt7ZMNuf5IPrvQxiTKTabds2i6UXkP pceTA356IzvWhOMHPQDkaD77LQUZ1QjTinEK7WFthDUsIhdTndgQsJVL2jKIFUp0p7 aM1EV452LCzbQ== From: Shreeya Patel To: jic23@kernel.org, lars@metafoo.de, heiko@sntech.de, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, sebastian.reichel@collabora.com Cc: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, gustavo.padovan@collabora.com, kernel@collabora.com, serge.broslavsky@collabora.com, Shreeya Patel , AngeloGioacchino Del Regno Subject: [PATCH v3 5/8] iio: adc: rockchip_saradc: Match alignment with open parenthesis Date: Sun, 4 Jun 2023 00:23:37 +0530 Message-Id: <20230603185340.13838-6-shreeya.patel@collabora.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20230603185340.13838-1-shreeya.patel@collabora.com> References: <20230603185340.13838-1-shreeya.patel@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Match alignment with open parenthesis for improving the code readability. Signed-off-by: Shreeya Patel Reviewed-by: AngeloGioacchino Del Regno --- Changes in v3 - No change Changes in v2 - Add a Reviewed-by tag. drivers/iio/adc/rockchip_saradc.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/iio/adc/rockchip_saradc.c b/drivers/iio/adc/rockchip_saradc.c index cbe347fe8df7..436e219984fd 100644 --- a/drivers/iio/adc/rockchip_saradc.c +++ b/drivers/iio/adc/rockchip_saradc.c @@ -151,7 +151,7 @@ static void rockchip_saradc_power_down(struct rockchip_saradc *info) } static int rockchip_saradc_conversion(struct rockchip_saradc *info, - struct iio_chan_spec const *chan) + struct iio_chan_spec const *chan) { reinit_completion(&info->completion); @@ -394,8 +394,7 @@ static irqreturn_t rockchip_saradc_trigger_handler(int irq, void *p) } static int rockchip_saradc_volt_notify(struct notifier_block *nb, - unsigned long event, - void *data) + unsigned long event, void *data) { struct rockchip_saradc *info = container_of(nb, struct rockchip_saradc, nb); From patchwork Sat Jun 3 18:53:38 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shreeya Patel X-Patchwork-Id: 688837 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9393FC7EE2D for ; Sat, 3 Jun 2023 18:55:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229566AbjFCSzQ (ORCPT ); Sat, 3 Jun 2023 14:55:16 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36342 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229769AbjFCSzP (ORCPT ); Sat, 3 Jun 2023 14:55:15 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 26C6ACA; Sat, 3 Jun 2023 11:54:58 -0700 (PDT) Received: from localhost.localdomain (unknown [IPv6:2405:201:0:21ea:e49:10dd:40c0:e842]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: shreeya) by madras.collabora.co.uk (Postfix) with ESMTPSA id DBE516603147; Sat, 3 Jun 2023 19:54:52 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1685818496; bh=8dxa3AxEBlpgUQ0ClMFRIptu4pfjEzefRs26x8e/iQo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=cOTtYJhlLAEFYNPHn0rH56xZmVBUVaHNl5WbXHeLOijuS7R3nL6QgaYz4qV2gtQAG N6CY3vizDt0XoPpM6VJty3McTXSngliMiLlr9gsaXRCZY/7ZT8IZTAnaSTpdcY/xhJ yGbssgM4o6mU60feoq+ietYuogC3bZpJs818rrCmplbVyAs4fpWw0BlKRic4yQQVuO j/ou0vQDxEP3dUeeVITiSyEmAUheHwJpqZOmugBcoAmmg7Z/JAXvxbNEKxblSE0ovG +sT3GCZwWOfAzbqo08d6e0srfq4csdn9XMwlUpvmIYMffck3fuF67iXNY5JhCQ4glt 6Iu63USJi+2NA== From: Shreeya Patel To: jic23@kernel.org, lars@metafoo.de, heiko@sntech.de, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, sebastian.reichel@collabora.com Cc: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, gustavo.padovan@collabora.com, kernel@collabora.com, serge.broslavsky@collabora.com, Shreeya Patel Subject: [PATCH v3 6/8] iio: adc: rockchip_saradc: Use dev_err_probe Date: Sun, 4 Jun 2023 00:23:38 +0530 Message-Id: <20230603185340.13838-7-shreeya.patel@collabora.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20230603185340.13838-1-shreeya.patel@collabora.com> References: <20230603185340.13838-1-shreeya.patel@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Use dev_err_probe instead of dev_err in probe function, which simplifies code a little bit and prints the error code. Signed-off-by: Shreeya Patel --- Changes in v3 - No change Changes in v2 - No change drivers/iio/adc/rockchip_saradc.c | 45 ++++++++++++++----------------- 1 file changed, 20 insertions(+), 25 deletions(-) diff --git a/drivers/iio/adc/rockchip_saradc.c b/drivers/iio/adc/rockchip_saradc.c index 436e219984fd..921844d9232d 100644 --- a/drivers/iio/adc/rockchip_saradc.c +++ b/drivers/iio/adc/rockchip_saradc.c @@ -425,25 +425,23 @@ static int rockchip_saradc_probe(struct platform_device *pdev) return -ENODEV; indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*info)); - if (!indio_dev) { - dev_err(&pdev->dev, "failed allocating iio device\n"); - return -ENOMEM; - } + if (!indio_dev) + return dev_err_probe(&pdev->dev, -ENOMEM, + "failed allocating iio device\n"); + info = iio_priv(indio_dev); match_data = of_device_get_match_data(&pdev->dev); - if (!match_data) { - dev_err(&pdev->dev, "failed to match device\n"); - return -ENODEV; - } + if (!match_data) + return dev_err_probe(&pdev->dev, -ENODEV, + "failed to match device\n"); info->data = match_data; /* Sanity check for possible later IP variants with more channels */ - if (info->data->num_channels > SARADC_MAX_CHANNELS) { - dev_err(&pdev->dev, "max channels exceeded"); - return -EINVAL; - } + if (info->data->num_channels > SARADC_MAX_CHANNELS) + return dev_err_probe(&pdev->dev, -EINVAL, + "max channels exceeded"); info->regs = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(info->regs)) @@ -491,23 +489,20 @@ static int rockchip_saradc_probe(struct platform_device *pdev) * This may become user-configurable in the future. */ ret = clk_set_rate(info->clk, info->data->clk_rate); - if (ret < 0) { - dev_err(&pdev->dev, "failed to set adc clk rate, %d\n", ret); - return ret; - } + if (ret < 0) + return dev_err_probe(&pdev->dev, ret, + "failed to set adc clk rate\n"); ret = regulator_enable(info->vref); - if (ret < 0) { - dev_err(&pdev->dev, "failed to enable vref regulator\n"); - return ret; - } + if (ret < 0) + return dev_err_probe(&pdev->dev, ret, + "failed to enable vref regulator\n"); + ret = devm_add_action_or_reset(&pdev->dev, rockchip_saradc_regulator_disable, info); - if (ret) { - dev_err(&pdev->dev, "failed to register devm action, %d\n", - ret); - return ret; - } + if (ret) + return dev_err_probe(&pdev->dev, ret, + "failed to register devm action\n"); ret = regulator_get_voltage(info->vref); if (ret < 0) From patchwork Sat Jun 3 18:53:39 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shreeya Patel X-Patchwork-Id: 689117 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 28D81C77B73 for ; Sat, 3 Jun 2023 18:55:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229823AbjFCSzZ (ORCPT ); Sat, 3 Jun 2023 14:55:25 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36482 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229807AbjFCSzX (ORCPT ); Sat, 3 Jun 2023 14:55:23 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 06C2110C7; Sat, 3 Jun 2023 11:55:03 -0700 (PDT) Received: from localhost.localdomain (unknown [IPv6:2405:201:0:21ea:e49:10dd:40c0:e842]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: shreeya) by madras.collabora.co.uk (Postfix) with ESMTPSA id D621066031BB; Sat, 3 Jun 2023 19:54:59 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1685818502; bh=jSXs78i99G06gintRwSg5+8JsDLxQU7hBBHV8+/cw28=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=YrTmPgT0nSO/i2DjLbZUkzrVO16s+Toq3RBgc13mU2Tx5NsBYKV1v7q/1A6qYxnO5 D42btqX0DnC7nwxrv4Nl4l9m0SjrERXdCVK1cg4JxH6CEtBA7reDG6wEnw1/uzqePn RqWvL7hkKxhphFSkAU3KhaBRGICbO7oiRuEZ0HGSoiGalEOf+mK2ZGHP7WC4ZVEIHT lIJqXqL1ZSAUMa9gat4ux7DUaqFByOxbnlgzgd29XTb0kieH96v98h9XTlufUeuB+f vFB6DopJjft/kHxRDQUZV8E/B+JMUOgi17gQR9iZ0P1v2r3ZM4oA009jXiGqhb/I2j rc1E+JisZRj9w== From: Shreeya Patel To: jic23@kernel.org, lars@metafoo.de, heiko@sntech.de, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, sebastian.reichel@collabora.com Cc: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, gustavo.padovan@collabora.com, kernel@collabora.com, serge.broslavsky@collabora.com, Shreeya Patel Subject: [PATCH v3 7/8] arm64: dts: rockchip: Add DT node for ADC support in RK3588 Date: Sun, 4 Jun 2023 00:23:39 +0530 Message-Id: <20230603185340.13838-8-shreeya.patel@collabora.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20230603185340.13838-1-shreeya.patel@collabora.com> References: <20230603185340.13838-1-shreeya.patel@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add DT node for ADC support in RK3588. Signed-off-by: Shreeya Patel --- Changes in v3 - No change Changes in v2 - No change arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi index 5d010f34a7f7..9cfa7ba97461 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi @@ -1913,6 +1913,18 @@ dmac2: dma-controller@fed10000 { #dma-cells = <1>; }; + saradc: saradc@fec10000 { + compatible = "rockchip,rk3588-saradc"; + reg = <0x0 0xfec10000 0x0 0x10000>; + interrupts = ; + #io-channel-cells = <1>; + clocks = <&cru CLK_SARADC>, <&cru PCLK_SARADC>; + clock-names = "saradc", "apb_pclk"; + resets = <&cru SRST_P_SARADC>; + reset-names = "saradc-apb"; + status = "disabled"; + }; + system_sram2: sram@ff001000 { compatible = "mmio-sram"; reg = <0x0 0xff001000 0x0 0xef000>; From patchwork Sat Jun 3 18:53:40 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shreeya Patel X-Patchwork-Id: 688836 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 187CDC7EE2D for ; Sat, 3 Jun 2023 18:55:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229692AbjFCSzf (ORCPT ); Sat, 3 Jun 2023 14:55:35 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36710 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229601AbjFCSzf (ORCPT ); Sat, 3 Jun 2023 14:55:35 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E2BACE6B; Sat, 3 Jun 2023 11:55:13 -0700 (PDT) Received: from localhost.localdomain (unknown [IPv6:2405:201:0:21ea:e49:10dd:40c0:e842]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: shreeya) by madras.collabora.co.uk (Postfix) with ESMTPSA id 0D5CD6603050; Sat, 3 Jun 2023 19:55:04 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1685818508; bh=8S7OKZmsezN6RAz8kQrAHp0icflqSiGjbX9ZA0jDAwA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=QWmWePs19ts8sVUd4Z4OscrkOetjDVbAaFedKZFjEMnXmn2su4sDSPtsGHDjUAHjG bQwclcUFme+Pb7TeUB4X7eJJOsP1qnr46OVHC2HviY62rJRhBaHBsyS2MTdY46Ki+S VcF+ijqRifz0EFLjk9JsCwogHo3M4cPS8OzN+hfzBa5VG3Fbpbn7chHWaWQMqgZdkF 8w5Zh2S3ZuxhCOBc3YfIXPeaGlTXmrQNoEzCLXlStFIWJtR/hll94cy2BkMnG4kO/S fiSJ+E0KuzfkCz2IXvx560GjVaggcC0i9xkgwjKzV3xbFLDd22iL1bih51DlEpOpOD cj807GFcEHiMA== From: Shreeya Patel To: jic23@kernel.org, lars@metafoo.de, heiko@sntech.de, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, sebastian.reichel@collabora.com Cc: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, gustavo.padovan@collabora.com, kernel@collabora.com, serge.broslavsky@collabora.com, Shreeya Patel , Krzysztof Kozlowski Subject: [PATCH v3 8/8] dt-bindings: iio: adc: Add rockchip,rk3588-saradc string Date: Sun, 4 Jun 2023 00:23:40 +0530 Message-Id: <20230603185340.13838-9-shreeya.patel@collabora.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20230603185340.13838-1-shreeya.patel@collabora.com> References: <20230603185340.13838-1-shreeya.patel@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add rockchip,rk3588-saradc compatible string. Signed-off-by: Shreeya Patel Acked-by: Krzysztof Kozlowski --- Changes in v3 - No change Changes in v2 - Add an Acked-by tag. Documentation/devicetree/bindings/iio/adc/rockchip-saradc.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.yaml b/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.yaml index da50b529c157..11c27ea451c8 100644 --- a/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.yaml +++ b/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.yaml @@ -21,6 +21,7 @@ properties: - rockchip,rk3308-saradc - rockchip,rk3328-saradc - rockchip,rk3568-saradc + - rockchip,rk3588-saradc - rockchip,rv1108-saradc - rockchip,rv1126-saradc - const: rockchip,rk3399-saradc