From patchwork Tue Jun 6 12:43:52 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 690267 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4B286C7EE31 for ; Tue, 6 Jun 2023 12:44:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237690AbjFFMoi (ORCPT ); Tue, 6 Jun 2023 08:44:38 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43504 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237162AbjFFMog (ORCPT ); Tue, 6 Jun 2023 08:44:36 -0400 Received: from mail-lj1-x236.google.com (mail-lj1-x236.google.com [IPv6:2a00:1450:4864:20::236]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 33C7D1704 for ; Tue, 6 Jun 2023 05:44:10 -0700 (PDT) Received: by mail-lj1-x236.google.com with SMTP id 38308e7fff4ca-2b1b86146afso45456161fa.3 for ; Tue, 06 Jun 2023 05:44:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1686055448; x=1688647448; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=HwN0tI2Kl+T0HN09yLqjcLaiWYt+x33veuBBB/2tgTQ=; b=aVWZFuHUTRWDrX0ticH4FlzHopsuDKvHUr124ajPfFWICxW6XYstyo1cqBGcB1hjJo SzOlOJ3v3H0PXU2Z+AJTmtihRZbKjLYpP1pCRdnD/oD/6KPqgXrzjP15M442rAmVWF+w cXtw1HZdvMYKbMBpnASuMSyILmM1QqNn4IB0VCjqCvRWMiT3xVqUho8ukTIvHtcne2ND isBrW1qcAVtJafjViAOEcb0zs+8J8lrNNwNDyCyzZ17h7m0D4dGUlacHszw2bELdpIbT XIUJF7tAtVg26qTJ1sWSjFTGkZBvaAvZb7mu7PC4aPT+CkdXmIhmL9iS9e7+oVujy1TC 8cOg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1686055448; x=1688647448; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=HwN0tI2Kl+T0HN09yLqjcLaiWYt+x33veuBBB/2tgTQ=; b=jnUYn8cBzfL2KUCOlpSRGZ+OmSOngoo3hncXUEIbD8j15AnbIBhF964JC91u3J5d2N bVmr3lUxJLebEhM9zAjrmkKerddLa3VW6HXct3eVAs12r6AHBkvdGTJY5NwaMv1dg1Q3 4fniDjZgvUK3SCE+o2+OE5Ozhjo6AWEF7UqC2C7WedtZKIkcOLYgdU7eHg2+wODBgZDm Ex/5Fo/2nfZq2kifaJpNW1PW1IpdYiInqK46mspEBQ/pjoDClJXuj1GOD4laJZjBNOM6 3bF2OhEWdTGCMbOm3LxuS1fBQhBCAq4TEzhMeA8G8R99tntq8QE09+v40lUbw/skSHHo sbRQ== X-Gm-Message-State: AC+VfDylvAmiU8cbjcLdZXww2765Aov3566WOXeMcd6mqxHF0Wki44z4 85YSeZXuaUBUCzgGtI8ilRqToA== X-Google-Smtp-Source: ACHHUZ6aO/1pq8KEvhZVd8M0EaZRDyi2x3/mS986KEl4lpoS9FLEUfcwiol40awMVLj9BbM/1PnLkw== X-Received: by 2002:a2e:9258:0:b0:2ac:dd01:e169 with SMTP id v24-20020a2e9258000000b002acdd01e169mr993850ljg.40.1686055448226; Tue, 06 Jun 2023 05:44:08 -0700 (PDT) Received: from [192.168.1.101] (abyl150.neoplus.adsl.tpnet.pl. [83.9.31.150]) by smtp.gmail.com with ESMTPSA id u23-20020a2e9f17000000b002a9ebff8431sm1830823ljk.94.2023.06.06.05.44.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 06 Jun 2023 05:44:07 -0700 (PDT) From: Konrad Dybcio Date: Tue, 06 Jun 2023 14:43:52 +0200 Subject: [PATCH v6 01/12] dt-bindings: display/msm: dsi-controller-main: Add SM6350 MIME-Version: 1.0 Message-Id: <20230411-topic-straitlagoon_mdss-v6-1-dee6a882571b@linaro.org> References: <20230411-topic-straitlagoon_mdss-v6-0-dee6a882571b@linaro.org> In-Reply-To: <20230411-topic-straitlagoon_mdss-v6-0-dee6a882571b@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Krishna Manikandan , Will Deacon , Robin Murphy , Joerg Roedel , Conor Dooley Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev, Konrad Dybcio , Rob Herring X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1686055444; l=1129; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=jRckpE5DBdoe5VmYMwGlXlu4F2L97YNKmiEsTH+Z5Jc=; b=kpFcKUbuEtgTQtQl2WDDIygCPWJ3FbhWGRd2lOkRMB99UVp6BQaxv4NPaP1Br9hU0SNvditq6 nCiQe0g3DZXBUQZexQr5BOBbwfYCSYUsPu8ssuRodOg2s9+x9rkQOu6 X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add the DSI host found on SM6350. Acked-by: Rob Herring Signed-off-by: Konrad Dybcio --- Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml b/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml index 660e0f496826..8081ced7b297 100644 --- a/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml +++ b/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml @@ -27,6 +27,7 @@ properties: - qcom,sdm660-dsi-ctrl - qcom,sdm845-dsi-ctrl - qcom,sm6115-dsi-ctrl + - qcom,sm6350-dsi-ctrl - qcom,sm8150-dsi-ctrl - qcom,sm8250-dsi-ctrl - qcom,sm8350-dsi-ctrl @@ -299,6 +300,7 @@ allOf: contains: enum: - qcom,msm8998-dsi-ctrl + - qcom,sm6350-dsi-ctrl then: properties: clocks: From patchwork Tue Jun 6 12:43:53 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 689832 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F349DC7EE39 for ; Tue, 6 Jun 2023 12:44:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237685AbjFFMoj (ORCPT ); Tue, 6 Jun 2023 08:44:39 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43514 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237680AbjFFMoh (ORCPT ); Tue, 6 Jun 2023 08:44:37 -0400 Received: from mail-lj1-x22b.google.com (mail-lj1-x22b.google.com [IPv6:2a00:1450:4864:20::22b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B639A1710 for ; Tue, 6 Jun 2023 05:44:13 -0700 (PDT) Received: by mail-lj1-x22b.google.com with SMTP id 38308e7fff4ca-2b1b3836392so51588641fa.0 for ; Tue, 06 Jun 2023 05:44:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1686055450; x=1688647450; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=VBUZ1meZbbD/0QuuPzRJYb6UmJbfmwDGrvNyug3ZzLk=; b=jnSK7+1zpmu991qwBvJ3ZIlu+slBKXGIaE6jPEh+vp4xRg4XK5Eg0Ulf+Dh4cvUger aVCFNYbhes3vqHGdfRUemxoEAFAVH1StyXTGhuaXHeT4EXnWTmtZ0iiPqlevEP+9BiJm OkmZt5nXShGf4ChSji90Kq7vSYB31u/f25sEM4OV5WecEdtV2clD0ym4yolryzqCc50z YEfsjEbEWYfJNZdquwFH4BYpge9qzfZS9QtRYWfgedfVXf25wrtVGFi65aMMoWJzfZs6 uljNOg5AvakquOdwTs4PE++mwRYu3IUBCezN1fPaksOQoDCd7raQ3/blX4U1gVp0j1HF qiAA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1686055450; x=1688647450; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=VBUZ1meZbbD/0QuuPzRJYb6UmJbfmwDGrvNyug3ZzLk=; b=XY5oJ+CSQ/C2hpk1PNiInQTU7gRC9mOijSVgI2EPClLEhMa4VmO9EDIUSP1TWuaiu0 nF2/zMQFRqyHNJ0XkjgWChxHLINk5iQOL0jQcOfxlCTU+mbNHzF6XYkRZvdyFhZKrq7n UNSCpy2uffG8bgPU/ShFR8Ib3ZAUdI50f4OxPxH6+6WJRLlCEcLoY8uAcAdP+7urvwLV nQugYXzdRqsphmsguV0FTsXWPTsSg43GwhoTbz3lVZrVKMAV1eHMMXXNNYLE7b/rUbat +iWtV1MITDpAShFL7mldYwcBVekLXlWDSXTlY8SIVDkbMIzbW5Fe5DfziDBX77Ri93wY c+cw== X-Gm-Message-State: AC+VfDxp3V/yqV+LdiBdHgPWw6ZNcIsXpeCzXi9ZQxBd8BPVjB9BNPaM OYvyK8XuIGGMLd84/UKvpPpBGXR02y4ZF5ZfAHY= X-Google-Smtp-Source: ACHHUZ5cXQn+wOXfu/FSV6zagKC6P/GKQV30mrRDGFF+nDCp51PKEcK6E+D5czHT1DI6IDbNtQ2YxA== X-Received: by 2002:a2e:8195:0:b0:2b0:5a04:a5bd with SMTP id e21-20020a2e8195000000b002b05a04a5bdmr1206729ljg.42.1686055449867; Tue, 06 Jun 2023 05:44:09 -0700 (PDT) Received: from [192.168.1.101] (abyl150.neoplus.adsl.tpnet.pl. [83.9.31.150]) by smtp.gmail.com with ESMTPSA id u23-20020a2e9f17000000b002a9ebff8431sm1830823ljk.94.2023.06.06.05.44.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 06 Jun 2023 05:44:09 -0700 (PDT) From: Konrad Dybcio Date: Tue, 06 Jun 2023 14:43:53 +0200 Subject: [PATCH v6 02/12] dt-bindings: display/msm: dsi-controller-main: Add SM6375 MIME-Version: 1.0 Message-Id: <20230411-topic-straitlagoon_mdss-v6-2-dee6a882571b@linaro.org> References: <20230411-topic-straitlagoon_mdss-v6-0-dee6a882571b@linaro.org> In-Reply-To: <20230411-topic-straitlagoon_mdss-v6-0-dee6a882571b@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Krishna Manikandan , Will Deacon , Robin Murphy , Joerg Roedel , Conor Dooley Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev, Konrad Dybcio , Rob Herring X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1686055444; l=1145; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=JGKnL4ZgwMWnoMOWE82d7ZP3M4qFGKoVV5n7o2Z/y7Q=; b=lM/5jSBScLTQJPlH/4rHxJICwUc4pVMdaa7jz7nt1RK8NQYVckLGy55vAm97QbYEzpbzfXiDU CRpyempUinMAK9WwmDGdJUFc3uocptnLkZc6eiZUH1jAdgg5le/FicX X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add the DSI host found on SM6375. Acked-by: Rob Herring Signed-off-by: Konrad Dybcio --- Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml b/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml index 8081ced7b297..01848bdd5873 100644 --- a/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml +++ b/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml @@ -28,6 +28,7 @@ properties: - qcom,sdm845-dsi-ctrl - qcom,sm6115-dsi-ctrl - qcom,sm6350-dsi-ctrl + - qcom,sm6375-dsi-ctrl - qcom,sm8150-dsi-ctrl - qcom,sm8250-dsi-ctrl - qcom,sm8350-dsi-ctrl @@ -368,6 +369,7 @@ allOf: enum: - qcom,sdm845-dsi-ctrl - qcom,sm6115-dsi-ctrl + - qcom,sm6375-dsi-ctrl then: properties: clocks: From patchwork Tue Jun 6 12:43:54 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 690266 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E62F7C7EE2F for ; Tue, 6 Jun 2023 12:44:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236800AbjFFMok (ORCPT ); Tue, 6 Jun 2023 08:44:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43516 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236368AbjFFMoi (ORCPT ); Tue, 6 Jun 2023 08:44:38 -0400 Received: from mail-lf1-x12e.google.com (mail-lf1-x12e.google.com [IPv6:2a00:1450:4864:20::12e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5DD101712 for ; Tue, 6 Jun 2023 05:44:14 -0700 (PDT) Received: by mail-lf1-x12e.google.com with SMTP id 2adb3069b0e04-4f62d93f38aso2447412e87.0 for ; Tue, 06 Jun 2023 05:44:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1686055451; x=1688647451; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=ZtO5yZHuSM0t6c/z6X2y/6soY6yAi0KjD9hnj5CK/NU=; b=JkVQ+vlBiy5SsARr1oxpTEpZiPuNikdXZK1X5zUDZDuoy1j/p9XoKY1vV3mByXlkRO uDuNUz4zKKRoLuAByb2Jogv3Z5ks3tWdrtobpA7TYo5woi6t3vVMle73kZybwK2kF17s 7B++dwLR4cxQsOURr2jFrHXWkmrXaFvbSlT4dZZpl65/ZHqrUAsiEfH0ckoGF5sw5HLl 5QrajCUCDQeMalbBnLvtKPjkPZeHnwVxvVYLUJrkBUaLs1rK8QZI1tuJifrL09NuK8XF zV8OW8IVuc60s+EqSDJoOzBmTnG9vde0m8NxFyhLQTxysDjBRvfu+OePAZXXKQyXkAm4 4Zxw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1686055451; x=1688647451; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ZtO5yZHuSM0t6c/z6X2y/6soY6yAi0KjD9hnj5CK/NU=; b=QryAF/KAW+6mHjNvDDpU3MC6F7K9h6GJ5cZt9Ay/jcdWOt8ZdMcBzk6OaBCZf2pbKk A7CCdnrsFhe+2Eyn7R7BrVpXlCkod+/4ZsWqfmVZQeZeifR4niTqU8G8S6n5CC9TfKb6 lIBvEP5NmGuwR9jSWInMpjWGpUvK4hz5l8fwJoXmo+3tfSMgeVvkSm8EC6/kjdpo84DJ qBCKAKuoLMxVmtFrPGBUv3t/CnIlD6eLDQ5YIBPl/wkcRWKiWF+h0mt5UO8oBVd2FAoa 8AbsdkCV+kyjuyiSYLn8s06g8+e3Jm30hbaj7w0u1aEeVWuQdF6GsaZSOaYDjZ7ZaOOf Eovg== X-Gm-Message-State: AC+VfDxP/XvAgpmdLz/zaSVaKjCozmW0JCgWagnXvVTvpJ2hgJCrqg5H OzhcFEW7gSCqLN9GF1lSrlwiJQ== X-Google-Smtp-Source: ACHHUZ4qu3rtG31QF/b3MvYS8AxWhGz2z1v7iP/p0tcwkqC+YgogLZ9rWxWfacJ05P9IxlvSNcvCUw== X-Received: by 2002:a05:6512:518:b0:4f1:4040:8143 with SMTP id o24-20020a056512051800b004f140408143mr739001lfb.60.1686055451516; Tue, 06 Jun 2023 05:44:11 -0700 (PDT) Received: from [192.168.1.101] (abyl150.neoplus.adsl.tpnet.pl. [83.9.31.150]) by smtp.gmail.com with ESMTPSA id u23-20020a2e9f17000000b002a9ebff8431sm1830823ljk.94.2023.06.06.05.44.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 06 Jun 2023 05:44:11 -0700 (PDT) From: Konrad Dybcio Date: Tue, 06 Jun 2023 14:43:54 +0200 Subject: [PATCH v6 03/12] dt-bindings: display/msm: sc7180-dpu: Describe SM6350 and SM6375 MIME-Version: 1.0 Message-Id: <20230411-topic-straitlagoon_mdss-v6-3-dee6a882571b@linaro.org> References: <20230411-topic-straitlagoon_mdss-v6-0-dee6a882571b@linaro.org> In-Reply-To: <20230411-topic-straitlagoon_mdss-v6-0-dee6a882571b@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Krishna Manikandan , Will Deacon , Robin Murphy , Joerg Roedel , Conor Dooley Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev, Konrad Dybcio , Krzysztof Kozlowski X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1686055444; l=2184; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=kGZixoL9TdPt1fMj+QOtYWJQqvd3Vxxtj53Bf9LtZ4g=; b=Ha0c1GfN6BOvbA1JGOlqNyY8GUzXWKddEAnl3zWJJypmPfDROIBAWotA7BM9urvvax9qz3WoC Z0wfcvYoHdvAwUVAf45k4Px4t4z7IbxF7wB3gjfGR9gB+zGS3FfJyMh X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org SC7180, SM6350 and SM6375 use a rather similar hw setup for DPU, with the main exception being that the last one requires an additional throttle clock. It is not well understood yet, but failing to toggle it on makes the display hardware stall and not output any frames. Document SM6350 and SM6375 DPU. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Konrad Dybcio --- .../bindings/display/msm/qcom,sc7180-dpu.yaml | 23 +++++++++++++++++++++- 1 file changed, 22 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sc7180-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sc7180-dpu.yaml index 1fb8321d9ee8..630b11480496 100644 --- a/Documentation/devicetree/bindings/display/msm/qcom,sc7180-dpu.yaml +++ b/Documentation/devicetree/bindings/display/msm/qcom,sc7180-dpu.yaml @@ -13,7 +13,10 @@ $ref: /schemas/display/msm/dpu-common.yaml# properties: compatible: - const: qcom,sc7180-dpu + enum: + - qcom,sc7180-dpu + - qcom,sm6350-dpu + - qcom,sm6375-dpu reg: items: @@ -26,6 +29,7 @@ properties: - const: vbif clocks: + minItems: 6 items: - description: Display hf axi clock - description: Display ahb clock @@ -33,8 +37,10 @@ properties: - description: Display lut clock - description: Display core clock - description: Display vsync clock + - description: Display core throttle clock clock-names: + minItems: 6 items: - const: bus - const: iface @@ -42,6 +48,7 @@ properties: - const: lut - const: core - const: vsync + - const: throttle required: - compatible @@ -52,6 +59,20 @@ required: unevaluatedProperties: false +allOf: + - if: + properties: + compatible: + const: qcom,sm6375-dpu + + then: + properties: + clocks: + minItems: 7 + + clock-names: + minItems: 7 + examples: - | #include From patchwork Tue Jun 6 12:43:55 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 689831 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 61A05C77B73 for ; Tue, 6 Jun 2023 12:45:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237213AbjFFMp0 (ORCPT ); Tue, 6 Jun 2023 08:45:26 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43800 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237705AbjFFMox (ORCPT ); Tue, 6 Jun 2023 08:44:53 -0400 Received: from mail-lj1-x236.google.com (mail-lj1-x236.google.com [IPv6:2a00:1450:4864:20::236]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0D66C171E for ; Tue, 6 Jun 2023 05:44:17 -0700 (PDT) Received: by mail-lj1-x236.google.com with SMTP id 38308e7fff4ca-2b15a327c20so73808841fa.1 for ; Tue, 06 Jun 2023 05:44:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1686055453; x=1688647453; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=0edfuQZBe92SJSvcC3fCuI+rnGX/53hD+nlMiNcNnwI=; b=Xjrg74NG7XaC8T/s//YcDBFvjicYTDPkLvMna0u5k6hZBIeTwp3FdRXisG8vItHrKH IhrkI9svzYWYkyM6K3yi37LYVAQRLnJdW53ZDF/G593W7SOk6lxuqBvOMVBO3uZmFm7F 9xJb4e78Z8vmzj/fFkbmaREyQZBwPZud+gso5HPANfca5CJkH57fE+pMNA98jdduWfgQ /Hluzypd/eKTC81xRjNnVRIbN+AqKYJMUD99R8Zd0pkxKehZ2UrxASPEo2WQYYbryjTh Eq2Hl0zAScPWsNYa7wRiahhx1Zyq8bYG6YaXXbMWftm3mMEZCFt93c1NSvDnLgxPpqKv zf/A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1686055453; x=1688647453; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=0edfuQZBe92SJSvcC3fCuI+rnGX/53hD+nlMiNcNnwI=; b=VPWav6rQJ4dehBzEkVbKUKZtp27NcOS+Cb1FrfNXAxgSiz9LChDf4W1UDflPfHHO35 Me1gTAuCkRGLZ0WBYISXlLNTuVFl2WhyWoSMRJvJmV5lK2njaIaPO0bijNm56AeXldlP froKntNFbjCohylAr6+mZH6/cbmVVN8HUyf79VJBoRt7BtFi8rmR15Vi2Nk5KEzfqDtI cCgjw4xXQPcFm/EVy5fNcard1iqG5MihCPFhZJpqeQwdTpb5nkCjDX/02q+bBtmUujvP 6Sl6F52Y1QpQatpkoHhmS3R+EpLx7HXDH0M0uJ4dqy2lBgUL1MtZBPVljs+s3s7AxAiO AhyQ== X-Gm-Message-State: AC+VfDwAZa3PrObejqOLGPx5pwVtE4jfriPHdsPKRk4KyOt+L1auFvDM ef3EvO5gc0tznmpuwvk+oXKKdw== X-Google-Smtp-Source: ACHHUZ5YQJxoQYAbcPHwVUyFLDt2LqRjayvGJ1GQV2EhZXiQCnXAgy9Z6TR09421LzmQB9ve+Bg6xQ== X-Received: by 2002:a2e:82d0:0:b0:2b0:297c:cbdf with SMTP id n16-20020a2e82d0000000b002b0297ccbdfmr1173875ljh.1.1686055453194; Tue, 06 Jun 2023 05:44:13 -0700 (PDT) Received: from [192.168.1.101] (abyl150.neoplus.adsl.tpnet.pl. [83.9.31.150]) by smtp.gmail.com with ESMTPSA id u23-20020a2e9f17000000b002a9ebff8431sm1830823ljk.94.2023.06.06.05.44.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 06 Jun 2023 05:44:12 -0700 (PDT) From: Konrad Dybcio Date: Tue, 06 Jun 2023 14:43:55 +0200 Subject: [PATCH v6 04/12] dt-bindings: display/msm: Add SM6350 MDSS MIME-Version: 1.0 Message-Id: <20230411-topic-straitlagoon_mdss-v6-4-dee6a882571b@linaro.org> References: <20230411-topic-straitlagoon_mdss-v6-0-dee6a882571b@linaro.org> In-Reply-To: <20230411-topic-straitlagoon_mdss-v6-0-dee6a882571b@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Krishna Manikandan , Will Deacon , Robin Murphy , Joerg Roedel , Conor Dooley Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1686055444; l=7047; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=400q0ucjl23w4+vTpqJH2ZmWXnq9ZUNI06koIZBBqe4=; b=+0i05/U9OtyHRcL082dOVcVEdUFOF4fS7LrxyXG/vKfXeFycQw+wpYNlpket/HsUGfU+4NXwW QhW77ZstcABCW7chZnTMWYoYFa8jiHyw6aqBeRFAjIrsCgDU4o827i/ X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Document the SM6350 MDSS. Signed-off-by: Konrad Dybcio Reviewed-by: Krzysztof Kozlowski --- .../bindings/display/msm/qcom,sm6350-mdss.yaml | 213 +++++++++++++++++++++ 1 file changed, 213 insertions(+) diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm6350-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm6350-mdss.yaml new file mode 100644 index 000000000000..ed0ad194d4ce --- /dev/null +++ b/Documentation/devicetree/bindings/display/msm/qcom,sm6350-mdss.yaml @@ -0,0 +1,213 @@ +# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/msm/qcom,sm6350-mdss.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm SM6350 Display MDSS + +maintainers: + - Krishna Manikandan + +description: + SM6350 MSM Mobile Display Subsystem (MDSS), which encapsulates sub-blocks + like DPU display controller, DSI and DP interfaces etc. + +$ref: /schemas/display/msm/mdss-common.yaml# + +properties: + compatible: + const: qcom,sm6350-mdss + + clocks: + items: + - description: Display AHB clock from gcc + - description: Display AXI clock from gcc + - description: Display core clock + + clock-names: + items: + - const: iface + - const: bus + - const: core + + iommus: + maxItems: 1 + + interconnects: + maxItems: 2 + + interconnect-names: + maxItems: 2 + +patternProperties: + "^display-controller@[0-9a-f]+$": + type: object + properties: + compatible: + const: qcom,sm6350-dpu + + "^dsi@[0-9a-f]+$": + type: object + properties: + compatible: + items: + - const: qcom,sm6350-dsi-ctrl + - const: qcom,mdss-dsi-ctrl + + "^phy@[0-9a-f]+$": + type: object + properties: + compatible: + const: qcom,dsi-phy-10nm + +unevaluatedProperties: false + +examples: + - | + #include + #include + #include + #include + #include + + display-subsystem@ae00000 { + compatible = "qcom,sm6350-mdss"; + reg = <0x0ae00000 0x1000>; + reg-names = "mdss"; + + power-domains = <&dispcc MDSS_GDSC>; + + clocks = <&gcc GCC_DISP_AHB_CLK>, + <&gcc GCC_DISP_AXI_CLK>, + <&dispcc DISP_CC_MDSS_MDP_CLK>; + clock-names = "iface", "bus", "core"; + + interrupts = ; + interrupt-controller; + #interrupt-cells = <1>; + + iommus = <&apps_smmu 0x800 0x2>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + display-controller@ae01000 { + compatible = "qcom,sm6350-dpu"; + reg = <0x0ae01000 0x8f000>, + <0x0aeb0000 0x2008>; + reg-names = "mdp", "vbif"; + + clocks = <&gcc GCC_DISP_AXI_CLK>, + <&dispcc DISP_CC_MDSS_AHB_CLK>, + <&dispcc DISP_CC_MDSS_ROT_CLK>, + <&dispcc DISP_CC_MDSS_MDP_LUT_CLK>, + <&dispcc DISP_CC_MDSS_MDP_CLK>, + <&dispcc DISP_CC_MDSS_VSYNC_CLK>; + clock-names = "bus", "iface", "rot", "lut", "core", + "vsync"; + + assigned-clocks = <&dispcc DISP_CC_MDSS_MDP_CLK>, + <&dispcc DISP_CC_MDSS_VSYNC_CLK>, + <&dispcc DISP_CC_MDSS_ROT_CLK>, + <&dispcc DISP_CC_MDSS_AHB_CLK>; + assigned-clock-rates = <300000000>, + <19200000>, + <19200000>, + <19200000>; + + interrupt-parent = <&mdss>; + interrupts = <0>; + operating-points-v2 = <&mdp_opp_table>; + power-domains = <&rpmhpd SM6350_CX>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + dpu_intf1_out: endpoint { + remote-endpoint = <&dsi0_in>; + }; + }; + + port@1 { + reg = <1>; + dpu_intf2_out: endpoint { + remote-endpoint = <&dsi1_in>; + }; + }; + }; + }; + + dsi@ae94000 { + compatible = "qcom,sm6350-dsi-ctrl", "qcom,mdss-dsi-ctrl"; + reg = <0x0ae94000 0x400>; + reg-names = "dsi_ctrl"; + + interrupt-parent = <&mdss>; + interrupts = <4>; + + clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>, + <&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>, + <&dispcc DISP_CC_MDSS_PCLK0_CLK>, + <&dispcc DISP_CC_MDSS_ESC0_CLK>, + <&dispcc DISP_CC_MDSS_AHB_CLK>, + <&gcc GCC_DISP_AXI_CLK>; + clock-names = "byte", + "byte_intf", + "pixel", + "core", + "iface", + "bus"; + + assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>, + <&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>; + assigned-clock-parents = <&dsi0_phy 0>, <&dsi0_phy 1>; + + operating-points-v2 = <&dsi_opp_table>; + power-domains = <&rpmhpd SM6350_MX>; + + phys = <&dsi0_phy>; + phy-names = "dsi"; + + #address-cells = <1>; + #size-cells = <0>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + dsi0_in: endpoint { + remote-endpoint = <&dpu_intf1_out>; + }; + }; + + port@1 { + reg = <1>; + dsi0_out: endpoint { + }; + }; + }; + }; + + dsi0_phy: phy@ae94400 { + compatible = "qcom,dsi-phy-10nm"; + reg = <0x0ae94400 0x200>, + <0x0ae94600 0x280>, + <0x0ae94a00 0x1e0>; + reg-names = "dsi_phy", + "dsi_phy_lane", + "dsi_pll"; + + #clock-cells = <1>; + #phy-cells = <0>; + + clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, <&rpmhcc RPMH_CXO_CLK>; + clock-names = "iface", "ref"; + }; + }; +... From patchwork Tue Jun 6 12:43:56 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 690265 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AA4A4C7EE31 for ; Tue, 6 Jun 2023 12:45:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237717AbjFFMp2 (ORCPT ); Tue, 6 Jun 2023 08:45:28 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43810 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237727AbjFFMoz (ORCPT ); Tue, 6 Jun 2023 08:44:55 -0400 Received: from mail-lj1-x236.google.com (mail-lj1-x236.google.com [IPv6:2a00:1450:4864:20::236]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E2CC410D1 for ; Tue, 6 Jun 2023 05:44:19 -0700 (PDT) Received: by mail-lj1-x236.google.com with SMTP id 38308e7fff4ca-2b1aecef94fso53449531fa.3 for ; Tue, 06 Jun 2023 05:44:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1686055455; x=1688647455; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=sFoSdd2Ga9xo4OLf9TgzlJW0pxuOp7Br133fCLs+4A4=; b=ewzuy33YtuaRoEO4HVp+fyuSuGBUUXaysYn7UBCEdKthklZPcweRwaWrFgMyRWJVHH OClFG7uE7v6+xN/vHAjg96wymyeFKx25K8nAHFUCsR8ZvWNvnhSuzsJLwMiNqzunoS0u QWw3kmk8yak1QJw3R6we8JFTeWBX4TvhD2AmjTVq8BVsmQFMpYMBfyDWIvlWaltnyohI C9pWCV+in2/0e0AGGfJoT2dRhOhVTAGsSjlNIyZtzAG7x2ew8BJ1bYJsk4BWFBvD6GOT JfTyitQQ4a5mgfLj2zGVfrorSS+BH1/ABBGl4uGz2ruB/TLj9BCKSc8bhfNyvwbxFwJA +N5w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1686055455; x=1688647455; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=sFoSdd2Ga9xo4OLf9TgzlJW0pxuOp7Br133fCLs+4A4=; b=TYWoDWj4KZqmNAN+intOqBwMOCZJ32Lr1Sf9+0UjG0SRhN42uZQuCz3Vrnn36l89p0 ihLqRcMjw0FrnlXOVViYFcr8BLFhof0su8ysfGCKvr8qX+/aQDGfPlOwaWRvKD7aTQR+ 1FIU+YxLkCdxNHC5/g3O4y0YBpIa3FpUY3BHQd330fo0uw80mncUojvs9UP+cQLNb780 7xiWVtnjqLLzrP1tTf9wRvrMBWnMK2j81u37/iJYG4gOryY5Ci1+ykZg1nUJYdL19cpJ HxXgydlQd48DoyYZZwqSpd/P9p6rH12TpwvhnBUO1dcpQciTIXlcF4cNmZY1FUeWZD1G e7Ig== X-Gm-Message-State: AC+VfDx+E4poFFWbEzKXf106tIxPzxYl6AxYAzt79wetdgPrSNxHhnRp qtcSQGVnAkugG9HKPMyelyruRg== X-Google-Smtp-Source: ACHHUZ5KgznT/7T7YvovXwVdlPLIVjVIF1CDZjMaRRLb78GoQJaNKzTja6DE+ZKaqYq/Tiu1ShLuMw== X-Received: by 2002:a2e:914d:0:b0:2ac:8f73:1fac with SMTP id q13-20020a2e914d000000b002ac8f731facmr1320209ljg.46.1686055454947; Tue, 06 Jun 2023 05:44:14 -0700 (PDT) Received: from [192.168.1.101] (abyl150.neoplus.adsl.tpnet.pl. [83.9.31.150]) by smtp.gmail.com with ESMTPSA id u23-20020a2e9f17000000b002a9ebff8431sm1830823ljk.94.2023.06.06.05.44.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 06 Jun 2023 05:44:14 -0700 (PDT) From: Konrad Dybcio Date: Tue, 06 Jun 2023 14:43:56 +0200 Subject: [PATCH v6 05/12] dt-bindings: display/msm: Add SM6375 MDSS MIME-Version: 1.0 Message-Id: <20230411-topic-straitlagoon_mdss-v6-5-dee6a882571b@linaro.org> References: <20230411-topic-straitlagoon_mdss-v6-0-dee6a882571b@linaro.org> In-Reply-To: <20230411-topic-straitlagoon_mdss-v6-0-dee6a882571b@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Krishna Manikandan , Will Deacon , Robin Murphy , Joerg Roedel , Conor Dooley Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1686055444; l=7025; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=v7FiZ9/eBCtDRE+yhICmMVudEQ4vN3khQbvWcoX3vmU=; b=E5C/Y++7Ou1FHrGyzi5FSlm9ORMPTPxifHajsUXPfgD5d5QQXKQPU1T95UdAAkBLNs1AMqjGt V3PHOq2zGSeBGHPi4c11Tw7xc22CGG9Sa72FDF268SlUM7Mwi7Zk9kT X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Document the SM6375 MDSS. Signed-off-by: Konrad Dybcio Reviewed-by: Krzysztof Kozlowski --- .../bindings/display/msm/qcom,sm6375-mdss.yaml | 215 +++++++++++++++++++++ 1 file changed, 215 insertions(+) diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm6375-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm6375-mdss.yaml new file mode 100644 index 000000000000..76369a4f7c4d --- /dev/null +++ b/Documentation/devicetree/bindings/display/msm/qcom,sm6375-mdss.yaml @@ -0,0 +1,215 @@ +# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/msm/qcom,sm6375-mdss.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm SM6375 Display MDSS + +maintainers: + - Konrad Dybcio + +description: + SM6375 MSM Mobile Display Subsystem (MDSS), which encapsulates sub-blocks + like DPU display controller, DSI and DP interfaces etc. + +$ref: /schemas/display/msm/mdss-common.yaml# + +properties: + compatible: + const: qcom,sm6375-mdss + + clocks: + items: + - description: Display AHB clock from gcc + - description: Display AHB clock + - description: Display core clock + + clock-names: + items: + - const: iface + - const: ahb + - const: core + + iommus: + maxItems: 1 + + interconnects: + maxItems: 2 + + interconnect-names: + maxItems: 2 + +patternProperties: + "^display-controller@[0-9a-f]+$": + type: object + properties: + compatible: + const: qcom,sm6375-dpu + + "^dsi@[0-9a-f]+$": + type: object + properties: + compatible: + items: + - const: qcom,sm6375-dsi-ctrl + - const: qcom,mdss-dsi-ctrl + + "^phy@[0-9a-f]+$": + type: object + properties: + compatible: + const: qcom,sm6375-dsi-phy-7nm + +unevaluatedProperties: false + +examples: + - | + #include + #include + #include + #include + #include + + display-subsystem@5e00000 { + compatible = "qcom,sm6375-mdss"; + reg = <0x05e00000 0x1000>; + reg-names = "mdss"; + + power-domains = <&dispcc MDSS_GDSC>; + + clocks = <&gcc GCC_DISP_AHB_CLK>, + <&dispcc DISP_CC_MDSS_AHB_CLK>, + <&dispcc DISP_CC_MDSS_MDP_CLK>; + clock-names = "iface", "ahb", "core"; + + interrupts = ; + interrupt-controller; + #interrupt-cells = <1>; + + iommus = <&apps_smmu 0x820 0x2>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + display-controller@5e01000 { + compatible = "qcom,sm6375-dpu"; + reg = <0x05e01000 0x8e030>, + <0x05eb0000 0x2008>; + reg-names = "mdp", "vbif"; + + clocks = <&gcc GCC_DISP_HF_AXI_CLK>, + <&dispcc DISP_CC_MDSS_AHB_CLK>, + <&dispcc DISP_CC_MDSS_ROT_CLK>, + <&dispcc DISP_CC_MDSS_MDP_LUT_CLK>, + <&dispcc DISP_CC_MDSS_MDP_CLK>, + <&dispcc DISP_CC_MDSS_VSYNC_CLK>, + <&gcc GCC_DISP_THROTTLE_CORE_CLK>; + clock-names = "bus", + "iface", + "rot", + "lut", + "core", + "vsync", + "throttle"; + + assigned-clocks = <&dispcc DISP_CC_MDSS_VSYNC_CLK>; + assigned-clock-rates = <19200000>; + + operating-points-v2 = <&mdp_opp_table>; + power-domains = <&rpmpd SM6375_VDDCX>; + + interrupt-parent = <&mdss>; + interrupts = <0>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + dpu_intf1_out: endpoint { + remote-endpoint = <&dsi0_in>; + }; + }; + + port@1 { + reg = <1>; + dpu_intf2_out: endpoint { + remote-endpoint = <&dsi1_in>; + }; + }; + }; + }; + + dsi@5e94000 { + compatible = "qcom,sm6375-dsi-ctrl", "qcom,mdss-dsi-ctrl"; + reg = <0x05e94000 0x400>; + reg-names = "dsi_ctrl"; + + interrupt-parent = <&mdss>; + interrupts = <4>; + + clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>, + <&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>, + <&dispcc DISP_CC_MDSS_PCLK0_CLK>, + <&dispcc DISP_CC_MDSS_ESC0_CLK>, + <&dispcc DISP_CC_MDSS_AHB_CLK>, + <&gcc GCC_DISP_HF_AXI_CLK>; + clock-names = "byte", + "byte_intf", + "pixel", + "core", + "iface", + "bus"; + + assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>, + <&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>; + assigned-clock-parents = <&mdss_dsi0_phy 0>, <&mdss_dsi0_phy 1>; + + operating-points-v2 = <&dsi_opp_table>; + power-domains = <&rpmpd SM6375_VDDMX>; + + phys = <&mdss_dsi0_phy>; + phy-names = "dsi"; + + #address-cells = <1>; + #size-cells = <0>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + dsi0_in: endpoint { + remote-endpoint = <&dpu_intf1_out>; + }; + }; + + port@1 { + reg = <1>; + dsi0_out: endpoint { + }; + }; + }; + }; + + mdss_dsi0_phy: phy@5e94400 { + compatible = "qcom,sm6375-dsi-phy-7nm"; + reg = <0x05e94400 0x200>, + <0x05e94600 0x280>, + <0x05e94900 0x264>; + reg-names = "dsi_phy", + "dsi_phy_lane", + "dsi_pll"; + + #clock-cells = <1>; + #phy-cells = <0>; + + clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, + <&rpmcc RPM_SMD_XO_CLK_SRC>; + clock-names = "iface", "ref"; + }; + }; +... From patchwork Tue Jun 6 12:43:57 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 689830 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 49E96C7EE32 for ; Tue, 6 Jun 2023 12:45:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237707AbjFFMp1 (ORCPT ); Tue, 6 Jun 2023 08:45:27 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43870 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237733AbjFFMo4 (ORCPT ); Tue, 6 Jun 2023 08:44:56 -0400 Received: from mail-lf1-x12f.google.com (mail-lf1-x12f.google.com [IPv6:2a00:1450:4864:20::12f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5AE8410D7 for ; Tue, 6 Jun 2023 05:44:22 -0700 (PDT) Received: by mail-lf1-x12f.google.com with SMTP id 2adb3069b0e04-4f3bb395e69so7701404e87.2 for ; Tue, 06 Jun 2023 05:44:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1686055457; x=1688647457; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=WCxU0vxXmGbAvEA/CFAeL2oMVB/ZtrChsbANbjdiJvc=; b=YcNY1MIKZZnSCD+Zq5+KcvLKJEGJoZ+SnitAnaYafPdwz7+9yGBx8GHa8ENix+k2OF ZnL+HzztSl+188z6mrCzu/rD6rbX8pecm5VsdUp6CnFsgVf1DIgFqtPhq4KL49gc2a6v rCEl2kaURozJiDZBBd8xxWspiwVuZ+joGWQVINGmZ0hCpqeldXOypLG/wguk8SHpWGin zIiTsQ8kg/rn8VR5E9i3gv0VQAtrhUWwTQeKugodEkmdSaf5ekHa4YzbehzE/BmYfg5F RijUThFXZ8/tfUBYWye4OjE4HurhFjWisJnuLxtEk5nKXTOd3BsQfZ5pAuLC6hTD20/J hMvQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1686055457; x=1688647457; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=WCxU0vxXmGbAvEA/CFAeL2oMVB/ZtrChsbANbjdiJvc=; b=MOgKvjSt9QzmVBtoPfE3cqcs5S402DW45WLTFsVbGGinFtRERrkIDosiPJIanH3Tpq w9HSztpLbwAic9uzNXVLsHE5bcDHefe9pYarTDtj2cwtPB+OMwzNLQ2PcXVwE1OuQBx/ n9FMnAOoQPHlWg/cVWcSGJG9WDM1eaRAQ10rXytuuPMuV1p99y1fw9HnWLapW/Etth0R GujtdaVQ2VXaxXiTuF9Tl26NoidZejcy8piRGXxXBtprkQdgS+/6w3MqdGn2sXnauutr TJY/ZCnGgexFrqmlhWcSFWAHjxiZVxv/ieAWyQeZ8K92+TSWOD9EIQH+uMq/0SKa+sAw 1xow== X-Gm-Message-State: AC+VfDz0DVD7Lr5fkcrPggIBN0xkCpzZoQ5/jtZh7OX+/d8sYN0aPi4T SlA38sfo/V2ibTwjHMwUgrFUOg== X-Google-Smtp-Source: ACHHUZ7PHUN3Ge7RMmf9NkMygYhLhlJFMgH548wiOUCVNTirBcbWjvUxGLuIIF5QuIARxNh7ReiTOw== X-Received: by 2002:ac2:46cc:0:b0:4f6:2cd8:5ff4 with SMTP id p12-20020ac246cc000000b004f62cd85ff4mr929970lfo.2.1686055456871; Tue, 06 Jun 2023 05:44:16 -0700 (PDT) Received: from [192.168.1.101] (abyl150.neoplus.adsl.tpnet.pl. [83.9.31.150]) by smtp.gmail.com with ESMTPSA id u23-20020a2e9f17000000b002a9ebff8431sm1830823ljk.94.2023.06.06.05.44.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 06 Jun 2023 05:44:16 -0700 (PDT) From: Konrad Dybcio Date: Tue, 06 Jun 2023 14:43:57 +0200 Subject: [PATCH v6 06/12] drm/msm/dpu: Add SM6350 support MIME-Version: 1.0 Message-Id: <20230411-topic-straitlagoon_mdss-v6-6-dee6a882571b@linaro.org> References: <20230411-topic-straitlagoon_mdss-v6-0-dee6a882571b@linaro.org> In-Reply-To: <20230411-topic-straitlagoon_mdss-v6-0-dee6a882571b@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Krishna Manikandan , Will Deacon , Robin Murphy , Joerg Roedel , Conor Dooley Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev, Konrad Dybcio , Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1686055444; l=9341; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=B42WhXleC/QknzOR7b9BLqSMLtsLc/FVGjctNLOwqyI=; b=B7DwooUllafnwkftDvWwRwN1Zs1RcCYijANiIdSIUkodgcGTzt3VpkM5EUmHm5VSFbHMLDG0j HdTRycnq+NzAZ7IjdzlBXAEcxeuv6WKDdyAOazlni5MdRbicaH3dy1r X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add SM6350 support to the DPU1 driver to enable display output. It's worth noting that one entry dpu_qos_lut_entry was trimmed off: {.fl = 0, .lut = 0x0011223344556677 }, due to the lack of support for selecting between portrait and landscape LUT settings (for danger and safe LUTs) and no full support for qseed/non-qseed usescases (for QoS LUT). Signed-off-by: Konrad Dybcio Reviewed-by: Marijn Suijten Reviewed-by: Dmitry Baryshkov Signed-off-by: Konrad Dybcio --- .../gpu/drm/msm/disp/dpu1/catalog/dpu_6_4_sm6350.h | 173 +++++++++++++++++++++ drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 5 + drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 1 + drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 1 + 4 files changed, 180 insertions(+) diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_4_sm6350.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_4_sm6350.h new file mode 100644 index 000000000000..06eba23b0236 --- /dev/null +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_4_sm6350.h @@ -0,0 +1,173 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2022. Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2015-2018, 2020 The Linux Foundation. All rights reserved. + * Copyright (c) 2023, Linaro Limited + */ + +#ifndef _DPU_6_4_SM6350_H +#define _DPU_6_4_SM6350_H + +static const struct dpu_caps sm6350_dpu_caps = { + .max_mixer_width = DEFAULT_DPU_OUTPUT_LINE_WIDTH, + .max_mixer_blendstages = 0x7, + .qseed_type = DPU_SSPP_SCALER_QSEED4, + .has_src_split = true, + .has_dim_layer = true, + .has_idle_pc = true, + .max_linewidth = DEFAULT_DPU_OUTPUT_LINE_WIDTH, + .pixel_ram_size = DEFAULT_PIXEL_RAM_SIZE, +}; + +static const struct dpu_ubwc_cfg sm6350_ubwc_cfg = { + .ubwc_version = DPU_HW_UBWC_VER_20, + .ubwc_swizzle = 6, + .highest_bank_bit = 1, +}; + +static const struct dpu_mdp_cfg sm6350_mdp[] = { + { + .name = "top_0", .id = MDP_TOP, + .base = 0x0, .len = 0x494, + .features = 0, + .clk_ctrls[DPU_CLK_CTRL_VIG0] = { .reg_off = 0x2ac, .bit_off = 0 }, + .clk_ctrls[DPU_CLK_CTRL_DMA0] = { .reg_off = 0x2ac, .bit_off = 8 }, + .clk_ctrls[DPU_CLK_CTRL_DMA1] = { .reg_off = 0x2b4, .bit_off = 8 }, + .clk_ctrls[DPU_CLK_CTRL_DMA2] = { .reg_off = 0x2c4, .bit_off = 8 }, + .clk_ctrls[DPU_CLK_CTRL_REG_DMA] = { .reg_off = 0x2bc, .bit_off = 20 }, + }, +}; + +static const struct dpu_ctl_cfg sm6350_ctl[] = { + { + .name = "ctl_0", .id = CTL_0, + .base = 0x1000, .len = 0x1dc, + .features = BIT(DPU_CTL_ACTIVE_CFG), + .intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 9), + }, + { + .name = "ctl_1", .id = CTL_1, + .base = 0x1200, .len = 0x1dc, + .features = BIT(DPU_CTL_ACTIVE_CFG), + .intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 10), + }, + { + .name = "ctl_2", .id = CTL_2, + .base = 0x1400, .len = 0x1dc, + .features = BIT(DPU_CTL_ACTIVE_CFG), + .intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 11), + }, + { + .name = "ctl_3", .id = CTL_3, + .base = 0x1600, .len = 0x1dc, + .features = BIT(DPU_CTL_ACTIVE_CFG), + .intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 12), + }, +}; + +static const struct dpu_sspp_cfg sm6350_sspp[] = { + SSPP_BLK("sspp_0", SSPP_VIG0, 0x4000, 0x1f8, VIG_SC7180_MASK, + sc7180_vig_sblk_0, 0, SSPP_TYPE_VIG, DPU_CLK_CTRL_VIG0), + SSPP_BLK("sspp_8", SSPP_DMA0, 0x24000, 0x1f8, DMA_SDM845_MASK, + sdm845_dma_sblk_0, 1, SSPP_TYPE_DMA, DPU_CLK_CTRL_DMA0), + SSPP_BLK("sspp_9", SSPP_DMA1, 0x26000, 0x1f8, DMA_CURSOR_SDM845_MASK, + sdm845_dma_sblk_1, 5, SSPP_TYPE_DMA, DPU_CLK_CTRL_DMA1), + SSPP_BLK("sspp_10", SSPP_DMA2, 0x28000, 0x1f8, DMA_CURSOR_SDM845_MASK, + sdm845_dma_sblk_2, 9, SSPP_TYPE_DMA, DPU_CLK_CTRL_DMA2), +}; + +static const struct dpu_lm_cfg sm6350_lm[] = { + LM_BLK("lm_0", LM_0, 0x44000, MIXER_SDM845_MASK, + &sc7180_lm_sblk, PINGPONG_0, LM_1, DSPP_0), + LM_BLK("lm_1", LM_1, 0x45000, MIXER_SDM845_MASK, + &sc7180_lm_sblk, PINGPONG_1, LM_0, 0), +}; + +static const struct dpu_dspp_cfg sm6350_dspp[] = { + DSPP_BLK("dspp_0", DSPP_0, 0x54000, DSPP_SC7180_MASK, + &sm8150_dspp_sblk), +}; + +static struct dpu_pingpong_cfg sm6350_pp[] = { + PP_BLK("pingpong_0", PINGPONG_0, 0x70000, PINGPONG_SM8150_MASK, 0, sdm845_pp_sblk, + DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 8), + -1), + PP_BLK("pingpong_1", PINGPONG_1, 0x70800, PINGPONG_SM8150_MASK, 0, sdm845_pp_sblk, + DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 9), + -1), +}; + +static const struct dpu_dsc_cfg sm6350_dsc[] = { + DSC_BLK("dsc_0", DSC_0, 0x80000, BIT(DPU_DSC_OUTPUT_CTRL)), +}; + +static const struct dpu_intf_cfg sm6350_intf[] = { + INTF_BLK("intf_0", INTF_0, 0x6a000, 0x280, INTF_DP, 0, 35, INTF_SC7180_MASK, + DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 24), + DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 25)), + INTF_BLK_DSI_TE("intf_1", INTF_1, 0x6a800, 0x2c0, INTF_DSI, 0, 35, INTF_SC7180_MASK, + DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 26), + DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 27), + DPU_IRQ_IDX(MDP_INTF1_TEAR_INTR, 2)), +}; + +static const struct dpu_perf_cfg sm6350_perf_data = { + .max_bw_low = 4200000, + .max_bw_high = 5100000, + .min_core_ib = 2500000, + .min_llcc_ib = 0, + .min_dram_ib = 1600000, + .min_prefill_lines = 35, + /* TODO: confirm danger_lut_tbl */ + .danger_lut_tbl = {0xffff, 0xffff, 0x0}, + .safe_lut_tbl = {0xff00, 0xff00, 0xffff}, + .qos_lut_tbl = { + {.nentry = ARRAY_SIZE(sm6350_qos_linear_macrotile), + .entries = sm6350_qos_linear_macrotile + }, + {.nentry = ARRAY_SIZE(sm6350_qos_linear_macrotile), + .entries = sm6350_qos_linear_macrotile + }, + {.nentry = ARRAY_SIZE(sc7180_qos_nrt), + .entries = sc7180_qos_nrt + }, + }, + .cdp_cfg = { + {.rd_enable = 1, .wr_enable = 1}, + {.rd_enable = 1, .wr_enable = 0} + }, + .clk_inefficiency_factor = 105, + .bw_inefficiency_factor = 120, +}; + +const struct dpu_mdss_cfg dpu_sm6350_cfg = { + .caps = &sm6350_dpu_caps, + .ubwc = &sm6350_ubwc_cfg, + .mdp_count = ARRAY_SIZE(sm6350_mdp), + .mdp = sm6350_mdp, + .ctl_count = ARRAY_SIZE(sm6350_ctl), + .ctl = sm6350_ctl, + .sspp_count = ARRAY_SIZE(sm6350_sspp), + .sspp = sm6350_sspp, + .mixer_count = ARRAY_SIZE(sm6350_lm), + .mixer = sm6350_lm, + .dspp_count = ARRAY_SIZE(sm6350_dspp), + .dspp = sm6350_dspp, + .dsc_count = ARRAY_SIZE(sm6350_dsc), + .dsc = sm6350_dsc, + .pingpong_count = ARRAY_SIZE(sm6350_pp), + .pingpong = sm6350_pp, + .intf_count = ARRAY_SIZE(sm6350_intf), + .intf = sm6350_intf, + .vbif_count = ARRAY_SIZE(sdm845_vbif), + .vbif = sdm845_vbif, + .perf = &sm6350_perf_data, + .mdss_irqs = BIT(MDP_SSPP_TOP0_INTR) | \ + BIT(MDP_SSPP_TOP0_INTR2) | \ + BIT(MDP_SSPP_TOP0_HIST_INTR) | \ + BIT(MDP_INTF0_INTR) | \ + BIT(MDP_INTF1_INTR) | \ + BIT(MDP_INTF1_TEAR_INTR), +}; + +#endif diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c index f07eab738008..8bf6562f39e8 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c @@ -689,6 +689,10 @@ static const struct dpu_qos_lut_entry sc7180_qos_linear[] = { {.fl = 0, .lut = 0x0011222222335777}, }; +static const struct dpu_qos_lut_entry sm6350_qos_linear_macrotile[] = { + {.fl = 0, .lut = 0x0011223445566777 }, +}; + static const struct dpu_qos_lut_entry sm8150_qos_linear[] = { {.fl = 0, .lut = 0x0011222222223357 }, }; @@ -744,6 +748,7 @@ static const struct dpu_qos_lut_entry sc7180_qos_nrt[] = { #include "catalog/dpu_6_0_sm8250.h" #include "catalog/dpu_6_2_sc7180.h" #include "catalog/dpu_6_3_sm6115.h" +#include "catalog/dpu_6_4_sm6350.h" #include "catalog/dpu_6_5_qcm2290.h" #include "catalog/dpu_7_0_sm8350.h" diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h index d59a9027c4b6..e89edbe0ab98 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h @@ -832,6 +832,7 @@ extern const struct dpu_mdss_cfg dpu_sc8180x_cfg; extern const struct dpu_mdss_cfg dpu_sm8250_cfg; extern const struct dpu_mdss_cfg dpu_sc7180_cfg; extern const struct dpu_mdss_cfg dpu_sm6115_cfg; +extern const struct dpu_mdss_cfg dpu_sm6350_cfg; extern const struct dpu_mdss_cfg dpu_qcm2290_cfg; extern const struct dpu_mdss_cfg dpu_sm8350_cfg; extern const struct dpu_mdss_cfg dpu_sc7280_cfg; diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c index 613384b8ca0e..190345e94178 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c @@ -1305,6 +1305,7 @@ static const struct of_device_id dpu_dt_match[] = { { .compatible = "qcom,sc8180x-dpu", .data = &dpu_sc8180x_cfg, }, { .compatible = "qcom,sc8280xp-dpu", .data = &dpu_sc8280xp_cfg, }, { .compatible = "qcom,sm6115-dpu", .data = &dpu_sm6115_cfg, }, + { .compatible = "qcom,sm6350-dpu", .data = &dpu_sm6350_cfg, }, { .compatible = "qcom,sm8150-dpu", .data = &dpu_sm8150_cfg, }, { .compatible = "qcom,sm8250-dpu", .data = &dpu_sm8250_cfg, }, { .compatible = "qcom,sm8350-dpu", .data = &dpu_sm8350_cfg, }, From patchwork Tue Jun 6 12:43:58 2023 Content-Type: text/plain; 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[83.9.31.150]) by smtp.gmail.com with ESMTPSA id u23-20020a2e9f17000000b002a9ebff8431sm1830823ljk.94.2023.06.06.05.44.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 06 Jun 2023 05:44:18 -0700 (PDT) From: Konrad Dybcio Date: Tue, 06 Jun 2023 14:43:58 +0200 Subject: [PATCH v6 07/12] drm/msm: mdss: Add SM6350 support MIME-Version: 1.0 Message-Id: <20230411-topic-straitlagoon_mdss-v6-7-dee6a882571b@linaro.org> References: <20230411-topic-straitlagoon_mdss-v6-0-dee6a882571b@linaro.org> In-Reply-To: <20230411-topic-straitlagoon_mdss-v6-0-dee6a882571b@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Krishna Manikandan , Will Deacon , Robin Murphy , Joerg Roedel , Conor Dooley Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1686055444; l=1447; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=0D7OZJvsI1VqBAldTbVtRFbwuC+jJW8mAUrMe9Ykcbs=; b=//U5sESzjAZLdCHYZ7ycan2Fus4ZSVv4WamSuLI1t4OMIDaUAydO06CalgWdDLxiEiIJLw4g7 vol9S9AHLtNAi9CDM5pCBm7aNTBzNvC2KfEyDdpgGh2KQkJ3GUhh/aq X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add support for MDSS on SM6350. Reviewed-by: Dmitry Baryshkov Reviewed-by: Marijn Suijten Signed-off-by: Konrad Dybcio --- drivers/gpu/drm/msm/msm_mdss.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/gpu/drm/msm/msm_mdss.c b/drivers/gpu/drm/msm/msm_mdss.c index e8c93731aaa1..4e3a5f0c303c 100644 --- a/drivers/gpu/drm/msm/msm_mdss.c +++ b/drivers/gpu/drm/msm/msm_mdss.c @@ -538,6 +538,14 @@ static const struct msm_mdss_data sdm845_data = { .highest_bank_bit = 2, }; +static const struct msm_mdss_data sm6350_data = { + .ubwc_version = UBWC_2_0, + .ubwc_dec_version = UBWC_2_0, + .ubwc_swizzle = 6, + .ubwc_static = 0x1e, + .highest_bank_bit = 1, +}; + static const struct msm_mdss_data sm8150_data = { .ubwc_version = UBWC_3_0, .ubwc_dec_version = UBWC_3_0, @@ -571,6 +579,7 @@ static const struct of_device_id mdss_dt_match[] = { { .compatible = "qcom,sc8180x-mdss", .data = &sc8180x_data }, { .compatible = "qcom,sc8280xp-mdss", .data = &sc8280xp_data }, { .compatible = "qcom,sm6115-mdss", .data = &sm6115_data }, + { .compatible = "qcom,sm6350-mdss", .data = &sm6350_data }, { .compatible = "qcom,sm8150-mdss", .data = &sm8150_data }, { .compatible = "qcom,sm8250-mdss", .data = &sm8250_data }, { .compatible = "qcom,sm8350-mdss", .data = &sm8250_data }, From patchwork Tue Jun 6 12:43:59 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 689829 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id ADCC7C77B7A for ; Tue, 6 Jun 2023 12:45:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231674AbjFFMpa (ORCPT ); Tue, 6 Jun 2023 08:45:30 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43870 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237773AbjFFMpA (ORCPT ); Tue, 6 Jun 2023 08:45:00 -0400 Received: from mail-lj1-x22e.google.com (mail-lj1-x22e.google.com [IPv6:2a00:1450:4864:20::22e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1DA061739 for ; Tue, 6 Jun 2023 05:44:35 -0700 (PDT) Received: by mail-lj1-x22e.google.com with SMTP id 38308e7fff4ca-2b1a3fa2cd2so71350601fa.1 for ; Tue, 06 Jun 2023 05:44:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1686055460; x=1688647460; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=LS6//Y88lSTSAfy/GcyBj4YIve1liW3IY7HnnqycTTo=; b=dKFuvuErfnbQAoxKBm2ebQTp0CSASZz110su7EH45IOU52LUS8NVUliO1ZP14+x9UB 8+EqVkuKWwl1i1ztvEfuT116iDNTI5gqSH5o3ufcpAoQWmd189H692Pf2WDiOqfVwNq7 bse0+LgzyI1SH3HHZu+MzmySkri6sfiqm5R9NPI3UdQNFmCLHMdgAbOJ/Z4GvhuJJFyM xImjVVFpXP7FdBg3E4/z2VjcWgeZNEGOiA9jvq1q3uOIyRHtiJWaLh7K2eBqEyTO81/v 9TFzlgzUdgAwWBRzpRhJefMGvpUNIpxfkPl5e9l7hfnwZM3BIRXPFXSxIJDrxoNZRfAK yb3Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1686055460; x=1688647460; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=LS6//Y88lSTSAfy/GcyBj4YIve1liW3IY7HnnqycTTo=; b=Sb4Lkyu86oLmFG/SOYy88ImypSqnNzPrQp9/QXWHCQPMtUfZMg261MiGrEMEqtPct+ uQmLxAwpZdfH77+ZRuBSgMgT8aUGyFNqngttQ2coHQR/zU/HOxdzT3Q4omYzGc1PsEIT b65ZKT1D3dPuwJn+fdkYgHuuwgdMgA8nEScP/15NowjINddanXt8occU8ErbSh2ipytq pyVYd6cAG0p+Dh4xwVgjJzdNrcq/PqtNVq8GbGtxcPId0Q0jyoaTthNPxRld4r+TTnhS VhEm4EBODMTM6iambtXjyZL7A8BpnAzJZmsiJ3fFH/kLxyUnb4Ttoub1Y3IHpQMoViHo Tc+g== X-Gm-Message-State: AC+VfDy6jbRXUpihBJGXpkCk0Jh1VnAFA5DGSVHaXQ6lZrugOif951Nj voEL3rhahOZJlWfztsBs3NteIA3FjkSEwxeKO2E= X-Google-Smtp-Source: ACHHUZ6gvdz3hwgXou4KY+ZcG5E+gZr/qpo4t2Xp2ePqlWBmcuX+OsAOhCO7ZTxXGO0PHOCyacDtOA== X-Received: by 2002:a05:651c:8a:b0:2ad:a9c0:1236 with SMTP id 10-20020a05651c008a00b002ada9c01236mr1113865ljq.6.1686055460312; Tue, 06 Jun 2023 05:44:20 -0700 (PDT) Received: from [192.168.1.101] (abyl150.neoplus.adsl.tpnet.pl. [83.9.31.150]) by smtp.gmail.com with ESMTPSA id u23-20020a2e9f17000000b002a9ebff8431sm1830823ljk.94.2023.06.06.05.44.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 06 Jun 2023 05:44:20 -0700 (PDT) From: Konrad Dybcio Date: Tue, 06 Jun 2023 14:43:59 +0200 Subject: [PATCH v6 08/12] drm/msm/dpu: Add SM6375 support MIME-Version: 1.0 Message-Id: <20230411-topic-straitlagoon_mdss-v6-8-dee6a882571b@linaro.org> References: <20230411-topic-straitlagoon_mdss-v6-0-dee6a882571b@linaro.org> In-Reply-To: <20230411-topic-straitlagoon_mdss-v6-0-dee6a882571b@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Krishna Manikandan , Will Deacon , Robin Murphy , Joerg Roedel , Conor Dooley Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1686055444; l=7239; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=OE2vYg0IoqQfSjPrB0VxCZ6zAsN9z7EF26wBo5keYN4=; b=8nHO1IGFIBKIjdm2eS5SRqTqVfE0GPOK7vp/oAqEGSAaRiS+MsPx6ECtZzzs4NAee4EhZdSZH Fbw9Z4T3cKhClYFn25aSA9+JvCQhRvcw48QrwkjfXY7K16DVNEOf3r7 X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add basic SM6375 support to the DPU1 driver to enable display output. Reviewed-by: Dmitry Baryshkov Reviewed-by: Marijn Suijten Signed-off-by: Konrad Dybcio --- .../gpu/drm/msm/disp/dpu1/catalog/dpu_6_9_sm6375.h | 139 +++++++++++++++++++++ drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 1 + drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 1 + drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 1 + 4 files changed, 142 insertions(+) diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_9_sm6375.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_9_sm6375.h new file mode 100644 index 000000000000..d7aae45e3e66 --- /dev/null +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_9_sm6375.h @@ -0,0 +1,139 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2022. Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2015-2018, 2020 The Linux Foundation. All rights reserved. + * Copyright (c) 2023, Linaro Limited + */ + +#ifndef _DPU_6_9_SM6375_H +#define _DPU_6_9_SM6375_H + +static const struct dpu_caps sm6375_dpu_caps = { + .max_mixer_width = DEFAULT_DPU_LINE_WIDTH, + .max_mixer_blendstages = 0x4, + .qseed_type = DPU_SSPP_SCALER_QSEED4, + .has_dim_layer = true, + .has_idle_pc = true, + .max_linewidth = 2160, + .pixel_ram_size = DEFAULT_PIXEL_RAM_SIZE, +}; + +static const struct dpu_ubwc_cfg sm6375_ubwc_cfg = { + .ubwc_version = DPU_HW_UBWC_VER_20, + .ubwc_swizzle = 6, + .highest_bank_bit = 1, +}; + +static const struct dpu_mdp_cfg sm6375_mdp[] = { + { + .name = "top_0", .id = MDP_TOP, + .base = 0x0, .len = 0x494, + .features = 0, + .clk_ctrls[DPU_CLK_CTRL_VIG0] = { .reg_off = 0x2ac, .bit_off = 0 }, + .clk_ctrls[DPU_CLK_CTRL_DMA0] = { .reg_off = 0x2ac, .bit_off = 8 }, + }, +}; + +static const struct dpu_ctl_cfg sm6375_ctl[] = { + { + .name = "ctl_0", .id = CTL_0, + .base = 0x1000, .len = 0x1dc, + .features = BIT(DPU_CTL_ACTIVE_CFG), + .intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 9), + }, +}; + +static const struct dpu_sspp_cfg sm6375_sspp[] = { + SSPP_BLK("sspp_0", SSPP_VIG0, 0x4000, 0x1f8, VIG_SC7180_MASK, + sm6115_vig_sblk_0, 0, SSPP_TYPE_VIG, DPU_CLK_CTRL_VIG0), + SSPP_BLK("sspp_8", SSPP_DMA0, 0x24000, 0x1f8, DMA_SDM845_MASK, + sdm845_dma_sblk_0, 1, SSPP_TYPE_DMA, DPU_CLK_CTRL_DMA0), +}; + +static const struct dpu_lm_cfg sm6375_lm[] = { + LM_BLK("lm_0", LM_0, 0x44000, MIXER_QCM2290_MASK, + &qcm2290_lm_sblk, PINGPONG_0, 0, DSPP_0), +}; + +static const struct dpu_dspp_cfg sm6375_dspp[] = { + DSPP_BLK("dspp_0", DSPP_0, 0x54000, DSPP_SC7180_MASK, + &sm8150_dspp_sblk), +}; + +static const struct dpu_pingpong_cfg sm6375_pp[] = { + PP_BLK("pingpong_0", PINGPONG_0, 0x70000, PINGPONG_SM8150_MASK, 0, sdm845_pp_sblk, + DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 8), + -1), +}; + +static const struct dpu_dsc_cfg sm6375_dsc[] = { + DSC_BLK("dsc_0", DSC_0, 0x80000, BIT(DPU_DSC_OUTPUT_CTRL)), +}; + +static const struct dpu_intf_cfg sm6375_intf[] = { + INTF_BLK("intf_0", INTF_0, 0x00000, 0x280, INTF_NONE, 0, 0, 0, 0, 0), + INTF_BLK_DSI_TE("intf_1", INTF_1, 0x6a800, 0x2c0, INTF_DSI, 0, 24, INTF_SC7180_MASK, + DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 26), + DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 27), + DPU_IRQ_IDX(MDP_INTF1_TEAR_INTR, 2)), +}; + +static const struct dpu_perf_cfg sm6375_perf_data = { + .max_bw_low = 5200000, + .max_bw_high = 6200000, + .min_core_ib = 2500000, + .min_llcc_ib = 0, /* No LLCC on this SoC */ + .min_dram_ib = 1600000, + .min_prefill_lines = 24, + /* TODO: confirm danger_lut_tbl */ + .danger_lut_tbl = {0xffff, 0xffff, 0x0}, + .safe_lut_tbl = {0xfe00, 0xfe00, 0xffff}, + .qos_lut_tbl = { + {.nentry = ARRAY_SIZE(sm6350_qos_linear_macrotile), + .entries = sm6350_qos_linear_macrotile + }, + {.nentry = ARRAY_SIZE(sm6350_qos_linear_macrotile), + .entries = sm6350_qos_linear_macrotile + }, + {.nentry = ARRAY_SIZE(sc7180_qos_nrt), + .entries = sc7180_qos_nrt + }, + }, + .cdp_cfg = { + {.rd_enable = 1, .wr_enable = 1}, + {.rd_enable = 1, .wr_enable = 0} + }, + .clk_inefficiency_factor = 105, + .bw_inefficiency_factor = 120, +}; + +const struct dpu_mdss_cfg dpu_sm6375_cfg = { + .caps = &sm6375_dpu_caps, + .ubwc = &sm6375_ubwc_cfg, + .mdp_count = ARRAY_SIZE(sm6375_mdp), + .mdp = sm6375_mdp, + .ctl_count = ARRAY_SIZE(sm6375_ctl), + .ctl = sm6375_ctl, + .sspp_count = ARRAY_SIZE(sm6375_sspp), + .sspp = sm6375_sspp, + .mixer_count = ARRAY_SIZE(sm6375_lm), + .mixer = sm6375_lm, + .dspp_count = ARRAY_SIZE(sm6375_dspp), + .dspp = sm6375_dspp, + .dsc_count = ARRAY_SIZE(sm6375_dsc), + .dsc = sm6375_dsc, + .pingpong_count = ARRAY_SIZE(sm6375_pp), + .pingpong = sm6375_pp, + .intf_count = ARRAY_SIZE(sm6375_intf), + .intf = sm6375_intf, + .vbif_count = ARRAY_SIZE(sdm845_vbif), + .vbif = sdm845_vbif, + .perf = &sm6375_perf_data, + .mdss_irqs = BIT(MDP_SSPP_TOP0_INTR) | \ + BIT(MDP_SSPP_TOP0_INTR2) | \ + BIT(MDP_SSPP_TOP0_HIST_INTR) | \ + BIT(MDP_INTF1_INTR) | \ + BIT(MDP_INTF1_TEAR_INTR), +}; + +#endif diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c index 8bf6562f39e8..b9f1d58a6cac 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c @@ -750,6 +750,7 @@ static const struct dpu_qos_lut_entry sc7180_qos_nrt[] = { #include "catalog/dpu_6_3_sm6115.h" #include "catalog/dpu_6_4_sm6350.h" #include "catalog/dpu_6_5_qcm2290.h" +#include "catalog/dpu_6_9_sm6375.h" #include "catalog/dpu_7_0_sm8350.h" #include "catalog/dpu_7_2_sc7280.h" diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h index e89edbe0ab98..ac4a9e73705c 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h @@ -834,6 +834,7 @@ extern const struct dpu_mdss_cfg dpu_sc7180_cfg; extern const struct dpu_mdss_cfg dpu_sm6115_cfg; extern const struct dpu_mdss_cfg dpu_sm6350_cfg; extern const struct dpu_mdss_cfg dpu_qcm2290_cfg; +extern const struct dpu_mdss_cfg dpu_sm6375_cfg; extern const struct dpu_mdss_cfg dpu_sm8350_cfg; extern const struct dpu_mdss_cfg dpu_sc7280_cfg; extern const struct dpu_mdss_cfg dpu_sc8280xp_cfg; diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c index 190345e94178..aa8499de1b9f 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c @@ -1306,6 +1306,7 @@ static const struct of_device_id dpu_dt_match[] = { { .compatible = "qcom,sc8280xp-dpu", .data = &dpu_sc8280xp_cfg, }, { .compatible = "qcom,sm6115-dpu", .data = &dpu_sm6115_cfg, }, { .compatible = "qcom,sm6350-dpu", .data = &dpu_sm6350_cfg, }, + { .compatible = "qcom,sm6375-dpu", .data = &dpu_sm6375_cfg, }, { .compatible = "qcom,sm8150-dpu", .data = &dpu_sm8150_cfg, }, { .compatible = "qcom,sm8250-dpu", .data = &dpu_sm8250_cfg, }, { .compatible = "qcom,sm8350-dpu", .data = &dpu_sm8350_cfg, }, From patchwork Tue Jun 6 12:44:00 2023 Content-Type: text/plain; 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[83.9.31.150]) by smtp.gmail.com with ESMTPSA id u23-20020a2e9f17000000b002a9ebff8431sm1830823ljk.94.2023.06.06.05.44.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 06 Jun 2023 05:44:21 -0700 (PDT) From: Konrad Dybcio Date: Tue, 06 Jun 2023 14:44:00 +0200 Subject: [PATCH v6 09/12] drm/msm: mdss: Add SM6375 support MIME-Version: 1.0 Message-Id: <20230411-topic-straitlagoon_mdss-v6-9-dee6a882571b@linaro.org> References: <20230411-topic-straitlagoon_mdss-v6-0-dee6a882571b@linaro.org> In-Reply-To: <20230411-topic-straitlagoon_mdss-v6-0-dee6a882571b@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Krishna Manikandan , Will Deacon , Robin Murphy , Joerg Roedel , Conor Dooley Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1686055444; l=1022; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=Nh6zuYJI8gb14gxje6MmS/hbQSaIA3Eeoi75EfztoC0=; b=OxWGteNTPcUfGPGr2JL2cA95wzVZAKIBzz7/e/VX6ySLc0zf6TYdbDyWq7IlwKcdnUOqH76uv 5RDrPgRuFIkBcbI8//m86Ae0h5O/Rd1iGp9/vcUd1WXHPFfFGFBgYFg X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add support for MDSS on SM6375. Reviewed-by: Dmitry Baryshkov Reviewed-by: Marijn Suijten Signed-off-by: Konrad Dybcio --- drivers/gpu/drm/msm/msm_mdss.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/msm/msm_mdss.c b/drivers/gpu/drm/msm/msm_mdss.c index 4e3a5f0c303c..05648c910c68 100644 --- a/drivers/gpu/drm/msm/msm_mdss.c +++ b/drivers/gpu/drm/msm/msm_mdss.c @@ -580,6 +580,7 @@ static const struct of_device_id mdss_dt_match[] = { { .compatible = "qcom,sc8280xp-mdss", .data = &sc8280xp_data }, { .compatible = "qcom,sm6115-mdss", .data = &sm6115_data }, { .compatible = "qcom,sm6350-mdss", .data = &sm6350_data }, + { .compatible = "qcom,sm6375-mdss", .data = &sm6350_data }, { .compatible = "qcom,sm8150-mdss", .data = &sm8150_data }, { .compatible = "qcom,sm8250-mdss", .data = &sm8250_data }, { .compatible = "qcom,sm8350-mdss", .data = &sm8250_data }, From patchwork Tue Jun 6 12:44:01 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 690262 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0989FC7EE32 for ; Tue, 6 Jun 2023 12:45:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237748AbjFFMpe (ORCPT ); Tue, 6 Jun 2023 08:45:34 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44054 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237795AbjFFMpC (ORCPT ); Tue, 6 Jun 2023 08:45:02 -0400 Received: from mail-lf1-x136.google.com (mail-lf1-x136.google.com [IPv6:2a00:1450:4864:20::136]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 02AAE1701 for ; Tue, 6 Jun 2023 05:44:39 -0700 (PDT) Received: by mail-lf1-x136.google.com with SMTP id 2adb3069b0e04-4f4b2bc1565so7573974e87.2 for ; Tue, 06 Jun 2023 05:44:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1686055463; x=1688647463; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=Uw6zfBHO0opEqODFwIHcb35ENxPJxB7I1/UM0FjZOR4=; b=XjD/DjeZ/zriufMZNJkno4oajcS2wFCxueANYtfQge+aQ4zJ6RTqg/5Dk9YqPm3dzC yohb/+gOvxKAmFhwQbC12W1bhZzDndCnS9QrJqu025jgOBEbjf/4Y56yUaKtm8XBQ0vh zsLazWcGSvFwzd5FE7/eCZh4LkiJku0pB7/HpJ9rWrccgiQ9XWBkG9HCLxoX3+GRN8jC 46jGJ/s+yYObblgQUD5CadL8ubHP2aImZLNP2oUqHY87VHfB1tKX6lkBsB8wv4SAMABi ew77HJsQx0Ak2TWgjl6sV8eK01tAqVXBdYT1b9qybp6HQyTtYCx60uKYLltSDOiZE3cU Xj1g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1686055463; x=1688647463; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Uw6zfBHO0opEqODFwIHcb35ENxPJxB7I1/UM0FjZOR4=; b=V8aNe6qYkxvyIl7nt9ywu5eNTwH3eoyZkyYZD2mnjU4TL2ANgmYGAmkK+voGxKGtjf MhnChN0rQRxk+1E5g++sOk2rHU3wDIvu8r3iB9H6pdbQaAvm8i8uKYR13LFqIPF9OvIT 6RVrw9aDZf6L6lxdKE/SrEdfUnvq5Lox0er8fGmwBvtzrlvjYPjUCKzFWFk/Nc+vjU9T U4T7wABjAz8GMsmpeIyPAE/kgjcPoKiZoG45/fxLf9Yhk8WibvyDaQmBq8x4ZYzS4nEg wmuDo7S1PoZzdKO6mbwLkuz4+L4CB+7AfO9rZe9ORwsYr4LgvniU2q0LSut+yK1wgUyH 6Q0A== X-Gm-Message-State: AC+VfDwcMq7hMGCD8n+lH3s6/8DHsvzIrGntAIVvet4yAOKTb1DSCxS5 6AiZ7ezjEJ4S0guXbCIzg+62tg== X-Google-Smtp-Source: ACHHUZ4JPdXVw4ik2GSg//oq+bn2TOmcvhfR+0lRQTmoDO7EADSvXTuoiqFFBHki+vQujl0wbMfFYw== X-Received: by 2002:ac2:5314:0:b0:4f6:278b:713e with SMTP id c20-20020ac25314000000b004f6278b713emr793308lfh.42.1686055463610; Tue, 06 Jun 2023 05:44:23 -0700 (PDT) Received: from [192.168.1.101] (abyl150.neoplus.adsl.tpnet.pl. [83.9.31.150]) by smtp.gmail.com with ESMTPSA id u23-20020a2e9f17000000b002a9ebff8431sm1830823ljk.94.2023.06.06.05.44.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 06 Jun 2023 05:44:23 -0700 (PDT) From: Konrad Dybcio Date: Tue, 06 Jun 2023 14:44:01 +0200 Subject: [PATCH v6 10/12] iommu/arm-smmu-qcom: Sort the compatible list alphabetically MIME-Version: 1.0 Message-Id: <20230411-topic-straitlagoon_mdss-v6-10-dee6a882571b@linaro.org> References: <20230411-topic-straitlagoon_mdss-v6-0-dee6a882571b@linaro.org> In-Reply-To: <20230411-topic-straitlagoon_mdss-v6-0-dee6a882571b@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Krishna Manikandan , Will Deacon , Robin Murphy , Joerg Roedel , Conor Dooley Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1686055444; l=1026; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=Rc5Y2oI69X8xvGgWy74AqbUqZBcFJifSW/Zzw/OwQv0=; b=hKN4Zx/iFcuu7jgYtNyXm0RjgfAMa4iciB6rumy4y0uHYWEzi1kXRnJRbmxp0K/sRyxp0Md5f h/s1XX72W3ODTC4C3mimNm9lfOBhDT8PC2XGICQRnRP6A8xuQ1loAWs X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org It got broken at some point, fix it up. Reviewed-by: Dmitry Baryshkov Signed-off-by: Konrad Dybcio Acked-by: Will Deacon --- drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c index c71afda79d64..3800ab478216 100644 --- a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c +++ b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c @@ -251,10 +251,10 @@ static const struct of_device_id qcom_smmu_client_of_match[] __maybe_unused = { { .compatible = "qcom,sc7280-mss-pil" }, { .compatible = "qcom,sc8180x-mdss" }, { .compatible = "qcom,sc8280xp-mdss" }, - { .compatible = "qcom,sm8150-mdss" }, - { .compatible = "qcom,sm8250-mdss" }, { .compatible = "qcom,sdm845-mdss" }, { .compatible = "qcom,sdm845-mss-pil" }, + { .compatible = "qcom,sm8150-mdss" }, + { .compatible = "qcom,sm8250-mdss" }, { } }; From patchwork Tue Jun 6 12:44:02 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 689827 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5D7EFC7EE29 for ; Tue, 6 Jun 2023 12:45:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236272AbjFFMpg (ORCPT ); Tue, 6 Jun 2023 08:45:36 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44038 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237789AbjFFMpB (ORCPT ); Tue, 6 Jun 2023 08:45:01 -0400 Received: from mail-lj1-x229.google.com (mail-lj1-x229.google.com [IPv6:2a00:1450:4864:20::229]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 087E01705 for ; Tue, 6 Jun 2023 05:44:41 -0700 (PDT) Received: by mail-lj1-x229.google.com with SMTP id 38308e7fff4ca-2b1ba018d94so41275081fa.0 for ; Tue, 06 Jun 2023 05:44:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1686055465; x=1688647465; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=mfoMnvnUW9JxHFNrsE+j3PaFEyoaLfNhlabOCKS4wNc=; b=V1ReI/T+XetTpZFV6pPbBNshd5IFECMTZE+/Ns0lqS2R+pNJudcsgIMQlDZyyK8ZXu mwymOckDZ9+J+c4V3PXyZWiExBZkJQkQz6Sa+M8eqGcjD0ffi7Uo+JJyN3bZ0bEBJ9L0 fwhuoalot+ziIUjYt0vgKeYjSkCGgJbjnClOH9mqB7keqlTTmb20Aq2633UiOSKnclht 3u/rFF3iTcVM2P4fAhNUFEHyk7JTbpSujYZtFRdnrXbpY28AijIHHgm5LL7kUXXOuAdr 6qfvmBh6UjMSYb8YtvqJQbqXf3gS2zrT9YuAmKyI/bbe7fXEyAComsn5M7BBwjFmLry1 9/eg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1686055465; x=1688647465; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=mfoMnvnUW9JxHFNrsE+j3PaFEyoaLfNhlabOCKS4wNc=; b=RdhOEOKOPNO2zwLWLt1B8GcsXMcKDnRcVh2npoWUM6sW7RMsy5yuJGzftQSwIbhdPS 71O5RmEnWGECzIKI9scpHofnGwDKwxyg+tSDfZxcD7Sjze1wc3yiJiaZ8ajNhTTKXcT9 ey0H0R8/DUx4/145Z5mXIGzGQbbL0C8Y6RAmQSwbrJ0JpXRZRUdsNxPdLcM1ybBMspqJ DLFmG6752lCSZLLvv0oWi3WlAl5/QI2R42WNsQzwFF+QjLFq/GmwSW7kyRZ3I1AzEOl0 qU+OaLimQt4U6bZ8zJM0tJo0c7NMcLZMGVuAuZay8E5jgVdQ4zthIlxQbGDTcnZCn5ZB S+6w== X-Gm-Message-State: AC+VfDyfiK6htW1foV7Rq9s9wZ9x0VVzy1MAW0/QE5+Sm5urxvi9g0Dp R/eUCoQGnBQnncUBZzPLKMW7hA== X-Google-Smtp-Source: ACHHUZ7ekWTowrPVlra8w+zZoWxewe/oa3lUa6JCxAgmo+hje0H7GiRpgvh8WmtcKUSxXWPZeV25AA== X-Received: by 2002:a2e:3c02:0:b0:2b1:eb9e:20df with SMTP id j2-20020a2e3c02000000b002b1eb9e20dfmr1073937lja.17.1686055465236; Tue, 06 Jun 2023 05:44:25 -0700 (PDT) Received: from [192.168.1.101] (abyl150.neoplus.adsl.tpnet.pl. [83.9.31.150]) by smtp.gmail.com with ESMTPSA id u23-20020a2e9f17000000b002a9ebff8431sm1830823ljk.94.2023.06.06.05.44.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 06 Jun 2023 05:44:24 -0700 (PDT) From: Konrad Dybcio Date: Tue, 06 Jun 2023 14:44:02 +0200 Subject: [PATCH v6 11/12] iommu/arm-smmu-qcom: Add SM6375 DPU compatible MIME-Version: 1.0 Message-Id: <20230411-topic-straitlagoon_mdss-v6-11-dee6a882571b@linaro.org> References: <20230411-topic-straitlagoon_mdss-v6-0-dee6a882571b@linaro.org> In-Reply-To: <20230411-topic-straitlagoon_mdss-v6-0-dee6a882571b@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Krishna Manikandan , Will Deacon , Robin Murphy , Joerg Roedel , Conor Dooley Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1686055444; l=919; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=U7GrazUMOESVisMUp1R2X/i2E38+ra43yVyDZTsdMko=; b=jxGg9uqgLp6Xj4teEsBXHZg3TUHPabmerE8XQFJme0dKqJNcl1H0zer/Z3ueyg2C8OOTX/lsn lsiNsc2XIogAgDJnhIjXPMLCHVQZk9ZXI2zac2qD51AlEO2+Dsa/P9J X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add the SM6375 DPU compatible to clients compatible list, as it also needs the workarounds. Acked-by: Dmitry Baryshkov Signed-off-by: Konrad Dybcio Acked-by: Will Deacon --- drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c index 3800ab478216..cc574928c707 100644 --- a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c +++ b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c @@ -253,6 +253,7 @@ static const struct of_device_id qcom_smmu_client_of_match[] __maybe_unused = { { .compatible = "qcom,sc8280xp-mdss" }, { .compatible = "qcom,sdm845-mdss" }, { .compatible = "qcom,sdm845-mss-pil" }, + { .compatible = "qcom,sm6375-mdss" }, { .compatible = "qcom,sm8150-mdss" }, { .compatible = "qcom,sm8250-mdss" }, { } From patchwork Tue Jun 6 12:44:03 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 689828 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 838DEC7EE33 for ; Tue, 6 Jun 2023 12:45:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236424AbjFFMpc (ORCPT ); Tue, 6 Jun 2023 08:45:32 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43812 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237814AbjFFMpD (ORCPT ); Tue, 6 Jun 2023 08:45:03 -0400 Received: from mail-lj1-x22b.google.com (mail-lj1-x22b.google.com [IPv6:2a00:1450:4864:20::22b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 93FFB173D for ; Tue, 6 Jun 2023 05:44:46 -0700 (PDT) Received: by mail-lj1-x22b.google.com with SMTP id 38308e7fff4ca-2b1b3836392so51592401fa.0 for ; Tue, 06 Jun 2023 05:44:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1686055467; x=1688647467; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=71R2q19ZXsGZnOPocAOTBJ3+IZ1FZhz4Wl6PP95R9qE=; b=I8bal3u2MbL5N2wtAHwu70IeyshjqDHEG6e07z9uY66vw9fstpsDTVU/yXP/+3pU7s wO0H6Q+rw12fnt8EaLmOJiC95oWyxw3WB3DdPnoaCxwZWA/80UushCnOXdZX+VqSxYXX OuysNYXfN3SP2qfmickHoD56ST0CxDc9VFuq9IKwvkixzpZgdJPU+BINxK1jTrYsGHiM hPl4koRIiwslemS3vQy0NDzvKEPYK8bkv5BPj10GWB/rIsFl2a7RvoJvgrBUTmqebxHI NL413CB37yFJbklwP95xy+Jl2Zj3FHnlS+YYv2UI62cirRTab1rRUArQdwQo1+AeE8bW Ntjw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1686055467; x=1688647467; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=71R2q19ZXsGZnOPocAOTBJ3+IZ1FZhz4Wl6PP95R9qE=; b=jwzUILzqohMiUE/CS2Hg4k2etfr1vGOeML3Vvp6EdziJyO5K28gZMXaQVFwbpnXMch cKcPG22MJ2XSTJcpRiHVCSmcl02VBwV+1I0eUZvmL0DrfjHUZfxdpsye388qE99PHGHa qI2kD4ydwf5jRXBYF6FqZCDsLfhshuf9N+5AKfKkagKXHPdTPMpdN62x4bGytBPyqdbP KD2oEELHMcizRYDxQ9hnNYEVB5Ag1l7GPJRlAYJ/gj73kxXhrVUbrsogEYXm6BLLosW4 6Lhu8JvUS1pv2jGE45ILoQ1WgA5jDvRAIhmnjkEKGrwmhkFoZhgFoyASabGNqxvrOxGs TJag== X-Gm-Message-State: AC+VfDxsAVBrdaWq7k8ZVoNjZ/B1OeaJVbS2Zc+TecXpChZhzCVigipJ hfAPm010Zyvrp0nmj5GqI+tk+Q== X-Google-Smtp-Source: ACHHUZ4c+yMvlAIdZkCiNRfIWyTpQZD41YEWXcpVJkwRTIOU6+57/WT/SEZI/YDq4XG3X0FHRp1KAw== X-Received: by 2002:a2e:86c8:0:b0:2b1:bd11:a71a with SMTP id n8-20020a2e86c8000000b002b1bd11a71amr1161537ljj.17.1686055467141; Tue, 06 Jun 2023 05:44:27 -0700 (PDT) Received: from [192.168.1.101] (abyl150.neoplus.adsl.tpnet.pl. [83.9.31.150]) by smtp.gmail.com with ESMTPSA id u23-20020a2e9f17000000b002a9ebff8431sm1830823ljk.94.2023.06.06.05.44.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 06 Jun 2023 05:44:26 -0700 (PDT) From: Konrad Dybcio Date: Tue, 06 Jun 2023 14:44:03 +0200 Subject: [PATCH v6 12/12] iommu/arm-smmu-qcom: Add SM6350 DPU compatible MIME-Version: 1.0 Message-Id: <20230411-topic-straitlagoon_mdss-v6-12-dee6a882571b@linaro.org> References: <20230411-topic-straitlagoon_mdss-v6-0-dee6a882571b@linaro.org> In-Reply-To: <20230411-topic-straitlagoon_mdss-v6-0-dee6a882571b@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Krishna Manikandan , Will Deacon , Robin Murphy , Joerg Roedel , Conor Dooley Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev, Konrad Dybcio , Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1686055444; l=1014; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=CPO6pRkqp9OH9BXcQBO5PamnhFLC+q+SwQwF41wCtLY=; b=EpXSpLvNfkNwN2LETbMboB402kF8n6aEw8/3XRGdYE/p0jqbAcEhn9jwTJy9yIh5JXIvC2O2n Qgs41nBrZ/NBuK4rPGepMA17UT/akizQC5SR5/YqACBatIfFVMeJDPK X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Konrad Dybcio Add the SM6350 DPU compatible to clients compatible list, as it also needs the workarounds. Signed-off-by: Konrad Dybcio Acked-by: Dmitry Baryshkov Signed-off-by: Konrad Dybcio Acked-by: Will Deacon --- drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c index cc574928c707..bdeb587552c0 100644 --- a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c +++ b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c @@ -253,6 +253,7 @@ static const struct of_device_id qcom_smmu_client_of_match[] __maybe_unused = { { .compatible = "qcom,sc8280xp-mdss" }, { .compatible = "qcom,sdm845-mdss" }, { .compatible = "qcom,sdm845-mss-pil" }, + { .compatible = "qcom,sm6350-mdss" }, { .compatible = "qcom,sm6375-mdss" }, { .compatible = "qcom,sm8150-mdss" }, { .compatible = "qcom,sm8250-mdss" },