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[83.9.29.190]) by smtp.gmail.com with ESMTPSA id m2-20020a2eb6c2000000b002b20d8f270asm2520057ljo.74.2023.06.14.03.22.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 14 Jun 2023 03:22:19 -0700 (PDT) From: Konrad Dybcio Date: Wed, 14 Jun 2023 12:22:13 +0200 Subject: [PATCH v5 02/22] soc: qcom: smd-rpm: Add QCOM_SMD_RPM_STATE_NUM MIME-Version: 1.0 Message-Id: <20230526-topic-smd_icc-v5-2-eeaa09d0082e@linaro.org> References: <20230526-topic-smd_icc-v5-0-eeaa09d0082e@linaro.org> In-Reply-To: <20230526-topic-smd_icc-v5-0-eeaa09d0082e@linaro.org> To: Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Georgi Djakov , Leo Yan , Evan Green , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1686738135; l=664; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=XHE1WQYZzaLo+c3xD4ALM/GRb1VwY7GuxNqpdL0mBnk=; b=Z8yBghNNMxMn+9eINX7qwCSmxht2X+X3SgW1EzzINyO8TFr4knjBpbMfDx/1zQ+Dwdr4u7hVi ErEdbmhvwVhCmO/6uGnbLZ2tTSsN1Fsus1YUnk7PWNJP7twlVwuhft8 X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add a preprocessor define to indicate the number of RPM contexts/states. Signed-off-by: Konrad Dybcio --- include/linux/soc/qcom/smd-rpm.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/linux/soc/qcom/smd-rpm.h b/include/linux/soc/qcom/smd-rpm.h index 2990f425fdef..e468f94fa323 100644 --- a/include/linux/soc/qcom/smd-rpm.h +++ b/include/linux/soc/qcom/smd-rpm.h @@ -6,6 +6,7 @@ struct qcom_smd_rpm; #define QCOM_SMD_RPM_ACTIVE_STATE 0 #define QCOM_SMD_RPM_SLEEP_STATE 1 +#define QCOM_SMD_RPM_STATE_NUM 2 /* * Constants used for addressing resources in the RPM. From patchwork Wed Jun 14 10:22:16 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 692686 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6DF03EB64DD for ; Wed, 14 Jun 2023 10:22:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243437AbjFNKWa (ORCPT ); Wed, 14 Jun 2023 06:22:30 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35038 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243348AbjFNKW2 (ORCPT ); Wed, 14 Jun 2023 06:22:28 -0400 Received: from mail-lj1-x22f.google.com (mail-lj1-x22f.google.com [IPv6:2a00:1450:4864:20::22f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B01C11BE5 for ; Wed, 14 Jun 2023 03:22:25 -0700 (PDT) Received: by mail-lj1-x22f.google.com with SMTP id 38308e7fff4ca-2b1c5a6129eso7028171fa.2 for ; Wed, 14 Jun 2023 03:22:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1686738144; x=1689330144; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=lt52lJ7IAYpZyo39NdZRaisuqAyx1l+kNW12PnaKg2U=; b=IWFvEkxe8V8zKzjnnK6wW+jAr93l1PemF4j+i2UrmK+I7Gei6TtLUzJiNBz+pByN3b PXRzObiM4QboZuEu9XysQV8QYGX3rc/LoOSidqNxSiXwoFPvzlkkGh/w+J7Y8vbmQ2mx 7U+6Za+OsgBW4Qn4bWAYfqFJkMje8lhv7VwG+e0CsflXsQwwkQj4Zjdp/xARO4v5RvKD RiPbY3ndfUzy7w9FHiorAtwF8QYzlOBUqeBAEDq1L4bNJbYazMAyXitLOkC+NqqNvJ16 916VFJ41WWmTRDF3tHoIY192hN7Sq/IBI+/Yh2RElHUUehDNRv1zxpqv9bkeJUuJya62 XB9Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1686738144; x=1689330144; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=lt52lJ7IAYpZyo39NdZRaisuqAyx1l+kNW12PnaKg2U=; b=PMkaxiY3d7iNyGl2hKupNqt9gOZb9RP2sT62c9zXOuW/HD8wtVVcNZHuym0zy2/eBh GMn4IerAoyjE0vzaKhAqhGIUxL03fUe0+lkVKakbsMVyDl5kgcRNyMRa76i6LP/x9yFz kuWKQEJpZhJUn/AlrAx3BDyRmqV3FybocxQfBCqUpBEcLDcMCLkVMQL7VGMzt6svkrim v3yk9ZOgBDjBtJgtRrqdpHAgPsQL7DHLF1R4ZwxeiI2NNCxa3TYmO5plW/YQ5Y/Np5FZ rOeNny1EIV/5tNvsj1Vmij/HjDfCekNsQN/rhKkRdtoRI21mq+6uTZCvd8qWZvmFcpTb mOuw== X-Gm-Message-State: AC+VfDwgKOZg4DBtrRJe58skBivtpyhgCfrtojE0coiMM4jjQimGPaX+ 0mFAdb8j9GULkzbBJH8jn1HCBQ== X-Google-Smtp-Source: ACHHUZ4VezIuskLSbrb+fOlN7xQco37hP8aam7VCpAwQfhQvHQWA9dX62n0x2dnYtGK6JWkATL+IJg== X-Received: by 2002:a2e:90da:0:b0:2b3:4ef9:34cd with SMTP id o26-20020a2e90da000000b002b34ef934cdmr109628ljg.8.1686738144056; Wed, 14 Jun 2023 03:22:24 -0700 (PDT) Received: from [192.168.1.101] (abyj190.neoplus.adsl.tpnet.pl. [83.9.29.190]) by smtp.gmail.com with ESMTPSA id m2-20020a2eb6c2000000b002b20d8f270asm2520057ljo.74.2023.06.14.03.22.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 14 Jun 2023 03:22:23 -0700 (PDT) From: Konrad Dybcio Date: Wed, 14 Jun 2023 12:22:16 +0200 Subject: [PATCH v5 05/22] soc: qcom: smd-rpm: Move icc_smd_rpm registration to clk-smd-rpm MIME-Version: 1.0 Message-Id: <20230526-topic-smd_icc-v5-5-eeaa09d0082e@linaro.org> References: <20230526-topic-smd_icc-v5-0-eeaa09d0082e@linaro.org> In-Reply-To: <20230526-topic-smd_icc-v5-0-eeaa09d0082e@linaro.org> To: Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Georgi Djakov , Leo Yan , Evan Green , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, Konrad Dybcio , Stephan Gerhold X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1686738135; l=3949; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=jmhJvBjqUtAAd9ogN4BP2RfilLnjEO+h94MD5RIqO5E=; b=C7Zf8dxJHhKoxq3DzVEAJLS5fWwU2dRq5+c6kwnVzrY2vCnoAwUDNrji5EHAXmo3aZH0zHMot dnZhMt77TAfA3UsL+HYb8jcjPi080ROKfKnCaeGkQPwS6XIto02TFv/ X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Stephan Gerhold icc_smd_rpm will do bus clock votes itself rather than taking the unnecessary detour through the clock subsystem. However, it can only do that after the clocks have been handed off and scaling has been enabled in the RPM in clk-smd-rpm. Move the icc_smd_rpm registration from smd-rpm.c to clk-smd-rpm.c to avoid any possible races. icc_smd_rpm gets the driver data from the smd-rpm device, so still register the platform device on the smd-rpm parent device. Signed-off-by: Stephan Gerhold [Konrad: remove unrelated cleanups] Acked-by: Stephen Boyd Signed-off-by: Konrad Dybcio --- drivers/clk/qcom/clk-smd-rpm.c | 21 +++++++++++++++++++++ drivers/soc/qcom/smd-rpm.c | 17 +---------------- 2 files changed, 22 insertions(+), 16 deletions(-) diff --git a/drivers/clk/qcom/clk-smd-rpm.c b/drivers/clk/qcom/clk-smd-rpm.c index 937cb1515968..6e7f0438e8b8 100644 --- a/drivers/clk/qcom/clk-smd-rpm.c +++ b/drivers/clk/qcom/clk-smd-rpm.c @@ -1289,12 +1289,20 @@ static struct clk_hw *qcom_smdrpm_clk_hw_get(struct of_phandle_args *clkspec, return desc->clks[idx] ? &desc->clks[idx]->hw : ERR_PTR(-ENOENT); } +static void rpm_smd_unregister_icc(void *data) +{ + struct platform_device *icc_pdev = data; + + platform_device_unregister(icc_pdev); +} + static int rpm_smd_clk_probe(struct platform_device *pdev) { int ret; size_t num_clks, i; struct clk_smd_rpm **rpm_smd_clks; const struct rpm_smd_clk_desc *desc; + struct platform_device *icc_pdev; rpmcc_smd_rpm = dev_get_drvdata(pdev->dev.parent); if (!rpmcc_smd_rpm) { @@ -1344,6 +1352,19 @@ static int rpm_smd_clk_probe(struct platform_device *pdev) if (ret) goto err; + icc_pdev = platform_device_register_data(pdev->dev.parent, + "icc_smd_rpm", -1, NULL, 0); + if (IS_ERR(icc_pdev)) { + dev_err(&pdev->dev, "Failed to register icc_smd_rpm device: %pE\n", + icc_pdev); + /* No need to unregister clocks because of this */ + } else { + ret = devm_add_action_or_reset(&pdev->dev, rpm_smd_unregister_icc, + icc_pdev); + if (ret) + goto err; + } + return 0; err: dev_err(&pdev->dev, "Error registering SMD clock driver (%d)\n", ret); diff --git a/drivers/soc/qcom/smd-rpm.c b/drivers/soc/qcom/smd-rpm.c index 0c1aa809cc4e..577f1f25ab10 100644 --- a/drivers/soc/qcom/smd-rpm.c +++ b/drivers/soc/qcom/smd-rpm.c @@ -19,7 +19,6 @@ /** * struct qcom_smd_rpm - state of the rpm device driver * @rpm_channel: reference to the smd channel - * @icc: interconnect proxy device * @dev: rpm device * @ack: completion for acks * @lock: mutual exclusion around the send/complete pair @@ -27,7 +26,6 @@ */ struct qcom_smd_rpm { struct rpmsg_endpoint *rpm_channel; - struct platform_device *icc; struct device *dev; struct completion ack; @@ -197,7 +195,6 @@ static int qcom_smd_rpm_callback(struct rpmsg_device *rpdev, static int qcom_smd_rpm_probe(struct rpmsg_device *rpdev) { struct qcom_smd_rpm *rpm; - int ret; rpm = devm_kzalloc(&rpdev->dev, sizeof(*rpm), GFP_KERNEL); if (!rpm) @@ -210,23 +207,11 @@ static int qcom_smd_rpm_probe(struct rpmsg_device *rpdev) rpm->rpm_channel = rpdev->ept; dev_set_drvdata(&rpdev->dev, rpm); - rpm->icc = platform_device_register_data(&rpdev->dev, "icc_smd_rpm", -1, - NULL, 0); - if (IS_ERR(rpm->icc)) - return PTR_ERR(rpm->icc); - - ret = of_platform_populate(rpdev->dev.of_node, NULL, NULL, &rpdev->dev); - if (ret) - platform_device_unregister(rpm->icc); - - return ret; + return of_platform_populate(rpdev->dev.of_node, NULL, NULL, &rpdev->dev); } static void qcom_smd_rpm_remove(struct rpmsg_device *rpdev) { - struct qcom_smd_rpm *rpm = dev_get_drvdata(&rpdev->dev); - - platform_device_unregister(rpm->icc); of_platform_depopulate(&rpdev->dev); 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[83.9.29.190]) by smtp.gmail.com with ESMTPSA id m2-20020a2eb6c2000000b002b20d8f270asm2520057ljo.74.2023.06.14.03.22.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 14 Jun 2023 03:22:25 -0700 (PDT) From: Konrad Dybcio Date: Wed, 14 Jun 2023 12:22:17 +0200 Subject: [PATCH v5 06/22] interconnect: qcom: icc-rpm: Introduce keep_alive MIME-Version: 1.0 Message-Id: <20230526-topic-smd_icc-v5-6-eeaa09d0082e@linaro.org> References: <20230526-topic-smd_icc-v5-0-eeaa09d0082e@linaro.org> In-Reply-To: <20230526-topic-smd_icc-v5-0-eeaa09d0082e@linaro.org> To: Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Georgi Djakov , Leo Yan , Evan Green , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, Konrad Dybcio , Dmitry Baryshkov X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1686738135; l=3661; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=g6kESh9vFn5cUExPwamnhleED6tFd+S7dtFe11cmEVE=; b=+5TX+IWvITvOPt3FKf80PLSfZpyEXg88Ruo8CN8uG442tDQftNEqI6MIJVm4RfvIrr5ZrEjJb Pyy9LVaNOsnCtkERlGg1opf2kH26p6NKEihhv9gZBKtDVHoKjOeOEUI X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The downstream kernel employs the concept of "keeping the bus alive" by voting for the minimum (XO/19.2MHz) rate at all times on certain (well, most) buses. This is a very important thing to have, as if we either have a lackluster/wrong DT that doesn't specify a (high enough) vote on a certain bus, we may lose access to the entire bus altogether. This is very apparent when we only start introducing interconnect support on a given platform and haven't yet introduced voting on all peripherals. The same can happen if we only have a single driver casting a vote on a certain bus and that driver exits/crashes/suspends. The keepalive vote is limited to the ACTIVE bucket, as keeping a permanent vote on the SLEEP one could prevent the platform from properly entering low power mode states. Introduce the very same concept, with a slight twist: the vendor kernel checks whether the rate is zero before setting the minimum vote, but that's rather silly, as in doing so we're at the mercy of CCF. Instead, explicitly clamp the rates to always be >= 19.2 MHz for providers with keep_alive=true. Reviewed-by: Dmitry Baryshkov Signed-off-by: Konrad Dybcio --- drivers/interconnect/qcom/icc-rpm.c | 10 ++++++++++ drivers/interconnect/qcom/icc-rpm.h | 3 +++ 2 files changed, 13 insertions(+) diff --git a/drivers/interconnect/qcom/icc-rpm.c b/drivers/interconnect/qcom/icc-rpm.c index 6acc7686ed38..863e8ba1daa2 100644 --- a/drivers/interconnect/qcom/icc-rpm.c +++ b/drivers/interconnect/qcom/icc-rpm.c @@ -50,6 +50,8 @@ #define NOC_QOS_MODE_FIXED_VAL 0x0 #define NOC_QOS_MODE_BYPASS_VAL 0x2 +#define ICC_BUS_CLK_MIN_RATE 19200000ULL + static int qcom_icc_set_qnoc_qos(struct icc_node *src) { struct icc_provider *provider = src->provider; @@ -380,6 +382,13 @@ static int qcom_icc_set(struct icc_node *src, struct icc_node *dst) do_div(rate, src_qn->buswidth); rate = min_t(u64, rate, LONG_MAX); + /* + * Downstream checks whether the requested rate is zero, but it makes little sense + * to vote for a value that's below the lower threshold, so let's not do so. + */ + if (bucket == QCOM_ICC_BUCKET_WAKE && qp->keep_alive) + rate = max(ICC_BUS_CLK_MIN_RATE, rate); + if (qp->bus_clk_rate[i] == rate) continue; @@ -453,6 +462,7 @@ int qnoc_probe(struct platform_device *pdev) for (i = 0; i < qp->num_bus_clks; i++) qp->bus_clks[i].id = bus_clocks[i]; + qp->keep_alive = desc->keep_alive; qp->type = desc->type; qp->qos_offset = desc->qos_offset; diff --git a/drivers/interconnect/qcom/icc-rpm.h b/drivers/interconnect/qcom/icc-rpm.h index ee705edf19dd..d2c04c400cad 100644 --- a/drivers/interconnect/qcom/icc-rpm.h +++ b/drivers/interconnect/qcom/icc-rpm.h @@ -33,6 +33,7 @@ enum qcom_icc_type { * @bus_clk_rate: bus clock rate in Hz * @bus_clks: the clk_bulk_data table of bus clocks * @intf_clks: a clk_bulk_data array of interface clocks + * @keep_alive: whether to always keep a minimum vote on the bus clocks * @is_on: whether the bus is powered on */ struct qcom_icc_provider { @@ -45,6 +46,7 @@ struct qcom_icc_provider { u64 bus_clk_rate[NUM_BUS_CLKS]; struct clk_bulk_data bus_clks[NUM_BUS_CLKS]; struct clk_bulk_data *intf_clks; + bool keep_alive; bool is_on; }; @@ -102,6 +104,7 @@ struct qcom_icc_desc { const char * const *bus_clocks; const char * const *intf_clocks; size_t num_intf_clocks; + bool keep_alive; bool no_clk_scaling; enum qcom_icc_type type; const struct regmap_config *regmap_cfg; From patchwork Wed Jun 14 10:22:18 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 692684 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B1B40EB64DB for ; Wed, 14 Jun 2023 10:22:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243297AbjFNKWw (ORCPT ); Wed, 14 Jun 2023 06:22:52 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35438 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239813AbjFNKWn (ORCPT ); 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[83.9.29.190]) by smtp.gmail.com with ESMTPSA id m2-20020a2eb6c2000000b002b20d8f270asm2520057ljo.74.2023.06.14.03.22.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 14 Jun 2023 03:22:26 -0700 (PDT) From: Konrad Dybcio Date: Wed, 14 Jun 2023 12:22:18 +0200 Subject: [PATCH v5 07/22] interconnect: qcom: Fold smd-rpm.h into icc-rpm.h MIME-Version: 1.0 Message-Id: <20230526-topic-smd_icc-v5-7-eeaa09d0082e@linaro.org> References: <20230526-topic-smd_icc-v5-0-eeaa09d0082e@linaro.org> In-Reply-To: <20230526-topic-smd_icc-v5-0-eeaa09d0082e@linaro.org> To: Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Georgi Djakov , Leo Yan , Evan Green , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, Konrad Dybcio , Dmitry Baryshkov X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1686738135; l=5451; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=ylF4JrhNb4QpLR63mLl/kyJvmecazdKn76bHZ9DX7ks=; b=SNwPY5zwZ31Y+j08qInd2HvsdnJyhvW87yLfkSoyt/YOGKoLFub3DKnq9bxIYc0zAg0G07YgJ KgvQfknKvhCBUhjXcZyj4OP+5F/64EeUWaVKOkoT3K3Iuptk21TNtI2 X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org smd-rpm.h is not very useful as-is and both files are always included anyway.. Combine them. Reviewed-by: Dmitry Baryshkov Signed-off-by: Konrad Dybcio --- drivers/interconnect/qcom/icc-rpm.c | 1 - drivers/interconnect/qcom/icc-rpm.h | 5 +++++ drivers/interconnect/qcom/msm8916.c | 1 - drivers/interconnect/qcom/msm8939.c | 1 - drivers/interconnect/qcom/msm8974.c | 2 +- drivers/interconnect/qcom/msm8996.c | 1 - drivers/interconnect/qcom/qcm2290.c | 1 - drivers/interconnect/qcom/qcs404.c | 1 - drivers/interconnect/qcom/sdm660.c | 1 - drivers/interconnect/qcom/smd-rpm.c | 2 +- drivers/interconnect/qcom/smd-rpm.h | 15 --------------- 11 files changed, 7 insertions(+), 24 deletions(-) diff --git a/drivers/interconnect/qcom/icc-rpm.c b/drivers/interconnect/qcom/icc-rpm.c index 863e8ba1daa2..b8ecf9538ab9 100644 --- a/drivers/interconnect/qcom/icc-rpm.c +++ b/drivers/interconnect/qcom/icc-rpm.c @@ -14,7 +14,6 @@ #include #include -#include "smd-rpm.h" #include "icc-common.h" #include "icc-rpm.h" diff --git a/drivers/interconnect/qcom/icc-rpm.h b/drivers/interconnect/qcom/icc-rpm.h index d2c04c400cad..9ec90e13bfbd 100644 --- a/drivers/interconnect/qcom/icc-rpm.h +++ b/drivers/interconnect/qcom/icc-rpm.h @@ -6,6 +6,8 @@ #ifndef __DRIVERS_INTERCONNECT_QCOM_ICC_RPM_H #define __DRIVERS_INTERCONNECT_QCOM_ICC_RPM_H +#include + #include #define RPM_BUS_MASTER_REQ 0x73616d62 @@ -121,4 +123,7 @@ enum qos_mode { int qnoc_probe(struct platform_device *pdev); int qnoc_remove(struct platform_device *pdev); +bool qcom_icc_rpm_smd_available(void); +int qcom_icc_rpm_smd_send(int ctx, int rsc_type, int id, u32 val); + #endif diff --git a/drivers/interconnect/qcom/msm8916.c b/drivers/interconnect/qcom/msm8916.c index 5c4ba2f37c8e..196b05879896 100644 --- a/drivers/interconnect/qcom/msm8916.c +++ b/drivers/interconnect/qcom/msm8916.c @@ -15,7 +15,6 @@ #include -#include "smd-rpm.h" #include "icc-rpm.h" enum { diff --git a/drivers/interconnect/qcom/msm8939.c b/drivers/interconnect/qcom/msm8939.c index caf0aefad668..639566dce45a 100644 --- a/drivers/interconnect/qcom/msm8939.c +++ b/drivers/interconnect/qcom/msm8939.c @@ -16,7 +16,6 @@ #include -#include "smd-rpm.h" #include "icc-rpm.h" enum { diff --git a/drivers/interconnect/qcom/msm8974.c b/drivers/interconnect/qcom/msm8974.c index 1828deaca443..968162213d40 100644 --- a/drivers/interconnect/qcom/msm8974.c +++ b/drivers/interconnect/qcom/msm8974.c @@ -38,7 +38,7 @@ #include #include -#include "smd-rpm.h" +#include "icc-rpm.h" enum { MSM8974_BIMC_MAS_AMPSS_M0 = 1, diff --git a/drivers/interconnect/qcom/msm8996.c b/drivers/interconnect/qcom/msm8996.c index 20340fb62fe6..1f7e88a37acd 100644 --- a/drivers/interconnect/qcom/msm8996.c +++ b/drivers/interconnect/qcom/msm8996.c @@ -18,7 +18,6 @@ #include #include "icc-rpm.h" -#include "smd-rpm.h" #include "msm8996.h" static const char * const mm_intf_clocks[] = { diff --git a/drivers/interconnect/qcom/qcm2290.c b/drivers/interconnect/qcom/qcm2290.c index a29cdb4fac03..cb636e67a5a4 100644 --- a/drivers/interconnect/qcom/qcm2290.c +++ b/drivers/interconnect/qcom/qcm2290.c @@ -19,7 +19,6 @@ #include #include "icc-rpm.h" -#include "smd-rpm.h" enum { QCM2290_MASTER_APPSS_PROC = 1, diff --git a/drivers/interconnect/qcom/qcs404.c b/drivers/interconnect/qcom/qcs404.c index fae155344332..938283ddd0e3 100644 --- a/drivers/interconnect/qcom/qcs404.c +++ b/drivers/interconnect/qcom/qcs404.c @@ -13,7 +13,6 @@ #include -#include "smd-rpm.h" #include "icc-rpm.h" enum { diff --git a/drivers/interconnect/qcom/sdm660.c b/drivers/interconnect/qcom/sdm660.c index 7ffaf70d62d3..003fc7d110a7 100644 --- a/drivers/interconnect/qcom/sdm660.c +++ b/drivers/interconnect/qcom/sdm660.c @@ -17,7 +17,6 @@ #include #include "icc-rpm.h" -#include "smd-rpm.h" enum { SDM660_MASTER_IPA = 1, diff --git a/drivers/interconnect/qcom/smd-rpm.c b/drivers/interconnect/qcom/smd-rpm.c index dc8ff8d133a9..b0183262ba66 100644 --- a/drivers/interconnect/qcom/smd-rpm.c +++ b/drivers/interconnect/qcom/smd-rpm.c @@ -13,7 +13,7 @@ #include #include -#include "smd-rpm.h" +#include "icc-rpm.h" #define RPM_KEY_BW 0x00007762 diff --git a/drivers/interconnect/qcom/smd-rpm.h b/drivers/interconnect/qcom/smd-rpm.h deleted file mode 100644 index ca9d0327b8ac..000000000000 --- a/drivers/interconnect/qcom/smd-rpm.h +++ /dev/null @@ -1,15 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2019, Linaro Ltd. - * Author: Georgi Djakov - */ - -#ifndef __DRIVERS_INTERCONNECT_QCOM_SMD_RPM_H -#define __DRIVERS_INTERCONNECT_QCOM_SMD_RPM_H - -#include - -bool qcom_icc_rpm_smd_available(void); -int qcom_icc_rpm_smd_send(int ctx, int rsc_type, int id, u32 val); - -#endif From patchwork Wed Jun 14 10:22:21 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 692683 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E93B0EB64DC for ; Wed, 14 Jun 2023 10:23:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243626AbjFNKXK (ORCPT ); Wed, 14 Jun 2023 06:23:10 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35438 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243627AbjFNKWu (ORCPT ); Wed, 14 Jun 2023 06:22:50 -0400 Received: from mail-lf1-x135.google.com (mail-lf1-x135.google.com [IPv6:2a00:1450:4864:20::135]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2ACC01FE4 for ; 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[83.9.29.190]) by smtp.gmail.com with ESMTPSA id m2-20020a2eb6c2000000b002b20d8f270asm2520057ljo.74.2023.06.14.03.22.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 14 Jun 2023 03:22:30 -0700 (PDT) From: Konrad Dybcio Date: Wed, 14 Jun 2023 12:22:21 +0200 Subject: [PATCH v5 10/22] interconnect: qcom: Define RPM bus clocks MIME-Version: 1.0 Message-Id: <20230526-topic-smd_icc-v5-10-eeaa09d0082e@linaro.org> References: <20230526-topic-smd_icc-v5-0-eeaa09d0082e@linaro.org> In-Reply-To: <20230526-topic-smd_icc-v5-0-eeaa09d0082e@linaro.org> To: Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Georgi Djakov , Leo Yan , Evan Green , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, Konrad Dybcio , Dmitry Baryshkov X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1686738135; l=4129; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=QhDLtz7hoqCOcuIMppqM3wqAxXoqGODrIbgYnXMpeck=; b=/cELH2k/OkTylFu+Z13wvHjf+Swc/1U38RLFd9KyaTl1Yb/0yzRhCOp4SQjUWcLAV07XSXkyR PQ2lcvn9XjMBv8sgk6SEtb5VPPkxqiProz2FX9OG8onaeKOL8NMiTGj X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add the definitions for RPM bus clocks that will be used by many different platforms. Reviewed-by: Dmitry Baryshkov Signed-off-by: Konrad Dybcio --- drivers/interconnect/qcom/Makefile | 2 +- drivers/interconnect/qcom/icc-rpm-clocks.c | 77 ++++++++++++++++++++++++++++++ drivers/interconnect/qcom/icc-rpm.h | 13 +++++ 3 files changed, 91 insertions(+), 1 deletion(-) diff --git a/drivers/interconnect/qcom/Makefile b/drivers/interconnect/qcom/Makefile index ab988926433c..80d9d2da95d1 100644 --- a/drivers/interconnect/qcom/Makefile +++ b/drivers/interconnect/qcom/Makefile @@ -29,7 +29,7 @@ qnoc-sm8250-objs := sm8250.o qnoc-sm8350-objs := sm8350.o qnoc-sm8450-objs := sm8450.o qnoc-sm8550-objs := sm8550.o -icc-smd-rpm-objs := smd-rpm.o icc-rpm.o +icc-smd-rpm-objs := smd-rpm.o icc-rpm.o icc-rpm-clocks.o obj-$(CONFIG_INTERCONNECT_QCOM_BCM_VOTER) += icc-bcm-voter.o obj-$(CONFIG_INTERCONNECT_QCOM_MSM8916) += qnoc-msm8916.o diff --git a/drivers/interconnect/qcom/icc-rpm-clocks.c b/drivers/interconnect/qcom/icc-rpm-clocks.c new file mode 100644 index 000000000000..63c82a91bbc7 --- /dev/null +++ b/drivers/interconnect/qcom/icc-rpm-clocks.c @@ -0,0 +1,77 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2023 Linaro Ltd + */ + +#include + +#include "icc-rpm.h" + +const struct rpm_clk_resource aggre1_clk = { + .resource_type = QCOM_SMD_RPM_AGGR_CLK, + .clock_id = 1, +}; +EXPORT_SYMBOL_GPL(aggre1_clk); + +const struct rpm_clk_resource aggre2_clk = { + .resource_type = QCOM_SMD_RPM_AGGR_CLK, + .clock_id = 2, +}; +EXPORT_SYMBOL_GPL(aggre2_clk); + +const struct rpm_clk_resource bimc_clk = { + .resource_type = QCOM_SMD_RPM_MEM_CLK, + .clock_id = 0, +}; +EXPORT_SYMBOL_GPL(bimc_clk); + +const struct rpm_clk_resource bus_0_clk = { + .resource_type = QCOM_SMD_RPM_BUS_CLK, + .clock_id = 0, +}; +EXPORT_SYMBOL_GPL(bus_0_clk); + +const struct rpm_clk_resource bus_1_clk = { + .resource_type = QCOM_SMD_RPM_BUS_CLK, + .clock_id = 1, +}; +EXPORT_SYMBOL_GPL(bus_1_clk); + +const struct rpm_clk_resource bus_2_clk = { + .resource_type = QCOM_SMD_RPM_BUS_CLK, + .clock_id = 2, +}; +EXPORT_SYMBOL_GPL(bus_2_clk); + +const struct rpm_clk_resource mmaxi_0_clk = { + .resource_type = QCOM_SMD_RPM_MMAXI_CLK, + .clock_id = 0, +}; +EXPORT_SYMBOL_GPL(mmaxi_0_clk); + +const struct rpm_clk_resource mmaxi_1_clk = { + .resource_type = QCOM_SMD_RPM_MMAXI_CLK, + .clock_id = 1, +}; +EXPORT_SYMBOL_GPL(mmaxi_1_clk); + +const struct rpm_clk_resource qup_clk = { + .resource_type = QCOM_SMD_RPM_QUP_CLK, + .clock_id = 0, +}; +EXPORT_SYMBOL_GPL(qup_clk); + +/* Branch clocks */ +const struct rpm_clk_resource aggre1_branch_clk = { + .resource_type = QCOM_SMD_RPM_AGGR_CLK, + .clock_id = 1, + .branch = true, +}; +EXPORT_SYMBOL_GPL(aggre1_branch_clk); + +const struct rpm_clk_resource aggre2_branch_clk = { + .resource_type = QCOM_SMD_RPM_AGGR_CLK, + .clock_id = 2, + .branch = true, +}; +EXPORT_SYMBOL_GPL(aggre2_branch_clk); diff --git a/drivers/interconnect/qcom/icc-rpm.h b/drivers/interconnect/qcom/icc-rpm.h index 0355e0250ccc..692d91c248d9 100644 --- a/drivers/interconnect/qcom/icc-rpm.h +++ b/drivers/interconnect/qcom/icc-rpm.h @@ -136,6 +136,19 @@ enum qos_mode { NOC_QOS_MODE_BYPASS, }; +extern const struct rpm_clk_resource aggre1_clk; +extern const struct rpm_clk_resource aggre2_clk; +extern const struct rpm_clk_resource bimc_clk; +extern const struct rpm_clk_resource bus_0_clk; +extern const struct rpm_clk_resource bus_1_clk; +extern const struct rpm_clk_resource bus_2_clk; +extern const struct rpm_clk_resource mmaxi_0_clk; +extern const struct rpm_clk_resource mmaxi_1_clk; +extern const struct rpm_clk_resource qup_clk; + +extern const struct rpm_clk_resource aggre1_branch_clk; +extern const struct rpm_clk_resource aggre2_branch_clk; + int qnoc_probe(struct platform_device *pdev); int qnoc_remove(struct platform_device *pdev); From patchwork Wed Jun 14 10:22:23 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 692682 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C24EAC001B1 for ; Wed, 14 Jun 2023 10:23:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243574AbjFNKXP (ORCPT ); Wed, 14 Jun 2023 06:23:15 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35882 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243554AbjFNKXC (ORCPT ); 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[83.9.29.190]) by smtp.gmail.com with ESMTPSA id m2-20020a2eb6c2000000b002b20d8f270asm2520057ljo.74.2023.06.14.03.22.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 14 Jun 2023 03:22:33 -0700 (PDT) From: Konrad Dybcio Date: Wed, 14 Jun 2023 12:22:23 +0200 Subject: [PATCH v5 12/22] interconnect: qcom: msm8996: Hook up RPM bus clk definitions MIME-Version: 1.0 Message-Id: <20230526-topic-smd_icc-v5-12-eeaa09d0082e@linaro.org> References: <20230526-topic-smd_icc-v5-0-eeaa09d0082e@linaro.org> In-Reply-To: <20230526-topic-smd_icc-v5-0-eeaa09d0082e@linaro.org> To: Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Georgi Djakov , Leo Yan , Evan Green , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1686738135; l=2380; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=jls2pE5wAdO3X2AaNe/A0wroCOxxq+TCympGtPIPMpo=; b=fSdqvZiOy5ixH448JoCfdWi9iAt1IbIuyVVO1AKX13yGNhYBq3T3SFlHDv0oFVHynwJzqhY9u r3ScPfaC5kICEhklW5p5gjXqQxpSFc3WGzLzIdmbJe12k6cm11VD+eB X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Assign the necessary definitions to migrate to the new bus clock handling mechanism. Signed-off-by: Konrad Dybcio --- drivers/interconnect/qcom/msm8996.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/interconnect/qcom/msm8996.c b/drivers/interconnect/qcom/msm8996.c index 1f7e88a37acd..a596f4035d2e 100644 --- a/drivers/interconnect/qcom/msm8996.c +++ b/drivers/interconnect/qcom/msm8996.c @@ -1840,6 +1840,7 @@ static const struct qcom_icc_desc msm8996_a1noc = { .type = QCOM_ICC_NOC, .nodes = a1noc_nodes, .num_nodes = ARRAY_SIZE(a1noc_nodes), + .bus_clk_desc = &aggre1_branch_clk, .regmap_cfg = &msm8996_a1noc_regmap_config }; @@ -1861,6 +1862,7 @@ static const struct qcom_icc_desc msm8996_a2noc = { .type = QCOM_ICC_NOC, .nodes = a2noc_nodes, .num_nodes = ARRAY_SIZE(a2noc_nodes), + .bus_clk_desc = &aggre2_branch_clk, .intf_clocks = a2noc_intf_clocks, .num_intf_clocks = ARRAY_SIZE(a2noc_intf_clocks), .regmap_cfg = &msm8996_a2noc_regmap_config @@ -1889,6 +1891,7 @@ static const struct qcom_icc_desc msm8996_bimc = { .type = QCOM_ICC_BIMC, .nodes = bimc_nodes, .num_nodes = ARRAY_SIZE(bimc_nodes), + .bus_clk_desc = &bimc_clk, .regmap_cfg = &msm8996_bimc_regmap_config }; @@ -1947,6 +1950,7 @@ static const struct qcom_icc_desc msm8996_cnoc = { .type = QCOM_ICC_NOC, .nodes = cnoc_nodes, .num_nodes = ARRAY_SIZE(cnoc_nodes), + .bus_clk_desc = &bus_2_clk, .regmap_cfg = &msm8996_cnoc_regmap_config }; @@ -2000,6 +2004,7 @@ static const struct qcom_icc_desc msm8996_mnoc = { .type = QCOM_ICC_NOC, .nodes = mnoc_nodes, .num_nodes = ARRAY_SIZE(mnoc_nodes), + .bus_clk_desc = &mmaxi_0_clk, .intf_clocks = mm_intf_clocks, .num_intf_clocks = ARRAY_SIZE(mm_intf_clocks), .regmap_cfg = &msm8996_mnoc_regmap_config @@ -2038,6 +2043,7 @@ static const struct qcom_icc_desc msm8996_pnoc = { .type = QCOM_ICC_NOC, .nodes = pnoc_nodes, .num_nodes = ARRAY_SIZE(pnoc_nodes), + .bus_clk_desc = &bus_0_clk, .regmap_cfg = &msm8996_pnoc_regmap_config }; @@ -2082,6 +2088,7 @@ static const struct qcom_icc_desc msm8996_snoc = { .type = QCOM_ICC_NOC, .nodes = snoc_nodes, .num_nodes = ARRAY_SIZE(snoc_nodes), + .bus_clk_desc = &bus_1_clk, .regmap_cfg = &msm8996_snoc_regmap_config }; From patchwork Wed Jun 14 10:22:26 2023 Content-Type: text/plain; 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[83.9.29.190]) by smtp.gmail.com with ESMTPSA id m2-20020a2eb6c2000000b002b20d8f270asm2520057ljo.74.2023.06.14.03.22.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 14 Jun 2023 03:22:37 -0700 (PDT) From: Konrad Dybcio Date: Wed, 14 Jun 2023 12:22:26 +0200 Subject: [PATCH v5 15/22] interconnect: qcom: msm8916: Hook up RPM bus clk definitions MIME-Version: 1.0 Message-Id: <20230526-topic-smd_icc-v5-15-eeaa09d0082e@linaro.org> References: <20230526-topic-smd_icc-v5-0-eeaa09d0082e@linaro.org> In-Reply-To: <20230526-topic-smd_icc-v5-0-eeaa09d0082e@linaro.org> To: Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Georgi Djakov , Leo Yan , Evan Green , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, Konrad Dybcio , Dmitry Baryshkov , Stephan Gerhold X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1686738135; l=1438; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=U/V7/Y31OoJlewUp8cNNSi57yg1wtDegefv7cGiM7Cw=; b=tJmdTuo+ol9pDJEEfEDZvwAWaekcUATIiBCULUgvm5UYVj4XNbIhT1b/4LT/D/8VvAUWaXopT ZuYnMrLyhkYD+s42SjU+qoSFlMaqLe4z+bgNFQIgdQ+Q4f8fpgrvXZ2 X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Assign the necessary definitions to migrate to the new bus clock handling mechanism. Reviewed-by: Dmitry Baryshkov Reviewed-by: Stephan Gerhold Signed-off-by: Konrad Dybcio --- drivers/interconnect/qcom/msm8916.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/interconnect/qcom/msm8916.c b/drivers/interconnect/qcom/msm8916.c index 196b05879896..be2a190a8b52 100644 --- a/drivers/interconnect/qcom/msm8916.c +++ b/drivers/interconnect/qcom/msm8916.c @@ -1231,6 +1231,7 @@ static const struct qcom_icc_desc msm8916_snoc = { .type = QCOM_ICC_NOC, .nodes = msm8916_snoc_nodes, .num_nodes = ARRAY_SIZE(msm8916_snoc_nodes), + .bus_clk_desc = &bus_1_clk, .regmap_cfg = &msm8916_snoc_regmap_config, .qos_offset = 0x7000, }; @@ -1259,6 +1260,7 @@ static const struct qcom_icc_desc msm8916_bimc = { .type = QCOM_ICC_BIMC, .nodes = msm8916_bimc_nodes, .num_nodes = ARRAY_SIZE(msm8916_bimc_nodes), + .bus_clk_desc = &bimc_clk, .regmap_cfg = &msm8916_bimc_regmap_config, .qos_offset = 0x8000, }; @@ -1328,6 +1330,7 @@ static const struct qcom_icc_desc msm8916_pcnoc = { .type = QCOM_ICC_NOC, .nodes = msm8916_pcnoc_nodes, .num_nodes = ARRAY_SIZE(msm8916_pcnoc_nodes), + .bus_clk_desc = &bus_0_clk, .regmap_cfg = &msm8916_pcnoc_regmap_config, .qos_offset = 0x7000, }; From patchwork Wed Jun 14 10:22:27 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 692680 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B4EE4EB64DB for ; Wed, 14 Jun 2023 10:23:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243748AbjFNKXc (ORCPT ); Wed, 14 Jun 2023 06:23:32 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36024 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243766AbjFNKXI (ORCPT ); Wed, 14 Jun 2023 06:23:08 -0400 Received: from mail-lj1-x234.google.com (mail-lj1-x234.google.com [IPv6:2a00:1450:4864:20::234]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1193A2135 for ; Wed, 14 Jun 2023 03:22:41 -0700 (PDT) Received: by mail-lj1-x234.google.com with SMTP id 38308e7fff4ca-2b227fdda27so5788891fa.1 for ; Wed, 14 Jun 2023 03:22:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1686738159; x=1689330159; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=o0XnmH13ivRPPHGJLER9uxu6PJxvQI4F3jOrAVZw55g=; b=jNLaLgSHpUVk4UKrZ3RROTmeGVrEjPGwdjUTZJ/0nyK6ew+QbEBNCpVoxR3diUj94x phm8bvRUqIEq9uTgFo8GTkHNVhZiwis5wepWxmOzz0caANuA8M0W5nL5IR7ZtdSHaw2/ sR8+2eEyG8I4qrlMF50gZKcS0/+cX5EEDupZ2Ow0QO2e8kXkWHjJjf/Ut49boSi56zlQ 2RkgEWizLaGmWOqvNUTCVczr6UaFaj5+98p+3iSWJRX0P8ZWi1/Vim8w25V/9hScIS+O c0qO1CtJhgbyQCZcvHtEUPIOVaLBLfQPkOjAOE6nHNShiSU+FpReV47Rw20JpSEHx39r tthg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1686738159; x=1689330159; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=o0XnmH13ivRPPHGJLER9uxu6PJxvQI4F3jOrAVZw55g=; b=AMCdEb0mHU+rWRMUK1iKcwJfkBoeKdhbtqHkj7i+zo+Q4l+PIEBfbUys2+6E7/nKqP Pl4CWmVSgCVVBhwihpOvn+YkHZME7cdf+ktDdkp5Gfw2I6rD/8FPHhVy11vGG0wu9MaK oqhZ1UOWTYaHYoD4VPKEp+1v7V/HZQ9G95etfOAbDQrgBGqWiw9T+6WZfBx/zjUiGwSX 4rDqUkRAXApQtGsNkqM56rqIs3CPvW9HWnv3Hgc/OW0SX77mhChrkGdGPhqThD2gdx89 Bi2vv/npvkIvRgj5r0zX/B1Gk25T2TpD1ak5woK/NnNEJ31eWlegEFKkXCsUH2AHiaY/ ae4A== X-Gm-Message-State: AC+VfDy9MSSdIIuN3JZk2lcRwREl1zHmH7QWCBVtowynHVWv7FYfs3aA zS+PFcm7vN7fO1bO9clSE5ESrQ== X-Google-Smtp-Source: ACHHUZ7/CqMFoax4VsFe82w+i8GM8wPwtWU6UCa/oH6soUJLCz0GhpwVSxbznkXKnRejGEe5eBzFxg== X-Received: by 2002:a2e:86cf:0:b0:2a7:7493:9966 with SMTP id n15-20020a2e86cf000000b002a774939966mr462797ljj.24.1686738159367; Wed, 14 Jun 2023 03:22:39 -0700 (PDT) Received: from [192.168.1.101] (abyj190.neoplus.adsl.tpnet.pl. [83.9.29.190]) by smtp.gmail.com with ESMTPSA id m2-20020a2eb6c2000000b002b20d8f270asm2520057ljo.74.2023.06.14.03.22.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 14 Jun 2023 03:22:39 -0700 (PDT) From: Konrad Dybcio Date: Wed, 14 Jun 2023 12:22:27 +0200 Subject: [PATCH v5 16/22] interconnect: qcom: qcm2290: Hook up RPM bus clk definitions MIME-Version: 1.0 Message-Id: <20230526-topic-smd_icc-v5-16-eeaa09d0082e@linaro.org> References: <20230526-topic-smd_icc-v5-0-eeaa09d0082e@linaro.org> In-Reply-To: <20230526-topic-smd_icc-v5-0-eeaa09d0082e@linaro.org> To: Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Georgi Djakov , Leo Yan , Evan Green , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, Konrad Dybcio , Dmitry Baryshkov X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1686738135; l=2388; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=tSBMAPt7cmsb0YEEInMBYypPFAnegUdevAoSi5GlaYA=; b=SwcRCSEnaNv7QtER98oC657KRXRuGLUTAQsGaxHB0OE0zt3OKvqVcF46AuqKWSDZoFPE+2vCW io5OoT5hcwhDyn+VgHAGBTHKuO1S30+ieYhPElT8J2wwytxL+5i2tbS X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Assign the necessary definitions to migrate to the new bus clock handling mechanism. Reviewed-by: Dmitry Baryshkov Signed-off-by: Konrad Dybcio --- drivers/interconnect/qcom/qcm2290.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/interconnect/qcom/qcm2290.c b/drivers/interconnect/qcom/qcm2290.c index cb636e67a5a4..2c7a76fab83c 100644 --- a/drivers/interconnect/qcom/qcm2290.c +++ b/drivers/interconnect/qcom/qcm2290.c @@ -1196,6 +1196,7 @@ static const struct qcom_icc_desc qcm2290_bimc = { .type = QCOM_ICC_BIMC, .nodes = qcm2290_bimc_nodes, .num_nodes = ARRAY_SIZE(qcm2290_bimc_nodes), + .bus_clk_desc = &bimc_clk, .regmap_cfg = &qcm2290_bimc_regmap_config, /* M_REG_BASE() in vendor msm_bus_bimc_adhoc driver */ .qos_offset = 0x8000, @@ -1251,6 +1252,7 @@ static const struct qcom_icc_desc qcm2290_cnoc = { .type = QCOM_ICC_NOC, .nodes = qcm2290_cnoc_nodes, .num_nodes = ARRAY_SIZE(qcm2290_cnoc_nodes), + .bus_clk_desc = &bus_1_clk, .regmap_cfg = &qcm2290_cnoc_regmap_config, }; @@ -1292,6 +1294,7 @@ static const struct qcom_icc_desc qcm2290_snoc = { .type = QCOM_ICC_QNOC, .nodes = qcm2290_snoc_nodes, .num_nodes = ARRAY_SIZE(qcm2290_snoc_nodes), + .bus_clk_desc = &bus_2_clk, .regmap_cfg = &qcm2290_snoc_regmap_config, /* Vendor DT node fab-sys_noc property 'qcom,base-offset' */ .qos_offset = 0x15000, @@ -1306,6 +1309,7 @@ static const struct qcom_icc_desc qcm2290_qup_virt = { .type = QCOM_ICC_QNOC, .nodes = qcm2290_qup_virt_nodes, .num_nodes = ARRAY_SIZE(qcm2290_qup_virt_nodes), + .bus_clk_desc = &qup_clk, }; static struct qcom_icc_node * const qcm2290_mmnrt_virt_nodes[] = { @@ -1319,6 +1323,7 @@ static const struct qcom_icc_desc qcm2290_mmnrt_virt = { .type = QCOM_ICC_QNOC, .nodes = qcm2290_mmnrt_virt_nodes, .num_nodes = ARRAY_SIZE(qcm2290_mmnrt_virt_nodes), + .bus_clk_desc = &mmaxi_0_clk, .regmap_cfg = &qcm2290_snoc_regmap_config, .qos_offset = 0x15000, }; @@ -1333,6 +1338,7 @@ static const struct qcom_icc_desc qcm2290_mmrt_virt = { .type = QCOM_ICC_QNOC, .nodes = qcm2290_mmrt_virt_nodes, .num_nodes = ARRAY_SIZE(qcm2290_mmrt_virt_nodes), + .bus_clk_desc = &mmaxi_1_clk, .regmap_cfg = &qcm2290_snoc_regmap_config, .qos_offset = 0x15000, }; From patchwork Wed Jun 14 10:22:29 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 692678 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F28EDEB64D9 for ; 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[83.9.29.190]) by smtp.gmail.com with ESMTPSA id m2-20020a2eb6c2000000b002b20d8f270asm2520057ljo.74.2023.06.14.03.22.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 14 Jun 2023 03:22:43 -0700 (PDT) From: Konrad Dybcio Date: Wed, 14 Jun 2023 12:22:29 +0200 Subject: [PATCH v5 18/22] clk: qcom: smd-rpm: Separate out interconnect bus clocks MIME-Version: 1.0 Message-Id: <20230526-topic-smd_icc-v5-18-eeaa09d0082e@linaro.org> References: <20230526-topic-smd_icc-v5-0-eeaa09d0082e@linaro.org> In-Reply-To: <20230526-topic-smd_icc-v5-0-eeaa09d0082e@linaro.org> To: Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Georgi Djakov , Leo Yan , Evan Green , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1686738135; l=26677; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=b1fcpW1FguL43YfbPVvUZKbf1hq8/EEzu+HzcWkLj0U=; b=dATnbAXJhG0fGGN/n1eQ/kXpsKeMpva1c2U9eIqtzLuby5inyzOzSV/1jQWCrTssWS0Akvcw8 PUahStsox3xDAu5/wpUCiXJJKLNdoQ5dsLCFLwIt3j8n16efXi+SSX8 X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The interconnect bus clocks are now handled within the ICC framework. They still however need to get a kickstart *before* we call clk_smd_rpm_enable_scaling(), or RPM will assume that they should all be running at 0 kHz and the system will inevitably die. Separate them out to ensure such a kickstart can still take place. As a happy accident, the file got smaller: Total: Before=41951, After=41555, chg -0.94% Signed-off-by: Konrad Dybcio --- drivers/clk/qcom/clk-smd-rpm.c | 278 +++++++++++++++++------------------------ 1 file changed, 115 insertions(+), 163 deletions(-) diff --git a/drivers/clk/qcom/clk-smd-rpm.c b/drivers/clk/qcom/clk-smd-rpm.c index 6e7f0438e8b8..0d1d97659d59 100644 --- a/drivers/clk/qcom/clk-smd-rpm.c +++ b/drivers/clk/qcom/clk-smd-rpm.c @@ -167,6 +167,14 @@ struct clk_smd_rpm { struct rpm_smd_clk_desc { struct clk_smd_rpm **clks; size_t num_clks; + + /* + * Interconnect clocks are managed by the icc framework, this driver + * only kickstarts them so that they don't get gated between + * clk_smd_rpm_enable_scaling() and interconnect driver initialization. + */ + struct clk_smd_rpm **icc_clks; + size_t num_icc_clks; bool scaling_before_handover; }; @@ -498,13 +506,69 @@ DEFINE_CLK_SMD_RPM_XO_BUFFER(div_clk1, 11, 19200000); DEFINE_CLK_SMD_RPM_XO_BUFFER(div_clk2, 12, 19200000); DEFINE_CLK_SMD_RPM_XO_BUFFER(div_clk3, 13, 19200000); +static struct clk_smd_rpm *bimc_pcnoc_icc_clks[] = { + &clk_smd_rpm_bimc_clk, + &clk_smd_rpm_bus_0_pcnoc_clk, +}; + +static struct clk_smd_rpm *bimc_pcnoc_snoc_icc_clks[] = { + &clk_smd_rpm_bimc_clk, + &clk_smd_rpm_bus_0_pcnoc_clk, + &clk_smd_rpm_bus_1_snoc_clk, +}; + +static struct clk_smd_rpm *bimc_pcnoc_snoc_smmnoc_icc_clks[] = { + &clk_smd_rpm_bimc_clk, + &clk_smd_rpm_bus_0_pcnoc_clk, + &clk_smd_rpm_bus_1_snoc_clk, + &clk_smd_rpm_bus_2_sysmmnoc_clk, +}; + +static struct clk_smd_rpm *bimc_pcnoc_snoc_cnoc_ocmem_icc_clks[] = { + &clk_smd_rpm_bimc_clk, + &clk_smd_rpm_bus_0_pcnoc_clk, + &clk_smd_rpm_bus_1_snoc_clk, + &clk_smd_rpm_bus_2_cnoc_clk, + &clk_smd_rpm_ocmemgx_clk, +}; + +static struct clk_smd_rpm *msm8996_icc_clks[] = { + &clk_smd_rpm_bimc_clk, + &clk_smd_rpm_branch_aggre1_noc_clk, + &clk_smd_rpm_branch_aggre2_noc_clk, + &clk_smd_rpm_bus_0_pcnoc_clk, + &clk_smd_rpm_bus_1_snoc_clk, + &clk_smd_rpm_bus_2_cnoc_clk, + &clk_smd_rpm_mmssnoc_axi_rpm_clk, +}; + +static struct clk_smd_rpm *msm8998_icc_clks[] = { + &clk_smd_rpm_aggre1_noc_clk, + &clk_smd_rpm_aggre2_noc_clk, + &clk_smd_rpm_bimc_clk, + &clk_smd_rpm_bus_1_snoc_clk, + &clk_smd_rpm_bus_2_cnoc_clk, + &clk_smd_rpm_mmssnoc_axi_rpm_clk, +}; + +static struct clk_smd_rpm *sdm660_icc_clks[] = { + &clk_smd_rpm_aggre2_noc_clk, + &clk_smd_rpm_bimc_clk, + &clk_smd_rpm_bus_1_snoc_clk, + &clk_smd_rpm_bus_2_cnoc_clk, + &clk_smd_rpm_mmssnoc_axi_rpm_clk, +}; + +static struct clk_smd_rpm *sm_qnoc_icc_clks[] = { + &clk_smd_rpm_bimc_clk, + &clk_smd_rpm_bus_1_cnoc_clk, + &clk_smd_rpm_mmnrt_clk, + &clk_smd_rpm_mmrt_clk, + &clk_smd_rpm_qup_clk, + &clk_smd_rpm_bus_2_snoc_clk, +}; + static struct clk_smd_rpm *msm8909_clks[] = { - [RPM_SMD_PCNOC_CLK] = &clk_smd_rpm_bus_0_pcnoc_clk, - [RPM_SMD_PCNOC_A_CLK] = &clk_smd_rpm_bus_0_pcnoc_a_clk, - [RPM_SMD_SNOC_CLK] = &clk_smd_rpm_bus_1_snoc_clk, - [RPM_SMD_SNOC_A_CLK] = &clk_smd_rpm_bus_1_snoc_a_clk, - [RPM_SMD_BIMC_CLK] = &clk_smd_rpm_bimc_clk, - [RPM_SMD_BIMC_A_CLK] = &clk_smd_rpm_bimc_a_clk, [RPM_SMD_QPIC_CLK] = &clk_smd_rpm_qpic_clk, [RPM_SMD_QPIC_CLK_A] = &clk_smd_rpm_qpic_a_clk, [RPM_SMD_QDSS_CLK] = &clk_smd_rpm_qdss_clk, @@ -530,15 +594,11 @@ static struct clk_smd_rpm *msm8909_clks[] = { static const struct rpm_smd_clk_desc rpm_clk_msm8909 = { .clks = msm8909_clks, .num_clks = ARRAY_SIZE(msm8909_clks), + .icc_clks = bimc_pcnoc_snoc_icc_clks, + .num_icc_clks = ARRAY_SIZE(bimc_pcnoc_snoc_icc_clks), }; static struct clk_smd_rpm *msm8916_clks[] = { - [RPM_SMD_PCNOC_CLK] = &clk_smd_rpm_bus_0_pcnoc_clk, - [RPM_SMD_PCNOC_A_CLK] = &clk_smd_rpm_bus_0_pcnoc_a_clk, - [RPM_SMD_SNOC_CLK] = &clk_smd_rpm_bus_1_snoc_clk, - [RPM_SMD_SNOC_A_CLK] = &clk_smd_rpm_bus_1_snoc_a_clk, - [RPM_SMD_BIMC_CLK] = &clk_smd_rpm_bimc_clk, - [RPM_SMD_BIMC_A_CLK] = &clk_smd_rpm_bimc_a_clk, [RPM_SMD_QDSS_CLK] = &clk_smd_rpm_qdss_clk, [RPM_SMD_QDSS_A_CLK] = &clk_smd_rpm_qdss_a_clk, [RPM_SMD_BB_CLK1] = &clk_smd_rpm_bb_clk1, @@ -562,21 +622,15 @@ static struct clk_smd_rpm *msm8916_clks[] = { static const struct rpm_smd_clk_desc rpm_clk_msm8916 = { .clks = msm8916_clks, .num_clks = ARRAY_SIZE(msm8916_clks), + .icc_clks = bimc_pcnoc_snoc_icc_clks, + .num_icc_clks = ARRAY_SIZE(bimc_pcnoc_snoc_icc_clks), }; static struct clk_smd_rpm *msm8917_clks[] = { [RPM_SMD_XO_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo, [RPM_SMD_XO_A_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo_a, - [RPM_SMD_PNOC_CLK] = &clk_smd_rpm_bus_0_pcnoc_clk, - [RPM_SMD_PNOC_A_CLK] = &clk_smd_rpm_bus_0_pcnoc_a_clk, - [RPM_SMD_SNOC_CLK] = &clk_smd_rpm_bus_1_snoc_clk, - [RPM_SMD_SNOC_A_CLK] = &clk_smd_rpm_bus_1_snoc_a_clk, - [RPM_SMD_BIMC_CLK] = &clk_smd_rpm_bimc_clk, - [RPM_SMD_BIMC_A_CLK] = &clk_smd_rpm_bimc_a_clk, [RPM_SMD_BIMC_GPU_CLK] = &clk_smd_rpm_bimc_gpu_clk, [RPM_SMD_BIMC_GPU_A_CLK] = &clk_smd_rpm_bimc_gpu_a_clk, - [RPM_SMD_SYSMMNOC_CLK] = &clk_smd_rpm_bus_2_sysmmnoc_clk, - [RPM_SMD_SYSMMNOC_A_CLK] = &clk_smd_rpm_bus_2_sysmmnoc_a_clk, [RPM_SMD_QDSS_CLK] = &clk_smd_rpm_qdss_clk, [RPM_SMD_QDSS_A_CLK] = &clk_smd_rpm_qdss_a_clk, [RPM_SMD_BB_CLK1] = &clk_smd_rpm_bb_clk1, @@ -596,19 +650,13 @@ static struct clk_smd_rpm *msm8917_clks[] = { static const struct rpm_smd_clk_desc rpm_clk_msm8917 = { .clks = msm8917_clks, .num_clks = ARRAY_SIZE(msm8917_clks), + .icc_clks = bimc_pcnoc_snoc_smmnoc_icc_clks, + .num_icc_clks = ARRAY_SIZE(bimc_pcnoc_snoc_smmnoc_icc_clks), }; static struct clk_smd_rpm *msm8936_clks[] = { [RPM_SMD_XO_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo, [RPM_SMD_XO_A_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo_a, - [RPM_SMD_PCNOC_CLK] = &clk_smd_rpm_bus_0_pcnoc_clk, - [RPM_SMD_PCNOC_A_CLK] = &clk_smd_rpm_bus_0_pcnoc_a_clk, - [RPM_SMD_SNOC_CLK] = &clk_smd_rpm_bus_1_snoc_clk, - [RPM_SMD_SNOC_A_CLK] = &clk_smd_rpm_bus_1_snoc_a_clk, - [RPM_SMD_BIMC_CLK] = &clk_smd_rpm_bimc_clk, - [RPM_SMD_BIMC_A_CLK] = &clk_smd_rpm_bimc_a_clk, - [RPM_SMD_SYSMMNOC_CLK] = &clk_smd_rpm_bus_2_sysmmnoc_clk, - [RPM_SMD_SYSMMNOC_A_CLK] = &clk_smd_rpm_bus_2_sysmmnoc_a_clk, [RPM_SMD_QDSS_CLK] = &clk_smd_rpm_qdss_clk, [RPM_SMD_QDSS_A_CLK] = &clk_smd_rpm_qdss_a_clk, [RPM_SMD_BB_CLK1] = &clk_smd_rpm_bb_clk1, @@ -632,25 +680,17 @@ static struct clk_smd_rpm *msm8936_clks[] = { static const struct rpm_smd_clk_desc rpm_clk_msm8936 = { .clks = msm8936_clks, .num_clks = ARRAY_SIZE(msm8936_clks), + .icc_clks = bimc_pcnoc_snoc_smmnoc_icc_clks, + .num_icc_clks = ARRAY_SIZE(bimc_pcnoc_snoc_smmnoc_icc_clks), }; static struct clk_smd_rpm *msm8974_clks[] = { [RPM_SMD_XO_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo, [RPM_SMD_XO_A_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo_a, - [RPM_SMD_PNOC_CLK] = &clk_smd_rpm_bus_0_pcnoc_clk, - [RPM_SMD_PNOC_A_CLK] = &clk_smd_rpm_bus_0_pcnoc_a_clk, - [RPM_SMD_SNOC_CLK] = &clk_smd_rpm_bus_1_snoc_clk, - [RPM_SMD_SNOC_A_CLK] = &clk_smd_rpm_bus_1_snoc_a_clk, - [RPM_SMD_CNOC_CLK] = &clk_smd_rpm_bus_2_cnoc_clk, - [RPM_SMD_CNOC_A_CLK] = &clk_smd_rpm_bus_2_cnoc_a_clk, [RPM_SMD_MMSSNOC_AHB_CLK] = &clk_smd_rpm_bus_3_mmssnoc_ahb_clk, [RPM_SMD_MMSSNOC_AHB_A_CLK] = &clk_smd_rpm_bus_3_mmssnoc_ahb_a_clk, - [RPM_SMD_BIMC_CLK] = &clk_smd_rpm_bimc_clk, [RPM_SMD_GFX3D_CLK_SRC] = &clk_smd_rpm_gfx3d_clk_src, [RPM_SMD_GFX3D_A_CLK_SRC] = &clk_smd_rpm_gfx3d_a_clk_src, - [RPM_SMD_BIMC_A_CLK] = &clk_smd_rpm_bimc_a_clk, - [RPM_SMD_OCMEMGX_CLK] = &clk_smd_rpm_ocmemgx_clk, - [RPM_SMD_OCMEMGX_A_CLK] = &clk_smd_rpm_ocmemgx_a_clk, [RPM_SMD_QDSS_CLK] = &clk_smd_rpm_qdss_clk, [RPM_SMD_QDSS_A_CLK] = &clk_smd_rpm_qdss_a_clk, [RPM_SMD_CXO_D0] = &clk_smd_rpm_cxo_d0, @@ -684,20 +724,14 @@ static struct clk_smd_rpm *msm8974_clks[] = { static const struct rpm_smd_clk_desc rpm_clk_msm8974 = { .clks = msm8974_clks, .num_clks = ARRAY_SIZE(msm8974_clks), + .icc_clks = bimc_pcnoc_snoc_cnoc_ocmem_icc_clks, + .num_icc_clks = ARRAY_SIZE(bimc_pcnoc_snoc_cnoc_ocmem_icc_clks), .scaling_before_handover = true, }; static struct clk_smd_rpm *msm8976_clks[] = { [RPM_SMD_XO_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo, [RPM_SMD_XO_A_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo_a, - [RPM_SMD_PCNOC_CLK] = &clk_smd_rpm_bus_0_pcnoc_clk, - [RPM_SMD_PCNOC_A_CLK] = &clk_smd_rpm_bus_0_pcnoc_a_clk, - [RPM_SMD_SNOC_CLK] = &clk_smd_rpm_bus_1_snoc_clk, - [RPM_SMD_SNOC_A_CLK] = &clk_smd_rpm_bus_1_snoc_a_clk, - [RPM_SMD_BIMC_CLK] = &clk_smd_rpm_bimc_clk, - [RPM_SMD_BIMC_A_CLK] = &clk_smd_rpm_bimc_a_clk, - [RPM_SMD_SYSMMNOC_CLK] = &clk_smd_rpm_bus_2_sysmmnoc_clk, - [RPM_SMD_SYSMMNOC_A_CLK] = &clk_smd_rpm_bus_2_sysmmnoc_a_clk, [RPM_SMD_QDSS_CLK] = &clk_smd_rpm_qdss_clk, [RPM_SMD_QDSS_A_CLK] = &clk_smd_rpm_qdss_a_clk, [RPM_SMD_BB_CLK1] = &clk_smd_rpm_bb_clk1, @@ -718,24 +752,15 @@ static struct clk_smd_rpm *msm8976_clks[] = { static const struct rpm_smd_clk_desc rpm_clk_msm8976 = { .clks = msm8976_clks, - .num_clks = ARRAY_SIZE(msm8976_clks), + .icc_clks = bimc_pcnoc_snoc_smmnoc_icc_clks, + .num_icc_clks = ARRAY_SIZE(bimc_pcnoc_snoc_smmnoc_icc_clks), }; static struct clk_smd_rpm *msm8992_clks[] = { [RPM_SMD_XO_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo, [RPM_SMD_XO_A_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo_a, - [RPM_SMD_PNOC_CLK] = &clk_smd_rpm_bus_0_pcnoc_clk, - [RPM_SMD_PNOC_A_CLK] = &clk_smd_rpm_bus_0_pcnoc_a_clk, - [RPM_SMD_OCMEMGX_CLK] = &clk_smd_rpm_ocmemgx_clk, - [RPM_SMD_OCMEMGX_A_CLK] = &clk_smd_rpm_ocmemgx_a_clk, - [RPM_SMD_BIMC_CLK] = &clk_smd_rpm_bimc_clk, - [RPM_SMD_BIMC_A_CLK] = &clk_smd_rpm_bimc_a_clk, - [RPM_SMD_CNOC_CLK] = &clk_smd_rpm_bus_2_cnoc_clk, - [RPM_SMD_CNOC_A_CLK] = &clk_smd_rpm_bus_2_cnoc_a_clk, [RPM_SMD_GFX3D_CLK_SRC] = &clk_smd_rpm_gfx3d_clk_src, [RPM_SMD_GFX3D_A_CLK_SRC] = &clk_smd_rpm_gfx3d_a_clk_src, - [RPM_SMD_SNOC_CLK] = &clk_smd_rpm_bus_1_snoc_clk, - [RPM_SMD_SNOC_A_CLK] = &clk_smd_rpm_bus_1_snoc_a_clk, [RPM_SMD_BB_CLK1] = &clk_smd_rpm_bb_clk1, [RPM_SMD_BB_CLK1_A] = &clk_smd_rpm_bb_clk1_a, [RPM_SMD_BB_CLK1_PIN] = &clk_smd_rpm_bb_clk1_pin, @@ -777,23 +802,15 @@ static struct clk_smd_rpm *msm8992_clks[] = { static const struct rpm_smd_clk_desc rpm_clk_msm8992 = { .clks = msm8992_clks, .num_clks = ARRAY_SIZE(msm8992_clks), + .icc_clks = bimc_pcnoc_snoc_cnoc_ocmem_icc_clks, + .num_icc_clks = ARRAY_SIZE(bimc_pcnoc_snoc_cnoc_ocmem_icc_clks), }; static struct clk_smd_rpm *msm8994_clks[] = { [RPM_SMD_XO_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo, [RPM_SMD_XO_A_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo_a, - [RPM_SMD_PNOC_CLK] = &clk_smd_rpm_bus_0_pcnoc_clk, - [RPM_SMD_PNOC_A_CLK] = &clk_smd_rpm_bus_0_pcnoc_a_clk, - [RPM_SMD_OCMEMGX_CLK] = &clk_smd_rpm_ocmemgx_clk, - [RPM_SMD_OCMEMGX_A_CLK] = &clk_smd_rpm_ocmemgx_a_clk, - [RPM_SMD_BIMC_CLK] = &clk_smd_rpm_bimc_clk, - [RPM_SMD_BIMC_A_CLK] = &clk_smd_rpm_bimc_a_clk, - [RPM_SMD_CNOC_CLK] = &clk_smd_rpm_bus_2_cnoc_clk, - [RPM_SMD_CNOC_A_CLK] = &clk_smd_rpm_bus_2_cnoc_a_clk, [RPM_SMD_GFX3D_CLK_SRC] = &clk_smd_rpm_gfx3d_clk_src, [RPM_SMD_GFX3D_A_CLK_SRC] = &clk_smd_rpm_gfx3d_a_clk_src, - [RPM_SMD_SNOC_CLK] = &clk_smd_rpm_bus_1_snoc_clk, - [RPM_SMD_SNOC_A_CLK] = &clk_smd_rpm_bus_1_snoc_a_clk, [RPM_SMD_BB_CLK1] = &clk_smd_rpm_bb_clk1, [RPM_SMD_BB_CLK1_A] = &clk_smd_rpm_bb_clk1_a, [RPM_SMD_BB_CLK1_PIN] = &clk_smd_rpm_bb_clk1_pin, @@ -837,29 +854,17 @@ static struct clk_smd_rpm *msm8994_clks[] = { static const struct rpm_smd_clk_desc rpm_clk_msm8994 = { .clks = msm8994_clks, .num_clks = ARRAY_SIZE(msm8994_clks), + .icc_clks = bimc_pcnoc_snoc_cnoc_ocmem_icc_clks, + .num_icc_clks = ARRAY_SIZE(bimc_pcnoc_snoc_cnoc_ocmem_icc_clks), }; static struct clk_smd_rpm *msm8996_clks[] = { [RPM_SMD_XO_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo, [RPM_SMD_XO_A_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo_a, - [RPM_SMD_PCNOC_CLK] = &clk_smd_rpm_bus_0_pcnoc_clk, - [RPM_SMD_PCNOC_A_CLK] = &clk_smd_rpm_bus_0_pcnoc_a_clk, - [RPM_SMD_SNOC_CLK] = &clk_smd_rpm_bus_1_snoc_clk, - [RPM_SMD_SNOC_A_CLK] = &clk_smd_rpm_bus_1_snoc_a_clk, - [RPM_SMD_CNOC_CLK] = &clk_smd_rpm_bus_2_cnoc_clk, - [RPM_SMD_CNOC_A_CLK] = &clk_smd_rpm_bus_2_cnoc_a_clk, - [RPM_SMD_BIMC_CLK] = &clk_smd_rpm_bimc_clk, - [RPM_SMD_BIMC_A_CLK] = &clk_smd_rpm_bimc_a_clk, - [RPM_SMD_MMAXI_CLK] = &clk_smd_rpm_mmssnoc_axi_rpm_clk, - [RPM_SMD_MMAXI_A_CLK] = &clk_smd_rpm_mmssnoc_axi_rpm_a_clk, [RPM_SMD_IPA_CLK] = &clk_smd_rpm_ipa_clk, [RPM_SMD_IPA_A_CLK] = &clk_smd_rpm_ipa_a_clk, [RPM_SMD_CE1_CLK] = &clk_smd_rpm_ce1_clk, [RPM_SMD_CE1_A_CLK] = &clk_smd_rpm_ce1_a_clk, - [RPM_SMD_AGGR1_NOC_CLK] = &clk_smd_rpm_branch_aggre1_noc_clk, - [RPM_SMD_AGGR1_NOC_A_CLK] = &clk_smd_rpm_branch_aggre1_noc_a_clk, - [RPM_SMD_AGGR2_NOC_CLK] = &clk_smd_rpm_branch_aggre2_noc_clk, - [RPM_SMD_AGGR2_NOC_A_CLK] = &clk_smd_rpm_branch_aggre2_noc_a_clk, [RPM_SMD_QDSS_CLK] = &clk_smd_rpm_qdss_clk, [RPM_SMD_QDSS_A_CLK] = &clk_smd_rpm_qdss_a_clk, [RPM_SMD_BB_CLK1] = &clk_smd_rpm_bb_clk1, @@ -891,6 +896,8 @@ static struct clk_smd_rpm *msm8996_clks[] = { static const struct rpm_smd_clk_desc rpm_clk_msm8996 = { .clks = msm8996_clks, .num_clks = ARRAY_SIZE(msm8996_clks), + .icc_clks = msm8996_icc_clks, + .num_icc_clks = ARRAY_SIZE(msm8996_icc_clks), }; static struct clk_smd_rpm *qcs404_clks[] = { @@ -919,19 +926,15 @@ static struct clk_smd_rpm *qcs404_clks[] = { static const struct rpm_smd_clk_desc rpm_clk_qcs404 = { .clks = qcs404_clks, .num_clks = ARRAY_SIZE(qcs404_clks), + .icc_clks = bimc_pcnoc_snoc_icc_clks, + .num_icc_clks = ARRAY_SIZE(bimc_pcnoc_snoc_icc_clks), }; static struct clk_smd_rpm *msm8998_clks[] = { [RPM_SMD_XO_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo, [RPM_SMD_XO_A_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo_a, - [RPM_SMD_BIMC_CLK] = &clk_smd_rpm_bimc_clk, - [RPM_SMD_BIMC_A_CLK] = &clk_smd_rpm_bimc_a_clk, [RPM_SMD_PCNOC_CLK] = &clk_smd_rpm_bus_0_pcnoc_clk, [RPM_SMD_PCNOC_A_CLK] = &clk_smd_rpm_bus_0_pcnoc_a_clk, - [RPM_SMD_SNOC_CLK] = &clk_smd_rpm_bus_1_snoc_clk, - [RPM_SMD_SNOC_A_CLK] = &clk_smd_rpm_bus_1_snoc_a_clk, - [RPM_SMD_CNOC_CLK] = &clk_smd_rpm_bus_2_cnoc_clk, - [RPM_SMD_CNOC_A_CLK] = &clk_smd_rpm_bus_2_cnoc_a_clk, [RPM_SMD_CE1_CLK] = &clk_smd_rpm_ce1_clk, [RPM_SMD_CE1_A_CLK] = &clk_smd_rpm_ce1_a_clk, [RPM_SMD_DIV_CLK1] = &clk_smd_rpm_div_clk1, @@ -954,12 +957,6 @@ static struct clk_smd_rpm *msm8998_clks[] = { [RPM_SMD_LN_BB_CLK2_A_PIN] = &clk_smd_rpm_ln_bb_clk2_a_pin, [RPM_SMD_LN_BB_CLK3_PIN] = &clk_smd_rpm_ln_bb_clk3_pin, [RPM_SMD_LN_BB_CLK3_A_PIN] = &clk_smd_rpm_ln_bb_clk3_a_pin, - [RPM_SMD_MMAXI_CLK] = &clk_smd_rpm_mmssnoc_axi_rpm_clk, - [RPM_SMD_MMAXI_A_CLK] = &clk_smd_rpm_mmssnoc_axi_rpm_a_clk, - [RPM_SMD_AGGR1_NOC_CLK] = &clk_smd_rpm_aggre1_noc_clk, - [RPM_SMD_AGGR1_NOC_A_CLK] = &clk_smd_rpm_aggre1_noc_a_clk, - [RPM_SMD_AGGR2_NOC_CLK] = &clk_smd_rpm_aggre2_noc_clk, - [RPM_SMD_AGGR2_NOC_A_CLK] = &clk_smd_rpm_aggre2_noc_a_clk, [RPM_SMD_QDSS_CLK] = &clk_smd_rpm_qdss_clk, [RPM_SMD_QDSS_A_CLK] = &clk_smd_rpm_qdss_a_clk, [RPM_SMD_RF_CLK1] = &clk_smd_rpm_rf_clk1, @@ -979,27 +976,19 @@ static struct clk_smd_rpm *msm8998_clks[] = { static const struct rpm_smd_clk_desc rpm_clk_msm8998 = { .clks = msm8998_clks, .num_clks = ARRAY_SIZE(msm8998_clks), + .icc_clks = msm8998_icc_clks, + .num_icc_clks = ARRAY_SIZE(msm8998_icc_clks), }; static struct clk_smd_rpm *sdm660_clks[] = { [RPM_SMD_XO_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo, [RPM_SMD_XO_A_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo_a, - [RPM_SMD_SNOC_CLK] = &clk_smd_rpm_bus_1_snoc_clk, - [RPM_SMD_SNOC_A_CLK] = &clk_smd_rpm_bus_1_snoc_a_clk, - [RPM_SMD_CNOC_CLK] = &clk_smd_rpm_bus_2_cnoc_clk, - [RPM_SMD_CNOC_A_CLK] = &clk_smd_rpm_bus_2_cnoc_a_clk, [RPM_SMD_CNOC_PERIPH_CLK] = &clk_smd_rpm_bus_0_pcnoc_clk, [RPM_SMD_CNOC_PERIPH_A_CLK] = &clk_smd_rpm_bus_0_pcnoc_a_clk, - [RPM_SMD_BIMC_CLK] = &clk_smd_rpm_bimc_clk, - [RPM_SMD_BIMC_A_CLK] = &clk_smd_rpm_bimc_a_clk, - [RPM_SMD_MMSSNOC_AXI_CLK] = &clk_smd_rpm_mmssnoc_axi_rpm_clk, - [RPM_SMD_MMSSNOC_AXI_CLK_A] = &clk_smd_rpm_mmssnoc_axi_rpm_a_clk, [RPM_SMD_IPA_CLK] = &clk_smd_rpm_ipa_clk, [RPM_SMD_IPA_A_CLK] = &clk_smd_rpm_ipa_a_clk, [RPM_SMD_CE1_CLK] = &clk_smd_rpm_ce1_clk, [RPM_SMD_CE1_A_CLK] = &clk_smd_rpm_ce1_a_clk, - [RPM_SMD_AGGR2_NOC_CLK] = &clk_smd_rpm_aggre2_noc_clk, - [RPM_SMD_AGGR2_NOC_A_CLK] = &clk_smd_rpm_aggre2_noc_a_clk, [RPM_SMD_QDSS_CLK] = &clk_smd_rpm_qdss_clk, [RPM_SMD_QDSS_A_CLK] = &clk_smd_rpm_qdss_a_clk, [RPM_SMD_RF_CLK1] = &clk_smd_rpm_rf_clk1, @@ -1025,15 +1014,13 @@ static struct clk_smd_rpm *sdm660_clks[] = { static const struct rpm_smd_clk_desc rpm_clk_sdm660 = { .clks = sdm660_clks, .num_clks = ARRAY_SIZE(sdm660_clks), + .icc_clks = sdm660_icc_clks, + .num_icc_clks = ARRAY_SIZE(sdm660_icc_clks), }; static struct clk_smd_rpm *mdm9607_clks[] = { [RPM_SMD_XO_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo, [RPM_SMD_XO_A_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo_a, - [RPM_SMD_PCNOC_CLK] = &clk_smd_rpm_bus_0_pcnoc_clk, - [RPM_SMD_PCNOC_A_CLK] = &clk_smd_rpm_bus_0_pcnoc_a_clk, - [RPM_SMD_BIMC_CLK] = &clk_smd_rpm_bimc_clk, - [RPM_SMD_BIMC_A_CLK] = &clk_smd_rpm_bimc_a_clk, [RPM_SMD_QPIC_CLK] = &clk_smd_rpm_qpic_clk, [RPM_SMD_QPIC_CLK_A] = &clk_smd_rpm_qpic_a_clk, [RPM_SMD_QDSS_CLK] = &clk_smd_rpm_qdss_clk, @@ -1047,21 +1034,15 @@ static struct clk_smd_rpm *mdm9607_clks[] = { static const struct rpm_smd_clk_desc rpm_clk_mdm9607 = { .clks = mdm9607_clks, .num_clks = ARRAY_SIZE(mdm9607_clks), + .icc_clks = bimc_pcnoc_icc_clks, + .num_icc_clks = ARRAY_SIZE(bimc_pcnoc_icc_clks), }; static struct clk_smd_rpm *msm8953_clks[] = { [RPM_SMD_XO_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo, [RPM_SMD_XO_A_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo_a, - [RPM_SMD_PCNOC_CLK] = &clk_smd_rpm_bus_0_pcnoc_clk, - [RPM_SMD_PCNOC_A_CLK] = &clk_smd_rpm_bus_0_pcnoc_a_clk, - [RPM_SMD_SNOC_CLK] = &clk_smd_rpm_bus_1_snoc_clk, - [RPM_SMD_SNOC_A_CLK] = &clk_smd_rpm_bus_1_snoc_a_clk, - [RPM_SMD_BIMC_CLK] = &clk_smd_rpm_bimc_clk, - [RPM_SMD_BIMC_A_CLK] = &clk_smd_rpm_bimc_a_clk, [RPM_SMD_IPA_CLK] = &clk_smd_rpm_ipa_clk, [RPM_SMD_IPA_A_CLK] = &clk_smd_rpm_ipa_a_clk, - [RPM_SMD_SYSMMNOC_CLK] = &clk_smd_rpm_bus_2_sysmmnoc_clk, - [RPM_SMD_SYSMMNOC_A_CLK] = &clk_smd_rpm_bus_2_sysmmnoc_a_clk, [RPM_SMD_QDSS_CLK] = &clk_smd_rpm_qdss_clk, [RPM_SMD_QDSS_A_CLK] = &clk_smd_rpm_qdss_a_clk, [RPM_SMD_BB_CLK1] = &clk_smd_rpm_bb_clk1, @@ -1083,23 +1064,19 @@ static struct clk_smd_rpm *msm8953_clks[] = { static const struct rpm_smd_clk_desc rpm_clk_msm8953 = { .clks = msm8953_clks, .num_clks = ARRAY_SIZE(msm8953_clks), + .icc_clks = bimc_pcnoc_snoc_smmnoc_icc_clks, + .num_icc_clks = ARRAY_SIZE(bimc_pcnoc_snoc_smmnoc_icc_clks), }; static struct clk_smd_rpm *sm6125_clks[] = { [RPM_SMD_XO_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo, [RPM_SMD_XO_A_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo_a, - [RPM_SMD_SNOC_CLK] = &clk_smd_rpm_bus_2_snoc_clk, - [RPM_SMD_SNOC_A_CLK] = &clk_smd_rpm_bus_2_snoc_a_clk, - [RPM_SMD_BIMC_CLK] = &clk_smd_rpm_bimc_clk, - [RPM_SMD_BIMC_A_CLK] = &clk_smd_rpm_bimc_a_clk, [RPM_SMD_QDSS_CLK] = &clk_smd_rpm_branch_qdss_clk, [RPM_SMD_QDSS_A_CLK] = &clk_smd_rpm_branch_qdss_a_clk, [RPM_SMD_RF_CLK1] = &clk_smd_rpm_rf_clk1, [RPM_SMD_RF_CLK1_A] = &clk_smd_rpm_rf_clk1_a, [RPM_SMD_RF_CLK2] = &clk_smd_rpm_rf_clk2, [RPM_SMD_RF_CLK2_A] = &clk_smd_rpm_rf_clk2_a, - [RPM_SMD_CNOC_CLK] = &clk_smd_rpm_bus_1_cnoc_clk, - [RPM_SMD_CNOC_A_CLK] = &clk_smd_rpm_bus_1_cnoc_a_clk, [RPM_SMD_IPA_CLK] = &clk_smd_rpm_ipa_clk, [RPM_SMD_IPA_A_CLK] = &clk_smd_rpm_ipa_a_clk, [RPM_SMD_CE1_CLK] = &clk_smd_rpm_ce1_clk, @@ -1110,12 +1087,6 @@ static struct clk_smd_rpm *sm6125_clks[] = { [RPM_SMD_LN_BB_CLK2_A] = &clk_smd_rpm_ln_bb_clk2_a, [RPM_SMD_LN_BB_CLK3] = &clk_smd_rpm_ln_bb_clk3, [RPM_SMD_LN_BB_CLK3_A] = &clk_smd_rpm_ln_bb_clk3_a, - [RPM_SMD_QUP_CLK] = &clk_smd_rpm_qup_clk, - [RPM_SMD_QUP_A_CLK] = &clk_smd_rpm_qup_a_clk, - [RPM_SMD_MMRT_CLK] = &clk_smd_rpm_mmrt_clk, - [RPM_SMD_MMRT_A_CLK] = &clk_smd_rpm_mmrt_a_clk, - [RPM_SMD_MMNRT_CLK] = &clk_smd_rpm_mmnrt_clk, - [RPM_SMD_MMNRT_A_CLK] = &clk_smd_rpm_mmnrt_a_clk, [RPM_SMD_SNOC_PERIPH_CLK] = &clk_smd_rpm_bus_0_snoc_periph_clk, [RPM_SMD_SNOC_PERIPH_A_CLK] = &clk_smd_rpm_bus_0_snoc_periph_a_clk, [RPM_SMD_SNOC_LPASS_CLK] = &clk_smd_rpm_bus_5_snoc_lpass_clk, @@ -1125,34 +1096,24 @@ static struct clk_smd_rpm *sm6125_clks[] = { static const struct rpm_smd_clk_desc rpm_clk_sm6125 = { .clks = sm6125_clks, .num_clks = ARRAY_SIZE(sm6125_clks), + .icc_clks = sm_qnoc_icc_clks, + .num_icc_clks = ARRAY_SIZE(sm_qnoc_icc_clks) }; /* SM6115 */ static struct clk_smd_rpm *sm6115_clks[] = { [RPM_SMD_XO_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo, [RPM_SMD_XO_A_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo_a, - [RPM_SMD_SNOC_CLK] = &clk_smd_rpm_bus_2_snoc_clk, - [RPM_SMD_SNOC_A_CLK] = &clk_smd_rpm_bus_2_snoc_a_clk, - [RPM_SMD_BIMC_CLK] = &clk_smd_rpm_bimc_clk, - [RPM_SMD_BIMC_A_CLK] = &clk_smd_rpm_bimc_a_clk, [RPM_SMD_QDSS_CLK] = &clk_smd_rpm_branch_qdss_clk, [RPM_SMD_QDSS_A_CLK] = &clk_smd_rpm_branch_qdss_a_clk, [RPM_SMD_RF_CLK1] = &clk_smd_rpm_rf_clk1, [RPM_SMD_RF_CLK1_A] = &clk_smd_rpm_rf_clk1_a, [RPM_SMD_RF_CLK2] = &clk_smd_rpm_rf_clk2, [RPM_SMD_RF_CLK2_A] = &clk_smd_rpm_rf_clk2_a, - [RPM_SMD_CNOC_CLK] = &clk_smd_rpm_bus_1_cnoc_clk, - [RPM_SMD_CNOC_A_CLK] = &clk_smd_rpm_bus_1_cnoc_a_clk, [RPM_SMD_IPA_CLK] = &clk_smd_rpm_ipa_clk, [RPM_SMD_IPA_A_CLK] = &clk_smd_rpm_ipa_a_clk, [RPM_SMD_CE1_CLK] = &clk_smd_rpm_ce1_clk, [RPM_SMD_CE1_A_CLK] = &clk_smd_rpm_ce1_a_clk, - [RPM_SMD_QUP_CLK] = &clk_smd_rpm_qup_clk, - [RPM_SMD_QUP_A_CLK] = &clk_smd_rpm_qup_a_clk, - [RPM_SMD_MMRT_CLK] = &clk_smd_rpm_mmrt_clk, - [RPM_SMD_MMRT_A_CLK] = &clk_smd_rpm_mmrt_a_clk, - [RPM_SMD_MMNRT_CLK] = &clk_smd_rpm_mmnrt_clk, - [RPM_SMD_MMNRT_A_CLK] = &clk_smd_rpm_mmnrt_a_clk, [RPM_SMD_SNOC_PERIPH_CLK] = &clk_smd_rpm_bus_0_snoc_periph_clk, [RPM_SMD_SNOC_PERIPH_A_CLK] = &clk_smd_rpm_bus_0_snoc_periph_a_clk, [RPM_SMD_SNOC_LPASS_CLK] = &clk_smd_rpm_bus_5_snoc_lpass_clk, @@ -1166,27 +1127,17 @@ static struct clk_smd_rpm *sm6115_clks[] = { static const struct rpm_smd_clk_desc rpm_clk_sm6115 = { .clks = sm6115_clks, .num_clks = ARRAY_SIZE(sm6115_clks), + .icc_clks = sm_qnoc_icc_clks, + .num_icc_clks = ARRAY_SIZE(sm_qnoc_icc_clks) }; static struct clk_smd_rpm *sm6375_clks[] = { [RPM_SMD_XO_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo, [RPM_SMD_XO_A_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo_a, - [RPM_SMD_SNOC_CLK] = &clk_smd_rpm_bus_2_snoc_clk, - [RPM_SMD_SNOC_A_CLK] = &clk_smd_rpm_bus_2_snoc_a_clk, - [RPM_SMD_BIMC_CLK] = &clk_smd_rpm_bimc_clk, - [RPM_SMD_BIMC_A_CLK] = &clk_smd_rpm_bimc_a_clk, [RPM_SMD_QDSS_CLK] = &clk_smd_rpm_branch_qdss_clk, [RPM_SMD_QDSS_A_CLK] = &clk_smd_rpm_branch_qdss_a_clk, - [RPM_SMD_CNOC_CLK] = &clk_smd_rpm_bus_1_cnoc_clk, - [RPM_SMD_CNOC_A_CLK] = &clk_smd_rpm_bus_1_cnoc_a_clk, [RPM_SMD_IPA_CLK] = &clk_smd_rpm_ipa_clk, [RPM_SMD_IPA_A_CLK] = &clk_smd_rpm_ipa_a_clk, - [RPM_SMD_QUP_CLK] = &clk_smd_rpm_qup_clk, - [RPM_SMD_QUP_A_CLK] = &clk_smd_rpm_qup_a_clk, - [RPM_SMD_MMRT_CLK] = &clk_smd_rpm_mmrt_clk, - [RPM_SMD_MMRT_A_CLK] = &clk_smd_rpm_mmrt_a_clk, - [RPM_SMD_MMNRT_CLK] = &clk_smd_rpm_mmnrt_clk, - [RPM_SMD_MMNRT_A_CLK] = &clk_smd_rpm_mmnrt_a_clk, [RPM_SMD_SNOC_PERIPH_CLK] = &clk_smd_rpm_bus_0_snoc_periph_clk, [RPM_SMD_SNOC_PERIPH_A_CLK] = &clk_smd_rpm_bus_0_snoc_periph_a_clk, [RPM_SMD_SNOC_LPASS_CLK] = &clk_smd_rpm_bus_5_snoc_lpass_clk, @@ -1203,31 +1154,21 @@ static struct clk_smd_rpm *sm6375_clks[] = { static const struct rpm_smd_clk_desc rpm_clk_sm6375 = { .clks = sm6375_clks, .num_clks = ARRAY_SIZE(sm6375_clks), + .icc_clks = sm_qnoc_icc_clks, + .num_icc_clks = ARRAY_SIZE(sm_qnoc_icc_clks) }; static struct clk_smd_rpm *qcm2290_clks[] = { [RPM_SMD_XO_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo, [RPM_SMD_XO_A_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo_a, - [RPM_SMD_SNOC_CLK] = &clk_smd_rpm_bus_2_snoc_clk, - [RPM_SMD_SNOC_A_CLK] = &clk_smd_rpm_bus_2_snoc_a_clk, - [RPM_SMD_BIMC_CLK] = &clk_smd_rpm_bimc_clk, - [RPM_SMD_BIMC_A_CLK] = &clk_smd_rpm_bimc_a_clk, [RPM_SMD_QDSS_CLK] = &clk_smd_rpm_branch_qdss_clk, [RPM_SMD_QDSS_A_CLK] = &clk_smd_rpm_branch_qdss_a_clk, [RPM_SMD_LN_BB_CLK2] = &clk_smd_rpm_ln_bb_clk2, [RPM_SMD_LN_BB_CLK2_A] = &clk_smd_rpm_ln_bb_clk2_a, [RPM_SMD_RF_CLK3] = &clk_smd_rpm_38m4_rf_clk3, [RPM_SMD_RF_CLK3_A] = &clk_smd_rpm_38m4_rf_clk3_a, - [RPM_SMD_CNOC_CLK] = &clk_smd_rpm_bus_1_cnoc_clk, - [RPM_SMD_CNOC_A_CLK] = &clk_smd_rpm_bus_1_cnoc_a_clk, [RPM_SMD_IPA_CLK] = &clk_smd_rpm_ipa_clk, [RPM_SMD_IPA_A_CLK] = &clk_smd_rpm_ipa_a_clk, - [RPM_SMD_QUP_CLK] = &clk_smd_rpm_qup_clk, - [RPM_SMD_QUP_A_CLK] = &clk_smd_rpm_qup_a_clk, - [RPM_SMD_MMRT_CLK] = &clk_smd_rpm_mmrt_clk, - [RPM_SMD_MMRT_A_CLK] = &clk_smd_rpm_mmrt_a_clk, - [RPM_SMD_MMNRT_CLK] = &clk_smd_rpm_mmnrt_clk, - [RPM_SMD_MMNRT_A_CLK] = &clk_smd_rpm_mmnrt_a_clk, [RPM_SMD_SNOC_PERIPH_CLK] = &clk_smd_rpm_bus_0_snoc_periph_clk, [RPM_SMD_SNOC_PERIPH_A_CLK] = &clk_smd_rpm_bus_0_snoc_periph_a_clk, [RPM_SMD_SNOC_LPASS_CLK] = &clk_smd_rpm_bus_5_snoc_lpass_clk, @@ -1249,6 +1190,8 @@ static struct clk_smd_rpm *qcm2290_clks[] = { static const struct rpm_smd_clk_desc rpm_clk_qcm2290 = { .clks = qcm2290_clks, .num_clks = ARRAY_SIZE(qcm2290_clks), + .icc_clks = sm_qnoc_icc_clks, + .num_icc_clks = ARRAY_SIZE(sm_qnoc_icc_clks) }; static const struct of_device_id rpm_smd_clk_match_table[] = { @@ -1332,6 +1275,15 @@ static int rpm_smd_clk_probe(struct platform_device *pdev) goto err; } + for (i = 0; i < desc->num_icc_clks; i++) { + if (!desc->icc_clks[i]) + continue; + + ret = clk_smd_rpm_handoff(desc->icc_clks[i]); + if (ret) + goto err; + } + if (!desc->scaling_before_handover) { ret = clk_smd_rpm_enable_scaling(); if (ret) From patchwork Wed Jun 14 10:22:30 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 692679 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AF890C001B1 for ; Wed, 14 Jun 2023 10:24:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243949AbjFNKX7 (ORCPT ); Wed, 14 Jun 2023 06:23:59 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36134 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243522AbjFNKXO (ORCPT ); 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[83.9.29.190]) by smtp.gmail.com with ESMTPSA id m2-20020a2eb6c2000000b002b20d8f270asm2520057ljo.74.2023.06.14.03.22.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 14 Jun 2023 03:22:45 -0700 (PDT) From: Konrad Dybcio Date: Wed, 14 Jun 2023 12:22:30 +0200 Subject: [PATCH v5 19/22] interconnect: qcom: icc-rpm: Fix bucket number MIME-Version: 1.0 Message-Id: <20230526-topic-smd_icc-v5-19-eeaa09d0082e@linaro.org> References: <20230526-topic-smd_icc-v5-0-eeaa09d0082e@linaro.org> In-Reply-To: <20230526-topic-smd_icc-v5-0-eeaa09d0082e@linaro.org> To: Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Georgi Djakov , Leo Yan , Evan Green , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, Konrad Dybcio , Dmitry Baryshkov , Stephan Gerhold X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1686738135; l=4077; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=oYZAjqax66Gw3pbgpRM0nmJnsW7wNNggsQDWCGX4MbI=; b=Rx0JVwVLkaqNAedcdMbjht4NToFLfJj7Q8DDoNNTlDowP7CWXVPeA0qTcEVA2vGchg0/dOq3F u+JXky8AHCoBT3GRFXP0QPWSgPndqkCxodt088TDjVj4XRqt1RSQlLK X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org SMD RPM only provides two buckets, one each for the active-only and active-sleep RPM contexts. Use the correct constant to allocate and operate on them. This will make the qcom,icc.h header no longer work with this driver, mostly because.. it was never meant to! The commit that introduced bucket support to SMD RPM was trying to shove a square into a round hole and it did not work out very well. That said, there are no active users of SMD RPM ICC + qcom,icc.h, so that doesn't hurt. Fixes: dcbce7b0a79c ("interconnect: qcom: icc-rpm: Support multiple buckets") Reviewed-by: Dmitry Baryshkov Reviewed-by: Stephan Gerhold Signed-off-by: Konrad Dybcio --- drivers/interconnect/qcom/icc-rpm.c | 16 ++++++++-------- drivers/interconnect/qcom/icc-rpm.h | 6 +++--- 2 files changed, 11 insertions(+), 11 deletions(-) diff --git a/drivers/interconnect/qcom/icc-rpm.c b/drivers/interconnect/qcom/icc-rpm.c index 858880a97d2a..47d034284e0d 100644 --- a/drivers/interconnect/qcom/icc-rpm.c +++ b/drivers/interconnect/qcom/icc-rpm.c @@ -249,7 +249,7 @@ static void qcom_icc_pre_bw_aggregate(struct icc_node *node) size_t i; qn = node->data; - for (i = 0; i < QCOM_ICC_NUM_BUCKETS; i++) { + for (i = 0; i < QCOM_SMD_RPM_STATE_NUM; i++) { qn->sum_avg[i] = 0; qn->max_peak[i] = 0; } @@ -273,9 +273,9 @@ static int qcom_icc_bw_aggregate(struct icc_node *node, u32 tag, u32 avg_bw, qn = node->data; if (!tag) - tag = QCOM_ICC_TAG_ALWAYS; + tag = RPM_ALWAYS_TAG; - for (i = 0; i < QCOM_ICC_NUM_BUCKETS; i++) { + for (i = 0; i < QCOM_SMD_RPM_STATE_NUM; i++) { if (tag & BIT(i)) { qn->sum_avg[i] += avg_bw; qn->max_peak[i] = max_t(u32, qn->max_peak[i], peak_bw); @@ -300,11 +300,11 @@ static void qcom_icc_bus_aggregate(struct icc_provider *provider, { struct icc_node *node; struct qcom_icc_node *qn; - u64 sum_avg[QCOM_ICC_NUM_BUCKETS]; + u64 sum_avg[QCOM_SMD_RPM_STATE_NUM]; int i; /* Initialise aggregate values */ - for (i = 0; i < QCOM_ICC_NUM_BUCKETS; i++) { + for (i = 0; i < QCOM_SMD_RPM_STATE_NUM; i++) { agg_avg[i] = 0; agg_peak[i] = 0; } @@ -317,7 +317,7 @@ static void qcom_icc_bus_aggregate(struct icc_provider *provider, */ list_for_each_entry(node, &provider->nodes, node_list) { qn = node->data; - for (i = 0; i < QCOM_ICC_NUM_BUCKETS; i++) { + for (i = 0; i < QCOM_SMD_RPM_STATE_NUM; i++) { if (qn->channels) sum_avg[i] = div_u64(qn->sum_avg[i], qn->channels); else @@ -328,7 +328,7 @@ static void qcom_icc_bus_aggregate(struct icc_provider *provider, } /* Find maximum values across all buckets */ - for (i = 0; i < QCOM_ICC_NUM_BUCKETS; i++) + for (i = 0; i < QCOM_SMD_RPM_STATE_NUM; i++) *max_agg_avg = max_t(u64, *max_agg_avg, agg_avg[i]); } @@ -339,7 +339,7 @@ static int qcom_icc_set(struct icc_node *src, struct icc_node *dst) struct icc_provider *provider; u64 sum_bw; u64 active_rate, sleep_rate; - u64 agg_avg[QCOM_ICC_NUM_BUCKETS], agg_peak[QCOM_ICC_NUM_BUCKETS]; + u64 agg_avg[QCOM_SMD_RPM_STATE_NUM], agg_peak[QCOM_SMD_RPM_STATE_NUM]; u64 max_agg_avg; int ret; diff --git a/drivers/interconnect/qcom/icc-rpm.h b/drivers/interconnect/qcom/icc-rpm.h index d5da24495d14..f73d35f3d32a 100644 --- a/drivers/interconnect/qcom/icc-rpm.h +++ b/drivers/interconnect/qcom/icc-rpm.h @@ -10,7 +10,7 @@ #include #include -#include +#include #define RPM_BUS_MASTER_REQ 0x73616d62 #define RPM_BUS_SLAVE_REQ 0x766c7362 @@ -105,8 +105,8 @@ struct qcom_icc_node { u16 num_links; u16 channels; u16 buswidth; - u64 sum_avg[QCOM_ICC_NUM_BUCKETS]; - u64 max_peak[QCOM_ICC_NUM_BUCKETS]; + u64 sum_avg[QCOM_SMD_RPM_STATE_NUM]; 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[83.9.29.190]) by smtp.gmail.com with ESMTPSA id m2-20020a2eb6c2000000b002b20d8f270asm2520057ljo.74.2023.06.14.03.22.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 14 Jun 2023 03:22:49 -0700 (PDT) From: Konrad Dybcio Date: Wed, 14 Jun 2023 12:22:33 +0200 Subject: [PATCH v5 22/22] interconnect: qcom: icc-rpm: Fix bandwidth calculations MIME-Version: 1.0 Message-Id: <20230526-topic-smd_icc-v5-22-eeaa09d0082e@linaro.org> References: <20230526-topic-smd_icc-v5-0-eeaa09d0082e@linaro.org> In-Reply-To: <20230526-topic-smd_icc-v5-0-eeaa09d0082e@linaro.org> To: Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Georgi Djakov , Leo Yan , Evan Green , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, Konrad Dybcio , Stephan Gerhold X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1686738136; l=5027; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=Y6xOksmJ4mLZEd7yKDwUFVfxkWIq2Zds5gCs+rlOv40=; b=NYN1utIToJqOpynv4MfxledDji90pHdIJZVykGWzq3UsyI8id0Rk1b1Hhk1g5KBD53JSF4rr/ B71Z7Cup3hBBBdGiwOhmGsuQYnAqLZRH4NQZbsti0DQYTvOZflKu6VX X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Up until now, we've been aggregating the bandwidth values and only dividing them by the bus width of the source node. This was completely wrong, as different nodes on a given path may (and usually do) have varying bus widths. That in turn, resulted in the calculated clock rates being completely bogus - usually they ended up being much higher, as NoC_A<->NoC_B links are very wide. Since we're not using the aggregate bandwidth value for anything other than clock rate calculations, remodel qcom_icc_bus_aggregate() to calculate the per-context clock rate for a given provider, taking into account the bus width of every individual node. Fixes: 30c8fa3ec61a ("interconnect: qcom: Add MSM8916 interconnect provider driver") Reported-by: Stephan Gerhold Reviewed-by: Stephan Gerhold Signed-off-by: Konrad Dybcio --- drivers/interconnect/qcom/icc-rpm.c | 59 ++++++++++++------------------------- 1 file changed, 19 insertions(+), 40 deletions(-) diff --git a/drivers/interconnect/qcom/icc-rpm.c b/drivers/interconnect/qcom/icc-rpm.c index b7e0dfbdd26d..4ab410e477ce 100644 --- a/drivers/interconnect/qcom/icc-rpm.c +++ b/drivers/interconnect/qcom/icc-rpm.c @@ -293,58 +293,44 @@ static int qcom_icc_bw_aggregate(struct icc_node *node, u32 tag, u32 avg_bw, } /** - * qcom_icc_bus_aggregate - aggregate bandwidth by traversing all nodes + * qcom_icc_bus_aggregate - calculate bus clock rates by traversing all nodes * @provider: generic interconnect provider - * @agg_avg: an array for aggregated average bandwidth of buckets - * @agg_peak: an array for aggregated peak bandwidth of buckets - * @max_agg_avg: pointer to max value of aggregated average bandwidth + * @agg_clk_rate: array containing the aggregated clock rates in kHz */ -static void qcom_icc_bus_aggregate(struct icc_provider *provider, - u64 *agg_avg, u64 *agg_peak, - u64 *max_agg_avg) +static void qcom_icc_bus_aggregate(struct icc_provider *provider, u64 *agg_clk_rate) { - struct icc_node *node; + u64 agg_avg_rate, agg_rate; struct qcom_icc_node *qn; - u64 sum_avg[QCOM_SMD_RPM_STATE_NUM]; + struct icc_node *node; int i; - /* Initialise aggregate values */ - for (i = 0; i < QCOM_SMD_RPM_STATE_NUM; i++) { - agg_avg[i] = 0; - agg_peak[i] = 0; - } - - *max_agg_avg = 0; - /* - * Iterate nodes on the interconnect and aggregate bandwidth - * requests for every bucket. + * Iterate nodes on the provider, aggregate bandwidth requests for + * every bucket and convert them into bus clock rates. */ list_for_each_entry(node, &provider->nodes, node_list) { qn = node->data; for (i = 0; i < QCOM_SMD_RPM_STATE_NUM; i++) { if (qn->channels) - sum_avg[i] = div_u64(qn->sum_avg[i], qn->channels); + agg_avg_rate = div_u64(qn->sum_avg[i], qn->channels); else - sum_avg[i] = qn->sum_avg[i]; - agg_avg[i] += sum_avg[i]; - agg_peak[i] = max_t(u64, agg_peak[i], qn->max_peak[i]); + agg_avg_rate = qn->sum_avg[i]; + + agg_rate = max_t(u64, agg_avg_rate, qn->max_peak[i]); + do_div(agg_rate, qn->buswidth); + + agg_clk_rate[i] = max_t(u64, agg_clk_rate[i], agg_rate); } } - - /* Find maximum values across all buckets */ - for (i = 0; i < QCOM_SMD_RPM_STATE_NUM; i++) - *max_agg_avg = max_t(u64, *max_agg_avg, agg_avg[i]); } static int qcom_icc_set(struct icc_node *src, struct icc_node *dst) { - struct qcom_icc_provider *qp; struct qcom_icc_node *src_qn = NULL, *dst_qn = NULL; + u64 agg_clk_rate[QCOM_SMD_RPM_STATE_NUM] = { 0 }; struct icc_provider *provider; + struct qcom_icc_provider *qp; u64 active_rate, sleep_rate; - u64 agg_avg[QCOM_SMD_RPM_STATE_NUM], agg_peak[QCOM_SMD_RPM_STATE_NUM]; - u64 max_agg_avg; int ret; src_qn = src->data; @@ -353,7 +339,9 @@ static int qcom_icc_set(struct icc_node *src, struct icc_node *dst) provider = src->provider; qp = to_qcom_provider(provider); - qcom_icc_bus_aggregate(provider, agg_avg, agg_peak, &max_agg_avg); + qcom_icc_bus_aggregate(provider, agg_clk_rate); + active_rate = agg_clk_rate[QCOM_SMD_RPM_ACTIVE_STATE]; + sleep_rate = agg_clk_rate[QCOM_SMD_RPM_SLEEP_STATE]; ret = qcom_icc_rpm_set(src_qn, src_qn->sum_avg); if (ret) @@ -369,15 +357,6 @@ static int qcom_icc_set(struct icc_node *src, struct icc_node *dst) if (!qp->bus_clk_desc && !qp->bus_clk) return 0; - /* Intentionally keep the rates in kHz as that's what RPM accepts */ - active_rate = max(agg_avg[QCOM_SMD_RPM_ACTIVE_STATE], - agg_peak[QCOM_SMD_RPM_ACTIVE_STATE]); - do_div(active_rate, src_qn->buswidth); - - sleep_rate = max(agg_avg[QCOM_SMD_RPM_SLEEP_STATE], - agg_peak[QCOM_SMD_RPM_SLEEP_STATE]); - do_div(sleep_rate, src_qn->buswidth); - /* * Downstream checks whether the requested rate is zero, but it makes little sense * to vote for a value that's below the lower threshold, so let's not do so.