From patchwork Fri Jun 16 19:02:20 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 693331 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A950CEB64DA for ; Fri, 16 Jun 2023 19:02:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345595AbjFPTCd (ORCPT ); Fri, 16 Jun 2023 15:02:33 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41836 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345460AbjFPTCb (ORCPT ); Fri, 16 Jun 2023 15:02:31 -0400 Received: from mail-ej1-x636.google.com (mail-ej1-x636.google.com [IPv6:2a00:1450:4864:20::636]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0CB5D2D76 for ; Fri, 16 Jun 2023 12:02:30 -0700 (PDT) Received: by mail-ej1-x636.google.com with SMTP id a640c23a62f3a-9829b12b80fso149753966b.2 for ; Fri, 16 Jun 2023 12:02:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1686942148; x=1689534148; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=ARSSXq/AxdbZBW4rlafZx7CGwmXZf89mlbDFWw/BMlo=; b=F5axYCF0BT0337i8VMINw4zYhGLesqhRqj7XdyQzF3EvQAuu+cHS9pOTJ3PwCD1LQb gGMd59ieS9srLsphHMiYUESL2TLp66tsOM5YiZo5lZZUa3MBhLn5p+h9+n1hHLtIv9Y+ vpbxeJ12RLiO/Aq9ytObigCTkbe3VUOn4sHUpk5jdeyE9LqkDZCllP/BDxgxWJblnkhf W5qjQrrx+FEEnp3bACoGtjhnF3SdRy4rzhnNOEXT3Rg5Dz5Md98DBJQCzAX18wzdifE+ eg3kVCbleTxBgZ1fHzC/TXFg0JEPOyL0tD6Ql2vlExbh45U8Vmoheh2Rz3+2NY9CyI1y aO4A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1686942148; x=1689534148; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=ARSSXq/AxdbZBW4rlafZx7CGwmXZf89mlbDFWw/BMlo=; b=A5VJhtOoqu09fm89wXGr6ikoz5uYfbodU6R80DDOONg3jQoDc3CgJX4hC02muKIVHW WEdNmhQgB7AUbrvCRAwcOxQZtYD9lH6mUfPs4lg9S25woQc+VweiL7hXRASDhG48qtSy lZOu1hqXJXo1EWXIlibCD/vv9tbP66XrknlWY9C2shVzRS7tm2q6wShtOhfCaDrnODl7 tjC983i5Go1k9eIWKkKCMBeiUQx4qmm8whVGJcL2yoGE0HOQI/qk5q/X6Y8JjRHk1K5A 0BrKV4dX+AtjdNbj93rLe+P1CQOwLa0D1AC1urmmpg3ECt3x4Magi0Fe0WKYHjVmLtes 6g1A== X-Gm-Message-State: AC+VfDyZDs9uSUJj9Gf5ThzgVEiKgxYqRltta4UWkDkQyfvEVJtEuBwM B+iPX5KKMNIU7dV4CzzTQVuC4A== X-Google-Smtp-Source: ACHHUZ40N6jyKBfx92i22LHfl3FhhUiSPnPU5/4z2Z21/iP4QXkf+pgEo4pSW4nkTCn06k+KNAQQ8Q== X-Received: by 2002:a17:907:a03:b0:982:2278:bcef with SMTP id bb3-20020a1709070a0300b009822278bcefmr2932160ejc.60.1686942147912; Fri, 16 Jun 2023 12:02:27 -0700 (PDT) Received: from krzk-bin.. ([178.197.219.26]) by smtp.gmail.com with ESMTPSA id q2-20020a1709060e4200b00982362776cbsm5637880eji.118.2023.06.16.12.02.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Jun 2023 12:02:27 -0700 (PDT) From: Krzysztof Kozlowski To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Krzysztof Kozlowski Subject: [PATCH 1/3] arm64: dts: qcom: sm8350-hdk: include PMK8350 Date: Fri, 16 Jun 2023 21:02:20 +0200 Message-Id: <20230616190222.2251186-1-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org HDK8350 comes with PMK8350 PMIC, so include relevant DTSI. This also allows to use reboot reason. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sm8350-hdk.dts | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/qcom/sm8350-hdk.dts b/arch/arm64/boot/dts/qcom/sm8350-hdk.dts index d33338e9a95f..de67438b3a97 100644 --- a/arch/arm64/boot/dts/qcom/sm8350-hdk.dts +++ b/arch/arm64/boot/dts/qcom/sm8350-hdk.dts @@ -7,6 +7,7 @@ #include #include "sm8350.dtsi" +#include "pmk8350.dtsi" / { model = "Qualcomm Technologies, Inc. SM8350 HDK"; From patchwork Fri Jun 16 18:57:41 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 693332 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5FC4EEB64DA for ; Fri, 16 Jun 2023 18:58:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230224AbjFPS6P (ORCPT ); Fri, 16 Jun 2023 14:58:15 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37800 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345565AbjFPS6H (ORCPT ); Fri, 16 Jun 2023 14:58:07 -0400 Received: from mail-ej1-x62c.google.com (mail-ej1-x62c.google.com [IPv6:2a00:1450:4864:20::62c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7BC8A3C0D for ; Fri, 16 Jun 2023 11:57:54 -0700 (PDT) Received: by mail-ej1-x62c.google.com with SMTP id a640c23a62f3a-986d8332f50so56768266b.0 for ; Fri, 16 Jun 2023 11:57:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1686941872; x=1689533872; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Vv6WItjkSwtuOqt53XrAUdwxV+bkrz4Ru5MMAFuDWbY=; b=dkqilJm8OwFBy/9I+c04xWLxmSwkJWe0ubI+C345YofO94kNXdvufyfmJ2hBzMqjcz ZZikwd6S9fC1phQluy5Pz6JFSLveuNinsy/ov8YhWCyc5S/GjV8aRJIJh20VfUTQ7ua1 mKcouUQepk1//YFXbmfH1FmFK8ijHtoQ1SDLdaO6m9/vuzPOLPOB79JeL2iovgY+Qb5C MVGfzEBXRHS4KDne0Yr1fyUq3wQ0Ch0/zT0DHv8Rz18W+hY6txaDhE65PVt2iJBeS67g 2MH2OvIT+O0KxzlNYpkY5VKK1QbzaWg+MbNnN+PfpcIQGsCPzc3SzP/iPTOjkSjaHxAl EohA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1686941872; x=1689533872; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Vv6WItjkSwtuOqt53XrAUdwxV+bkrz4Ru5MMAFuDWbY=; b=XLeHtZ2LSyFjboSZL9kNm8sla/9Tm6N5SRc6CdK12eRDd8JSP/udnFEBSrfzcLOX3J mo1x/upZDLT/mVQqEzWio1eje7C/BAr0IABdfBF+DU8Vx/ZeZG4msc16k2vcuvVcPZka BpjDEXgRHySkdRWA5Vdb/VKiu13HDs9crCIqlh3veZNc1Xc3vZRhyEnPF3IYbfrU6j8h d7o/6ug8mw/AOzsr1ulKG1G1ML8cJvZjaZGXT8Nvi4NFLMwM5OHVSaPwCTrdaMIZ3/RL sae2sWCu6B3jPcCfDOLH9znQlsaQFiZsVHHBe8CJxhg7Cr+PTcIUQg8LA2uOgAdZvzXS mdHA== X-Gm-Message-State: AC+VfDxY2mgX+yHjgHAhbZ5iIrCvO0c7peODempY5hoJqY5cD9ekaMru MRD9/TMtMOPxJ8e688qujhD9dA== X-Google-Smtp-Source: ACHHUZ5KtvJvycCSNm/Np99G5FaqAfKFCCPzzx5xhZgAmEOAhtPTSGJnIvpoAahqgObsPRlTw84w9w== X-Received: by 2002:a17:907:6095:b0:94f:6058:4983 with SMTP id ht21-20020a170907609500b0094f60584983mr3019695ejc.76.1686941872648; Fri, 16 Jun 2023 11:57:52 -0700 (PDT) Received: from krzk-bin.. ([178.197.219.26]) by smtp.gmail.com with ESMTPSA id e24-20020a170906081800b009786c8249d6sm11284606ejd.175.2023.06.16.11.57.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Jun 2023 11:57:52 -0700 (PDT) From: Krzysztof Kozlowski To: Bjorn Andersson , Andy Gross , Konrad Dybcio , Linus Walleij , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Catalin Marinas , Will Deacon , Srinivas Kandagatla , linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Krzysztof Kozlowski Subject: [PATCH 2/3] pinctrl: qcom: sm8350-lpass-lpi: add SM8350 LPASS TLMM Date: Fri, 16 Jun 2023 20:57:41 +0200 Message-Id: <20230616185742.2250452-2-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230616185742.2250452-1-krzysztof.kozlowski@linaro.org> References: <20230616185742.2250452-1-krzysztof.kozlowski@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add driver for pin controller in Low Power Audio SubSystem (LPASS). The driver is similar to SM8450 LPASS pin controller, with difference in one new pin (gpio14). Signed-off-by: Krzysztof Kozlowski --- drivers/pinctrl/qcom/Kconfig | 10 ++ drivers/pinctrl/qcom/Makefile | 1 + .../pinctrl/qcom/pinctrl-sm8350-lpass-lpi.c | 167 ++++++++++++++++++ 3 files changed, 178 insertions(+) create mode 100644 drivers/pinctrl/qcom/pinctrl-sm8350-lpass-lpi.c diff --git a/drivers/pinctrl/qcom/Kconfig b/drivers/pinctrl/qcom/Kconfig index 634c75336983..9c43bc05c447 100644 --- a/drivers/pinctrl/qcom/Kconfig +++ b/drivers/pinctrl/qcom/Kconfig @@ -77,6 +77,16 @@ config PINCTRL_SM8250_LPASS_LPI Qualcomm Technologies Inc LPASS (Low Power Audio SubSystem) LPI (Low Power Island) found on the Qualcomm Technologies Inc SM8250 platform. +config PINCTRL_SM3550_LPASS_LPI + tristate "Qualcomm Technologies Inc SM8350 LPASS LPI pin controller driver" + depends on ARM64 || COMPILE_TEST + depends on PINCTRL_LPASS_LPI + help + This is the pinctrl, pinmux, pinconf and gpiolib driver for the + Qualcomm Technologies Inc LPASS (Low Power Audio SubSystem) LPI + (Low Power Island) found on the Qualcomm Technologies Inc SM8350 + platform. + config PINCTRL_SM8450_LPASS_LPI tristate "Qualcomm Technologies Inc SM8450 LPASS LPI pin controller driver" depends on ARM64 || COMPILE_TEST diff --git a/drivers/pinctrl/qcom/Makefile b/drivers/pinctrl/qcom/Makefile index 426ddbf35f32..76ffcfbffc8e 100644 --- a/drivers/pinctrl/qcom/Makefile +++ b/drivers/pinctrl/qcom/Makefile @@ -52,6 +52,7 @@ obj-$(CONFIG_PINCTRL_SM8150) += pinctrl-sm8150.o obj-$(CONFIG_PINCTRL_SM8250) += pinctrl-sm8250.o obj-$(CONFIG_PINCTRL_SM8250_LPASS_LPI) += pinctrl-sm8250-lpass-lpi.o obj-$(CONFIG_PINCTRL_SM8350) += pinctrl-sm8350.o +obj-$(CONFIG_PINCTRL_SM8350_LPASS_LPI) += pinctrl-sm8350-lpass-lpi.o obj-$(CONFIG_PINCTRL_SM8450) += pinctrl-sm8450.o obj-$(CONFIG_PINCTRL_SM8450_LPASS_LPI) += pinctrl-sm8450-lpass-lpi.o obj-$(CONFIG_PINCTRL_SM8550) += pinctrl-sm8550.o diff --git a/drivers/pinctrl/qcom/pinctrl-sm8350-lpass-lpi.c b/drivers/pinctrl/qcom/pinctrl-sm8350-lpass-lpi.c new file mode 100644 index 000000000000..23cce59d1a95 --- /dev/null +++ b/drivers/pinctrl/qcom/pinctrl-sm8350-lpass-lpi.c @@ -0,0 +1,167 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2016-2019, The Linux Foundation. All rights reserved. + * Copyright (c) 20202-2023 Linaro Ltd. + */ + +#include +#include +#include + +#include "pinctrl-lpass-lpi.h" + +enum lpass_lpi_functions { + LPI_MUX_dmic1_clk, + LPI_MUX_dmic1_data, + LPI_MUX_dmic2_clk, + LPI_MUX_dmic2_data, + LPI_MUX_dmic3_clk, + LPI_MUX_dmic3_data, + LPI_MUX_i2s1_clk, + LPI_MUX_i2s1_data, + LPI_MUX_i2s1_ws, + LPI_MUX_i2s2_clk, + LPI_MUX_i2s2_data, + LPI_MUX_i2s2_ws, + LPI_MUX_qua_mi2s_data, + LPI_MUX_qua_mi2s_sclk, + LPI_MUX_qua_mi2s_ws, + LPI_MUX_swr_rx_clk, + LPI_MUX_swr_rx_data, + LPI_MUX_swr_tx_clk, + LPI_MUX_swr_tx_data, + LPI_MUX_swr_tx_data2, + LPI_MUX_wsa_swr_clk, + LPI_MUX_wsa_swr_data, + LPI_MUX_gpio, + LPI_MUX__, +}; + +static int gpio0_pins[] = { 0 }; +static int gpio1_pins[] = { 1 }; +static int gpio2_pins[] = { 2 }; +static int gpio3_pins[] = { 3 }; +static int gpio4_pins[] = { 4 }; +static int gpio5_pins[] = { 5 }; +static int gpio6_pins[] = { 6 }; +static int gpio7_pins[] = { 7 }; +static int gpio8_pins[] = { 8 }; +static int gpio9_pins[] = { 9 }; +static int gpio10_pins[] = { 10 }; +static int gpio11_pins[] = { 11 }; +static int gpio12_pins[] = { 12 }; +static int gpio13_pins[] = { 13 }; +static int gpio14_pins[] = { 14 }; + +static const struct pinctrl_pin_desc sm8350_lpi_pins[] = { + PINCTRL_PIN(0, "gpio0"), + PINCTRL_PIN(1, "gpio1"), + PINCTRL_PIN(2, "gpio2"), + PINCTRL_PIN(3, "gpio3"), + PINCTRL_PIN(4, "gpio4"), + PINCTRL_PIN(5, "gpio5"), + PINCTRL_PIN(6, "gpio6"), + PINCTRL_PIN(7, "gpio7"), + PINCTRL_PIN(8, "gpio8"), + PINCTRL_PIN(9, "gpio9"), + PINCTRL_PIN(10, "gpio10"), + PINCTRL_PIN(11, "gpio11"), + PINCTRL_PIN(12, "gpio12"), + PINCTRL_PIN(13, "gpio13"), + PINCTRL_PIN(14, "gpio14"), +}; + +static const char * const swr_tx_clk_groups[] = { "gpio0" }; +static const char * const swr_tx_data_groups[] = { "gpio1", "gpio2", "gpio5", "gpio14" }; +static const char * const swr_rx_clk_groups[] = { "gpio3" }; +static const char * const swr_rx_data_groups[] = { "gpio4", "gpio5" }; +static const char * const dmic1_clk_groups[] = { "gpio6" }; +static const char * const dmic1_data_groups[] = { "gpio7" }; +static const char * const dmic2_clk_groups[] = { "gpio8" }; +static const char * const dmic2_data_groups[] = { "gpio9" }; +static const char * const i2s2_clk_groups[] = { "gpio10" }; +static const char * const i2s2_ws_groups[] = { "gpio11" }; +static const char * const dmic3_clk_groups[] = { "gpio12" }; +static const char * const dmic3_data_groups[] = { "gpio13" }; +static const char * const qua_mi2s_sclk_groups[] = { "gpio0" }; +static const char * const qua_mi2s_ws_groups[] = { "gpio1" }; +static const char * const qua_mi2s_data_groups[] = { "gpio2", "gpio3", "gpio4" }; +static const char * const i2s1_clk_groups[] = { "gpio6" }; +static const char * const i2s1_ws_groups[] = { "gpio7" }; +static const char * const i2s1_data_groups[] = { "gpio8", "gpio9" }; +static const char * const wsa_swr_clk_groups[] = { "gpio10" }; +static const char * const wsa_swr_data_groups[] = { "gpio11" }; +static const char * const i2s2_data_groups[] = { "gpio12", "gpio12" }; + +static const struct lpi_pingroup sm8350_groups[] = { + LPI_PINGROUP(0, 0, swr_tx_clk, qua_mi2s_sclk, _, _), + LPI_PINGROUP(1, 2, swr_tx_data, qua_mi2s_ws, _, _), + LPI_PINGROUP(2, 4, swr_tx_data, qua_mi2s_data, _, _), + LPI_PINGROUP(3, 8, swr_rx_clk, qua_mi2s_data, _, _), + LPI_PINGROUP(4, 10, swr_rx_data, qua_mi2s_data, _, _), + LPI_PINGROUP(5, 12, swr_tx_data, swr_rx_data, _, _), + LPI_PINGROUP(6, LPI_NO_SLEW, dmic1_clk, i2s1_clk, _, _), + LPI_PINGROUP(7, LPI_NO_SLEW, dmic1_data, i2s1_ws, _, _), + LPI_PINGROUP(8, LPI_NO_SLEW, dmic2_clk, i2s1_data, _, _), + LPI_PINGROUP(9, LPI_NO_SLEW, dmic2_data, i2s1_data, _, _), + LPI_PINGROUP(10, 16, i2s2_clk, wsa_swr_clk, _, _), + LPI_PINGROUP(11, 18, i2s2_ws, wsa_swr_data, _, _), + LPI_PINGROUP(12, LPI_NO_SLEW, dmic3_clk, i2s2_data, _, _), + LPI_PINGROUP(13, LPI_NO_SLEW, dmic3_data, i2s2_data, _, _), + LPI_PINGROUP(14, 6, swr_rx_data, _, _, _), +}; + +static const struct lpi_function sm8350_functions[] = { + LPI_FUNCTION(dmic1_clk), + LPI_FUNCTION(dmic1_data), + LPI_FUNCTION(dmic2_clk), + LPI_FUNCTION(dmic2_data), + LPI_FUNCTION(dmic3_clk), + LPI_FUNCTION(dmic3_data), + LPI_FUNCTION(i2s1_clk), + LPI_FUNCTION(i2s1_data), + LPI_FUNCTION(i2s1_ws), + LPI_FUNCTION(i2s2_clk), + LPI_FUNCTION(i2s2_data), + LPI_FUNCTION(i2s2_ws), + LPI_FUNCTION(qua_mi2s_data), + LPI_FUNCTION(qua_mi2s_sclk), + LPI_FUNCTION(qua_mi2s_ws), + LPI_FUNCTION(swr_rx_clk), + LPI_FUNCTION(swr_rx_data), + LPI_FUNCTION(swr_tx_clk), + LPI_FUNCTION(swr_tx_data), + LPI_FUNCTION(wsa_swr_clk), + LPI_FUNCTION(wsa_swr_data), +}; + +static const struct lpi_pinctrl_variant_data sm8350_lpi_data = { + .pins = sm8350_lpi_pins, + .npins = ARRAY_SIZE(sm8350_lpi_pins), + .groups = sm8350_groups, + .ngroups = ARRAY_SIZE(sm8350_groups), + .functions = sm8350_functions, + .nfunctions = ARRAY_SIZE(sm8350_functions), +}; + +static const struct of_device_id lpi_pinctrl_of_match[] = { + { + .compatible = "qcom,sm8350-lpass-lpi-pinctrl", + .data = &sm8350_lpi_data, + }, + { } +}; +MODULE_DEVICE_TABLE(of, lpi_pinctrl_of_match); + +static struct platform_driver lpi_pinctrl_driver = { + .driver = { + .name = "qcom-sm8350-lpass-lpi-pinctrl", + .of_match_table = lpi_pinctrl_of_match, + }, + .probe = lpi_pinctrl_probe, + .remove = lpi_pinctrl_remove, +}; + +module_platform_driver(lpi_pinctrl_driver); +MODULE_DESCRIPTION("QTI SM8350 LPI GPIO pin control driver"); +MODULE_LICENSE("GPL"); From patchwork Fri Jun 16 19:02:22 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 693330 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EBC62EB64DB for ; Fri, 16 Jun 2023 19:02:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345814AbjFPTCq (ORCPT ); Fri, 16 Jun 2023 15:02:46 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41828 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344678AbjFPTCh (ORCPT ); Fri, 16 Jun 2023 15:02:37 -0400 Received: from mail-ej1-x630.google.com (mail-ej1-x630.google.com [IPv6:2a00:1450:4864:20::630]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DAAAC3AB0 for ; Fri, 16 Jun 2023 12:02:34 -0700 (PDT) Received: by mail-ej1-x630.google.com with SMTP id a640c23a62f3a-9786fc23505so144383466b.2 for ; Fri, 16 Jun 2023 12:02:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1686942153; x=1689534153; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=9vQ02kk0CK2h3ErJz8z6Ep1qcggcVyQJ1gM1c04hINE=; b=bGWtSoGLB1peMCBf52XlzDb7bvLB1AHniFb6nvOR5O1+k+2zikcMs6Hq5hILn+fH6q 5r4KjKyryAbqrkDsa3atRIbiH3Ucj+xnbh+1XUQbzjeGzC8U5ORltaJ42Xgrz0k5cy1a tpvWKgU26po8JxYT4Zv4Cpns9u9qTBoYIRpj04dz3bqnwsJWEHygy3nims94pdAPZS3q 6IfGccUw65KvKAwq+82Cx5AEULc06/Q4TwqJMAvAY5l4e7u3202StwutsRXDDZIPeDfc lTI4cvCxP7JG/cZV/0DmGq4J5KGwVNHDkJ51RTey+Iy29pTETrRe0rzYpoYabYAIgg3M Bdhw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1686942153; x=1689534153; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=9vQ02kk0CK2h3ErJz8z6Ep1qcggcVyQJ1gM1c04hINE=; b=AezH6NAuYh6/F48J8EZW6wo/2PSh2E4BAHLl+R1J/RTTL25xs7ula+mYC8zXPdo6l+ jFoGwrvwpdvxJCHmvcXS1EOSMhT7B018A2HRvGZfIysCrOuzkUEeIWU1JtAL/xOhtV7y 4R/xP4lqS/JA8ZkR/Ore9wePbUzb2wSMYoFJ3DivSW2c9ld9VZ0j7v+nPLSPW1Ga6Vog CAkJDpKWJ9bXwSSw5DDQwuIhGyT1gUiEGhYufz/Qwhy4zQDZ9lHfOMHGOsI2a3n31W/E CSuIPlW4rdN2vHofFO4GEjlP5i5DACck+R3ucgMt5T25NnuDGK5P6dmk8fPGfIp7qvEI vskg== X-Gm-Message-State: AC+VfDzxWwXqRqJONKe9I5haxHM52fp0aRpB65+w9xgzb4hCPXBjJ3Pq TtjshPGEwiZrtg8UTVNfssAL+A== X-Google-Smtp-Source: ACHHUZ4bfewyOsXoScTqh1DZ4woXYDf81koTRzGcqGD3KU4aZGRqveNO4jTOsKsSkWsDXTTW7YtC1g== X-Received: by 2002:a17:907:3e92:b0:982:3d6a:89d with SMTP id hs18-20020a1709073e9200b009823d6a089dmr3140510ejc.75.1686942153456; Fri, 16 Jun 2023 12:02:33 -0700 (PDT) Received: from krzk-bin.. ([178.197.219.26]) by smtp.gmail.com with ESMTPSA id q2-20020a1709060e4200b00982362776cbsm5637880eji.118.2023.06.16.12.02.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Jun 2023 12:02:33 -0700 (PDT) From: Krzysztof Kozlowski To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Krzysztof Kozlowski Subject: [PATCH 3/3] arm64: dts: qcom: sm8350: add APR and LPASS TLMM Date: Fri, 16 Jun 2023 21:02:22 +0200 Message-Id: <20230616190222.2251186-3-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230616190222.2251186-1-krzysztof.kozlowski@linaro.org> References: <20230616190222.2251186-1-krzysztof.kozlowski@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add audio-related nodes: the APR in the ADSP (same as on SM8250) and LPASS TLMM pin controller. Signed-off-by: Krzysztof Kozlowski --- Bindings for SM8350: https://lore.kernel.org/linux-arm-msm/20230616185742.2250452-1-krzysztof.kozlowski@linaro.org/T/#t --- arch/arm64/boot/dts/qcom/sm8350.dtsi | 82 ++++++++++++++++++++++++++++ 1 file changed, 82 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi index 33b7ef8fd78a..9650cecb1370 100644 --- a/arch/arm64/boot/dts/qcom/sm8350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi @@ -15,7 +15,9 @@ #include #include #include +#include #include +#include #include #include @@ -1780,6 +1782,20 @@ tcsr_mutex: hwlock@1f40000 { #hwlock-cells = <1>; }; + lpass_tlmm: pinctrl@33c0000 { + compatible = "qcom,sm8350-lpass-lpi-pinctrl"; + reg = <0 0x033c0000 0x0 0x20000>, + <0 0x03550000 0x0 0x10000>; + + clocks = <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>; + clock-names = "core", "audio"; + + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&lpass_tlmm 0 0 15>; + }; + gpu: gpu@3d00000 { compatible = "qcom,adreno-660.1", "qcom,adreno"; @@ -3189,6 +3205,72 @@ IPCC_MPROC_SIGNAL_GLINK_QMP label = "lpass"; qcom,remote-pid = <2>; + apr { + compatible = "qcom,apr-v2"; + qcom,glink-channels = "apr_audio_svc"; + qcom,domain = ; + #address-cells = <1>; + #size-cells = <0>; + + service@3 { + reg = ; + compatible = "qcom,q6core"; + qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd"; + }; + + q6afe: service@4 { + compatible = "qcom,q6afe"; + reg = ; + qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd"; + q6afedai: dais { + compatible = "qcom,q6afe-dais"; + #address-cells = <1>; + #size-cells = <0>; + #sound-dai-cells = <1>; + }; + + q6afecc: clock-controller { + compatible = "qcom,q6afe-clocks"; + #clock-cells = <2>; + }; + }; + + q6asm: service@7 { + compatible = "qcom,q6asm"; + reg = ; + qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd"; + q6asmdai: dais { + compatible = "qcom,q6asm-dais"; + #address-cells = <1>; + #size-cells = <0>; + #sound-dai-cells = <1>; + iommus = <&apps_smmu 0x1801 0x0>; + + dai@0 { + reg = <0>; + }; + + dai@1 { + reg = <1>; + }; + + dai@2 { + reg = <2>; + }; + }; + }; + + q6adm: service@8 { + compatible = "qcom,q6adm"; + reg = ; + qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd"; + q6routing: routing { + compatible = "qcom,q6adm-routing"; + #sound-dai-cells = <0>; + }; + }; + }; + fastrpc { compatible = "qcom,fastrpc"; qcom,glink-channels = "fastrpcglink-apps-dsp";